LTC1623_技术文档

LTC1623

SMBus Dua l Hig h Sid e

Switc h Co ntro lle r

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DESCRIPTION

FEATURES

■

SMBus and I²C Compatible

The LTC^®1623 SMBus switch controller is a slave device

that controls two high-side N-channel MOSFETs on either

the SMBus or the I²C bus. The LTC1623 operates with an

input voltage from 2.7V to 5.5V with a low standby current

of 14µA (at 3.3V). In accordance with the SMBus specifi-

■

Built-In Charge Pumps Drive N-Channel Switches

16 Available Switches on the Same Bus

■

0.6V V and 1.4V V for DATA and CLK

IL

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■

Available in 8-Lead MSOP and S0 Packages

Low Standby Current: 14µA

Eight Addresses from Two Three-State Address Pins

Internal Power-On Reset Timer

Internal Undervoltage Lockout

No Need for External Pull-Up Resistors at Output

No Need for Secondary Power Source

cation, the LTC1623 maintains the 0.6V V and 1.4V V

input thresholds throughout the supply voltage range.

IL

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Using the 2-wire interface, CLK and DATA, the LTC1623

monitors the bus for a start condition (DATA going from

hightolowwhileCLKis high).Oncedetected,theLTC1623

compares its address with the first (address) byte sent

overthebus fromthemaster.Ifmatched,theLTC1623will

execute the second (command) byte from the master and

independently control the built-in charge pumps to drive

two external switches.

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APPLICATIONS

■

Computer Peripheral Control

Laptop Computer Power Plane Switching

Portable Equipment Power Control

Industrial Control Systems

■

The LTC1623 has two three-state programmable address

pins, thus allowing eight different addresses and a total of

sixteen available switches on the same bus.

■

Handheld Equipment

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATION

V

CC

Gate Drive Voltage

2.7V TO 5.5V

14

T = 25°C

J

10µF

12

10

8

*

V

CC

GA

GB

Q1

CLK

(FROM

SMBus)

DATA

Q2

LTC1623

AD0

AD1

6

(PROGRAMMABLE)

LOAD2

LOAD1

GND

4

2

* SILICONIX Si69260Q

1623 TA01

0

2

3

4

5

6

1

SUPPLY VOLTAGE (V)

1623 G01

1

LTC1623

W W

U W

ABSOLUTE MAXIMUM RATINGS

(Voltages Referred to GND Pin)

Operating Temperature Range

Input Supply Voltage (V ) ..........................–0.3V to 6V

CC

LTC1623C.................................................. 0° to 70°C

LTC1623I............................................ –40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

DATA, CLK (Bus Pins 1, 2) ..........................–0.3V to 6V

AD0, AD1 (Address Pins 3, 5) ..... –0.3V to (V + 0.3V)

CC

GA,GB (Gate Drive Pins 6, 7).......... –0.3V to (V + 7V)

CC

Junction Temperature........................................... 125°C

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PACKAGE/ORDER INFORMATION

ORDER PART

TOP VIEW

NUMBER

TOP VIEW

DATA

CLK

AD0

1

2

3

4

8

7

6

5

V

CC

DATA 1

CLK 2

8 V

CC

7 GA

6 GB

5 AD1

GA

GB

LTC1623CS8

LTC1623IS8

LTC1623CMS8

AD0

3

GND 4

GND

AD1

MS8 PACKAGE

8-LEAD PLASTIC MSOP

S8 PART MARKING

MS8 PART MARKING

LTCH

S8 PACKAGE

8-LEAD PLASTIC SO

T

_JMAX= 125°C, θ_JA= 150°C/ W

1623

1623I

T

_JMAX= 125°C, θ_JA= 110°C/ W

Consult factory for Military grade parts.

T = 25°C, V_CC= 5V unless otherwise specified. C_GA= 1000pF, C_GB= 1000pF

A

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Operating Supply Voltage Range

Supply Current

2.7

5.5

V

CC

I

Charge Pump Off, AD0 and AD1High or Low,

DATA and CLK High

V

= 2.7V

= 3.3V

= 5V

●

12

14

17

30

µA

VCC

CC

V

CC

V

CC

I

Supply Current

GA or GB High (Command Byte 00000001 or 00000010)

Both GA and GB High (Command Byte 00000011)

●

140

162

250

µA

VCC

V

GS

Gate Voltage Above Supply

V

= 2.7V

= 3.3V

= 5.5V

●

2.7

4.5

4.2

5.4

6.4

7

V

CC

V

CC

V

CC

V

UVLO

Undervoltage Lockout

Falling Edge (Note1)

●

1.5

2.0

2.5

V

t

Power-On Reset Delay Time

V

CC

= 2.7V (Note2)

= 5.5V

300

1000

µs

POR

CC

f

Charge Pump Oscillator Frequency

(Note 3)

300

kHz

OSC

t

Turn-On Time into 1000pF

V

CC

= 2.7V (From ON to GA, GB = V + 1V) (Note 4)

170

180

µs

ON

CC

= 5.5V (From ON to GA, GB = V + 2V) (Note 4)

CC

Turn-Off Time into 1000pF

V

= 2.7V (From OFF to GA, GB = 100mV) (Note 5)

= 5.5V (From OFF to GA, GB = 100mV) (Note 5)

17

12

µs

OFF

CC

V

CC

V

DATA/CLK Input Low Voltage

DATA/CLK Input High Voltage

V

= 2.7V to 5.5V

CC

0.6

V

IL

CC

V

IH

V

1.4

2

LTC1623

ELECTRICAL CHARACTERISTICS

T_A= 25°C, V_CC= 5V unless otherwise specified. C_GA= 1000pF, C_GB= 1000pF

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

AD0 and AD1 Input Low Voltage

AD0 and AD1 Input High Voltage

Data Output Low Voltage

V

= 2.7V to 5.5V

= 2.7 to 5.5V, I = 350µA

PULLUP

●

0.2

V

IL

CC

V

IH

V

CC

V – 0.2

CC

V

OL

V

CC

0.22

5

0.4

V

C

IN

Input Capacitance

pF

(DATA, CLK, AD0, AD1)

I

IN

Input Leakage Current (DATA, CLK)

Input Leakage Current(AD0, AD1)

±1

µA

±250

nA

SMBus Related Specs (Note 6)

f

SMBus Operating Frequency

Start Condition Setup Time

Bus Free Time Between Stop and Start

Start Condition Hold Time

Stop Condition Setup Time

Data Hold Time

10

4.7

4.0

300

250

4.7

4.0

100

kHz

µs

ns

µs

ns

µA

SMB

t

SUSTA

BUF

HDSTA

SUSTP

HDDAT

SUDAT

LOW

HIGH

f

Data Setup Time

Clock Low Period

Clock High Period

50

300

1000

350

Clock /Data Fall Time

Clock/Data Rise Time

r

I

Current Through External Pull-Up

Resistor on DATA Pin

(Data Pull-Down Current Capacity)

= 2.7V to 5.5V

100

PULLUP

V

CC

The

●

denotes the specifications which apply over the full operating

Note 4: ON is enabled upon receiving the Stop condition from the SMBus

temperature range.

master.

Note 1: Approximately 3% hysteresis is provided to ensure stable

Note 5: OFF is enabled upon receiving the Stop condition from the SMBus

operation and eliminate false triggering by minor V glitches.

master.

CC

Note 2: Measured from V > V

to SMBus ready for data input.

Note 6: SMBus timing specs are guaranteed but not tested.

CC

UVLO

Note 3: The oscillator frequency is not tested directly but is inferred from

turn-on time.

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PIN FUNCTIONS

DATA: (Pin 1) Open-Drain Connected Serial Data Inter-

AD1: (Pin 5) Higher Three-State Programmable Address

face. Must be pulledhightoV with externalresistor. The

Pin. Must be connected directly to V , GND, or V /2

CC

CC CC

pull-up current must be limited to 350µA.

(using two resistors ≤ 1M). Do not float this pin.

CLK: (Pin 2) Serial Clock Interface. Must be pulled high to

GB: (Pin 6) Gate Drive to External High-Side Switch. Fully

enhanced by internal charge pump. Controlled by 2nd

LSB of command byte.

V_CCwith external resistor. The pull-up current must be

limited to 350µA.

AD0: (Pin 3) Lower Three-State Programmable Address

GA: (Pin 7) Gate Drive to External High-Side Switch. Fully

enhanced by internal charge pump. Controlled by LSB of

command byte.

Pin. Must be connected directly to V , GND, or V /2

CC

(using two resistors ≤ 1M). Do not float this pin.

GND: (Pin 4) Ground.

V : (Pin 8) Input Supply Voltage. Range from 2.7V to

CC

5.5V.

3

LTC1623

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TYPICAL PERFORMANCE CHARACTERISTICS

Standby Current

Supply Current

35

400

350

300

250

200

150

100

50

V

CC

= 2.7V

30

25

20

V

= 5V

CC

15

10

5

V

CC

= 2.7V

BOTH CHANNELS ON

ONE CHANNEL ON

0

–60

0

–60

–40 –20

0

20 40

80 100

60

–40 –20

0

20 40

60

80 100

TEMPERATURE (°C)

1623 G02

1623 G04

Supply Current

400

350

300

250

200

150

100

50

400

350

300

250

200

150

100

50

V

CC

= 5V

V

CC

= 6V

BOTH CHANNELS ON

ONE CHANNEL ON

0

–60

0

–60

–40 –20

0

20 40

80 100

–40 –20

0

20 40

80 100

60

TEMPERATURE (°C)

1623 G03

1623 G05

t_ONvs Temperature

t_OFFvs Temperature

500

450

400

350

300

250

200

150

100

50

20

18

16

14

12

10

8

V

= 2.7V

CC

V

CC

= 5.5V

V

= 2.7V

= 5.5V

CC

V

CC

6

4

2

0

–60

0

–60

–40 –20

0

20 40

80 100

60

–40 –20

0

20 40

80 100

60

TEMPERATURE (°C)

1623 G06

1623 G07

4

LTC1623

W

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TYPICAL PERFORMANCE CHARACTERISTICS

GA, GB Output Voltage

DATA V_OLvs Temperature

16

500

450

400

350

300

250

200

150

100

50

V

CC

= 5V

V

CC

= 5V

14

12

10

8

I

= 350µA

PULLUP

6

4

2

0

–60

–40 –20

0

20 40

80 100

–60 –40 –20

0

20 40 60 80 100

60

TEMPERATURE (°C)

1623 G08

1623 G09

V_GSvs Temperature

Gate Drive Current

7

6

5

4

3

2

1

0

100

10

1

V

= 5.5V

CC

V

= 6V

V

= 5V

CC

V

CC

= 3.3V

= 2.7V

V

= 3.3V

CC

V

CC

V

= 2.7V

CC

0.1

20 40

80 100

–60

–40 –20

0

60

0

1

2

3

4

5

6

7

GATE VOLTAGE ABOVE SUPPLY (V

)

GS

TEMPERATURE (°C)

1623 G11

1623 G10

5

LTC1623

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W

TI I G DIAGRA

t

r

t

SUSTP

HIGH

HDSTA

f

CLK

t

HDDAT

LOW

SUSTA

t

SUDAT

DATA

1623 TD01

STOP

START

U

W

FU CTIO AL BLOCK DIAGRA

V

CC

UNDER-

VOLTAGE

LOCKOUT

PORB

POWER-ON

RESET

2V

START-

AND-STOP

DETECTORS

ACK

INPUT

BUFFER

1

2

DATA

CLK

GLUE

LOGIC

10k

SHIFT

REGISTER

7

6

GA

GB

REGULATING

CHARGE

PUMPS

OUTPUT

LATCHES

INPUT

BUFFER

COUNTER

AD0

AD1

3

5

ADDRESS

DECODER

ADDRESS

COMPARATOR

1623 BD

6

LTC1623

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OPERATIO

SMBus Operation

acknowledges the master by pulling the data line low

before the rising edge of the ninth clock cycle.

SMBus is a serial bus interface that uses only two bus

lines, DATA and CLK, to control low power peripheral

devices inportableequipment. Itconsists ofmasters, also

known as hosts, and slave devices. The master of the

SMBus is always the one to initiate communications to its

By now, all other nonmatching slave devices will have

gone back to their original standby states to wait for the

next start signal. Meanwhile, upon receiving the acknowl-

edge from the matching slave, the master then sends out

slave devices by varying the status of the DATA and CLK the command byte. In the case of the LTC1623, the two

lines. The SMBus specification establishes a set of proto-

cols that devices on the bus must follow during commu-

nications.

LSBs of this second byte from the master are the signals

controlling the status of the external switches; a digital

“one”turns onthechargepumptodriveuptheoutputgate

voltage while a digital “zero” shuts down the charge pump

and discharges the output gate voltage to zero.

The protocol that the LTC1623 uses is the Send Byte

Protocol.Inthis protocol,themasterfirstsends outaStart

signal by switching the DATA line from high to low while

CLK is high. (Because there may be more than one master

on the same bus, an arbitration process takes place if two

masters attempt to take control of the DATA line simulta-

neously; the first master that outputs a one while the other

master is zero loses the arbitration and becomes a slave

itself.)Upondetectingthis Startsignal,allslavedevices on

the bus wake up and get ready to shift in the next byte of

data.

After receiving the command byte, the slave device

(LTC1623) needs to again acknowledge the master by

pulling the DATA line low on the following clock cycle. The

master then ends this Send Byte Protocol by sending the

Stop signal, which is a transition from low to high on the

DATA line while the CLK line is high. Valid data is shifted

into the output latch on the last acknowledge signal; the

externalswitchwillnotbeenabled,however,untiltheStop

signal is detected. This double-buffering feature allows

theusertodaisy-chainseveraldifferentlyaddressedSMBus

devices suchthattheiroutputexecutions aresynchronous

to the Stop signal even though valid data were loaded into

their output latches at different times. Figure 1 shows an

example of this special protocol. If somehow either the

Start or the Stop signal is detected in the middle of a byte,

the slave device (LTC1623) will regard this as an error and

reject all previous data. Other than the Stop and Start

conditions, DATA must be stable during CLK high; DATA

can change state only during CLK low.

The master then sends out the first byte. The first seven

bits ofthis byteconsistoftheaddress ofthedevicethatthe

master wishes to communicate with. The last bit indicates

whether the command will be a read (logic one) or write

(logic zero). Because the LTC1623 is a slave device that

canonlybewrittentobyamaster,itwillignoretheensuing

commands of the master if it wants to read from the

LTC1623, even if the address sent by the master matches

that of the LTC1623. After reception of the first byte, the

slave device (LTC1623) with the matching address then

START ADD1 A COMMAND A START ADD2 A COMMAND A START ADD3 A COMMAND A STOP

1623 F01

Figure 1. Daisy-Chaining Multiple SMBus Devices

Example of Send Byte Protocol to Slave Address 1011000 Turning GA and GB On

CLK

1

0

ACK

START

1

0

1

ACK STOP

(WRITE)

(PROGRAMMABLE)

DATA

(GB ON)(GA ON)

ADDRESS BYTE

COMMAND BYTE

1623 TD02

7

LTC1623

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OPERATIO

Address

Charge Pump

The LTC1623 has an address of 1011XXX; the four MSBs

are hard-wired, but the 3 LSBs are programmed by the

userwiththehelpoftwothree-stateaddress pins. Referto

Table 1 for the pin configurations and their corresponding

addresses.

To fully enhance the external N-channel switches, an

internalchargepumpis usedtoboosttheoutputgatedrive

to a minimum of 2.7V and a maximum of 6V above V ,

CC

depending on V_CCitself. The reason for the maximum

output voltage limit is to avoid switch gate source break-

downduetoexcessivegateoverdrive. Afeedbacknetwork

To conserve standby current, it is preferable to tie the

is used to limit the charge pump output to 6V above V .

CC

address pins to either V or GND. If more than four

CC

Because the output will only need to drive the gate of the

external switch by charging and discharging the parasitic

gate capacitances, the internal charge pump, clocked by

anapproximately300KHzoscillator, is appropriatelysized

to source less than 100µA.

addresses are needed, then either one of the address pins

can be tied to the third state of V /2 by using two equal

CC

value resistors (≤1M) shown in Figure 2. Do not connect

both address pins to the V /2 state simultaneously

CC

because this is not a valid address.

Power-On Reset and Undervoltage Lockout

The LTC1623 starts up with both gate drives low. An

internal power-on reset (POR) signal inhibits operation

Table 1. Address Pin Truth Table

AD0

AD1

ADDRESS

1011000

1011001

1011010

1011011

UNUSED

1011100

1011101

1011110

1011111

until about 300µs after V crosses the undervoltage

CC

GND

lockoutthreshold(typically2V). Thecircuitincludes some

hysteresis anddelaytoavoidnuisanceresets.Onceopera-

V /2

CC

V

CC

tion begins, V must drop below the threshold for at least

CC

V /2

GND

V /2

CC

100µs to trigger another POR sequence.

V /2

CC

During standby, when both gate drive outputs are dis-

abled, quiescent current is kept to a minimum (13µA

typical) because only the UVLO block is active.

V /2

CC

V

CC

V

GND

V /2

CC

V

CC

V

CC

V

CC

Input Threshold

Anticipating the trend toward lower supply voltages, the

SMBus is specified with a V of 1.4V and a V of 0.6V.

IH

IL

WhilesomeSMBus parts mayviolatethis stringentSMBus

1

2

8

7

specification by allowing a higher V value for a corre-

DATA

IH

DATA

CLK

V

CC

spondingly higher input supply voltage, the LTC1623

meets and maintains the constant SMBus input threshold

specification across the entire supply voltage range of

2.7V to 5.5V.

CLOCK

GA

1M

LTC1623

3

4

6

5

AD0

GB

GND

AD1

LOAD1

LOAD2

1623 F02

Figure 2. LTC1623 Programmed with Address 1011001

8

LTC1623

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APPLICATIONS INFORMATION

To avoid turning on the external power MOSFETs too

quickly, an internal 10k resistor has been placed in series

with each of the output gate drive pins (see Functional

For active-low applications in which the load needs to be

on upon power-up, an external P-channel switch can be

used(Figure3).This loadcanbeswitchedofflaterafterthe

Block Diagram). Therefore, it only needs an external 0.1µF proper protocol has been sent.

capacitor to create enough RC delay (10k• 0.1µF = 1ms)

Used with the LT^®1431, the LTC1623 makes a 3.3V/3A

to slow down the ramp rate of the output gate drive. In

other words, it will take a minimum of 1ms to charge up

the external MOSFET. An additional external 1k resistor

between the 0.1µF capacitor and the gate of the MOSFET

(Figure 3) is required to eliminate possible MOSFET self

oscillations.

extremely low voltage drop regulator (Figures 4 and 5). In

this application, the other output channel can be used to

drive a separate load, or it can also be used to control the

outputoftheLDOsothattheuserhas totalcontroloverthe

switching in and switching out of the LDO (Figure 5). Also,

with the help of the LT1304-5, the LTC1623 can be used

to make a boost switching regulator with a low standby

current of 22µA (Figure 6).

V

CC

3.5V TO 5.5V

V

CC

2.7V TO 5.5V

10µF

1k

V

CC

CLK

GA

GB

Si3442DV

(FROM SMBus)

10µF

DATA

0.1µF

V

CC

1k

LTC1623

AD0

AD1

Q1

Si3442DV

GA

GB

CLK

Si3442DV

(FROM

SMBus)

(PROGRAMMABLE)

DATA

V

3.3V

0.1µF

OUT

1k

Q2

GND

LTC1623

1

3

6

Si6433DQ

510pF

3.3k

+

0.1µF

AD0

AD1

8

(PROGRAMMABLE)

470µF

6V

LT1431

5

LOAD

GND

DISPLAY

FAN

10k

680Ω

1623 F04

1623 F03

Figure 4. 3.3V/3A Extremely Low Voltage Drop

Regulator and Load Switch

Figure 3. Dual Load Switch with Q2 On upon Power-Up

V

CC

2.7V TO 4.5V

V

CC

3.5V TO 5.5V

10µF

1k

0.1µF

V

CC

10µF

CLK

Si3442DV

GA

GB

(FROM

SMBus)

DATA

V

CC

CLK

Si3442DV

3.3k

LTC1623

GA

GB

(FROM SMBus)

DATA

LOAD

AD0

AD1

Si3442DV

V

OUT

(PROGRAMMABLE)

LTC1623

AD0

AD1

3.3V

1N5817

GND

22µH*

1

3

6

510pF

(PROGRAMMABLE)

+

8

470µF

GND

LT1431

5

6V

3

4

10k

499k

8

2

5V

200mA

+

680Ω

+

100µF

LT1304-5

100k

LBO

2200µF

1k

604k

Si3442DV

SWITCHED

7

5

0.1µF

*SUMIDA CD54-220

SHDN

1623 F05

V

OUT

3.3V

1623 TA03

Figure 5. SMBus Controlled Low Dropout Regulator

Figure 6. Switching Regulator with Low-Battery

Detect Using 22µA Standby Current

9

LTC1623

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PACKAGE DESCRIPTION ^{Dimensions in inches (millimeters) unless otherwise noted.}

MS8 Package

8-Lead Plastic MSOP

(LTC DWG # 05-08-1660)

0.118 ± 0.004*

(3.00 ± 0.102)

8

7

6

5

0.118 ± 0.004**

(3.00 ± 0.102)

0.192 ± 0.004

(4.88 ± 0.10)

1

2

3

4

0.040 ± 0.006

(1.02 ± 0.15)

0.034 ± 0.004

(0.86 ± 0.102)

0.007

(0.18)

0° – 6° TYP

SEATING

PLANE

0.012

(0.30)

REF

0.021 ± 0.006

(0.53 ± 0.015)

0.006 ± 0.004

(0.15 ± 0.102)

MSOP (MS8) 1197

0.0256

(0.65)

TYP

*

DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,

PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

10

LTC1623

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PACKAGE DESCRIPTION ^{Dimensions in inches (millimeters) unless otherwise noted.}

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.189 – 0.197*

(4.801 – 5.004)

7

5

8

6

0.150 – 0.157**

(3.810 – 3.988)

0.228 – 0.244

(5.791 – 6.197)

1

3

4

2

0.010 – 0.020

(0.254 – 0.508)

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0°– 8° TYP

0.016 – 0.050

0.406 – 1.270

0.050

(1.270)

TYP

0.014 – 0.019

(0.355 – 0.483)

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

SO8 0996

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofits circuits as describedhereinwillnotinfringeonexistingpatentrights.

11

LTC1623

U

TYPICAL APPLICATIONS

Single Slot PCMCIA 3.3V/5V Switch

5V

10µF

V

CC

1k

Q1

Si3442DY

GA

GB

CLK

TO PC CARD V

0V/3.3V/5V

CC

DATA

0.1µF

Q2*

Q3*

LTC1623

10k

1µF

AD0

AD1

1k

1623 TA02

GND

0.1µF

3.3V

*1/2 Si6926DQ

LTC1623 Driving Both High Side and Low Side Switches

V

EXT

(30V MAX)

V

CC

LOW SIDE

LOAD

2.7V TO 5.5V

10µF

V

CC

1k

Si6954DQ

GA

GB

CLK

(FROM

SMBus)

DATA

0.1µF

1k

Si6954DQ

LTC1623

0.1µF

AD0

AD1

(PROGRAMMABLE)

GND

HIGH SIDE

LOAD

1623 TA05

RELATED PARTS

PART NUMBER

LTC1153/LTC1154

LTC1155/LTC1255

LTC1163

DESCRIPTION

COMMENTS

Single High Side Micropower MOSFET Drivers

Dual High Side Micropower MOSFET Drivers

Triple 1.8V to 6V High Side MOSFET Driver

Micropower DC/DC Converter

Circuit Breaker with Auto Reset

Latch-Off Current Limit

Three MOSFET Drivers in 8-Lead SO Package

Low-Battery Detector Active in Shutdown

Current Limit with Timer

LT1304

LTC1473

Dual PowerPath^TMSwitch Matrix

LTC1479

PowerPathController for Dual Battery Systems

Complete Smart Battery Controller

PowerPath is a trademark of Linear Technology Corporation.

1623f LT/TP 0598 4K • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

12

●

LINEAR TECHNOLOGY CORPORATION 1997

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com


型号：	LTC1623
厂家：	Linear
描述：	SMBus Dual High Side Switch Controller SMBus的双通道高边开关控制器开关控制器
文件：	总12页 (文件大小：148K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC1623 [Linear]

相关型号：

LTC1623C

LTC1623CMS8

LTC1623CMS8#PBF

LTC1623CMS8#TR

LTC1623CMS8#TRPBF

LTC1623CS8

LTC1623CS8#PBF

LTC1623CS8#TR

LTC1623CS8#TRPBF

LTC1623I

LTC1623IS8

LTC1623IS8#PBF