PGB2 [LITTELFUSE]
Surface Mount Polymeric ESD Suppressors; 表面贴装聚合物ESD抑制器型号: | PGB2 |
厂家: | LITTELFUSE |
描述: | Surface Mount Polymeric ESD Suppressors |
文件: | 总5页 (文件大小:519K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PulseGuard® Suppressors
Surface Mount Polymeric ESD Suppressors
PGB2 Series Halogen Free / Lead-Free
Description
PulseGuard ESD Suppressors help protect sensitive
electronic equipment against electrostatic discharge (ESD).
They use polymer composite materials to suppress fast-
rising ESD transients (as specified in IEC 61000-4-2), while
adding virtually no capacitance to the circuit.
They supplement the on-chip protection of integrated
circuitry and are best suited for low-voltage, high-speed
applications where low capacitance is important to ensure
minimal interference of data signal integrity.
The new and ultra-small surface mount PGB2 0402 series
offers a RoHS Compliant, Halogen Free, and 100% Lead
Free circuit protection alternative.
Equivalent Circuits
2
1
Features
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Product Characteristics
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Part Number
Lines Protected
Component Package
PGB2010402KRHF
1
0402
Applications
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Computer
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Electrical Characteristics
Specification
PGB2010402
Notes
ESD Capability:
IEC 61000-4-2 Direct Discharge
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Discharge Method
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Capacitance (typical)
0.07 pF, typical
Measured at 250 MHz
Measured per IEC 61000-4-2
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ResponseTime
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Some shifting in characteristics may
occur when tested over multiple
pulses at a very rapid rate
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1000 pulses min
PGB2 Series
1
www.littelfuse.com
©2011 Littelfuse
Specifications are subject to change without notice.
Revised: March 8, 2011
PulseGuard® Suppressors
Surface Mount Polymeric ESD Suppressors
Typical ESD Response CurveꢀꢀꢊꢈꢀL7ꢀ*&$ꢀꢃꢄꢅꢅꢅꢂꢆꢂꢇꢀ%JSFDUꢀ%JTDIBSHFꢋꢀ
Dimensions
Dimensions: mm (inch)
0.99 +/- 0.05
500
400
300
200
100
0
(0.039" +/- 0.002")
0.51 +/- 0.05
(0.020" +/- 0.002")
0.18 +/- 0.10
(0.007" +/- 0.004")
0.30 +/- 0.08
(0.012" +/- 0.003")
0.23 Nom.
(0.009")
0.23 +/- 0.10
(0.009" +/- 0.004")
-25
0
25
50
75
100
125
150
175
Time (ns)
Recommended for
reflow soldering only
1.55
(0.061")
0.381
(0.015")
.584
(0.023")
TypicalTLP Response Curve ꢀꢊꢉꢅꢅꢀ7ꢀ%JSFDUꢀ%JTDIBSHFꢋ
0.559
(0.022")
Recommended Pad Layout
200
150
100
50
Part Numbering System
PGB2 01 0402 KR HF
HALOGEN FREE
LEAD-FREE
HALOGEN-FREE
PULSEGUARD®
ESD SUPPRESSORS
QUANTITY &
PACKAGING CODE:
KR = 10,000 pieces
0
-15
0
15
30
45
60
75
LINES PROTECTED:
DEVICE SIZE CODE:
0402 = 0402 (1005)
Time (ns)
01 = 1 line
Typical Insertion Loss
Typical Device Capacitance
2
0
0.1
-2
-4
-6
-8
-10
-12
0.01
10
100
1000
10000
100000
100
1000
Frequency (MHz)
10000
Frequency (MHz)
PGB2 Series
Specifications are subject to change without notice.
2
www.littelfuse.com
©2011 Littelfuse
Revised: March 8, 2011
PulseGuard® Suppressors
Surface Mount Polymeric ESD Suppressors
Physical Specifications
Materials
Environmental Specifications
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OperatingTemperature
-65°C to +125°C
Biased Humity:
Biased Heat:
40°C, 95% RH, 1000 hours
85°C, 1000 hours
DeviceWeight 0.349 mg
Solderability
MIL-STD-202, Method 208
MIL-STD-202, Method 107G,
-65°C to 125°C, 30 min. cycle,
10 cycles
Thermal Shock
Soldering
Parameters
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Vibration
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Design Consideration
Chemical Resistance
MIL-STD-202, Method 215
Because of the fast rise-time of the ESD transient, proper
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consideration to achieving optimal ESD suppression. The
devices should be placed on the circuit board as close to the
source of the ESD transient as possible. Install PulseGuard
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directly behind the connector so that they are the first board-
level circuit component encountered by the ESD transient.
Solder Leach Resistance and
Terminal Adhesion
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Soldering Parameters
Reflow Condition
-Temperature Min (Ts(min)
Pb – Free assembly
)
150°C
Pre Heat -Temperature Max (Ts(max)
-Time (min to max) (ts)
)
200°C
60 – 180 seconds
Average ramp up rate (LiquidusTemp
(TL) to peak
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TS(max) toTL - Ramp-up Rate
-Temperature (TL) (Liquidus) 217°C
Reflow
-Temperature (tL)
60 – 150 seconds
260°C
PeakTemperature (TP)
Time within 5°C of actual peak
Temperature (tp)
Notes:
10 – 30 seconds
- PGB2 Series recommended for reflow soldering only
Ramp-down Rate
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Time 25°C to peakTemperature (TP)
- For recommended soldering pad layout dimensions,
please refer to Dimensions section of this data sheet
PGB2 Series
3
www.littelfuse.com
©2011 Littelfuse
Specifications are subject to change without notice.
Revised: March 8, 2011
PulseGuard® Suppressors
Surface Mount Polymeric ESD Suppressors
Packaging
Quantity &
Packaging Code
Packaging Specification
Part Number
Quantity
Packaging Option
PGB2010402
KR
10000
Tape & Reel (7” reel)
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Tape and Reel Specifications
Tt
Ds
Dd
0402 Series
(mm)
Description
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Dd - Drive hole diameter
Ds - Drive hole spacing
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0.053
1.55
4.00
0.41
1.12
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2.00
0.62
0.61
8.00
CarrierTape: 8mm, paper
Reel: 7” (178mm)
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Tw - Carrier tape width
Typical ESD PulseTest Setup
FARADAY CAGE
COMPUTER
AGILENT INFINIIUM
1.5 GHz 8 GS/s
30dB PASTERNAK ATTENUATOR
PE7025-30
TEKTRONIX LOW CAP PROBE
6158 (20xTIP)
QUADTECH 1865
RESISTANCE METER
RESISTANCE
TEST FIXTURE
ESDTEST FIXTURE
TEST BOARD W/ DUT
ESD PULSE GENERATOR
Notes:
- QuadQuadTech 1865 High Resistance Meter: Measures insulation resistance values
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- Faraday cage: Shields the acquisition equipment from the electromagnetic fields generated by the simulator
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PGB2 Series
Specifications are subject to change without notice.
4
www.littelfuse.com
©2011 Littelfuse
Revised: March 8, 2011
PulseGuard® Suppressors
Surface Mount Polymeric ESD Suppressors
Characterization Methods for ESD Suppressors
Two of the most common methods used in industry for
characterizing the performance of ESD suppressors are
ESD transient testing, per IEC 61000-4-2 ESD waveform,
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qualification of ESD suppressor performance, these
two methods have become the de-facto standard for
determining device trigger and clamp specifications. It
is common to see trigger values to be based on theTLP
method and clamping values based on the ESD transient
method. Low voltageTLP obtained trigger values most
closely resemble device DC turn-on .Since the two test
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correlate suppressor response between the two test
methods, trigger and clamp values should be specified for
each method.
Figure 1
100%
90%
I
30
I
60
10%
30n
60n
tr = 0.7 to 1.0ns
ESD transient testing, which is based on the IEC 61000-4-2
standard waveform, consists of subjecting a ESD
Figure 2
suppressor to an subnanosecond risetime 8Kv transient
generated by a commercial ESD simulator and recording
trigger and clamp voltage levels. Clamp voltage level is
obtained at 25ns. The basic ESD simulator circuit consists
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4 GHz oscilloscope(50 ohm input) with 20X resistive divider
probes and a 30dB attenuator. Figures 1 and 2 show IEC
current waveform and test setup.
ESD Simulator
Scope Probe 30db Attenuator
50 Ohm
Scope Input
1
2
330
950
46.93
46.93
+
-
8000
150pf
DUT
3.165
50
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TLP testing consists of subjecting a ESD suppressor
to a 50 ohm transmission line discharge pulse with a
subnanosecond risetime and a pulse width of 65ns. Trigger
values are obtained by varying theTLP voltage until a
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are captured using a 4 GHz oscilloscope(50 ohm input)
with 20X resistive divider probes and a 30dB attenuator.
Figures 3 and 4 show a typicalTLP voltage waveform and
test setup.
Figure 3
600
500
400
300
200
100
0
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for obtaining trigger and clamp voltage levels. Trigger and
clamp values will vary from one test setup to another.
Due to the subnanosecond risetime of ESD andTLP
waveforms, any parasitic inductance and capacitance in
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due to inductance and capacitance need to be subtracted
from the final measurement. It is important to remember
that the test system will introduce a load across the
ESD suppressor under test and this will also affect
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and probes(>1Ghz) need to be used for obtaining best
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at least 20X in order to obtain high input impedance for
measurements.
0
20
40
60
80
Time in nanoseconds
Figure 4
TLP
Scope Probe 30db Attenuator 50 Ohm
Scope Input
1
2
950
46.93
46.93
+
500
DUT
3.165
50
-
PGB2 Series
5
www.littelfuse.com
©2011 Littelfuse
Specifications are subject to change without notice.
Revised: March 8, 2011
相关型号:
PGB20201
PULSE-GUARD® ESD Suppressors help protect sensitive electronic equipment against electrostatic discharge (ESD).
LITTELFUSE
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