概述
规格参数
数据手册LS7262 概述
BRUSHLESS DC MOTOR COMMUTATOR/CONTROLLER 无刷直流电机换向器/控制器 运动控制电子器件
LS7262 规格参数
| 是否Rohs认证： | 不符合 | 生命周期： | Contact Manufacturer |
| 包装说明： | DIP, DIP20,.3 | Reach Compliance Code： | compliant |
| 风险等级： | 5.78 | JESD-30 代码： | R-PDIP-T20 |
| JESD-609代码： | e0 | 端子数量： | 20 |
| 最高工作温度： | 125 °C | 最低工作温度： | -40 °C |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | DIP |
| 封装等效代码： | DIP20,.3 | 封装形状： | RECTANGULAR |
| 封装形式： | IN-LINE | 电源： | 5/28 V |
| 认证状态： | Not Qualified | 子类别： | Motion Control Electronics |
| 最大供电电流 (Isup)： | 6 mA | 表面贴装： | NO |
| 温度等级： | AUTOMOTIVE | 端子面层： | Tin/Lead (Sn/Pb) |
| 端子形式： | THROUGH-HOLE | 端子节距： | 2.54 mm |
| 端子位置： | DUAL | Base Number Matches： | 1 |
LS7262 数据手册
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PDF下载LS7260
LS7262
LSI/CSI
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405
U
® L
A3800
BRUSHLESS DC MOTOR COMMUTATOR/CONTROLLER
November 1997
FEATURES:
• Direct drive of P-Channel and N-Channel FETs (LS7260)
• Direct drive of PNP and NPN transistors (LS7262)
• Six outputs drive power switching bridge directly
• Open or closed loop motor speed control.
• +5V to +28V operation (Vss - VDD).
• Externally selectable input to output code for 60°,
120°, 240°, or 300° electrical sensor spacing.
• Three or four phase operation
• Analog Speed control
• Direction control
• Output Enable control
• Positive Static Braking
CONNECTION DIAGRAM - TOP VIEW
CS1
1
2
3
20
19
CS2
OUT 1
FWD/REV
18 VDD (-V)
OUT 2
OUT 3
17
S3
4
5
6
7
COMMON
OUT 4
16 S2
15
S1
OUT 5
OUT 6
14
13
12
OSCILLATOR
V TRIP
8
9
• Overcurrent Sensing
BRAKE
OVERCURRENT SEN
VSS (+V)
• LS7260, LS7262 (DIP); LS7260-S, LS7262-S (SOIC)
ENABLE 10
11
LS7260-TS, LS7262-TS (TSSOP) - See Connection Diag.
DESCRIPTION:
INPUT/OUTPUT DESCRIPTION:
The LS7260/LS7262 are monolithic, MOS integrated cir-
cuits designed to generate the signals necessary to con-
trol a three phase or four phase brushless DC motor.
They are the basic building blocks of a brushless DC
motor controller. The circuits respond to changes at the
SENSE inputs, originating at the motor position sensors,
to provide electronic commutation of the motor wind-
ings. Pulse Width Modulation of outputs for motor speed
control is accomplished through either the ENABLE in-
put or through the Analog input (VTRIP) in conjunction
with the OSCILLATOR input. Overcurrent circuitry is
provided to protect the windings, associated drivers and
power supply. The overcurrent circuitry causes the ex-
ternal output drivers to switch off immediately upon
sensing the overcurrent condition and on again only
when the overcurrent condition disappears and the pos-
itive edge of either the ENABLE input or the sawtooth
OSCILLATOR occurs. This limits the overcurrent sense
cycling to the chopping rate of the ENABLE input or the
sawtooth OSCILLATOR.
COMMUTATION SELECTS (Pins 1, 20)
These inputs are used to select the proper sequence of outputs
based on the electrical separation of the motor position sensors.
See Table 3. Note that in all cases the external output drivers
are disabled for invalid SENSE input codes. Internal pull down
resistors are provided at Pins 1 and 20 causing a logic zero
when these pins are left open.
FORWARD/REVERSE (Pin 19)
This input is used to select the proper sequence of Outputs for
the desired direction of rotation for the Motor (See Table 3). An
internal pull-up resistor holds the input high when left open.
SENSE INPUTS (Pins 15, 16, 17)
These inputs provide control of the output commutation
sequence as shown in Table 3. S1, S2, S3 originate in the posi-
tion sensors of the motor and must sequence in cycle code or-
der. Hall Switch pull-up resistors are provided at Pins 15, 16 and
17. The positive supply of the Hall devices should be common
to the chip Vss.
A positive braking feature is provided to effect rapid de-
celeration. While the LS7262 is designed for driving
NPN and PNP transistors (See Fig. 2), the LS7260 is
designed to drive both NMOS and PMOS Power FETs
and develops a full 12V drive for both the N-Channel
and P-Channel devices (See Fig. 1) when using a 12V
power supply.
BRAKE (Pin 9)
For the LS7262, a high level at this input unconditionally turns
OFF Outputs 1, 2 and 3 and turns ON Outputs 4, 5 and 6 (See
Fig. 2). For the LS7260, a high level at this input turns ON Out-
puts 1, 2 and 3 and Outputs 4, 5 and 6 (See Fig. 1). In both
cases, transistors Q101, Q102 and Q103 cut off and transistors
Q104, Q105 and Q106 turn on, shorting the windings together,
The BRAKE has priority over all other inputs.
7260-041100-1
BRAKE (Pin 9) (Cont’d)
The sawtooth waveform at the OSC input typically varies
from .4 Vss to Vss-2V. The purpose of the VTRIP input in
conjunction with the OSCILLATOR is to provide variable
speed adjustment for the motor by means of PWM.
An internal pull-down resistor holds the input low when left
open. (Center- tapped motor configuration requires a power
supply disconnect transistor controlled by the BRAKE signal
- See Figure 2A).
OSCILLATOR (Pin 14)
ENABLE (Pin 10)
An R and C connected to this input (See Figure 6) provide
the timing components for a sawtooth OSCILLATOR. The
signal generated is used in conjunction with VTRIP to pro-
vide PWM for variable speed applications and to reset the
overcurrent condition.
A high level at this input permits the output to sequence as
in Table 3, while a low disables all external output drivers.
An internal pull-up resistor holds the input high when left
open. Positive edges at this input will reset the overcurrent
flip-flop.
OUTPUTS 1, 2, 3 (Pins 2, 3, 4)
OVERCURRENT SENSE (Pin 12)
For the LS7262, these open drain Outputs are enabled as
shown in Table 2 and provide base current to PNP tran-
sistors or gate drive to P-Channel FET drivers when COM-
MON is floating. If COMMON is held at Vss, these Outputs
can provide drive to NPN transistors or N-Channel FET
drivers. For the LS7260, these Outputs provide drive to
P-Channel FET drivers if COMMON is held at VSS.
This input provides the user a way of protecting the motor
winding, drivers and power supply from an overload condi-
tion. The user provides a fractional-ohm resistor between
the negative supply and the common emitters of the NPN
drivers or common sources of N-Channel FET drivers. This
point is connected to one end of a potentiometer (e.g. 100K
ohms), the other end of which is connected to the positive
supply. The wiper pickoff is adjusted so that all outputs are
disabled for currents greater than the limit. The action of the
input is to disable all external output drivers. When BRAKE
exists, OVERCURRENT SENSE will be overridden. The
overcurrent circuitry latches the overcurrent condition. The
latch may be reset by the positive edge of either the saw-
tooth OSCILLATOR or the ENABLE input. When using the
ENABLE input as a chopped input, the OSC input should be
held at VSS. When the ENABLE input is held high, the OSC-
must be used to reset the overcurrent latch.
OUTPUTS 4, 5, 6 (Pins 6, 7, 8)
These open drain Outputs are enabled as in Table 2 and
provide base current to NPN transistors or gate drive to
N-Channel FET drivers.
COMMON (Pin 5)
The COMMON may be connected to Vss when using a
center-tapped motor configuration or when using all NPN
or N-Channel drivers. For the LS7260, the COMMON is
tied to VSS.
VTRIP (Pin 13)
Vss (Pin 11)
This input is used in conjunction with the sawtooth OSC in-
put. When the voltage level applied to VTRIP is more neg-
ative than the waveform at the OSC input, the Outputs will
be enabled as shown in Table 3. When VTRIP is more pos-
itive than the sawtooth OSCILLATOR waveform the external
output drivers are disabled.
Supply voltage positive terminal.
VDD (Pin 18)
Supply voltage negative terminal (ground).
MAXIMUM RATINGS:
PARAMETER
Storage Temperature
Operating Temperature
SYMBOL
TSTG
TA
TA (1)
VMAX
VALUE
UNIT
°C
°C
°C
V
-65 to +150
-25 to +85
-40 to +125
-30 to +.5
Voltage (any pin to Vss)
(1) Available on special order. Contact factory for details.
DC ELECTRICAL CHARACTERISTICS:
(All Voltages Referenced to VDD, TA = 25°C unless otherwise specified)
SYMBOL
VSS
MIN
5
-
TYP
-
4.5
MAX
28
6
UNIT
V
mA
Supply Voltage
Supply Current (Outputs not loaded)
IDD
Input Specifications:
BRAKE, ENABLE, CS1, CS2
S1, S2, S3, FWD/REV
Voltage (Logic "1")
RIN
-
150
-
KW
VIH
VIL
VSS-1.5
0
-
-
VSS
VSS-4.0
V
V
(Logic "0")
OVERCURRENT SENSE (See Note)
Threshold Voltage
VTH
(VSS/2)-.25
-
(VSS/2)+.25
V
7260-111297-2
Oscillator:
Frequency Range
External Resistor Range
Fosc
Rosc
0
22
1/RC
-
100
1000
kHz
kW
NOTE: Theoretical switching point of the OVERCURRENT SENSE input is one half of the power supply determined by an internal bias
network in manufacturing. Tolerances cause the switching point to vary plus or minus .25V. After manufacture, the switching point
remains fixed within 10mV over time and temperature. The input switching sensivity is a maximum of 50mV. There is no hysteresis on
the OVERCURRENT SENSE input.
TYPICAL CIRCUIT OPERATION:
The oscillator is used for motor speed control as explained
under VTRIP. Both upper and lower motor drive transistors are
pulse width modulated (See Fig. 1 or 2) during speed control.
For the LS7262, the outputs turn on in pairs (See Table 3). For
example (See dotted line, Fig. 2): Q8 and Q4 are on, thus ena-
bling a path from the positive supply through the emitter-base
junction of Q101, Q8, Q4, R5, the base emitter junction of
Q105 and the fractional-ohm resistor to ground. The current in
the above described path is determined by the power supply
voltage, the voltage drops across the base-emitter junctions of
Q101 and Q105 (1.4V for single transistor or 2.8V for Darling-
ton pairs), the impedance of Q8 and Q4 and the value of R5.
Table 1 provides the recommended value for R5. R4 and R6
are the same value.
For the LS7260, (See Fig. 1) the external drivers also
turn on in pairs. Internal operation is somewhat different
than the LS7262. For example, external transistors Q101
and Q105 will turn on when internal transistor Q8 turns
off and Q4 turns on enabling full power supply drive on
Q101 and Q105. Since Pin 5 is tied to VSS, the gate of P-
channel Driver Q101 is brought to ground by R1 and the
Gate of N-Channel driver Q105 is brought to VSS by Q4.
Other external output pairs turn on similarly and the com-
mutation sequence is identical to that of the LS7262 (Ta-
ble 3). Table 2 indicates the minimum value of R1
(=R2=R3=R4=R5=R6) needed as a function of output
drive voltage for Fig. 1.
TABLE 1
TABLE 2
For Power Supply 5V-28V
OUTPUT CURRENT LIMITING RESISTOR SELECTION TABLE
POWER
SUPPLY
(VOLTS)
OUTPUT CURRENT
R1 (k ohms)
Output Voltage
20 15 10 7.5
5
2.5 mA
10
4.0
1.5
Vss -0.5
Vss -1.0
Vss -2.0
6
9
** ** ** ** ** .24
** ** ** .43 .86 2.2
.20 .33 .62 .91 1.5 3.3
.36 .56 .91 1.3 2.2 4.3 Resistance
12
15
18
21
24
28
*
*
*
*
.75 1.2 1.6 2.7 5.1
(kW)
*
*
*
1.5 2.0 3.3 6.2
1.8 2.3 3.6 7.5
*
2.7 4.3 9.1
*causes excessive power dissipation
**exceeds max current possible for this voltage
TABLE 3. OUTPUT COMMUTATION SEQUENCE FOR THREE PHASE OPERATION
CS1 CS2 CS1 CS2 CS1 CS2 CS1 CS2 FWD/REV=1
SEQUENCE SELECT
FWD/REV=0
0
0
0
1
1
0
1
1
ELECTRICAL SEPARATION
SENSE INPUTS
(-60°-)
S1 S2 S3
0 0 0
1 0 0
1 1 0
1 1 1
0 1 1
0 0 1
(-120°-)
S1 S2 S3
0 0 1
1 0 1
1 0 0
1 1 0
0 1 0
0 1 1
(-240°-)
S1 S2 S3 S1 S2 S3 ENABLED A
(-300°-)
OUTPUTS
DRIVERS
OUTPUTS DRIVERS
*
*
*
*
C
Off
-
B
C
ENABLED
A
-
B
+
0 1 0
1 1 0
1 0 0
1 0 1
0 0 1
0 1 1
0 1 1
1 1 1
1 1 0
1 0 0
0 0 0
0 0 1
O1, O5
O3, O5
O3, O4
O2, O4
O2, O6
O1, O6
+
Off
-
-
Off O2, O4
-
+
+
O2, O6
O1, O6
Off
+
+
+
Off
-
Off
+
-
-
Off O1, O5
Off
+
*
See Figures 1 and 2.
For the LS7260,
Outputs O1,O2,O3 are
the logical inversions of
the corresponding Out-
puts of the LS7262.
Off
+
+
Off
-
-
O3, O5
O3, O4
Off
-
-
Off
+
0 1 0
1 0 1
0 0 0
1 1 1
0 0 0
1 1 1
0 1 0
1 0 1
ALL DISABLED
ALL DISABLED
ALL DISABLED
ALL DISABLED
The OVERCURRENT input (BRAKE low) enables external output drivers in normal sequence when more negative than Vss/2 and disables
all external output drivers when more positive than Vss/2. The OVERCURRENT is sensed continuously, and sets a flip flop which is reset
by the rising edge of the ENABLE input or the sawtooth OSCILLATOR. (See description under OVERCURRENT SENSE.)
The VTRIP Input (BRAKE low) enables the outputs in normal sequence when more negative than the OSC input and disables all outputs
when more positive than the OSC input. The VTRIP input may be disabled by connecting it to VDD and the OSC input to VSS.
(See description under VTRIP)
7260-111397-3
Vss
P
P
P
O1
Q101
Q102
Q103
2
R1
R2
O2
3
R3
O3
4
M
O
T
O
R
Q8
Q5
Q6
Q3
L3
L2
Q7
Q4
Output
Encoder
L1
5
B
A
C
O6
8
O5
7
N
N
N
O4
Vss
Q104
Q105
Q106
6
12
R4
R6
R5
TO
Fractional
Ohm
Resistor
OVERCURRENT
ADJUSTMENT
FIGURE 1. LS7260 THREE PHASE OUTPUT DRIVER CIRCUITRY
Vss
Direction of Current Flow
11
R3
R2
R1
O1
BRAKE
2
Q101
Q102
Q103
O2
3
O3
4
M
O
T
O
R
L3
L2
Q8
Q5
Q6
Q7
Q4
Output
Encoder
L1
5
B
A
C
Q3
R6
O6
8
R5
R4
O5
7
Vss
O4
Q105
Q104
Q106
6
12
R7
R8
R9
TO OVERCURRENT
ADJUSTMENT
Fractional
Ohm
Resistor
FIGURE 2. LS7262 THREE PHASE OUTPUT DRIVER CIRCUITRY
7260-100897-4
6
O4
BRAKE
BRAKE
INPUT
9
FIGURE 2A.
SINGLE-ENDED
DRIVER CIRCUIT
7
O5
This configuration requires only
one base current limiting resistor
connected from the COMMON
pin to Vss.
LS7262
5
8
Vss
COMMON
O6
MOTOR
SUPPLY
19
F/R
FORWARD
REVERSE
LS7260
or
LS7262
IN914
10
ENABLE
IN914
Inputs from SG1731
or UC1637
2.2K
FIGURE 3. PRECISION CONTROL BRUSHLESS DC MOTOR DRIVE
For controlled acceleration and deceleration of motors in
the forward or reverse directions, a motor control pulse
width modulator circuit such as the SG1731 or UC1637
can be interfaced with the LS7260 or LS7262.
the forward input directly to Pin 19, the motor can only
operate in the forward direction when the forward input is
high and only in the reverse direction when the reverse
input is high. Motor direction is determined by relative
pulse widths of the forward and reverse inputs while ac-
celeration or deceleration is determined by variations of
these widths.
The logical OR gate made up of the resistor-diode net-
work permits the LS7260 or LS7262 to be enabled when
either the forward or reverse input is high. By applying
TABLE 4. OUTPUT COMMUTATION SEQUENCE FOR FOUR PHASE OPERATION
CS1=CS2=0 OUTPUTS ENABLED
S1
0
1
1
0
S2,S3
FWD/REV = 1
FWD/REV = 0
0
0
1
1
O1
O3
O4
O6
O4
O6
O1
O3
For four phase commutation (See Fig. 4), the COMMUTA- connected to Vss. The sensors have an electrical separa-
TION SELECT inputs must both be tied low. The S1 input
is driven from one motor position sensor while the S2 and
S3 inputs are connected together and driven by the
second position sensor. The COMMON input must be
tion of 90°. Figure 4A indicates the use of Bipolar Tran-
sistors. Figure 4B indicates the use of FETs. In both
cases, the LS7262 is used.
7260-110697-5
FIGURE 4. FOUR PHASE OUTPUT DRIVER CIRCUITRY
FIGURE 4A
FIGURE 4B
MOTOR SUPPLY
MOTOR SUPPLY
5
5
9
COMMON
Vss
Vss
L1
COMMON
9
2
BRAKE INPUT
BRAKE
O1
L1
L2
2
O1
L2
4
6
O3
4
6
O3
LS7262
O4
LS7262
L3
L3
L4
BRAKE
BRAKE
O4
L4
8
O6
8
O6
12
12
OVERCURRENT
SENSE
OVERCURRENT
SENSE
Vss
Vss
Vss
FIGURE 5
CLOSED-LOOP SPEED CONTROLLER
FROM MOTOR
POSITION
SENSOR
R1
15
S1
A closed loop system can be configured by differentiating
one of the motor position sense inputs and integrating only
the negative pulses to form a DC voltage that is applied to
the inverting input of an op-amp. The non-inverting input
voltage is adjusted with a potentiometer until the resultant
voltage at VTRIP causes the motor to run at desired speed.
The R2-C1 differentiator, the R3-D1 negative pulse trans-
mitter and the R4-C2 integrator form a frequency to voltage
converter. An increase in motor speed above the desired
speed causes VTRIP to increase which lowers the PWM
and the resultant motor speed. A decrease in speed lowers
VTRIP and raises the PWM and the resultant motor speed.
For proper operation, both R5 and R6 should be greater
than R4, and R4 in turn should be greater than both R2 and
R3. Also, the R4-C2 time constant should be greater than
the R2-C1 time constant. C3 may be added across R6 for
additional VTRIP smoothing.
Vss
R2
C1
R3
D1
LS7260
or
LS7262
C3
R6
R4
R5
13
-
+
C2
V TRIP
Vss
Vss
C4
14
OSCILLATOR
R7
R8
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.
7260-082697-6
CS1
CS2
1
COMMUTATION
SEQUENCE
SELECT LOGIC
4
COMMON
5
20
8
+V
INPUT
DECODER
2
O1
O2
19
15
16
17
3
4
6
FWD/REV
6
OUTPUT
DRIVERS
S1
O3
O4
S2
S3
OUTPUT
ENCODER
7 O5
O6
9
BRAKE
8
+V
R
POSITIVE
10
ENABLE
EDGE
DETECTOR
R
S
Q
R
+
-
OVERCURRENT
SENSE
12
13
POSITIVE EDGE
DETECTOR
V TRIP
+V
-
+
+V
GND
VSS
11
.001µF
33K
18 VDD
SAWTOOTH
OSCILLATOR
14
NOTE: With indicated components,
oscillator frequency is approximately 30KHz.
AM
FIGURE 6. LS7260 AND LS7262 BLOCK DIAGRAM
LS7262 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| LS7262-S | ETC | Controller Miscellaneous - Datasheet Reference | 获取价格 |
|
| LS7262C | ETC | DC Motor Controller/Driver | 获取价格 |
|
| LS7263-01 | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-01C | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-02 | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-02C | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-03 | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-03C | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-07 | ETC | Industrial Control IC | 获取价格 |
|
| LS7263-07C | ETC | Industrial Control IC | 获取价格 |
|
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