LY65W1024RL-25LLI [LYONTEK]
128K X 8 BIT HIGH SPEED CMOS SRAM;
| 型号： | LY65W1024RL-25LLI |
| 厂家： | 
Lyontek Inc. |
| 描述： | 128K X 8 BIT HIGH SPEED CMOS SRAM 静态存储器 |
| 文件： | 总13页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Description
Initial Issue
Delete E-grade
Issue Date
Aug.27.2010
Apr.06.2012
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
FEATURES
GENERAL DESCRIPTION
The LY65W1024 is a 1,048,576-bit low power
CMOS static random access memory organized as
131,072 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
Fast access time : 25ns
Low power consumption:
Operating current : 30mA (TYP.)
Standby current : 1μA (TYP.)
Single 3~5V power supply
All inputs and outputs TTL compatible
Fully static operation
The LY65W1024 is well designed for very high
speed system applications, and particularly well
suited for battery back-up nonvolatile memory
application.
Tri-state output
Data retention voltage : 2.0V (MIN.)
Green package available
Package : 32-pin 300 mil SOJ
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
The LY65W1024 operates from a single power
supply of 3V~5V and all inputs and outputs are fully
TTL compatible
PRODUCT FAMILY
Power Dissipation
Speed
Product
Family
LY65W1024(LL)
LY65W1024(LLI)
Operating
Temperature
0 ~ 70℃
Vcc Range
Standby(ISB1,TYP.)
Operating(Icc,TYP.)
30mA
3.0 ~ 5.5V
3.0 ~ 5.5V
25ns
25ns
1µA
1µA
-40 ~ 85℃
30mA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Vcc
Vss
A0 - A16
DQ0 – DQ7 Data Inputs/Outputs
CE#, CE2
WE#
OE#
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
128Kx8
MEMORY ARRAY
A0-A16
DECODER
VCC
VSS
Ground
NC
No Connection
I/O DATA
CIRCUIT
DQ0-DQ7
COLUMN I/O
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
PIN CONFIGURATION
NC
A16
A14
A12
A7
1
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
CE2
WE#
A13
A8
3
4
A11
A9
A8
A13
WE#
CE2
A15
Vcc
NC
A16
A14
A12
A7
1
2
3
4
5
6
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
5
A6
6
A5
7
A9
8
A4
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
8
9
A3
9
LY65W1024
10
11
12
13
14
15
16
A2
10
11
12
13
14
15
16
A1
A6
A5
A4
A1
A0
A2
A3
DQ0
DQ1
DQ2
Vss
TSOP-I/STSOP
SOJ
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
SYMBOL
VT1
RATING
UNIT
V
Voltage on VCC relative to VSS
Voltage on any other pin relative to VSS
-0.5 to 6.5
VT2
-0.5 to VCC+0.5
0 to 70(C grade)
-40 to 85(I grade)
-65 to 150
V
℃
Operating Temperature
TA
℃
W
Storage Temperature
Power Dissipation
DC Output Current
TSTG
PD
1
IOUT
50
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
CE#
H
CE2
X
OE#
X
WE#
X
SUPPLY CURRENT
MODE
I/O OPERATION
High-Z
ISB,ISB1
ISB,ISB1
ICC
Standby
High-Z
X
L
X
X
Output Disable
Read
High-Z
L
H
H
H
DOUT
ICC
L
H
L
H
Write
DIN
ICC
L
H
X
L
Note: H = VIH, L = VIL, X = Don't care.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
DC ELECTRICAL CHARACTERISTICS
SYMBOL TEST CONDITION
PARAMETER
MIN.
3.0
2.0
TYP. *4 MAX.
UNIT
Supply Voltage
VCC
3.3
5.5
VCC+0.5
VCC+0.5
0.6
V
V
V
V
V
Input High Voltage
VCC=3.0~3.6V
VCC=4.5~5.5V
-
-
-
-
-
*1
VIH
2.4
Input Low Voltage
V
CC=3.0~3.6V
- 0.5
- 0.5
- 1
*2
VIL
VCC=4.5~5.5V
0.8
1
Input Leakage Current
Output Leakage
Current
V
CC ≧ VIN ≧ VSS
ILI
A
µ
VCC ≧ VOUT ≧ VSS,
ILO
- 1
-
1
A
µ
Output Disabled
Output High Voltage
Output Low Voltage
VOH IOH = -4mA
VOL IOL = 8mA
2.2
-
-
-
-
V
V
0.4
Cycle time = Min.
CE# = VIL and CE2 = VIH,
I/O = 0mA,
Average Operating
Power supply Current
30
55
ICC
-
mA
I
Others at VIL or VIH
CE# = VIH or CE2 = VIL
Others at VIL or VIH
0.3
1
5
ISB
-
-
mA
Standby Power
Supply Current
≦
CE# ≧VCC-0.2V or CE2 0.2V
Others at 0.2V or VCC-0.2V
50
ISB1
A
µ
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
MIN.
-
-
MAX
6
8
UNIT
pF
pF
CIN
CI/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0.2V to VCC - 0.2V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
tRC
UNIT
LY65W1024-25
MIN.
MAX.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
25
-
-
-
25
25
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
tACE
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
-
*
*
*
*
4
0
-
-
-
9
-
9
3
-
(2) WRITE CYCLE
PARAMETER
SYM.
tWC
tAW
tCW
tAS
UNIT
LY65W1024-25
MIN.
25
20
20
0
MAX.
Write Cycle Time
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
-
tWP
tWR
tDW
tDH
tOW
12
0
-
-
10
0
-
-
*
6
-
tWHZ
*
-
10
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
Dout
tAA
tOH
Previous Data Valid
Data Valid
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)
tRC
Address
tAA
CE#
tACE
CE2
OE#
tOE
tOLZ
tOH
tOHZ
tCHZ
tCLZ
High-Z
High-Z
Dout
Data Valid
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
tWC
Address
tAW
CE#
tCW
CE2
WE#
Dout
Din
tAS
tWP
tWR
tWHZ
TOW
High-Z
(4)
(4)
tDW
tDH
Data Valid
WRITE CYCLE 2 (CE# and CE2 Controlled) (1,2,5,6)
tWC
Address
tAW
CE#
CE2
tAS
tWR
tCW
tWP
WE#
Dout
Din
tWHZ
High-Z
(4)
tDW
tDH
Data Valid
Notes :
1.WE#, CE# must be high or CE2 must be low during all address transitions.
2.A write occurs during the overlap of a low CE#, high CE2, low WE#.
3.During a WE#controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed on the
bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE#low transition and CE2 high transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance
state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
6
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
DATA RETENTION CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITION
MIN.
TYP. MAX. UNIT
VCC for Data Retention
VDR CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
2.0
-
5.5
V
VCC = 2.0V
Data Retention Current
IDR
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
Others at 0.2V or VCC-0.2V
See Data Retention
-
0.5
30
A
µ
Chip Disable to Data
Retention Time
Recovery Time
tCDR
tR
0
-
-
-
-
ns
ns
Waveforms (below)
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (CE# controlled)
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Low Vcc Data Retention Waveform (2) (CE2 controlled)
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
CE2 ≦ 0.2V
CE2
VIL
VIL
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
PACKAGE OUTLINE DIMENSION
32 pin 300mil SOJ Package Outline Dimension
UNIT
INCH(BASE)
0.148(MAX)
0.025(MIN)
0.123(MAX)
0.018(TYP)
MM(REF)
SYMBOL
A
A1
A2
B
3.759(MAX)
0.635(MIN)
3.124(MAX)
0.457(TYP)
±
±
D
0.825 0.005
20.955 0.127
E
0.335(TYP)
8.509(TYP)
±
±
E1
e
0.300 0.005
7.620 0.127
0.050(TYP)
1.270(TYP)
±
±
L
0.086 0.010
2.184 0.254
y
0.003(MAX)
0.076(MAX)
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
32 pin 8mm x 20mm TSOP-I Package Outline Dimension
UNIT
INCH(BASE)
MM(REF)
SYM.
A
A1
A2
b
0.047 (MAX)
1.20 (MAX)
±
±
0.004 0.002 0.10 0.05
±
±
0.039 0.002 1.00 0.05
±
±
0.009 0.002 0.22 0.05
c
±
±
0.006 0.002 0.155 0.055
D
±
±
0.724 0.008 18.40 0.20
E
±
±
0.315 0.008 8.00 0.20
e
0.020 (TYP) 0.50 (TYP)
HD
L
±
±
0.787 0.008 20.00 0.20
±
±
0.024 0.004 0.60 0.10
L1
y
Θ
±
±
0.0315 0.004 0.08 0.10
0.003 (MAX) 0.08 (MAX)
o
o
o
o
～
～
5
0
5
0
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
32 pin 8mm x 13.4mm STSOP Package Outline Dimension
UNIT
INCH(BASE)
MM(REF)
SYM.
A
A1
A2
b
0.049 (MAX)
1.25 (MAX)
±
±
0.004 0.002 0.10 0.05
±
±
0.039 0.002 1.00 0.05
±
±
0.009 0.002 0.22 0.05
c
±
±
0.006 0.002 0.155 0.055
D
±
±
0.465 0.008 11.80 0.20
E
±
±
0.315 0.008 8.00 0.20
e
0.020 (TYP) 0.50 (TYP)
HD
L
±
±
13.40 0.20.
±
0.50 0.20
0.528 0.008
±
0.02 0.008
L1
y
Θ
±
±
0.031 0.005 0.8 0.125
0.003 (MAX) 0.076 (MAX)
o
o
o
o
～
～
5
0
5
0
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
ORDERING INFORMATION
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
11
®
LY65W1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.1
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
12
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