750312872 [Linear]
Isolated No Opto-Coupler Flyback Controller; 无隔离光电耦合器反激式控制器
| 型号： | 750312872 |
| 厂家： | 
Linear |
| 描述： | Isolated No Opto-Coupler Flyback Controller |
| 文件： | 总20页 (文件大小：257K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3798
Isolated No Opto-Coupler
Flyback Controller
with Active PFC
FEATURES
DESCRIPTION
ꢀhe Lꢀ®3798 is a constant-voltage/constant-current iso-
lated flyback controller that combines active power factor
correction (PFC) with no opto-coupler required for output
voltage feedback into a single-stage converter. A Lꢀ3798
baseddesigncanachieveapowerfactorofgreaterthan0.97
by actively modulating the input current, allowing compli-
ance with most Harmonic Current Emission requirements.
n
Isolated PFC Flyback with Minimum Number of
External Components
n
V and V
Limited Only by External Components
IN
OUT
n
n
n
n
n
n
n
Active Power Factor Correction
Low Harmonic Distortion
No Opto-Coupler Required
Constant-Current and Constant-Voltage Regulation
Accurate Regulated Voltage and Current (±±5 ꢀypical)
Energy Star Compliant (<0.±W No Load Operation)
ꢀhermally Enhanced 16-lead MSOP Package
ꢀhe Lꢀ3798 is well suited for a wide variety of off-line
applications. ꢀhe input range can be scaled up or down,
depending mainly on the choice of external components.
Efficiencies higher than 865 can be achieved with output
powerlevelsupto100W.Inaddition,theLꢀ3798caneasily
be designed into high DC input applications.
APPLICATIONS
n
Offline ±W to 100W+ Applications
n
High DC V Isolated Applications
IN
L, Lꢀ, LꢀC, LꢀM, Linear ꢀechnology and the Linear logo are registered trademarks of Linear
ꢀechnology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including ±438499 and 7471±22.
n
Offline Bus Converter (12V, 24V or 48V Outputs)
TYPICAL APPLICATION
Universal Input 24W PFC Bus Converter
VOUT vs IOUT
24.±0
90V
ꢀO 26±V
AC
24.2±
499k
499k
100k
100k
D2
20Ω
24.00
23.7±
23.±0
4:1:1
0.1μF
4.7pF
10μF
2k
D3
VAC = 90V
VAC = 120V
VAC = 220V
VAC = 265V
D4
90.9k
4.99k
V
DCM
FB
IN
24V
1A
1M
V
IN_SENSE
EN/UVLO
Z1
0
0.2
0.4
0.6
(A)
0.8
1
±60μF
× 2
22pF
9±.3k
100k
I
OUꢀ
D1
Lꢀ3798
3798 ꢀA01b
V
REF
20Ω
Z2
40.2k
16.±k
CꢀRL3
CꢀRL2
GAꢀE
SENSE
INꢀV
CC
CꢀRL1
OVP
0.0±Ω
4.7μF
2.2nF
GND
–
221k
+
VC
COMP COMP
0.1μF
2.2μF
3798 ꢀA01a
3798f
1
LT3798
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
EN/UVLO...................................................................30V
IN
1
2
3
4
5
6
7
8
V
IN_SENSE
CTRL1
CTRL2
CTRL3
16
15
14
13
12
11
10
9
SENSE
GATE
V ............................................................................42V
V
17
GND
INꢀV ......................................................................12V
INTV
CC
EN/UVLO
REF
CC
OVP
CꢀRL1, CꢀRL2, CꢀRL3................................................4V
VC
V
IN
+
–
COMP
COMP
DCM
FB
+
–
FB, V , COMP ........................................................3V
REF
VC, OVP, COMP .........................................................4V
MSE PACKAGE
16-LEAD PLASTIC MSOP
SENSE......................................................................0.4V
θ
JA
= ±0°C/W, θ = 10°C/W
JC
EXPOSED PAD (PIN 17) IS GND, MUSꢀ BE SOLDERED ꢀO PCB
V
.................................................................1mA
IN_SENSE
DCM.......................................................................±3mA
Operating ꢀemperature Range (Note 2)
Lꢀ3798E/Lꢀ3798I................................... –40°C to 12±°C
Storage ꢀemperature Range .................. –6±°C to 1±0°C
ORDER INFORMATION
LEAD FREE FINISH
Lꢀ3798EMSE#PBF
Lꢀ3798IMSE#PBF
TAPE AND REEL
PART MARKING*
3798
PACKAGE DESCRIPTION
TEMPERATURE RANGE
Lꢀ3798EMSE#ꢀRPBF
Lꢀ3798IMSE#ꢀRPBF
16-Lead Plastic MSOP
16-Lead Plastic MSOP
–40°C to 12±°C
–40°C to 12±°C
3798
Consult LꢀC Marketing for parts specified with wider operating temperature ranges. *ꢀhe temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 18V, INTVCC = 11V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
10
TYP
MAX
38
UNITS
Input Voltage Range
V
V
IN
Quiescent Current
V
V
= 0.2V
= 1.±V, Not Switching
4±
60
70
70
μA
μA
EN/UVLO
EN/UVLO
V
IN
V
IN
V
IN
Quiescent Current, INꢀV Overdriven
V
= 11V
60
40
8
μA
V
CC
INꢀVCC
Shunt Regulator Voltage
I = 1mA
Shunt Regulator Current Limit
mA
INꢀV Quiescent Current
V
V
= 0.2V
= 1.±V, Not Switching
12.±
1.8
1±.±
2.2
17.±
2.7
μA
mA
CC
EN/UVLO
EN/UVLO
l
EN/UVLO Pin ꢀhreshold
EN/UVLO Pin Voltage Rising
EN/UVLO=1V
1.21
8
1.2±
10
1.29
12
V
μA
μA
EN/UVLO Pin Hysteresis Current
V
V
ꢀhreshold
ꢀurn Off
27
IN_SENSE
l
l
Voltage
0 μA Load
200μA Load
1.97
1.9±
2.0
1.98
2.03
2.03
V
V
REF
CꢀRL1/CꢀRL2/CꢀRL3 Pin Bias Current
CꢀLR1/CꢀRL2/CꢀRL3 = 1V
±30
nA
3798f
2
LT3798
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 18V, INTVCC = 11V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
102
14
MAX
UNITS
mV
SENSE Current Limit ꢀhreshold
Minimum SENSE Current Limit ꢀhreshold
Minimum SENSE Current Limit ꢀhreshold
SENSE Input Bias Current
V
V
V
= 1±0μA
= 34μA
= 21μA
96
107
IN_SENSE
IN_SENSE
IN_SENSE
mV
4
mV
Current Out of Pin, SENSE = 0V
1±
μA
l
FB Voltage
1.22
4.0±
1.2±
0.01
4.2±
180
170
100
±0
1.28
0.03
4.4
V
FB voltage Line Regulation
FB Pin Bias Current
10V < V < 3±V
5/V
μA
IN
(Note 3), FB = 1V
FB Error Amplifier Voltage Gain
FB Error Amplifier ꢀransconductance
Current Error Amplifier Voltage Gain
Current Error Amplifier ꢀransconductance
Current Loop Voltage Gain
ΔV /ΔV , CꢀRL1=1V, CꢀRL2=2V, CꢀRL3=2V
V/V
VC
FB
ΔI = ±μA
ΔV +/ΔV
UMHOS
V/V
–, CꢀRL1 = 1V, CꢀRL2 = 2V, CꢀRL3 = 2V
COMP
COMP
ΔI = ±μA
ΔV /ΔV
UMHOS
V/V
+
–
,1000pF Cap from COMP to COMP
SENSE
21
CꢀRL
DCM Current ꢀurn-On ꢀhreshold
Maximum Oscillator Frequency
Minimum Oscillator Frequency
Minimum Oscillator Frequency
Backup Oscillator Frequency
Linear Regulator
Current Out of Pin
80
μA
+
COMP = 0.9±V, V
= 1±0μA
1±0
4
kHz
IN_SENSE
+
COMP = 0V, V <V
kHz
FB
OVP
OVP
+
COMP = 0V, V >V
0.±
20
kHz
FB
kHz
INꢀV Regulation Voltage
No Load
9.8
10
±00
2±
10.4
900
V
mV
mA
mA
CC
Dropout (V -INꢀV
)
CC
I = –10mA, V = 10V
INꢀVCC IN
IN
Current Limit
Current Limit
Gate Driver
Below Undervoltage ꢀhreshold
Above Undervoltage ꢀhreshold
12
80
120
t GAꢀE Driver Output Rise ꢀime
C = 3300pF, 105 to 905
18
18
ns
ns
V
r
L
t GAꢀE Driver Output Fall ꢀime
f
C = 3300pF, 905 to 105
L
GAꢀE Output Low (V
)
0.01
OL
GAꢀE Output High (V
)
OH
INꢀV
-
CC
V
±0mV
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
12±°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. ꢀhe
3798I is guaranteed to meet specified performance from –40°C to 12±°C
operating junction temperature range.
Note 2: ꢀhe Lꢀ3798E is guaranteed to meet specified performance from
Note 3: Current flows out of the FB pin.
0°C to 12±°C junction temperature. Specification over the –40°C and
3798f
3
LT3798
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
EN/UVLO Threshold
vs Temperature
EN/UVLO Hysteresis Current
vs Temperature
VIN IQ vs Temperature
1.3
1.28
1.26
1.24
1.22
1.2
12
11.±
11
100
90
80
70
60
±0
40
30
20
10
0
V
IN
= 24V
V
IN
= 12V
RISING
FALLING
10.±
10
–±0
0
2± ±0 7± 100 12± 1±0
–±0
0
2± ±0 7± 100 12± 1±0
–±0
–2±
0
2± ±0 7± 100 12± 1±0
–2±
–2±
ꢀEMPERAꢀURE (°C)
ꢀEMPERAꢀURE (°C)
ꢀEMPERAꢀURE (°C)
3798 G01
3798 G02
3798 G03
SENSE Current Limit Threshold
vs Temperature
VREF vs Temperature
VREF vs VIN
2.100
2.07±
2.0±0
2.02±
2.000
1.97±
1.9±0
1.92±
1.900
2.0±
2.04
2.03
2.02
2.01
2
120
100
80
60
40
20
0
MAX I
LIM
V
= 24V WIꢀH NO LOAD
NO LOAD
IN
1.99
1.98
1.97
1.96
1.9±
200μA LOAD
V
= 24V WIꢀH 200μA LOAD
IN
MIN I
MIN I
V
= 34μA
= 21μA
LIM IN_SENSE
V
LIM IN_SENSE
40
–±0
–2±
0
2± ±0 7± 100 12±
ꢀEMPERAꢀURE (°C)
1±0
–±0
0
2± ±0 7± 100 12± 1±0
10
20
2±
(V)
–2±
1±
30
3±
ꢀEMPERAꢀURE (°C)
V
IN
3798 G0±
3798 G0±
3798 G06
Maximum Oscillator Frequency
vs Temperature
Minimum Oscillator Frequency
vs Temperature
Backup Oscillator Frequency
vs Temperature
220
19±
170
14±
120
±
4
3
2
1
0
2±
20
1±
10
±
V
< V
OVP
FB
V
> V
FB
OVP
0
0
–±0
0
2± ±0 7± 100
ꢀEMPERAꢀURE (°C)
1±0
12±
–2±
±0
1±0
–±0
0
2± ±0 7±
1±0
100 12±
–±0
2±
7± 100 12±
–2±
–2±
ꢀEMPERAꢀURE (°C)
ꢀEMPERAꢀURE (°C)
3798 G06a
3799 G07
3798 G07a
3798f
4
LT3798
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
INTVCC vs Temperature
INTVCC vs VIN
VIN Shunt Voltage vs Temperature
10.±
10.2±
10
10.2
10
42
41.±
41
I
= 1mA
NO LOAD
10mA LOAD
25mA LOAD
SHUNꢀ
9.8
9.6
9.4
9.2
9
40.±
40
9.7±
9.±
39.±
39
20
V
2±
(V)
30
3±
40
±0
ꢀEMPERAꢀURE (°C)
–±0
0
2± ±0 7± 100
1±0
±
10
1±
–±0
–2±
0
2±
7± 100 12±
1±0
–2±
12±
ꢀEMPERAꢀURE (°C)
IN
3798 G09
3798 G08
3798 G10
Maximum Shunt Current
vs Temperature
Leakage Inductance Blanking Time
vs SENSE Current Limit Threshold
VOUT vs Temperature
10
9
2
1.8
1.6
1.4
1.2
1
2±
24.±
24
PAGE 17 SCHEMAꢀIC:
UNIVERSAL
8
VAC = 120V
7
0.8
0.6
0.4
0.2
0
VAC = 220V
23.±
23
6
±
–±0
0
2± ±0 7± 100 12± 1±0
0
40
60
80
120
–2±
20
100
–±0
2± ±0
1±0
0
7± 100 12±
–2±
ꢀEMPERAꢀURE (°C)
SENSE CURRENꢀ LIMIꢀ ꢀHRESHOLD (mV)
ꢀEMPERAꢀURE (°C)
3798 G11
3798 G012a
3798 G12
Output Voltage
vs Input Voltage
Output Current
vs Input Voltage
24.6
1.10
1.0±
1.00
0.9±
0.90
PAGE 17 SCHEMAꢀIC:
UNIVERSAL
PAGE 17 SCHEMAꢀIC:
UNIVERSAL
24.4
24.2
24
V
= 22V
OUꢀ
23.8
23.6
90
170 190 210 230 2±0 270
90 110 130 1±0 170 190 210 230
270
2±0
110 130 1±0
V
(VAC)
V
(VAC)
IN
IN
3798 G13
3798 G14
3798f
5
LT3798
TA = 25°C, unless otherwise noted.
Efficiency vs Input Voltage
TYPICAL PERFORMANCE CHARACTERISTICS
Power Factor vs Input Voltage
100
1.00
PAGE 17 SCHEMAꢀIC:
UNIVERSAL
0.99
0.98
0.97
0.96
0.9±
0.94
0.93
0.92
90
80
70
PAGE 17 SCHEMAꢀIC:
UNIVERSAL
0.91
0.90
60
90 110 130 1±0 170 190 210 230 2±0 270
90
1±0 170 190 210 230 2±0 270
110 130
V
(VAC)
V
(VAC)
IN
IN
3798 G16
3798 G1±
PIN FUNCTIONS
CTRL1, CTRL2, CTRL3 (Pin 1, Pin 2, Pin 3): Current
Output Adjustment Pins. ꢀhese pins control the output
current. ꢀhe lowest value out of the three CꢀRL inputs is
compared to negative input of the operational amplifier.
FB (Pin 9): Voltage Loop Feedback Pin. FB is used to
regulate the output voltage by sampling the third wind-
ing. If the converter is used in current mode, the FB pin
will normally be at a voltage level lower than 1.2±V, and
will reach the steady state of 1.2±V if it detects an open
output condition.
V
(Pin 4): Voltage Reference Output Pin. ꢀypically 2V.
REF
ꢀhis pin drives a resistor divider for the CꢀRL pin, either
foranalogdimmingorfortemperaturelimit/compensation
of output load. Can supply up to 200μA.
DCM(Pin10):DiscontinuousConductionModeDetection
Pin. Connect a capacitor and resistor in series with this
pin to the third winding.
OVP (Pin 5): Overvoltage Protection. ꢀhis pin accepts a
DC voltage to compare to the sample and hold’s voltage
output information. When output voltage information is
above the OVP, the part divides the minimum switching
frequency by 8, around ±00Hz. ꢀhis protects devices con-
nected to the output. ꢀhis also allows the part to operate
with very little power consumption with no load to meet
energy star requirements.
V (Pin 11): Input Voltage. ꢀhis pin supplies current to
IN
the internal start-up circuitry and to the INꢀV LDO. ꢀhis
CC
pin must be locally bypassed with a capacitor. A 42V shunt
regulator is internally connected to this pin.
EN/UVLO(Pin12):Enable/UndervoltageLockout.Aresis-
tor divider connected to V is tied to this pin to program
IN
the minimum input voltage at which the Lꢀ3798 will turn
on. When below 1.2±V, the part will draw 60μA with most
of the internal circuitry disabled and a 10μA hysteresis
current will be pulled out of the EN/UVLO pin. When above
1.2±V, the part will be enabled and begin to switch and the
10μA hysteresis current is turned off.
VC (Pin 6): Compensation Pin for Internal Error Amplifier.
ConnectaseriesRCfromthispintogroundtocompensate
theswitchingregulator. A100pFcapacitorinparallelhelps
eliminate noise.
+
–
COMP , COMP (Pin 7, Pin 8): Compensation Pins for
InternalErrorAmplifier.Connectacapacitorbetweenthese
two pins to compensate the internal feedback loop.
INTV (Pin 13): Regulated Supply for Internal Loads
CC
and GAꢀE Driver. Supplied from V and regulates to 10V
IN
(typical). INꢀV must be bypassed with a 4.7μF capacitor
CC
placed close to the pin.
3798f
6
LT3798
PIN FUNCTIONS
GATE(Pin14):N-ChannelFEꢀGateDriverOutput.Switches
V
(Pin 16): Line Voltage Sense Pin. ꢀhe pin is
IN_SENSE
betweenINꢀV andGND.DriventoGNDduringshutdown
used for sensing the AC line voltage to perform power
factor correction. Connect a resistor in series with the
line voltage to this pin. If no PFC is needed, connect this
CC
state and stays high during low voltage states.
SENSE (Pin 15): ꢀhe Current Sense Input for the Control
pin to INꢀV with a 2±k resistor.
CC
Loop. Kelvinconnectthispintothepositiveterminalofthe
switch current sense resistor, R
, in the source of the
GND (Exposed Pad Pin 17): Ground. ꢀhe exposed pad
of the package provides both electrical contact to ground
and good thermal contact to the printed circuit board.
ꢀhe exposed pad must be soldered to the circuit board
for proper operation.
SENSE
NFEꢀ. ꢀhe negative terminal of the current sense resistor
should be connected to the GND plane close to the IC.
BLOCK DIAGRAM
V
RECꢀIFIED
D2
R3
t
R13
R14
R1
D1
C2
R4
R±
ꢀ1
L1C
+
–
V
OUꢀ
C1
C3
L1A
L1B
C7
R1±
V
OUꢀ
N:1
DCM
EN/UVLO
V
V
IN
IN_SENSE
SꢀARꢀUP
INꢀERNAL REG
1.22V
–
+
A7
INꢀV
CC
+
–
ONE
SHOꢀ
R7
C±
A2
CURRENꢀ
COMPARAꢀOR
+
–
600mV
R11
V
REF
R8
+
A1
–
S&H
OVP
+
GAꢀE
S
S
R
A9
Q
A3
FB
COMP
R9
MASꢀER
LAꢀCH
DRIVER
R12
1M
C6
SENSE
GND
–
COMP
SW1
A4
R6
CꢀRL1
CꢀRL2
LOW OUꢀPUꢀ
–
+
MINIMUM
CURRENꢀ
A±
A6
OSCILLAꢀOR
MULꢀIPLIER
CꢀRL3
FB
S&H
+
A8
1.22V
–
VC
R10
C4
3798 BD
3798f
7
LT3798
OPERATION
ꢀhe Lꢀ3798 is a current mode switching controller IC
designed specifically for generating a constant current/
constant voltage supply in an isolated flyback topology.
ꢀhespecialproblemnormallyencounteredinsuchcircuits
is that information relating to the output voltage and cur-
rent on the isolated secondary side of the transformer
must be communicated to the primary side in order to
maintain regulation. Historically, this has been done with
an opto-isolator. ꢀhe Lꢀ3798 uses a novel method of using
the external MOSFEꢀs peak current information from the
sense resistor to calculate the output current of a flyback
converter without the need of an opto-coupler.
part begins to switch. ꢀhe V hysteresis is set by the EN/
IN
UVLO resistor divider. ꢀhe third winding provides power
to V when its voltage is higher than the V voltage. A
IN
IN
voltage shunt is provided for fault protection and can sink
8mA of current when V is over 40V.
IN
During a typical cycle, the gate driver turns the external
MOSFEꢀonandacurrentflowsthroughtheprimarywind-
ing. ꢀhis current increases at a rate proportional to the
inputvoltageandinverselyproportionaltothemagnetizing
inductanceofthetransformer.ꢀhecontrolloopdetermines
the maximum current and the current comparator turns
the switch off when the current level is reached. When the
switch turns off, the energy in the core of the transformer
flowsoutthesecondarywindingthroughtheoutputdiode,
D1. ꢀhis current decreases at a rate proportional to the
output voltage. When the current decreases to zero, the
output diode turns off and voltage across the secondary
winding starts to oscillate from the parasitic capacitance
and the magnetizing inductance of the transformer. Since
all windings have the same voltage across them, the third
winding rings too. ꢀhe capacitor connected to the DCM
pin, C1, trips the comparator A2, which serves as a dv/dt
detector, whentheringingoccurs. ꢀhistiminginformation
isusedtocalculatetheoutputcurrentandwillbedescribed
below. ꢀhe dv/dt detector waits for the ringing waveform
to reach its minimum value and then the switch turns back
on.ꢀhisswitchingbehaviorissimilartozerovoltswitching
and minimizes the amount of energy lost when the switch
is turned back on and improves efficiency as much as
±5. Since this part operates on the edge of continuous
conduction mode and discontinuous conduction mode,
the operating mode is called critical conduction mode (or
boundary conduction mode).
Active power factor correction is becoming a requirement
for offline power supplies and the power levels are de-
creasing. A power factor of one is achieved if the current
drawn is proportional to the input voltage. ꢀhe Lꢀ3798
modulates the peak current limit with a scaled version
of the input voltage. ꢀhis technique can provide power
factors of 0.97 or greater.
ꢀheBlockDiagramshowsanoverallviewofthesystem.ꢀhe
external components are in a flyback topology configura-
tion. ꢀhe third winding senses the output voltage and also
supplies power to the part in steady-state operation. ꢀhe
V pin supplies power to an internal LDO that generates
IN
10V at the INꢀV pin. ꢀhe novel control circuitry consists
CC
of two error amplifiers, a minimum circuit, a multiplier,
a transmission gate, a current comparator, a low output
current oscillator and a master latch, which will be ex-
plained in the following sections. ꢀhe part also features a
sample-and-hold to sample the output voltage from the
third winding. A comparator is used to detect discontinu-
ous conduction mode (DCM) with a cap connected to the
third winding. ꢀhe part features a 1.9A gate driver.
ꢀhe Lꢀ3798 is designed for both off-line and DC applica-
tions.ꢀheEN/UVLOandaresistordividercanbeconfigured
foramicropowerhystereticstart-up.IntheBlockDiagram,
R3 is used to stand off the high voltage supply voltage.
Primary Side Control Loops
ꢀhe Lꢀ3798 achieves constant current/constant voltage
operation by using two separate error amplifiers. ꢀhese
two amplifiers are then fed to a circuit that outputs the
lower voltage of the two, shown as the "minimum" block in
the Block Diagram. ꢀhis voltage is converted to a current
before being fed into the multiplier.
ꢀhe internal LDO starts to supply current to the INꢀV
CC
when V is above 2.±V. ꢀhe V and INꢀV capacitors are
IN
IN
CC
charged by the current from R3. When V exceeds the
IN
turn-on threshold and INꢀV is in regulation at 10V, the
CC
3798f
8
LT3798
OPERATION
Primary Side Current Control Loop
I
PK(sec)
ꢀhe CꢀRL1/CꢀRL2/CꢀRL3 pins control the output current
of the flyback controller. ꢀo simplify the loop, let’s assume
SECONDARY
DIODE CURRENꢀ
the V
pin is held at a constant voltage above 1V
IN_SENSE
eliminating the multiplier from the control loop. ꢀhe error
amplifier, A±, is configured as integrator with the external
capacitor C6. ꢀhe COMP node voltage is converted to a
+
SWIꢀCH
WAVEFORM
current into the multiplier with the V/I converter, A6. Since
A7’s output is constant, the output of the multiplier is
proportional to A6 and can be ignored. ꢀhe output of the
multiplier controls the peak current with its connection to
the current comparator, A1. ꢀhe output of the multiplier is
also connected to the transmission gate, SW1, and to a
1M resistor. ꢀhe transmission gate, SW1, turns on when
the secondary current flows to the output capacitor. ꢀhis
is called the flyback period when the output diode D1 is
on. ꢀhe current through the 1M resistor gets integrated by
A±. ꢀhe lowest CꢀRL input is equal to the negative input
of A± in steady state.
ꢀ
FLYBACK
3798 F01
ꢀ
PERIOD
Figure 1. Secondary Diode Current and Switch Waveforms
waveformwithaheightofthecurrentlimitandadutycycle
of the flyback time over the entire cycle. In the feedback
loop described above, the input to the integrator is such
a waveform. ꢀhe integrator adjusts the peak current until
calculated output current equals the control voltage. If the
calculated output current is low compared to the control
+
pin,theerroramplifierincreasesthevoltageontheCOMP
node thus increasing the current comparator input.
A current output regulator normally uses a sense resistor
in series with the output current and uses a feedback loop
to control the peak current of the switching converter. In
this isolated case, the output current information is not
available so instead the Lꢀ3798 calculates it using the in-
formation available on the primary side of the transformer.
ꢀheoutputcurrentmaybecalculatedbytakingtheaverage
oftheoutputdiodecurrent.AsshowninFigure1,thediode
current is a triangle waveform with a base of the flyback
time and a height of the peak secondary winding current.
In a flyback topology, the secondary winding current is N
Primary Side Voltage Control
ꢀheoutputvoltageisavailablethroughthethirdwindingon
the primary side. A resistor divider attenuates the output
voltage for the voltage error amplifier. A sample-and-hold
circuit samples the attenuated output voltage and feeds it
to the error amplifier. ꢀhe output of the error amplifier is
the VC pin. ꢀhis node needs a capacitor to compensate
the output voltage control loop.
timestheprimarywindingcurrent,whereN istheprimary
PS
to secondary winding ratio. Instead of taking the area of
the triangle, let’s think of it as a pulse width modulation
(PWM) waveform. During the flyback time, the average
current is half the peak secondary winding current and
zero during the rest of the cycle. ꢀhe equation to express
the output current is:
Power Factor Correction
WhentheV
voltageisconnectedtoaresistordivider
IN_SENSE
of the supply voltage, the current limit is proportional to
the supply voltage. ꢀhe minimum of the two error ampli-
fier outputs is multiplied with the V
pin voltage. If
IN_SENSE
the Lꢀ3798 is configured with a fast control loop, slower
I
= 0.± • I • N • D
PK PS
changes from the V
pin would not interfere with
OUꢀ
IN_SENSE
+
the current limit or the output current. ꢀhe COMP pin
where D is equal to the percentage of the cycle that the
flyback time represents. ꢀhe Lꢀ3798 has access to the
primary winding current, the input to the current com-
parator, and when the flyback time starts and ends. Now
the output current can be calculated by averaging a PWM
would adjust to the changes of the V
. ꢀhe only
IN_SENSE
way for the multiplier to function is to set the control loop
to be an order of magnitude slower than the fundamental
frequency of the V
signal. In an offline case, the
IN_SENSE
3798f
9
LT3798
OPERATION
V
fundamental frequency of the supply voltage is 120Hz so
the control loop unity gain frequency needs to be set less
thanapproximately12Hz.Withoutalargeamountofenergy
storage on the secondary side, the output current will be
affected by the supply voltage changes, but the DC com-
ponent of the output current will be accurate. For DC input
or non-PFC AC input applications, connect a 2±k resistor
IN
R1
R2
EN/UVLO
Lꢀ3798
GND
3798 F02
from V
to INꢀV instead of the AC line voltage.
IN_SENSE
CC
Figure 2. Undervoltage Lockout (UVLO)
Startup
ꢀhe Lꢀ3798 uses a hysteretic start-up to operate from
high offline voltages. A resistor connected to the supply
voltage protects the part from high voltages. ꢀhis resistor
Programming Output Voltage
ꢀhe output voltage is set using a resistor divider from
the third winding to the FB pin. From the Block Diagram,
the resistors R4 and R± form a resistor divider from the
third winding. ꢀhe FB also has an internal current source
that compensates for the diode drop. ꢀhis current source
causes an offset in the output voltage that needs to be ac-
counted for when setting the output voltage. ꢀhe output
voltage equation is:
is connected to the V pin on the part and bypassed with
IN
a capacitor. When the resistor charges the V pin to a
IN
turn-on voltage set with the EN/UVLO resistor divider and
the INꢀV pin is at its regulation point, the part begins
CC
to switch. ꢀhe resistor cannot provide power for the part
in steady state, but relies on the capacitor to start-up the
part, then the third winding begins to provide power to the
V pin along with the resistor. An internal voltage clamp
V
OUꢀ
= V (R4+R±)/(N • R±)–(V + (R4 • I )/N )
BG Sꢀ F ꢀC Sꢀ
IN
is attached to the V pin to prevent the resistor current
IN
where V is the internal reference voltage, N is the
BG
Sꢀ
from allowing V to go above the absolute maximum
IN
windingratiobetweenthesecondarywindingandthethird
voltage of the pin. ꢀhe internal clamp is set at 40V and is
winding, V is the forward drop of the output rectifying
F
capable of 8mA(typical) of current at room temperature.
diode, and I is the internal current source for the FB pin.
ꢀC
Setting the V Turn-On and Turn-Off Voltages
ꢀhe temperature coefficient of the diode's forward drop
IN
needs to be the opposite of the term, (R4 • I )/N . By
ꢀC
Sꢀ
A large voltage difference between the V turn-on voltage
IN
taking the partial derivative with respect to temperature,
the value of R4 is found to be the following:
andtheV turn-offvoltageispreferredtoallowtimeforthe
IN
third winding to power the part. ꢀhe EN/UVLO sets these
two voltages. ꢀhe pin has a 10μA current sink when the
pins voltage is below 1.2±V and 0μA when above 1.2±V.
R4 = N (1/(δI /δꢀ)(δV /δꢀ))
Sꢀ
ꢀC
F
δI /δꢀ = 12.4nA/°C
ꢀC
ꢀhe V pin connects to a resistor divider as shown in
IN
Figure 2. ꢀhe UVLO threshold for V rising is:
I
= 4.2±μA
ꢀC
IN
where δI /δꢀ is the partial derivative of the I current
ꢀC
ꢀC
1.2±V • R1+ R2
(
)
+ 10μA •R1
V
=
source, and δV /δꢀ is the partial derivative of the forward
IN(UVLO,RISING)
F
R2
drop of the output rectifying diode.
ꢀhe UVLO ꢀhreshold for V Falling is :
IN
With R4 set with the above equation, the resistor value
for R± is found using the following:
1.2±V • R1+ R2
(
)
V
=
IN(UVLO,FALLING)
R2
R± = (V • R4)/(N (V +V )+R4 • I -V )
BG
Sꢀ OUꢀ
F
ꢀC BG
3798f
10
LT3798
OPERATION
Programming Output Current
pins. ꢀhe following equation sets the output current with
a resistor divider:
ꢀhe maximum output current depends on the supply volt-
age and the output voltage in a flyback topology. With the
⎛
⎞
2NPS
•RSENSE
R1=R2
– 1
⎜
⎝
⎟
V
pinconnectedto100μAcurrentsourceandaDC
IN_SENSE
42 •I
⎠
OUꢀ
supplyvoltage,themaximumoutputcurrentisdetermined
at the minimum supply voltage, and the maximum output
voltage using the following equation:
where R1 is the resistor connected to the V pin and the
REF
CꢀRL pin and R2 is the resistor connected to the CꢀRL
pin and ground.
NPS
42 •RSENSE
IOUꢀ(MAX) = 2•(1– D)•
Setting V
Resistor
IN_SENSE
where
ꢀheV
resistorsetsthecurrentfeedingtheinternal
IN_SENSE
VOUꢀ •NPS
VOUꢀ •NPS + V
multiplierthatmodulatesthecurrentlimitforpowerfactor
correction.Atthemaximumlinevoltage,V ,thecurrent
D =
MAX
IN
is set to 360μA. Under this condition, the resistor value is
ꢀhe maximum control voltage to achieve this maximum
output current is 2V • (1-D).
equal to (V /360μA).
MAX
For DC input or non-PFC AC input applications, connect
It is suggested to operate at 9±5 of these values to give
margin for the part’s tolerances.
a 2±k resistor from V
AC line voltage.
to INꢀV instead of the
IN_SENSE
CC
When designing for power factor correction, the output
currentwaveformisgoingtohaveahalfsinewavesquared
shape and will no longer be able to provide the above
currents. By taking the integral of a sine wave squared
over half a cycle, the average output current is found to
be half the value of the peak output current. In this case,
the recommended maximum average output current is
as follows:
Critical Conduction Mode Operation
Criticalconductionmodeisavariablefrequencyswitching
scheme that always returns the secondary current to zero
witheverycycle.ꢀheLꢀ3798reliesonboundarymodeand
discontinuousmodetocalculatethecriticalcurrentbecause
thesensingschemeassumesthesecondarycurrentreturns
to zero with every cycle. ꢀhe DCM pin uses a fast current
input comparator in combination with a small capacitor to
detect dv/dt on the third winding. ꢀo eliminate false trip-
ping due to leakage inductance ringing, a blanking time of
between600nsand2ꢁsisappliedaftertheswitchturnsoff,
depending on the current limit shown in the Leakage In-
ductanceBlankingꢀimevsSENSECurrentLimitꢀhreshold
curve in the ꢀypical Performance Characteristics section.
ꢀhe detector looks for 80ꢁA of current through the DCM
pin due to falling voltage on the third winding when the
secondarydiodeturnsoff.ꢀhisdetectionisimportantsince
the output current is calculated using this comparator’s
output. ꢀhis is not the optimal time to turn the switch on
NPS
42 •RSENSE
IOUꢀ(MAX) = 2•(1−D) •
• 47.±5
where
VOUꢀ •NPS
VOUꢀ •NPS + V
D =
IN
ꢀhe maximum control voltage to achieve this maximum
output current is (1-D) • 47.±5.
For control voltages below the maximum, the output cur-
rent is equal to the following equation:
NPS
42 •RSENSE
because the switch voltage is still close to V
+ V
• N
IOUꢀ = CꢀRL•
IN
OUꢀ
PS
and would waste all the energy stored in the parasitic ca-
pacitanceontheswitchnode.Discontinuousringingbegins
when the secondary current reaches zero and the energy
in the parasitic capacitance on the switch node transfers
ꢀhe V
pin supplies a 2V reference voltage to be used
REF
with the control pins. ꢀo set an output current, a resistor
divider is used from the 2V reference to one of the control
3798f
11
LT3798
OPERATION
to the input capacitor. ꢀhis is a second-order network
composed of the parasitic capacitance on the switch node
and the magnetizing inductance of the primary winding
of the transformer. ꢀhe minimum voltage of the switch
very high frequency. ꢀhe output voltage sensing circuitry
needs a minimum amount of flyback waveform time to
sense the output voltage on the third winding. ꢀhe time
needed is 3±0ns. ꢀhe minimum current limit allows the
useofsmallertransformerssincethemagnetizingprimary
inductance does not need to be as high to allow proper
time to sample the output voltage information.
node during this discontinuous ring is V – V
• N .
IN
OUꢀ
PS
ꢀhe Lꢀ3798 turns the switch back on at this time, during
the discontinuous switch waveform, by sensing when
the slope of the switch waveform goes from negative to
positive using the dv/dt detector. ꢀhis switching technique
may increase efficiency by ±5.
ꢀo help improve crossover distortion of the line input
current, a second minimum current limit of 65 becomes
activewhentheV
currentislowerthan27μA.Since
IN_SENSE
the off-time becomes very short with this lower minimum
Sense Resistor Selection
current limit, the sample-and-hold is deactivated.
ꢀhe resistor, R
, between the source of the external
SENSE
N-channelMOSFEꢀandGNDshouldbeselectedtoprovide
anadequateswitchcurrenttodrivetheapplicationwithout
exceeding the current limit threshold.
Universal Input
ꢀhe Lꢀ3798 operates over the universal input voltage
range of 90VAC to 26±VAC. In the ꢀypical Performance
For applications without power factor correction, select a
resistor according to:
Characteristics section, the Output Voltage vs V and the
IN
Output Current vs V graphs, show the output voltage
IN
and output current line regulation for the first application
2(1– D)NPS
IOUꢀ • 42
picture in the ꢀypical Applications section.
RSENSE
=
• 9±5
Selecting Winding Turns Ratio
where
Boundarymodeoperationgivesalotoffreedominselecting
the turns ratio of the transformer. We suggest to keep the
VOUꢀ •NPS
VOUꢀ •NPS + V
D =
IN
duty cycle low, lower N , at the maximum input voltage
PS
since the duty cycle will increase when the AC waveform
For applications with power factor correction, select a
resistor according to:
decreases to zero volts. A higher N increases the output
PS
current while keeping the primary current limit constant.
Although this seems to be a good idea, it comes at the
expense of a higher RMS current for the secondary-side
diodewhichmightnotbedesirablebecauseoftheprimary
sideMOSFEꢀ’ssuperiorperformanceasaswitch.Ahigher
2(1– D)NPS
IOUꢀ • 42
RSENSE
=
• 47.±5
where
VOUꢀ •NPS
VOUꢀ •NPS + V
N
PS
does reduce the voltage stress on the secondary-side
D =
diode while increasing the voltage stress on the primary-
side MOSFEꢀ. If switching frequency at full output load is
kept constant, the amount of energy delivered per cycle by
IN
Minimum Current Limit
the transformer also stays constant regardless of the N .
PS
ꢀhe Lꢀ3798 features a minimum current limit of approxi-
mately 185 of the peak current limit. ꢀhis is necessary
when operating in critical conduction mode since low
current limits would increase the operating frequency to a
ꢀherefore, the size of the transformer remains the same at
practical N ’s. Adjusting the turns ratio is a good way to
PS
find an optimal MOSFEꢀ and diode for a given application.
3798f
12
LT3798
OPERATION
Switch Voltage Clamp Requirement
period, as well. Similarly, initial values can be estimated
using stated switch capacitance and transformer leakage
inductance. Once the value of the drain node capacitance
and inductance is known, a series resistor can be added
to the snubber capacitance to dissipate power and criti-
cally dampen the ringing. ꢀhe equation for deriving the
optimal series resistance using the observed periods
Leakage inductance of an offline transformer is high due
to the extra isolation requirement. ꢀhe leakage inductance
energy is not coupled to the secondary but goes into
the drain node of the MOSFEꢀ. ꢀhis is problematic since
400V and higher rated MOSFEꢀs cannot always handle
this energy by avalanching. ꢀherefore the MOSFEꢀ needs
protection.Atransientvoltagesuppressor(ꢀVS)anddiode
arerecommendedforallofflineapplicationandconnected,
as shown in Figure 3. ꢀhe ꢀVS device needs a reverse
(t
, andt
)andsnubbercapacitance
PERIOD
PERIOD(SNUBBED)
) is below, and the resultant waveforms are
(C
SNUBBER
shown in Figure 4.
breakdown voltage greater than (V
+ V ) • N where
OUꢀ
F PS
CSNUBBER
CPAR
=
=
V
is the output voltage of the flyback converter, V is
OUꢀ
F
2
⎛
⎞
tPERIOD(SNUBBED)
the secondary diode forward voltage, and N is the turns
PS
– 1
⎜
⎝
⎟
⎠
ratio.AnRCDclampcanbeusedinplaceoftheꢀVSclamp.
tPERIOD
V
V
SUPPLY
2
SUPPLY
tPERIOD
LPAR
CPAR • 4π2
LPAR
CPAR
RSNUBBER
=
GAꢀE
GAꢀE
90
80
70
60
±0
40
30
20
10
3798 F03
Figure 3. TVS & RCD Switch Voltage Clamps
In addition to clamping the spike, in some designs where
short circuit protection is desired, it will be necessary to
decrease the amount of ringing by using an RC snubber.
Leakage inductance ringing is at its worst during a short
circuit condition, and can keep the converter from cycling
on and off by peak charging the bias capacitor. On/off
cycling is desired to keep power dissipation down in the
output diode. Alternatively, a heat sink can be used to
manage diode temperature.
NO SNUBBER
WIꢀH SNUBBER
CAPACIꢀOR
WIꢀH RESISꢀOR
AND CAPACIꢀOR
0
0
0.0± 0.10 0.1±
ꢀIME (μs)
0.30
0.20 0.2±
3798 F04
Figure 4. Observed Waveforms at MOSFET Drain when
Iteratively Implementing an RC Snubber
ꢀherecommendedapproachfordesigninganRCsnubber
is to measure the period of the ringing at the MOSFEꢀ
drain when the MOSFEꢀ turns off without the snubber
and then add capacitance—starting with something in
the range of 100pF—until the period of the ringing is 1.±
to 2 times longer. ꢀhe change in period will determine
the value of the parasitic capacitance, from which the
parasitic inductance can be determined from the initial
Note that energy absorbed by a snubber will be converted
to heat and will not be delivered to the load. In high volt-
age or high current applications, the snubber may need to
be sized for thermal dissipation. ꢀo determine the power
dissipated in the snubber resistor from capacitive losses,
measure the drain voltage immediately before the MOS-
FEꢀ turns on and use the following equation relating that
3798f
13
LT3798
OPERATION
voltageandtheMOSFEꢀswitchingfrequencytodetermine
the expected power dissipation:
with several leading magnetic component manufacturers
to produce predesigned flyback transformers for use with
the Lꢀ3798. ꢀable 1 shows the details of several of these
transformers.
2
P
= f • C
• V
/2
SNUBBER
SW
SNUBBER
DRAIN
Decreasing the value of the capacitor will reduce the dis-
sipated power in the snubber at the expense of increased
peak voltage on the MOSFEꢀ drain, while increasing the
value of the capacitance will decrease the overshoot.
Loop Compensation
ꢀhe voltage feedback loop is a traditional GM error ampli-
fier. ꢀhe loop cross-over frequency is set much lower than
twice the line frequency for PFC to work properly.
Transformer Design Considerations
ꢀhe current output feedback loop is an integrator con-
figuration with the compensation capacitor between the
negative input and output of the operational amplifier.
ꢀhis is a one-pole system therefore a zero is not needed
in the compensation. For offline applications with PFC,
the crossover should be set an order of magnitude lower
than the line frequency of 120Hz or 100Hz. In a typical
application, the compensation capacitor is 0.1ꢁF.
ꢀransformer specification and design is a critical part of
successfully applying the Lꢀ3798. In addition to the usual
list of caveats dealing with high frequency isolated power
supply transformer design, the following information
should be carefully considered. Since the current on the
secondarysideofthetransformerisinferredbythecurrent
sampled on the primary, the transformer turns ratio must
betightlycontrolledtoensureaconsistentoutputcurrent.
In non-PFC applications, the crossover frequency may be
increased to improve transient performance. ꢀhe desired
crossoverfrequencyneedstobesetanorderofmagnitude
below the switching frequency for optimal performance.
A tolerance of ±±5 in turns ratio from transformer to
transformercouldresultinavariationofmorethan±±5in
outputregulation. Fortunately, mostmagneticcomponent
manufacturers are capable of guaranteeing a turns ratio
tolerance of 15 or better. Linear ꢀechnology has worked
Table 1. Predesigned Transformers—Typical Specifications, Unless Otherwise Noted
TARGET
TRANSFORMER SIZE
L
N
P
R
R
SEC
APPLICATION
PRI
PSA
S
PRI
PART NUMBER (L × W × H)
(μH)
400
2000
2000
300
600
600
400
100
460
±00
300
820
14
(N :N :N )
(mΩ)
(mΩ)
126
16±
2±
MANUFACTURER
Coilcraft
(V /I
OUT OUT
)
A
JA4429
21.1mm × 21.1mm × 17.3mm
1:0.24:0.24
6.67:1:1.67
20:1.0:±.0
6:1.0:1.0
4:1:0.71
2±2
22V/1A
10V/0.4A
3.8V/1.1A
18V/±A
7±08110210
7±0813002
7±0811330
7±0813144
7±0813134
7±0811291
7±0813390
7±0811290
X-11181-002
7±0811248
S001621
1±.7±mm × 1±mm × 18.±mm
1±.7±mm × 1±mm × 18.±mm
43.2mm × 39.6mm × 30.±mm
16.±mm × 18mm × 18mm
16.±mm × 18mm × 18mm
31mm × 31mm × 2±mm
±100
6100
1±0
Würth Elektronik
Würth Elektronik
Würth Elektronik
Würth Elektronik
Würth Elektronik
Würth Elektronik
Würth Elektronik
Würth Elektronik
Premo
2±
2400
18±0
±±0
420
10±
1230
688
±60
80
28V/0.±A
14V/1A
8:1:1.28
1:1:0.24
8±V/0.4A
90V/1A
43.18mm × 39.6mm × 30.48mm
31mm × 31mm × 2±mm
1:1:0.22
1±0
1:1:0.17
600
12±V/0.32A
30V/0.±A
24V/2A
23.±mm × 21.4mm × 9.±mm
31mm × 31mm × 2±mm
72:16:10
4:1.0:1.0
16:1.0:4.0
1:1:0.8
1000
280
2±
Würth Elektronik
Renco
2±mm × 22.2mm × 16mm
43.2mm × 39.6mm × 30.±mm
11±0
11
10
±V/4A
7±0312872
11
Würth Elektronik
28V/4A
3798f
14
LT3798
OPERATION
MOSFET and Diode Selection
Power Factor Correction/Harmonic Content
With a strong 1.9A gate driver, the Lꢀ3798 can effectively
drive most high voltage MOSFEꢀs. A low Qg MOSFEꢀ is
recommendedtomaximizeefficiency.Inmostapplications,
ꢀhe Lꢀ3798 attains high power factor and low harmonic
content by making the peak current of the main power
switch proportional to the line voltage by using an internal
multiplier. A power factor of >0.97 is easily attainable for
most applications by following the design equations in
this data sheet. With proper design, Lꢀ3798 applications
can easily meet most harmonic standards.
the R
should be chosen to limit the temperature rise
DS(ON)
of the MOSFEꢀ. ꢀhe drain of the MOSFEꢀ is stressed to
• N + V during the time the MOSFEꢀ is off and
V
OUꢀ
PS
IN
the secondary diode is conducting current. But in most
applications,theleakageinductancevoltagespikeexceeds
thisvoltage. ꢀhevoltageofthisstressisdeterminedbythe
switch voltage clamp. Always check the switch waveform
with an oscilloscope to make sure the leakage inductance
voltage spike is below the breakdown voltage of the MOS-
FEꢀ. A transient voltage suppressor and diode are slower
thantheleakageinductancevoltagespike,thereforecausing
a higher voltage than calculated.
Operation Under Light Output Loads
ꢀhe Lꢀ3798 detects output overvoltage conditions by
looking at the voltage on the third winding. ꢀhe third
windingvoltageisproportionaltotheoutputvoltagewhen
the main power switch is off and the secondary diode is
conducting current. Sensing the output voltage requires
delivering power to the output. When the output current is
verylow,thisperiodicdeliveryofoutputcurrentcanexceed
the load current. ꢀhe OVP pin sets the output overvolt-
age threshold. When the output of the sample-and-hold
is above this voltage, the minimum switching frequency
is divided by 8 as shown in Figure ±. ꢀhis OVP threshold
needs to be set above 1.3±V and should be set out of the
way of output voltage transients. ꢀhe output clamp point
is set with the following formula:
ꢀhe secondary diode stress may be as much as V
+ 2
OUꢀ
• V /N due to the anode of the diode ringing with the
IN PS
secondary leakage inductance. An RC snubber in parallel
with the diode eliminates this ringing, so that the reverse
voltage stress is limited to V
PS
+ V /N . With a high
IN PS
OUꢀ
N
and output current greater than 3A, the I
through
RMS
the diode can become very high and a low forward drop
Schottky is recommended.
V
= V (R4 + R±)/(N • R±)–(V + (R4•I )/N )
OVP Sꢀ F ꢀC Sꢀ
OUꢀ
Discontinuous Mode Detection
ꢀhe V
pin voltage may be provided by a resistor divider
REF
OVP
ꢀhe discontinuous mode detector uses AC-coupling to
detect the ringing on the third winding. A 22pF capacitor
with a 30k resistor in series is recommended in most
designs. Depending on the amount of leakage inductance
ringing, an additional current may be needed to prevent
falsetrippingfromtheleakageinductanceringing.Aresis-
from the V pin. ꢀhis frequency division greatly reduces
the output current delivered to the output but a Zener or
resistor is required to dissipate the remaining output cur-
rent. ꢀheZenerdiode’svoltageneedstobe±5higherthan
the output voltage set by the resistor divider connected to
the FB pin. Multiple Zener diodes in series may be needed
for higher output power applications to keep the Zener’s
temperature within the specification.
tor from INꢀV to the DCM pin adds this current. Up to
CC
an additional 100ꢁA of current may be needed in some
cases. ꢀhe DCM pin is roughly 0.7V, therefore the resistor
value is selected using the following equation:
10V – 0.7V
R =
I
where I is equal to the additional current into the DCM pin.
3798f
15
LT3798
OPERATION
Protection from Shorted Output Conditions
Usage with DC Input Voltage
DuringashortedoutputconditionasshowninFigure6,the
Lꢀ3798 operates at the minimum operating frequency. In
normal operation, the third winding provides power to the
IC, but the third winding voltage is zero during a shorted
ꢀhe Lꢀ3798 is flexible enough to operate well from low
voltage to very high voltage DC input voltage applications.
When the supply voltage is less than 40V, the startup re-
sistor is not needed and the part's V can be connected
IN
condition. ꢀhis causes the part’s V UVLO to shutdown
directly to the supply voltage. ꢀhe startup sequence for
voltages higher than 40V is the same as what is described
for high voltage offline supply voltages.
IN
switching. ꢀhe part starts switching again when V has
IN
reached its turn-on voltage.
ꢀhe loop compensation component values can be chosen
to provide faster loop response since the Lꢀ3798 does
not have to provide PFC for the slow ±0Hz/60Hz AC input
voltage. For DC input applications, connect a 2±k resistor
V
3RD WINDING
20V/DIV
V
OUꢀ
10V/DIV
from V
to INꢀV .
IN_SENSE
CC
I
OUꢀ
1A/DIV
3798 F0±
1ms/DIV
Figure 5. Switching Waveforms When Output
Open-Circuits or at Very Light Load Conditions
V
IN
20V/DIV
V
3RD WINDING
±0V/DIV
I
PRI
1A/DIV
3798 F06
100ms/DIV
Figure 6. Switching Waveforms When Output Short-Circuits
3798f
16
LT3798
TYPICAL APPLICATIONS
Universal Input 24W PFC Bus Converter
L2
800μH
L1
33mH
BR1
R17
R7
C1
0.068μF
D2
90V
ꢀO 26±V
AC
20Ω
100k
C2
0.1μF
4:1:1
R3
R8
100k
C4
499k
4.7pF
10μF
C±
R4
499k
R13
2k
D3
R14
D4
V
DCM
IN
90.9k
24V
1A
V
FB
R±
1M
IN_SENSE
Z1
+
C10
±60μF
× 2
R1±
4.99k
C6
22pF
EN/UVLO
D1
R6
9±.3k
Lꢀ3798
R16
20Ω
GAꢀE
M1
V
REF
Z2
R11
R9
SENSE
CꢀRL3
CꢀRL2
CꢀRL1
100k
40.2k
R
INꢀV
CC
S
C9
4.7μF
0.0±Ω
C8
2.2nF
GND
OVP
VC
+
–
COMP
COMP
R12
221k
R10
16.±k
“Y1 CAP”
C3
C7, 0.1μF
2.2μF
3798 ꢀA02
BR1: DIODES, INC. HD06
C8:
D1:
VISHAY 440LD22-R
CENꢀRAL SEMICONDUCꢀOR CMR1U-06M
D2,D3: DIODES INC. BAV20W
D4: CENꢀRAL SEMICONDUCꢀOR CMR1U-02M
M1: FAIRCHILD FDPF1±N6±
ꢀ1:
Z1:
Z2:
COILCRAFꢀ JA4429-AL
FAIRCHILD SMBJ170A
CENꢀRAL SEMICONDUCꢀOR CMZ±937B
3798f
17
LT3798
TYPICAL APPLICATIONS
Universal Input 48W PFC Application
L1
1mH
L2
27mH
BR1
C1
0.1μF
R17
47Ω
R3
R7
D2
90V
ꢀO 26±V
AC
499k
100k
C2
0.22μF
R4
499k
R8
100k
C4
22pF
4:1:1
C±
10μF
R13
33k
D3
R14
100k
D4
R±
V
DCM
FB
IN
IN_SENSE
24V
2A
2.4M
V
Z1
C10
1000μF
×2
+
C6
R1±
EN/UVLO
R6
301k
Lꢀ3798
22pF ±.49k
C11
10μF
×2
D1
R16
20Ω
V
REF
R11
100k
R9
40.2k
M1
CꢀRL3
CꢀRL2
GAꢀE
Z2
SENSE
R
INꢀV
CC
CꢀRL1
OVP
S
C9
4.7μF
0.03Ω
C8
2.2nF
GND
+
–
R12
221k
R10
31.6k
VC
COMP
COMP
“Y1 CAP”
C7, 0.1μF
C3
1μF
3798 ꢀA03
BR1: DIODES, INC. HD06
C8: VISHAY 440LD22-R
C11: MURAꢀA GRM32ER7YA106KA12L
D1: CENꢀRAL SEMICONDUCꢀOR CMR1U-06M
D2,D3: DIODES INC. BAV20W
D4: DIODES INC. SBR20A200CꢀB
M1: INFINEON IPB60R16±CP
ꢀ1:
Z1:
Z2:
WÜRꢀH ELEKꢀRONIK 7±0811248
FAIRCHILD SMBJ170A
CENꢀRAL SEMICONDUCꢀOR CMZ±937B
3798f
18
LT3798
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LꢀC DWG # 0±-08-1667 Rev E)
BOꢀꢀOM VIEW OF
EXPOSED PAD OPꢀION
2.84± 0.102
(.112 .004)
2.84± 0.102
(.112 .004)
0.889 0.127
(.03± .00±)
1
8
0.3±
REF
±.23
(.206)
MIN
1.6±1 0.102
(.06± .004)
1.6±1 0.102
(.06± .004)
3.20 – 3.4±
(.126 – .136)
0.12 REF
DEꢀAIL “B”
CORNER ꢀAIL IS PARꢀ OF
ꢀHE LEADFRAME FEAꢀURE.
FOR REFERENCE ONLY
DEꢀAIL “B”
16
9
0.30± 0.038
(.0120 .001±)
ꢀYP
0.±0
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 0.102
(.1±9 .004)
(NOꢀE 3)
0.280 0.076
(.011 .003)
RECOMMENDED SOLDER PAD LAYOUꢀ
161±1413121110
9
REF
DEꢀAIL “A”
0.2±4
(.010)
3.00 0.102
(.118 .004)
(NOꢀE 4)
0° – 6° ꢀYP
4.90 0.1±2
(.193 .006)
GAUGE PLANE
0.±3 0.1±2
(.021 .006)
1 2 3 4 ± 6 7 8
DEꢀAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEAꢀING
PLANE
0.17 – 0.27
(.007 – .011)
ꢀYP
0.1016 0.0±08
(.004 .002)
0.±0
(.0197)
BSC
MSOP (MSE16) 0911 REV E
NOꢀE:
1. DIMENSIONS IN MILLIMEꢀER/(INCH)
2. DRAWING NOꢀ ꢀO SCALE
3. DIMENSION DOES NOꢀ INCLUDE MOLD FLASH, PROꢀRUSIONS OR GAꢀE BURRS.
MOLD FLASH, PROꢀRUSIONS OR GAꢀE BURRS SHALL NOꢀ EXCEED 0.1±2mm (.006") PER SIDE
4. DIMENSION DOES NOꢀ INCLUDE INꢀERLEAD FLASH OR PROꢀRUSIONS.
INꢀERLEAD FLASH OR PROꢀRUSIONS SHALL NOꢀ EXCEED 0.1±2mm (.006") PER SIDE
±. LEAD COPLANARIꢀY (BOꢀꢀOM OF LEADS AFꢀER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOꢀ EXCEED 0.2±4mm (.010") PER SIDE.
3798f
Information furnished by Linear ꢀechnology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear ꢀechnology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3798
TYPICAL APPLICATION
112W Wide DC Input Industrial Power Supply
V
IN
20V ꢀO 60V
R17
20Ω
R7
C2
D2
6.8k
10μF
ꢀO
CC
R8
6.8k
C4
1±pF
INꢀV
1:1:0.8
C±
10μF
R4
24k
R13
1±k
D3
R14
100k
D4
R±
V
DCM
FB
IN
IN_SENSE
28V
4A
402k
V
C10
10μF
×4
Z1
Z3
R1±
±.9k
EN/UVLO
C6
22pF
R6
±1.1k
Lꢀ3798
D1
D±
V
REF
R11
100k
R9
40.2k
M1
CꢀRL3
CꢀRL2
GAꢀE
Z2
SENSE
R
INꢀV
CC
CꢀRL1
OVP
S
C9
4.7μF
0.004Ω
C8
2.2nF
GND
+
–
R12
221k
R10
34.8k
VC
COMP
COMP
“Y1 CAP”
C7, 22nF
C3
0.1μF
R3
16.2k
3798 ꢀA04
C2:
C8:
ꢀDK C±7±0X7S2A106M
VISHAY 440LD22-R
M1: FAIRCHILD FDP2±32
ꢀ1:
Z1:
Z2:
Z3:
WÜRꢀH ELEKꢀRONIK 7±0312872
DIODES INC. SMCJ60A
CENꢀRAL SEMICONDUCꢀOR CMZ±9398
FAIRCHILD SMBJ170A
C10: MURAꢀA GRM32ER7YA106KA12L
D1: DIODES INC. DFLS11±0
D2,D3: DIODES INC. BAV20W
D4:
D±:
ON SEMICONDUCꢀOR MBR20200Cꢀ
DIODES INC. DFLS2100
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
Lꢀ3799/Lꢀ3799-1
Offline Isolated Flyback LED Controller No Opto-Coupler Required, ꢀRIAC Dimmable, V and V
Limited Only by
OUꢀ
IN
with Active PFC
External Components, MSOP-16E
Lꢀ3748
100V Isolated Flyback Controller
40V Isolated Flyback Converters
100V Isolated Flyback Converters
40V/100V Flyback/Boost Controllers
40V/100V Flyback/Boost Converters
±V ≤ V ≤ 100V, No Opto Flyback , MSOP-16 with High Voltage Spacing
IN
Lꢀ3±73/Lꢀ3±74/Lꢀ3±7±
Lꢀ3±11/Lꢀ3±12
Lꢀ37±7/Lꢀ37±8
Lꢀ39±7/Lꢀ39±8
Monolithic No-Opto Flybacks with Integrated 1.2±A/0.6±A/2.±A Switch
Monolithic No-Opto Flybacks with Integrated 240mA/420mA Switch
Universal Controllers with Small Package and Powerful Gate Drive
Monolithic with Integrated ±A/3.3A Switch
LꢀC3803/LꢀC3803-3/LꢀC3803-± 200kHz/300kHz Flyback Controllers
V
IN
V
IN
and V
and V
Limited Only by External Components
Limited Only by External Components
OUꢀ
OUꢀ
LꢀC380±/LꢀC380±-±
Adjustable Frequency Flyback
Controllers
3798f
LT 0212 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 9±03±-7417
20
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(408) 432-1900 FAX: (408) 434-0±07 www.linear.com
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