B340A [Linear]
42V, 2.5A, 2MHz Step-Down Switching Regulator with 2.7μA Quiescent Current; 42V , 2.5A , 2MHz,降压型开关稳压器与2.7μA静态电流型号: | B340A |
厂家: | Linear |
描述: | 42V, 2.5A, 2MHz Step-Down Switching Regulator with 2.7μA Quiescent Current |
文件: | 总24页 (文件大小:293K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT3975
42V, 2.5A, 2MHz Step-Down
Switching Regulator with
2.7µA Quiescent Current
FEATURES
DESCRIPTION
The LT®3975 is an adjustable frequency monolithic buck
switchingregulatorthatacceptsawideinputvoltagerange
up to 42V. Low quiescent current design consumes only
2.7µAofsupplycurrentwhileregulatingwithnoload. Low
ripple Burst Mode operation maintains high efficiency at
low output currents while keeping the output ripple below
15mV in a typical application. The LT3975 can supply up
to 2.5A of load current and has current limit foldback to
limit power dissipation during short circuit. A low dropout
voltage of 500mV is maintained when the input voltage
drops below the programmed output voltage, such as
during automotive cold crank.
n
Ultralow Quiescent Current:
2.7µA I at 12V to 3.3V
Q
IN
OUT
Low Ripple Burst Mode® Operation
n
Output Ripple < 15mV
P-P
n
n
n
n
n
n
n
n
n
n
n
n
n
Wide Input Range: Operation from 4.3V to 42V
2.5A Maximum Output Current
Excellent Start-Up and Dropout Performance
Adjustable Switching Frequency: 200kHz to 2MHz
Synchronizable Between 250kHz to 2MHz
Accurate Programmable Undervoltage Lockout
Low Shutdown Current: I = 700nA
Q
Power Good Flag
Soft-Start Capability
Thermal Shutdown Protection
An internally compensated current mode topology is used
for fast transient response and good loop stability. A high
efficiency 75mΩ switch is included on the die along with a
boostSchottkydiodeandthenecessaryoscillator,control,
andlogiccircuitry. Anaccurate1.02Vthresholdenablepin
can be driven directly from a microcontroller or used as a
programmable undervoltage lockout. A capacitor on the
SS pin provides a controlled inrush current (soft-start).
Current Limit Foldback with Soft-Start Override
Saturating Switch Design: 75mΩ On Resistance
Small, Thermally Enhanced 16-Lead MSOP Package
APPLICATIONS
n
Automotive Battery Regulation
n
Portable Products
A power good flag signals when V
reaches 91.6% of
OUT
n
Industrial Supplies
the programmed output voltage. The LT3975 is available
in a small 16-lead MSOP package with exposed pad for
low thermal resistance.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
No-Load Supply Current
4.5
3.3V Step-Down Converter
IN REGULATION
V
IN
4.3V TO 42V
4.0
3.5
V
IN
OFF ON
EN
PG
BOOST
SW
3.3µH
0.47µF
3.0
2.5
2.0
1.5
10µF
PDS560
LT3975
SS
RT
OUT
FB
V
3.3V
2.5A
1M
OUT
10pF
SYNC
GND
10nF
47µF
1210
78.7k
576k
1.0
0
15
INPUT VOLTAGE (V)
35
45
5
10
20 25 30
40
3975 TA01a
f = 600kHz
3975 TA01b
3975f
1
LT3975
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , EN Voltage (Note 3) ...........................................42V
IN
1
2
3
4
5
6
7
8
SYNC
PG
FB
SS
16
15
14
BOOST Pin Voltage ...................................................55V
BOOST Pin Above SW Pin.........................................30V
FB, RT, SYNC, SS Voltage...........................................6V
PG Voltage................................................................30V
OUT Voltage..............................................................16V
Operating Junction Temperature Range (Note 2)
OUT
BOOST
SW
RT
17
GND
13 EN
12
11
10
9
V
V
V
IN
IN
IN
SW
SW
NC
NC
MSE PACKAGE
16-LEAD PLASTIC MSOP
θ
= 40°C/W
JA
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
LT3975E............................................. –40°C to 125°C
LT3975I.............................................. –40°C to 125°C
LT3975H ............................................ –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
ORDER INFORMATION
LEAD FREE FINISH
LT3975EMSE#PBF
LT3975IMSE#PBF
LT3975HMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3975EMSE#TRPBF
LT3975IMSE#TRPBF
LT3975HMSE#TRPBF
3975
3975
3975
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
PARAMETER
Minimum Input Voltage
CONDITIONS
(Note 3)
MIN
TYP
4
MAX
4.3
UNITS
V
l
Dropout Comparator Threshold
Dropout Comparator Threshold Hysteresis
(V – OUT) Falling
IN
430
500
25
570
mV
mV
Quiescent Current from V
V
V
V
Low
0.7
1.6
1.3
2.7
30
µA
µA
µA
IN
EN
EN
EN
High, V
High, V
Low
Low
SYNC
SYNC
l
l
FB Pin Current
V
= 1.5V
0.1
12
nA
FB
Feedback Voltage
1.183
1.173
1.197
1.197
1.212
1.222
V
V
l
FB Voltage Line Regulation
Switching Frequency
4.3V < V < 40V (Note 3)
0.0003
0.01
%/V
IN
R = 11.8k
1.8
0.8
160
2.25
1
200
2.7
1.2
240
MHz
MHz
kHz
T
R = 41.2k
T
R = 294k
T
Minimum Switch On-Time
Minimum Switch Off-Time (Note 4)
105
150
ns
ns
200
3975f
2
LT3975
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
PARAMETER
Switch Current Limit
Foldback Switch Current Limit
CONDITIONS
MIN
4
TYP
5.4
3.3
MAX
6.8
UNITS
A
V
V
= 1V
= 0V
= 1A
FB
FB
A
Switch V
I
80
mV
μA
mV
μA
V
mA
V
mV
nA
%
CESAT
SW
Switch Leakage Current
Boost Schottky Forward Voltage
Boost Schottky Reverse Leakage
Minimum Boost Voltage (Note 5)
BOOST Pin Current
EN Voltage Threshold
EN Voltage Hysteresis
EN Pin Current
PG Threshold Offset from V
0.02
730
0.02
1.3
20
1.02
60
1
I
= 100mA
SH
V
= 12V
2
1.8
32
REVERSE
l
l
I
= 1A, V
– V = 3V
SW
BOOST
SW
EN Falling, V ≥ 4.3V
0.92
5
1.12
IN
0.2
8.4
20
13
V
Falling
FB
FB
PG Hysteresis as % of Output Voltage
PG Leakage
PG Sink Current
SYNC Low Threshold
SYNC High Threshold
SYNC Pin Current
1.7
%
V
V
= 3V
= 0.4V
0.02
480
1.0
1.18
0.1
1
µA
μA
V
V
nA
μA
PG
PG
l
125
0.6
1.5
2.6
V
V
= 6V
SYNC
SS Source Current
= 0.5V
0.9
1.8
SS
Note 3: Minimum input voltage depends on application circuit.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The LT3975 contains circuitry that extends the maximum duty
cycle if there is sufficient voltage across the boost capacitor. See the
Application Information section for more details.
Note 2: The LT3975E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3975I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3975H is guaranteed over the full –40°C to
150°C operating junction temperature range. High junction temperatures
degrade operating lifetimes. Operating lifetime is derated at junction
Note 5: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the switch.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability or permanently damage the device.
temperatures greater than 125°C. The junction temperature (T , in °C) is
J
calculated from the ambient temperature (T , in °C) and power dissipation
A
(P , in Watts) according to the formula:
D
T = T + (P • θ )
JA
J
A
D
where θ (in °C/W) is the package thermal impedance.
JA
3975f
3
LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Efficiency at 5VOUT
Efficiency at 3.3VOUT
Efficiency at 5VOUT
100
95
90
85
80
75
70
65
60
55
50
90
85
80
75
70
65
60
55
50
45
40
100
90
80
70
60
50
40
30
20
10
0
f
= 800kHz
OUT
SW
V
= 5V
L = MSS1260-332NL
f
= 800kHz
= 5V
12V
24V
36V
12V
24V
36V
12V
24V
36V
FRONT PAGE APPLICATION
SW
OUT
V
V
= 3.3V
OUT
L = MSS1260-332NL
L = MSS1260-332NL
0.01
0.1
10
100 1000 10000
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
1
LOAD CURRENT (mA)
LOAD CURRENT (A)
LOAD CURRENT (A)
3975 G03
3975 G01
3975 G02
Efficiency at 3.3VOUT
No-Load Supply Current
No-Load Supply Current
90
80
70
60
50
40
30
20
10
0
10000
1000
100
10
4.5
4.0
FRONT PAGE APPLICATION
IN REGULATION
= 3.3V
V
V
= 12V
V
IN
OUT
OUT
= 3.3V
3.5
3.0
2.5
2.0
1.5
DUE TO CATCH
DIODE LEAKAGE
FRONT PAGE APPLICATION
12V
24V
36V
V
= 3.3V
OUT
L = MSS1260-332NL
0.1 10
LOAD CURRENT (mA)
1
1.0
0.01
100 1000 10000
1
–55 –25
5
35
65
95 125 155
0
15
INPUT VOLTAGE (V)
35
45
5
10
20 25 30
40
TEMPERATURE (°C)
3975 G06
3975 G03
3975 G05
Reference Voltage
Load Regulation
Line Regulation
0.05
0.04
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
1.185
1.180
1.175
1.170
0.20
0.15
0.10
0.05
V
V
= 12V
OUT
V
= 5V
OUT
IN
= 5V
LOAD = 1A
0.03
0.02
0.01
0
0
–0.01
–0.02
–0.03
–0.04
–0.05
–0.05
–0.10
–0.15
–0.20
5
10 15 20 25 30 35 40 45
INPUT VOLTAGE (V)
65
95 125 155
0
0.5
1
2
2.5
–55
5
35
–25
1.5
TEMPERATURE (°C)
INPUT VOLTAGE (V)
2975 G09
3975 G07
3975 G08
3975f
4
LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Thermal Derating
Switch Current Limit
Switch Current Limit
7.0
3.0
2.5
2.0
1.5
1.0
0.5
0
7
6
V
V
= 12V
OUT
30% DUTY CYCLE
IN
= 5V
6.5
6.0
I-GRADE
H-GRADE
5
4
3
2
1
0
5.5
5.0
4.5
4.0
3.5
LIMITED BY MAXIMUM
JUNCTION TEMPERATURE
θ
= 40°C/W
JA
3.0
75 100
–50 –25
0
25 50
125 150
–55 –25
5
35
65
95 125 155
0.2
0.4
0.6
1
0
0.8
TEMPERATURE (°C)
TEMPERATURE (°C)
DUTY CYCLE
3975 G10
3975 G12
3975 G11
Current Limit Foldback
Soft-Start
Switch VCESAT
250
200
150
100
6
5
4
3
2
1
0
6
5
30% DUTY CYCLE
30% DUTY CYCLE
V
= 1V
FB
V
= 3V
SS
V
= 0V
FB
4
3
2
1
0
50
0
0
1
1.5
2.0
2.5
3.0
0.5
0
0.4
0.6
0.8
1.0
1.2
0
0.5
1
1.5
2
2.5
0.2
SWITCH CURRENT (A)
FB PIN VOLTAGE (V)
SS PIN VOLTAGE (V)
3975 G15
3975 G13
3975 G14
BOOST Pin Current
Minimum On-Time
Minimum Off-Time
180
170
160
150
140
130
120
110
100
90
200
190
180
170
160
150
140
130
120
110
100
50
45
40
35
30
25
20
15
10
5
V
SW
= 0V
V
SW
= 0V
SYNC
SYNC
f
= 2MHz
f
= 2MHz
LOAD = 1A
LOAD = 2.5A
LOAD = 1A
LOAD = 2.5A
80
70
60
0
65
95 125 155
–55
5
35
65
95 125 155
–55
5
35
0
0.5
1.5
2
2.5
3
–25
–25
1
TEMPERATURE (°C)
TEMPERATURE (°C)
SWITCH CURRENT (A)
3975 G17
3975 G18
3975 G16
3975f
5
LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
RT Programmed Switching
Frequency
Switching Frequency
Frequency Foldback
700
600
500
400
300
200
100
0
780
720
660
600
350
300
250
200
150
100
50
540
480
420
0
0.8
FB PIN VOLTAGE (V)
1.2
65
TEMPERATURE (°C)
125 155
0
0.2
0.4
0.6
1
–55 –25
5
35
95
2.2
2
0.2
0.8
0.4 0.6
1
1.2 1.4 1.6 1.8
SWITCHING FREQUENCY (MHz)
3975 G21
3975 G19
3975 G20
Internal Undervoltage Lockout
(UVLO)
EN Thresholds
PG Thresholds
6
5
4
3
1.09
1.12
EN RISING
1.08
1.07
1.11
1.10
FB RISING
1.06
1.05
1.04
1.03
1.02
1.09
1.08
1.07
1.06
1.05
FB FALLING
2
1
0
EN FALLING
1.01
1.04
65
TEMPERATURE (°C)
125 155
–25
5
65
95 125 155
–55 –25
5
35
95
–55
35
–25
5
65
95 125 155
–55
35
TEMPERATURE (°C)
TEMPERATURE (°C)
3975 G22
3975 G23
3975 G24
Minimum Input Voltage,
VOUT = 5V
Minimum Input Voltage,
VOUT = 3.3V
Burst Frequency
6.5
6.0
5.5
5.0
4.5
4.0
5.0
4.5
4.0
3.5
3.0
2.5
900
800
700
600
500
400
300
200
100
0
V
f
= 5V
V
= 3.3V
OUT
SW
OUT
= 800kHz
FRONT PAGE APPLICATION
V
SW
= 5V
OUT
f
= 800kHz
TO RUN/TO START
TO RUN/TO START
V
f
= 3.3V
OUT
SW
= 600kHz
0.5
1
1.5
LOAD CURRENT (A)
2
2.5
0
20 40 60
80 100
120 140 160
0
0
0.5
1
1.5
2
2.5
LOAD CURRENT (mA)
LOAD CURRENT (A)
3975 G25
3975 G27
3975 G26
3975f
6
LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
SS Pin Current
Boost Capacitor Charger
Boost Diode Forward Voltage
2.6
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
160
140
120
100
80
V
= 0.5V
V
= V
IN
SS
BST
2.4
2.2
2.0
1.8
1.6
1.4
1.2
60
40
20
1.0
0
1
–25
5
65
95 125 155
0
0.5
1.5
2
–55
35
8
10
0
2
4
6
12 14 16
BOOST DIODE CURRENT (A)
TEMPERATURE (°C)
OUT PIN VOLTAGE (V)
3975 G30
3975 G28
3975 G29
Dropout Comparator Thresholds
Start-Up/Dropout Performance
Start-Up/Dropout Performance
600
580
560
540
520
500
480
460
440
420
400
V
V
IN
V
IN
V
IN
IN
1V/DIV
1V/DIV
V
V
OUT
OUT
V
RISING
OUT
V
V
OUT
1V/DIV
OUT
1V/DIV
V
FALLING
OUT
3975 G32
3975 G33
2.5Ω LOAD
100ms/DIV
1kΩ LOAD
100ms/DIV
(2A IN REGULATION)
(5mA IN REGULATION)
–55
5
35
65
95 125 155
–25
TEMPERATURE (°C)
3975 G31
Full Frequency Switching
Waveforms
Burst Mode Switching Waveforms
Dropout Switching Waveforms
V
V
SW
2V/DIV
SW
V
SW
5V/DIV
5V/DIV
I
I
I
L
L
L
1A/DIV
1A/DIV
0.5A/DIV
V
V
V
OUT
50mV/DIV
OUT
OUT
10mV/DIV
20mV/DIV
3975 G34
3975 G35
3975 G36
V
V
= 12V
5µs/DIV
V
V
= 12V
1µs/DIV
V
= 5V
IN
5µs/DIV
IN
IN
= 3.3V
= 20mA
= 47µF
= 3.3V
= 1A
V
SET FOR 5V
= 0.5A
OUT
OUT
OUT
I
LOAD
C = 47µF
OUT
I
I
LOAD
LOAD
C
C
= 47µF
OUT
OUT
3975f
7
LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Load Transient: 0.5A to 2.5A
Load Transient: 20mA to 2A
I
I
L
1A/DIV
L
1A/DIV
V
V
OUT
OUT
200mV/DIV
200mV/DIV
3975 G37
3975 G38
12V
20µs/DIV
20µs/DIV
12V
IN
OUT
= 47µF
IN
OUT
= 47µF
3.3V
C
3.3V
C
OUT
OUT
PIN FUNCTIONS
FB (Pin 1): The LT3975 regulates the FB pin to 1.197V.
Connect the feedback resistor divider tap to this pin. Also,
connectaphaseleadcapacitorbetweenFBandtheoutput.
Typically, this capacitor is 10pF.
V (Pins 10, 11, 12): The V pin supplies current to the
IN IN
LT3975’sinternalcircuitryandtotheinternalpowerswitch.
These pins must be locally bypassed.
EN (Pin 13): The part is in shutdown when this pin is low
and active when this pin is high. The hysteretic threshold
voltage is 1.08V going up and 1.02V going down. The
SS (Pin 2): A capacitor is tied between SS and ground to
slowly ramp up the peak current limit of the LT3975 on
start-up. There is an internal 1.8μA pull-up on this pin.
The soft-start capacitor is actively discharged when the
EN pin goes low, during undervoltage lockout or thermal
shutdown. Float this pin to disable soft-start.
EN threshold is only accurate when V is above 4.3V. If
IN
V
is lower than 3.9V, internal UVLO will place the part
in shutdown. Tie to V if shutdown feature is not used.
IN
IN
RT (Pin 14): A resistor is tied between RT and ground to
set the switching frequency.
OUT(Pin3):Thispinisaninputtothedropoutcomparator
which maintains a minimum dropout of 500mV between
PG (Pin 15): The PG pin is the open-drain output of an
internal comparator. PGOOD remains low until the FB pin
is within 8.4% of the final regulation voltage. PGOOD is
V
and OUT. The OUT pin connects to the anode of the
IN
internal boost diode. This pin also supplies the current to
the LT3975’s internal regulator when OUT is above 3.2V.
Connect this pin to the output when the programmed
output voltage is less than 16V.
valid when V is above 2V.
IN
SYNC (Pin 16): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a clock source for synchroni-
zation, which will include pulse skipping at low output
loads. When in pulse-skipping mode, quiescent current
increases to 11µA in a typical application at no load. Do
not float this pin.
BOOST (Pin 4): This pin is used to provide a drive volt-
age, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pins 5, 6, 7): The SW pin is the output of an internal
power switch. Connect these pins to the inductor, catch
diode, and boost capacitor.
GND (Exposed Pad Pin 17): Ground. The exposed pad
must be soldered to the PCB.
NC(Pins8,9):NoConnects.Thesepinsarenotconnected
to internal circuitry.
3975f
8
LT3975
BLOCK DIAGRAM
OUT
V
IN
V
IN
+
0.5V
C1
–
–
+
–
INTERNAL 1.197V REF
SHDN
+
1.02V
+
–
SWITCH
LATCH
BOOST
SW
EN
RT
+
SLOPE COMP
R
C3
L1
OSCILLATOR
200kHz TO 2MHz
Q
S
R
T
V
OUT
SYNC
PG
Burst Mode
DETECT
D1 C2
ERROR AMP
V
CLAMP
C
V
+
–
+
1.097V
C
1.8µA
–
SS
C4
OPT
SHDN
GND
FB
R2
R1
3975 BD
C5
3975f
9
LT3975
OPERATION
The LT3975 is a constant frequency, current mode step-
down regulator. An oscillator, with frequency set by RT,
sets an RS flip-flop, turning on the internal power switch.
An amplifier and comparator monitor the current flowing
Between bursts, all circuitry associated with controlling
the output switch is shut down reducing the input supply
current to 1.7μA. In a typical application, 2.7μA will be
consumed from the supply when regulating with no load.
between the V and SW pins, turning the switch off when
IN
The oscillator reduces the LT3975’s operating frequency
when the voltage at the FB pin is low. This frequency
foldback helps to control the output current during start-
up and overload.
this current reaches a level determined by the voltage at
V (see Block Diagram). An error amplifier measures the
C
output voltage through an external resistor divider tied
to the FB pin and servos the V node. If the error ampli-
C
The LT3975 can provide up to 2.5A of output current.
A current limit foldback feature throttles back the cur-
rent limit during overload conditions to limit the power
dissipation. When SS is below 2V, the LT3975 overrides
the current limit foldback circuit to avoid interfering with
start-up. Thermal shutdown further protects the part from
excessivepowerdissipation,especiallyinelevatedambient
temperature environments.
fier’s output increases, more current is delivered to the
output; if it decreases, less current is delivered. An active
clamp on the V pin provides current limit. The V pin is
C
C
also clamped by the voltage on the SS pin; soft-start is
implemented by generating a voltage ramp at the SS pin
using an external capacitor.
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator normally draws power from the V
IN
If the input voltage decreases towards the programmed
output voltage, the LT3975 will start to skip switch-off
times and decrease the switching frequency to maintain
output regulation. As the input voltage decreases below
the programmed output voltage, the output voltage will be
regulated 500mV below the input voltage. This enforced
minimum dropout voltage limits the duty cycle and keeps
the boost capacitor charged during dropout conditions.
Since sufficient boost voltage is maintained, the internal
switchcanfullysaturateyieldinglowdropoutperformance.
pin, but if the OUT pin is connected to an external volt-
age higher than 3.2V, bias power will be drawn from the
external source (typically the regulated output voltage).
This improves efficiency.
If the EN pin is low, the LT3975 is shut down and draws
700nA from the input. When the EN pin falls below 1.02V,
the switching regulator will shut down, and when the EN
pin rises above 1.08V, the switching regulator will become
active. This accurate threshold allows programmable
undervoltage lockout.
The LT3975 contains a power good comparator which
trips when the FB pin is at 91.6% of its regulated value.
The PG output is an open-drain transistor that is off when
the output is in regulation, allowing an external resistor
The switch driver operates from either V or from the
IN
BOOST pin. An external capacitor is used to generate a
voltage at the BOOST pin that is higher than the input
supply. This allows the driver to fully saturate the internal
bipolar NPN power switch for efficient operation.
to pull the PG pin high. Power good is valid when V is
IN
above 2V. When the LT3975 is shut down the PG pin is
actively pulled low.
To further optimize efficiency, the LT3975 automatically
switches to Burst Mode operation in light load situations.
3975f
10
LT3975
APPLICATIONS INFORMATION
Achieving Ultralow Quiescent Current
diode should have less than a few µA of typical reverse
leakage at room temperature. These two considerations
are reiterated in the FB Resistor Network and Catch Diode
Selection sections.
To enhance efficiency at light loads, the LT3975 operates
in low ripple Burst Mode operation, which keeps the out-
put capacitor charged to the desired output voltage while
minimizing the input quiescent current. In Burst Mode
operation the LT3975 delivers single pulses of current to
the output capacitor followed by sleep periods where the
output power is supplied by the output capacitor. When in
sleepmodetheLT3975consumes1.7μA,butwhenitturns
on all the circuitry to deliver a current pulse, the LT3975
consumes several mA of input current in addition to the
switch current. Therefore, the total quiescent current will
be greater than 1.7μA when regulating.
It is important to note that another way to decrease the
pulse frequency is to increase the magnitude of each
single current pulse. However, this increases the output
voltage ripple because each cycle delivers more power to
the output capacitor. The magnitude of the current pulses
was selected to ensure less than 15mV of output ripple in
a typical application. See Figure 2.
V
SW
5V/DIV
As the output load decreases, the frequency of single cur-
rent pulses decreases (see Figure 1) and the percentage
of time the LT3975 is in sleep mode increases, resulting
in much higher light load efficiency. By maximizing the
time between pulses, the converter quiescent current
gets closer to the 1.7μA ideal. Therefore, to optimize the
quiescent current performance at light loads, the current
in the feedback resistor divider and the reverse current
in the catch diode must be minimized, as these appear
to the output as load currents. Use the largest possible
feedback resistors and a low leakage Schottky catch diode
in applications utilizing the ultralow quiescent current
performanceoftheLT3975. Thefeedbackresistorsshould
preferably be on the order of MΩ and the Schottky catch
I
L
0.5A/DIV
V
OUT
10mV/DIV
3975 F02
V
V
= 12V
5µs/DIV
IN
= 3.3V
= 20mA
= 47µF
OUT
I
LOAD
C
OUT
Figure 2. Burst Mode Operation
While in Burst Mode operation, the burst frequency and
the charge delivered with each pulse will not change with
outputcapacitance.Therefore,theoutputvoltageripplewill
be inversely proportional to the output capacitance. In a
typicalapplicationwitha22µFoutputcapacitor, theoutput
ripple is about 10mV, and with a 47µF output capacitor
the output ripple is about 5mV. The output voltage ripple
can continue to be decreased by increasing the output
capacitance, though care must be taken to minimize the
effects of output capacitor ESR and ESL.
900
800
V
SW
= 5V
OUT
= 800kHz
700
600
500
400
300
200
100
0
f
At higher output loads (above 150mA for the front page
application) the LT3975 will be running at the frequency
programmed by the R resistor, and will be operating in
standard PWM mode. The transition between PWM and
low ripple Burst Mode operation is seamless, and will not
disturb the output voltage.
V
SW
= 3.3V
OUT
f
= 600kHz
T
80 100
120 140 160
0
20 40 60
To ensure proper Burst Mode operation, the SYNC pin
must be grounded. When synchronized with an external
clock, the LT3975 will pulse skip at light loads. At very
LOAD CURRENT (mA)
3975 F01
Figure 1. Switching Frequency in Burst Mode Operation
3975f
11
LT3975
APPLICATIONS INFORMATION
light loads, the part will go to sleep between groups of
pulses, so the quiescent current of the part will still be low,
but not as low as in Burst Mode operation. The quiescent
current in a typical application when synchronized with an
external clock is 11µA at no load. Holding the SYNC pin
DC high yields no advantages in terms of output ripple or
minimum load to full frequency, so is not recommended.
Table 1. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz)
R VALUE (kΩ)
T
0.2
0.3
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
294
182
130
78.7
54.9
41.2
32.4
26.1
21.5
17.8
14.7
12.4
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
VOUT
1.197V
R1=R2
–1
Operating Frequency Trade-Offs
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
Selectionoftheoperatingfrequencyisatrade-offbetween
efficiency,componentsize,minimumdropoutvoltage,and
maximum input voltage. The advantage of high frequency
operation is that smaller inductor and capacitor values
may be used. The disadvantages are lower efficiency, and
lower maximum input voltage. The highest acceptable
The total resistance of the FB resistor divider should be
selected to be as large as possible to enhance low current
performance. The resistor divider generates a small load
on the output, which should be minimized to optimize the
low supply current at light loads.
switching frequency (f
) for a given application
SW(MAX)
can be calculated as follows:
WhenusinglargeFBresistors,a10pFphaseleadcapacitor
VOUT + VD
should be connected from V
to FB.
fSW(MAX)
=
OUT
tON(MIN) V – VSW + VD
(
)
OUT
IN
Setting the Switching Frequency
where V is the typical input voltage, V
is the output
IN
The LT3975 uses a constant frequency PWM architecture
that can be programmed to switch from 200kHz to 2MHz
by using a resistor tied from the RT pin to ground. A table
voltage, V is the catch diode drop (~0.5V), and V is
D
SW
the internal switch drop (~0.22V at max load). This equa-
tion shows that slower switching frequency is necessary
showing the necessary R value for a desired switching
T
to safely accommodate high V /V
ratio. This is due
IN OUT
frequency is in Table 1.
to the limitation on the LT3975’s minimum on-time. The
minimum on-time is a strong function of temperature.
Use the typical minimum on-time curve to design for an
application’s maximum temperature, while adding about
30%forpart-to-partvariation.Theminimumdutycyclethat
can be achieved taking minimum on time into account is:
To estimate the necessary R value for a desired switching
T
frequency, use the equation:
51.1
RT =
–9.27
1.09
f
(
)
SW
DC
= f • t
SW ON(MIN)
MIN
where R is in kΩ and f is in MHz.
T
SW
where f is the switching frequency, the t
is the
ON(MIN)
SW
minimum switch on-time.
3975f
12
LT3975
APPLICATIONS INFORMATION
A good choice of switching frequency should allow ad-
equate input voltage range (see next two sections) and
keep the inductor and capacitor values small.
capacitor falls and requires refreshing. When this occurs,
the switch will turn off, allowing the inductor current to
recharge the boost capacitor. This places a limitation on
the maximum duty cycle as follows:
Maximum Input Voltage Range
βSW
βSW +1
DCMAX
=
The LT3975 can operate from input voltages of up to 42V.
Often the highest allowed V during normal operation
IN
(V
) is limited by the minimum duty cycle rather
IN(OP-MAX)
whereβ isequaltothebetaoftheinternalpowerswitch.
SW
than the absolute maximum ratings of the V pin. It can
IN
The beta of the power switch is typically about 50, which
be calculated using the following equation:
leads to a DC
of about 98%. This leads to a minimum
MAX
input voltage of approximately:
VOUT + VD
fSW • tON(MIN)
V
=
– VD + VSW
IN(OP-MAX)
VOUT + VD
DCMAX
V
=
– VD + VSW
IN(MIN1)
where t
is the minimum switch on-time. A lower
ON(MIN)
switching frequency can be used to extend normal opera-
tion to higher input voltages.
where V
is the output voltage, V is the catch diode
OUT
D
drop, V is the internal switch drop and DC
is the
MAX
SW
maximum duty cycle.
The circuit will tolerate inputs above the maximum op-
erating input voltage and up to the absolute maximum
The final factor affecting the minimum input voltage is
the minimum dropout voltage. When the OUT pin is tied
to the output, the LT3975 regulates the output such that
ratings of the V and BOOST pins, regardless of chosen
IN
switching frequency. However, during such transients
where V is higher than V
, the LT3975 will enter
IN(OP-MAX)
IN
it stays 500mV below V . This enforced minimum drop-
IN
pulse-skippingoperationwheresomeswitchingpulsesare
skipped to maintain output regulation. The output voltage
ripple and inductor current ripple will be higher than in
out voltage is due to reasons that are covered in the next
section. This places a limitation on the minimum input
voltage as follows:
typical operation. Do not overload when V is greater
IN
V
= V
+ V
than V
.
IN(MIN2)
OUT DROPOUT(MIN)
IN(OP-MAX)
where V
DROPOUT(MIN)
is the programmed output voltage and
OUT
Minimum Input Voltage Range
V
is the minimum dropout voltage of 500mV.
The minimum input voltage is determined by either the
LT3975’sminimumoperatingvoltageof4.3V,itsmaximum
duty cycle, or the enforced minimum dropout voltage.
See the Typical Performance Characteristics section for
the minimum input voltage across load for outputs of
3.3V and 5V.
Combining these factors leads to the overall minimum
input voltage:
V
= Max (V
, V
, 4.3V)
IN(MIN)
IN(MIN1) IN(MIN2)
Minimum Dropout Voltage
Toachievealowdropoutvoltage,theinternalpowerswitch
must always be able to fully saturate. This means that the
boost capacitor, which provides a base drive higher than
The duty cycle is the fraction of time that the internal
switch is on during a clock cycle. Unlike many fixed fre-
quency regulators, the LT3975 can extend its duty cycle
by remaining on for multiple clock cycles. The LT3975
will not switch off at the end of each clock cycle if there
is sufficient voltage across the boost capacitor (C3 in
the Block Diagram). Eventually, the voltage on the boost
V , must always be able to charge up when the part starts
IN
up and then must also stay charged during all operating
conditions.
3975f
13
LT3975
APPLICATIONS INFORMATION
Duringstart-upifthereisinsufficientinductorcurrent,such
as during light load situations, the boost capacitor will be
unable to charge. When the LT3975 detects that the boost
capacitor is not charged, it activates a 100mA (typical)
pull-down on the OUT pin. If the OUT pin is connected to
theoutput, theextraloadwillincreasetheinductorcurrent
enough to sufficiently charge the boost capacitor. When
the boost capacitor is charged, the current source turns
off, and the part may re-enter Burst Mode operation.
measured dropout voltage, can be significantly reduced.
Additionally, when operating in dropout at high currents,
high ripple voltage on the input and output can generate
audible noise. This noise can also be significantly reduced
by adding bulk capacitance to the input and output to
reduce the voltage ripple.
Inductor Selection and Maximum Output Current
For a given input and output voltage, the inductor value
and switching frequency will determine the ripple current.
To keep the boost capacitor charged regardless of load
during dropout conditions, a minimum dropout voltage
is enforced. When the OUT pin is tied to the output, the
LT3975 regulates the output such that:
The ripple current increases with higher V or V
and
IN
OUT
decreases with higher inductance and faster switching
frequency. A good first choice for the inductor value is:
VOUT + VD
L =
V – V
> V
DROPOUT(MIN)
IN
OUT
1.5•fSW
where V
is 500mV. The 500mV dropout volt-
DROPOUT(MIN)
age limits the duty cycle and forces the switch to turn off
regularly to charge the boost capacitor. Since sufficient
voltageacrosstheboostcapacitorismaintained,theswitch
is allowed to fully saturate and the internal switch drop
stays low for good dropout performance. Figure 3 shows
where f is the switching frequency in MHz, V
is the
OUT
SW
output voltage, V is the catch diode drop (~0.5V) and L
D
is the inductor value is μH.
The inductor’s RMS current rating must be greater than
the maximum load current and its saturation current
should be about 30% higher. For robust operation in fault
conditions (start-up or overload) and high input voltage
(>30V), the saturation current should be above 8.5A.
To keep the efficiency high, the series resistance (DCR)
should be less than 0.1Ω, and the core material should
be intended for high frequency applications. Table 2 lists
several inductor vendors.
the overall V to V
performances during start-up and
IN
OUT
dropout conditions.
V
V
IN
IN
1V/DIV
V
OUT
V
OUT
1V/DIV
Table 2. Inductor Vendors
3975 F03
1kΩ LOAD
100ms/DIV
(5mA IN REGULATION)
VENDOR
Coilcraft
Sumida
URL
www.coilcraft.com
www.sumida.com
www.tokoam.com
www.we-online.com
www.cooperet.com
www.murata.com
Figure 3. VIN to VOUT Performance
Toko
It is important to note that the 500mV dropout voltage
specified is the minimum difference between V and
Würth Elektronik
Coiltronics
Murata
IN
V
. When measuring V to V
with a multimeter,
OUT
IN
OUT
the measured value will be higher than 500mV because
you have to add half the ripple voltage on the input and
half the ripple voltage on the output. With the normal
ceramic capacitors specified in the data sheet, this mea-
sured dropout voltage can be as high as 650mV at high
load. If some bulk electrolytic capacitance is added to the
input and output the voltage ripple, and subsequently the
Theinductorvaluemustbesufficienttosupplythedesired
maximum output current (I
), which is a function
OUT(MAX)
of the switch current limit (I ) and the ripple current.
LIM
∆IL
2
IOUT(MAX) = ILIM
–
3975f
14
LT3975
APPLICATIONS INFORMATION
TheLT3975limitsitspeakswitchcurrentinordertoprotect
continuous. Discontinuous operation occurs when I
OUT
itselfandthesystemfromoverloadandshort-circuitfaults.
is less than ΔI /2.
L
The LT3975’s switch current limit (I ) is typically 5.4A at
LIM
Current Limit Foldback and Thermal Protection
low duty cycles and decreases linearly to 4.4A at DC = 0.8.
The LT3975 has a large peak current limit to ensure a 2.5A
max output current across duty cycle and current limit
distribution, as well as allowing a reasonable inductor
ripple current. During a short-circuit fault, having a large
current limit can lead to excessive power dissipation and
temperature rise in the LT3975, as well as the inductor and
catch diode. To limit this power dissipation, the LT3975
starts to fold back the current limit when the FB pin falls
below 0.8V. The LT3975 typically lowers the peak current
limit about 40% from 5.4A to 3.3A.
When the switch is off, the potential across the inductor
is the output voltage plus the catch diode drop. This gives
the peak-to-peak ripple current in the inductor:
1–DC • VOUT + VD
(
)
(
)
∆IL =
L • fSW
where f is the switching frequency of the LT3975, DC is
SW
the duty cycle and L is the value of the inductor. Therefore,
the maximum output current that the LT3975 will deliver
depends on the switch current limit, the inductor value,
and the input and output voltages. The inductor value may
have to be increased if the inductor ripple current does
Duringstart-up,whentheoutputvoltageandFBpinarelow,
current limit foldback could hinder the LT3975’s ability to
start up into a large load. To avoid this potential problem,
the LT3975’s current limit foldback will be disabled until
the SS pin has charged above 2V. Therefore, the use of
a soft-start capacitor will keep the current limit foldback
feature out of the way while the LT3975 is starting up.
not allow sufficient maximum output current (I
)
OUT(MAX)
giventheswitchingfrequency,andmaximuminputvoltage
used in the desired application.
The optimum inductor for a given application may differ
fromtheoneindicatedbythissimpledesignguide.Alarger
valueinductorprovidesahighermaximumloadcurrentand
reducestheoutputvoltageripple.Ifyourloadislowerthan
the maximum load current, than you can relax the value of
the inductor and operate with higher ripple current. This
allowsyoutouseaphysicallysmallerinductor, oronewith
a lower DCR resulting in higher efficiency. Be aware that if
the inductance differs from the simple rule above, then the
maximum load current will depend on the input voltage. In
addition,lowinductancemayresultindiscontinuousmode
operation, which further reduces maximum load current.
For details of maximum output current and discontinuous
operation, see Linear Technology’s Application Note 44.
The LT3975 has thermal shutdown to further protect the
part during periods of high power dissipation, particularly
in high ambient temperature environments. The thermal
shutdown feature detects when the LT3975 is too hot
and shuts the part down, preventing switching. When the
thermal event passes and the LT3975 cools, the part will
restart and resume switching. A thermal shutdown event
actively discharges the soft-start capacitor.
Input Capacitor
BypasstheinputoftheLT3975circuitwithaceramiccapaci-
tor of X7R or X5R type. Y5V types have poor performance
over temperature and applied voltage, and should not be
used. A 4.7μF to 10μF ceramic capacitor is adequate to
bypass the LT3975 and will easily handle the ripple cur-
rent. Note that larger input capacitance is required when
a lower switching frequency is used (due to longer on
times). If the input power source has high impedance, or
there is significant inductance due to long wires or cables,
additional bulk capacitance may be necessary. This can
be provided with a low performance electrolytic capacitor.
Finally, for duty cycles greater than 50% (V /V > 0.5),
OUT IN
a minimum inductance is required to avoid sub-harmonic
oscillations, see Application Note 19.
One approach to choosing the inductor is to start with
the simple rule given above, look at the available induc-
tors, and choose one to meet cost or space goals. Then
use the equations above to check that the LT3975 will be
able to deliver the required output current. Note again
that these equations assume that the inductor current is
3975f
15
LT3975
APPLICATIONS INFORMATION
Step-down regulators draw current from the input sup-
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage
ripple at the LT3975 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
A 4.7μF capacitor is capable of this task, but only if it is
placed close to the LT3975 (see the PCB Layout section).
Asecondprecautionregardingtheceramicinputcapacitor
concernsthemaximuminputvoltageratingoftheLT3975.
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank
circuit. If the LT3975 circuit is plugged into a live supply,
the input voltage can ring to twice its nominal value, pos-
sibly exceeding the LT3975’s voltage rating. If the input
supply is poorly controlled or the user will be plugging
the LT3975 into an energized supply, the input network
should be designed to prevent this overshoot. See Linear
TechnologyApplicationNote88foracompletediscussion.
operating conditions (applied voltage and temperature).
A physically larger capacitor or one with a higher voltage
rating may be required. Table 3 lists several capacitor
vendors.
Table 3. Recommended Ceramic Capacitor Vendors
MANUFACTURER
AVX
URL
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.tdk.com
Murata
Taiyo Yuden
Vishay Siliconix
TDK
Ceramic Capacitors
When in dropout, the LT3975 can excite ceramic ca-
pacitors at audio frequencies. At high load, this could be
unacceptable. Simply adding bulk input capacitance to
the input and output will significantly reduce the voltage
ripple and the audible noise generated at these nodes to
acceptable levels.
Output Capacitor and Output Ripple
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LT3975. As pre-
viously mentioned, a ceramic input capacitor combined
with trace or cable inductance forms a high quality (under
damped)tankcircuit. IftheLT3975circuitispluggedintoa
live supply, the input voltage can ring to twice its nominal
value, possibly exceeding the LT3975’s rating. If the input
supply is poorly controlled or the user will be plugging
the LT3975 into an energized supply, the input network
should be designed to prevent this overshoot. See Linear
TechnologyApplicationNote88foracompletediscussion.
The output capacitor has two essential functions. Along
withtheinductor,itfiltersthesquarewavegeneratedbythe
LT3975toproducetheDCoutput. Inthisroleitdetermines
the output ripple, so low impedance (at the switching
frequency) is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
LT3975’s control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good starting value is:
200
COUT
=
VOUT •fSW
Catch Diode Selection
wheref isinMHz, andC
istherecommendedoutput
OUT
SW
The catch diode (D1 from the Block Diagram) conducts
current only during the switch off time. Average forward
current in normal operation can be calculated from:
capacitance in μF. Use X5R or X7R types. This choice will
provide low output ripple and good transient response.
Transientperformancecanbeimprovedwithahighervalue
capacitorifcombinedwithaphaseleadcapacitor(typically
10pF) between the output and the feedback pin. A lower
value of output capacitor can be used to save space and
cost but transient performance will suffer.
V – VOUT
IN
ID(AVG) = IOUT
V
IN
where I
is the output load current. The current rating of
OUT
When choosing a capacitor, look carefully through the
data sheet to find out what the actual capacitance is under
the diode should be selected to be greater than or equal to
the application’s output load current, so that the diode is
3975f
16
LT3975
APPLICATIONS INFORMATION
robust for a wide input voltage range. A diode with even
higher current rating can be selected for the worst-case
scenarioofoverload,wherethemaxdiodecurrentcanthen
increase to the typical peak switch current. Short circuit is
not the worst-case condition due to current limit foldback.
Peakreversevoltageisequaltotheregulatorinputvoltage.
For inputs up to 40V, a 40V diode is adequate.
Table 4. Schottky Diodes. The Reverse Current Values Listed
Are Estimates Based Off of Typical Curves for Reverse Current
vs Reverse Voltage at 25°C
V at
I at
R
R
25°C
(µA)
F
V at 3A 3A MAX V = 20V
F
TYP 25°C
25°C
(mV)
PART NUMBER V (V)
I
(A)
AVE
(mV)
R
On Semiconductor
MBRA340T3
MBRS340T3
MBRD340
Diodes Inc.
B340A
40
40
40
3
410
410
450
450
500
600
10
10
4
An additional consideration is reverse leakage current.
When the catch diode is reversed biased, any leakage
current will appear as load current. When operating under
light load conditions, the low supply current consumed
by the LT3975 will be optimized by using a catch diode
with minimum reverse leakage current. Low leakage
Schottky diodes often have larger forward voltage drops
at a given current, so a trade-off can exist between low
load and high load efficiency. Often Schottky diodes with
larger reverse bias ratings will have less leakage at a given
output voltage than a diode with a smaller reverse bias
rating. Therefore, superior leakage performance can be
achieved at the expense of diode size. Table 4 lists several
Schottky diodes and their manufacturers.
3
3
40
40
60
40
60
40
30
30
60
40
40
3
3
3
3
3
3
3
3
3
2
2
485
400
600
450
570
420
390
460
580
500
700
500
450
700
490
620
470
430
500
650
2
100
50
4
B340LA
B360A
PDS340
PDS360
0.45
40
100
12
1.7
4
SBR3U40P1
SBR3U30P1
SBR3M30P1
SBR3U60P1
DFLS240L
DFLS240
1
BOOST and OUT Pin Considerations
CapacitorC3andtheinternalboostSchottkydiode(seethe
Block Diagram) are used to generate a boost voltage that
is higher than the input voltage. In most cases a 0.47μF
capacitor will work well. The BOOST pin must be more
than 1.8V above the SW pin for best efficiency and more
than 2.6V above the SW pin to allow the LT3975 to skip
off times to achieve very high duty cycles. For outputs
between 3.2V and 16V, the standard circuit with the OUT
pinconnectedtotheoutput(Figure4a)isbest. Below3.2V
the internal Schottky diode may not be able to sufficiently
charge the boost capacitor. Above 16V, the OUT pin abs
max is violated. For outputs between 2.5V and 3.2V, an
external Schottky diode to the output is sufficient because
anexternalSchottkywillhavemuchlowerforwardvoltage
drop than the internal boost diode.
For output voltages less than 2.5V, there are two options.
An external Schottky diode can charge the boost capaci-
tor from the input (Figure 4c) or from an external voltage
source (Figure 4d). Using an external voltage source is the
better option because it is more efficient than charging the
boost capacitor from the input. However, such a voltage
rail is not always available in all systems. For output volt-
ages greater than 16V, an external Schottky diode from
an external voltage source should be used to charge the
boost capacitor (Figure 4e). In applications using an ex-
ternal voltage source, the supply should be between 3.1V
and 16V. When using the input, the input voltage may not
exceed 27V. In all cases, the maximum voltage rating of
the BOOST pin must not be exceeded.
3975f
17
LT3975
APPLICATIONS INFORMATION
When the output is above 16V, the OUT pin can not be tied
to the output or the OUT pin abs max will be violated. It
should instead be tied to GND (Figure 4e). This is to pre-
vent the dropout circuitry from interfering with switching
behavior and to prevent the 100mA active pull-down from
drawingpower. Itisimportanttonotethatwhentheoutput
is above 16V and the OUT pin is grounded, the dropout
circuitry is not connected, so the minimum dropout will
be about 1.5V, rather than 500mV. If the output is less than
3.2V and an external Schottky is used to charge the boost
capacitor, the OUT pin should still be tied to the output
even though the minimum input voltage of the LT3975 will
be limited by the 4.3V minimum rather than the minimum
dropout voltage.
With the OUT pin connected to the output, a 100mA ac-
tive load will charge the boost capacitor during light load
start-upandanenforced500mVminimumdropoutvoltage
will keep the boost capacitor charged across operating
conditions (see Minimum Dropout Voltage section). This
yieldsexcellentstart-upanddropoutperformance.Figure5
showstheminimuminputvoltagefor3.3Vand5Voutputs.
BOOST
LT3975
BOOST
LT3975
BOOST
V
V
SW
V
V
SW
V
V
IN
SW
IN
IN
IN
IN
IN
LT3975
GND
OUT
OUT
OUT
V
V
V
OUT
OUT
OUT
GND
GND
(4a) For 3.2V ≤ V
≤ 16V
(4b) For 2.5V ≤ V
≤ 3.2V
(4c) For V < 2.5V, V < 27V
OUT IN
OUT
OUT
V
S
V
S
BOOST
BOOST
LT3975
V
V
SW
V
V
IN
SW
IN
IN
IN
LT3975
GND
OUT
OUT
V
V
OUT
OUT
GND
3875 F04
(4d) For V
< 2.5V, 3.1V ≤ V ≤ 16V
(4e) For V > 16V, 3.1V ≤ V ≤ 16V
OUT S
OUT
S
Figure 4. Five Circuits for Generating the Boost Voltage
6.5
6.0
5.5
5.0
4.5
4.0
5.0
V
f
= 5V
V
= 3.3V
OUT
SW
OUT
= 800kHz
FRONT PAGE APPLICATION
4.5
4.0
3.5
3.0
2.5
TO RUN/TO START
TO RUN/TO START
0
0.5
1
1.5
2
2.5
0
0.5
1
1.5
2
2.5
LOAD CURRENT (A)
LOAD CURRENT (A)
3975 F05a
3975 F05b
Figure 5. The Minimum Input Voltage Depends on Output Voltage and Load Current
3975f
18
LT3975
APPLICATIONS INFORMATION
Enable and Undervoltage Lockout
capacitor generating a voltage ramp on the SS pin. The
SS pin clamps the internal V node, which slowly ramps
C
The LT3975 is in shutdown when the EN pin is low and
active when the pin is high. The falling threshold of the
EN comparator is 1.02V, with 60mV of hysteresis. The EN
up the current limit. Maximum current limit is reached
when the SS pin is about 1.5V or higher. By selecting a
large enough capacitor, the output can reach regulation
without overshoot. Figure 7 shows start-up waveforms
for a typical application with a 10nF capacitor on SS for
a 1.65Ω load when the EN pin is pulsed high for 7ms.
pin can be tied to V if the shutdown feature is not used.
IN
Undervoltage lockout (UVLO) can be added to the LT3975
as shown in Figure 6. Typically, UVLO is used in situa-
tions where the input supply is current limited, or has a
relatively high source resistance. A switching regulator
draws constant power from the source, so source cur-
rent increases as source voltage drops. This looks like a
negative resistance load to the source and can cause the
sourcetocurrentlimitorlatchlowunderlowsourcevoltage
conditions. UVLO prevents the regulator from operating
at source voltages where the problems might occur. The
UVLO threshold can be adjusted by setting the values R3
and R4 such that they satisfy the following equation:
The external SS capacitor is actively discharged when
the EN pin is low, or during thermal shutdown. The active
pull-down on the SS pin has a resistance of about 150Ω.
I
L
1A/DIV
V
OUT
1V/DIV
V
SS
R3+R4
0.5V/DIV
VUVLO = V
EN(THRESH)
3975 F07
1ms/DIV
R4
Figure 7. Soft-Start Waveforms for the Front-Page Application
with a 10nF Capacitor on SS. EN Is Pulsed High for About 7ms
with a 1.65Ω Load Resistor
where V
is the falling threshold of the EN pin,
EN(THRESH)
whichisapproximately1.02V,andwhereswitchingshould
stop when V falls below V . Note that due to the
IN
UVLO
comparator’s hysteresis, switching will not start until the
input is about 6% above V
Synchronization
.
UVLO
To select low ripple Burst Mode operation, tie the SYNC
pin below 0.5V (this can be ground or a logic output).
When operating in Burst Mode operation for light load
currents, the current through the UVLO resistor network
can easily be greater than the supply current consumed
by the LT3975. Therefore, the UVLO resistors should be
large to minimize their effect on efficiency at low loads.
Synchronizing the LT3975 oscillator to an external fre-
quency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square
wave amplitude should have valleys that are below 0.5V
and peaks above 1.5V (up to 6V).
LT3975
V
IN
The LT3975 will pulse skip at low output loads while syn-
chronized to an external clock to maintain regulation. At
verylightloads, thepartwillgotosleepbetweengroupsof
pulses, so the quiescent current of the part will still be low,
but not as low as in Burst Mode operation. The quiescent
current in a typical application when synchronized with an
external clock is 11µA at no load. Holding the SYNC pin
DC high yields no advantages in terms of output ripple or
minimum load to full frequency, so is not recommended.
Never float the SYNC pin.
R3
R4
1.02V
+
–
SHDN
EN
LT3975 F06
Figure 6. Undervoltage Lockout
Soft-Start
The SS pin can be used to soft start the LT3975 by throt-
tlingthemaximuminputcurrentduringstart-upandreset.
An internal 1.8μA current source charges an external
3975f
19
LT3975
APPLICATIONS INFORMATION
4
3
2
1
0
The LT3975 may be synchronized over a 250kHz to 2MHz
range. The R resistor should be chosen to set the LT3975
T
switchingfrequency20%belowthelowestsynchronization
input. For example, if the synchronization signal will be
250kHz and higher, the R should be selected for 200kHz.
T
To assure reliable and safe operation the LT3975 will only
synchronize when the output voltage is near regulation
as indicated by the PG flag. It is therefore necessary to
choosealargeenoughinductorvaluetosupplytherequired
output current at the frequency set by the R resistor (see
T
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
InductorSelectionsection).Theslopecompensationisset
INPUT VOLTAGE (V)
by the R value, while the minimum slope compensation
T
3975 F08
required to avoid subharmonic oscillations is established
by the inductor size, input voltage and output voltage.
Since the synchronization frequency will not change the
slopes of the inductor current waveform, if the inductor
is large enough to avoid subharmonic oscillations at the
Figure 8. PG Pin Voltage Versus Input Voltage when PG
Is Connected to 3V Through a 150k Resistor. The FB Pin
Voltage Is 1.15V
LT3975 is absent. This may occur in battery charging ap-
plications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3975’s
frequency set by R , than the slope compensation will be
T
sufficient for all synchronization frequencies.
output. If the V pin is allowed to float and the EN/UVLO
IN
Power Good Flag
pin is held high (either by a logic signal or because it is
tied to V ), then the LT3975’s internal circuitry will pull its
IN
ThePGpinisanopen-drainoutputwhichisusedtoindicate
to the user when the output voltage is within regulation.
When the output is lower than the regulation voltage by
more than 8.4%, as determined from the FB pin voltage,
the PG pin will pull low to indicate the power is not good.
Otherwise, the PG pin will go high impedance and can
be pulled logic high with a resistor pull-up. The PG pin is
only comparing the output voltage to an accurate refer-
quiescent current through its SW pin. This is fine if your
system can tolerate a few μA in this state. If you ground
the EN pin, the SW pin current will drop to essentially
zero. However, if the V pin is grounded while the output
IN
is held high, regardless of EN, parasitic diodes inside the
LT3975 can pull current from the output through the SW
pin and the V pin. Figure 9 shows a circuit that will run
IN
only when the input voltage is present and that protects
ence when the LT3975 is enabled and V is above 4.3V.
IN
against a shorted or reversed input.
When the part is shutdown, the PG is actively pulled low to
indicate that the LT3975 is not regulating the output. The
input voltage must be greater than 1.4V to fully turn-on
the active pull-down device. Figure 8 shows the status of
the PG pin as the input voltage is increased.
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 10 shows
a sample component placement with trace, ground plane
and via locations, which serves as a good PCB layout
example. Note that large, switched currents flow in the
Shorted and Reversed Input Protection
Iftheinductorischosensothatitwon’tsaturateexcessively,
a LT3975 buck regulator will tolerate a shorted output and
the power dissipation will be limited by current limit fold-
back (see Current Limit Foldback and Thermal Protection
section). There is another situation to consider in systems
where the output will be held high when the input to the
LT3975’s V and SW pins, the catch diode (D1), and the
IN
input capacitor (C1). The loop formed by these compo-
nents should be as small as possible. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
3975f
20
LT3975
APPLICATIONS INFORMATION
D4
High Temperature Considerations
B360A
V
V
BOOST
IN
IN
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT3975. The exposed pad on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to large copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3975.
Placing additional vias can reduce the thermal resistance
further. Whenoperatingathighambienttemperatures, the
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
V
EN
SW
OUT
LT3975
OUT
FB
+
GND
BACKUP
3975 F09
Figure 9. Diode D4 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit
from a Reversed Input. The LT3975 Runs Only When the Input
Is Present
Power dissipation within the LT3975 can be estimated by
calculatingthetotalpowerlossfromanefficiencymeasure-
ment and subtracting the catch diode loss and inductor
loss. The die temperature is calculated by multiplying the
LT3975 power dissipation by the thermal resistance from
junction to ambient.
SS
SYNC
Also keep in mind that the leakage current of the power
Schottky diode goes up exponentially with junction tem-
perature.Whenthepowerswitchisoff,thepowerSchottky
diode is in parallel with the power converter’s output
filter stage. As a result, an increase in a diode’s leakage
current results in an effective increase in the load, and a
corresponding increase in the input quiescent current.
Therefore, the catch Schottky diode must be selected
with care to avoid excessive increase in light load supply
current at high temperatures.
V
OUT
17
V
OUT
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
• • •
FB
BST
PG
RT
OUT
EN
V
IN
SW
3975 F10
Figure 10. Layout Showing a Good PCB Design
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing. Design Note 318
shows how to generate a bipolar output supply using a
buck regulator.
unbrokengroundplanebelowthesecomponents. TheSW
and BOOST nodes should be as small as possible. Finally,
keep the FB and RT nodes small so that the ground traces
will shield it from the SW and BOOST nodes. The exposed
pad on the bottom of the package must be soldered to
ground so that the pad acts as a heat sink. To keep thermal
resistance low, extend the ground plane as much as pos-
sible, and add thermal vias under and near the LT3975 to
additional ground planes within the circuit board and on
the bottom side.
3975f
21
LT3975
TYPICAL APPLICATIONS
5V Step-Down Converter
4V Step-Down Converter with a High Impedance Input Source
V
IN
5.7V TO 42V
+
24V
V
IN
V
IN
V
5.49M
499k
OFF ON
EN
PG
BOOST
SW
PG
EN
BOOST
SW
–
4.7µH
4.7µH
0.47µF
0.47µF
+
C
BULK
10µF
PDS360
PDS360
LT3975
LT3975
100µF
SS
RT
OUT
FB
SS
RT
OUT
FB
V
V
1M
1M
OUT
OUT
5V
4V
10pF
10pF
2.5A
2.5A
SYNC
GND
SYNC
GND
10nF
47nF
10µF
47µF
1210
47µF
1210
54.9k
316k
54.9k
432k
3975 TA02
3975 TA05
f = 800kHz
L = IHLP-2020CZ-01
f = 800kHz
L = IHLP-2525EZ-01
12V Step-Down Converter
2.5V Step-Down Converter
V
DFLS160
IN
12.9V TO 42V
V
IN
4.3V TO 42V
V
IN
V
IN
BOOST
SW
OFF ON
EN
PG
BOOST
SW
0.47µF
6.8µH
10µH
0.47µF
OFF ON
EN
PG
PDS360
10µF
LT3975
10µF
PDS360
LT3975
SS
RT
OUT
FB
V
1M
OUT
SS
RT
OUT
FB
12V
V
2.5V
2.5A
1M
OUT
10pF
2.5A
SYNC
GND
10nF
10pF
22µF
1210
×2
SYNC
GND
10nF
54.9k
110k
100µF
1210
130k
909k
3975 TA03
f = 800kHz
L = IHLP-3232CZ-01
3975 TA06
f = 400kHz
L = IHLP-2525EZ-01
5V, 2MHz Step-Down Converter with Power Good
1.8V Step-Down Converter
V
DFLS160
IN
5.9V TO 18V
V
IN
4.3V TO 27V
(42V TRANSIENTS)
0.47µF
2.2µH
BOOST
SW
V
IN
V
IN
OFF ON
EN
OFF ON
EN
PG
BOOST
SW
PDS360
3.3µH
0.47µF
150k
LT3975
4.7µF
PGOOD
PG
OUT
10µF
PDS360
LT3975
SS
RT
V
1M
OUT
SS
RT
OUT
FB
5V
FB
GND
V
1.8V
2.5A
499k
10pF
OUT
10pF
2.5A
SYNC
10nF
22µF
1210
SYNC
GND
10nF
14.7k
316k
100µF
1210
97.6k
1M
3975 TA04
f = 2MHz
L = IHLP-2525CZ-01
3975 TA07
f = 500kHz
L = IHLP-2020CZ-01
3975f
22
LT3975
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev E)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0911 REV E
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3975f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT3975
TYPICAL APPLICATION
1.2V Step-Down Converter
DFLS160
V
IN
4.3V TO 27V
(42V TRANSIENT)
3.3V
V
IN
OFF ON
EN
PG
BOOST
SW
4.7µH
0.47µF
PDS360
10µF
LT3975
SS
RT
OUT
FB
V
1.2V
2.5A
OUT
SYNC
GND
10nF
100µF
1210
130k
3975 TA08
f = 400kHz
L = IHLP-2525EZ-01
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
= 3.6V to 38V, Transients to 60V, V
LT3480
LT3980
LT3971
LT3991
LT3970
LT3990
36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High
V
= 0.78V,
OUT(MIN)
OUT
IN
Efficiency Step-Down DC/DC Converter with Burst Mode® Operation I = 70µA, I < 1µA, 3mm × 3mm DFN-10, MSOP-10E
Q
SD
58V with Transient Protection to 80V, 2A (I ), 2.4MHz, High
Efficiency Step-Down DC/DC Converter with Burst Mode Operation
V
Q
= 3.6V to 58V, Transients to 80V, V
= 0.79V,
OUT
IN
OUT(MIN)
I = 75µA, I < 1µA, 3mm × 4mm DFN-16, MSOP-16E
SD
38V, 1.2A (I ), 2MHz, High Efficiency Step-Down
V
= 4.2V to 38V, V
= 1.2V, I = 2.8µA, I < 1µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter with Only 2.8µA of Quiescent Current
3mm × 3mm DFN-10, MSOP-10E
55V, 1.2A (I ), 2MHz, High Efficiency Step-Down
V
= 4.2V to 55V, V
= 1.2V, I = 2.8µA, I < 1µA,
OUT(MIN) Q SD
OUT
IN
DC/DC Converter with Only 2.8µA of Quiescent Current
3mm × 3mm DFN-10, MSOP-10E
V = 4.2V to 40V, V = 1.2V, I = 2.5µA, I < 0.7µA,
IN
40V, 350mA (I ), 2MHz, High Efficiency Step-Down
OUT
OUT(MIN)
Q
SD
DC/DC Converter with Only 2.5µA of Quiescent Current
2mm × 3mm DFN-10, MSOP-10E
V = 4.2V to 62V, V = 1.2V, I = 2.5µA, I < 0.7µA,
IN
62V, 350mA (I ), 2.2MHz, High Efficiency Step-Down
OUT
OUT(MIN)
Q
SD
DC/DC Converter with Only 2.5µA of Quiescent Current
3mm × 3mm DFN-10, MSOP-16E
3975f
LT 0812 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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