CB2012T2R2M [Linear]
2.25MHz, 300mA Synchronous Step-Down; 2.25MHz的, 300毫安同步降压型型号: | CB2012T2R2M |
厂家: | Linear |
描述: | 2.25MHz, 300mA Synchronous Step-Down |
文件: | 总16页 (文件大小:307K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC3410
2.25MHz, 300mA
Synchronous Step-Down
Regulator in SC70
U
DESCRIPTIO
FEATURES
■
High Efficiency: Up to 96%
The LTC®3410 is a high efficiency monolithic synchro-
nous buck regulator using a constant frequency, current
mode architecture. The device is available in adjustable
and fixed output voltage versions. Supply current during
operation is only 26µA, dropping to <1µA in shutdown.
The 2.5V to 5.5V input voltage range makes the LTC3410
ideally suited for single Li-Ion battery-powered applica-
tions. 100% duty cycle provides low dropout operation,
extending battery life in portable systems.
■
Low Ripple (20mVP-P) Burst Mode Operation: IQ 26µA
■
Low Output Voltage Ripple
■
300mA Output Current at VIN = 3V
■
380mA Minimum Peak Switch Current
■
2.5V to 5.5V Input Voltage Range
■
2.25MHz Constant Frequency Operation
■
No Schottky Diode Required
■
Low Dropout Operation: 100% Duty Cycle
■
Stable with Ceramic Capacitors
Switching frequency is internally set at 2.25MHz, allowing
the use of small surface mount inductors and capacitors.
The LTC3410 is specifically designed to work well with
ceramic output capacitors, achieving very low output
voltage ripple and a small PCB footprint.
■
0.8V Reference Allows Low Output Voltages
■
Shutdown Mode Draws <1µA Supply Current
■
±2% Output Voltage Accuracy
■
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
■
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.8V feed-
back reference voltage. The LTC3410 is available in a tiny,
low profile SC70 package.
■
Available in LowUProfile SC70 Package
APPLICATIO S
■
Cellular Telephones
Wireless and DSL Modems
Digital Cameras
MP3 Players
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885.
■
■
■
■
Portable Instruments
U
TYPICAL APPLICATIO
Efficiency and Power Loss
vs Output Current
100
1
90
80
70
60
50
40
30
20
4.7µH
V
IN
V
OUT
2.7V
V
SW
LTC3410
RUN
IN
0.1
0.01
2.5V
10pF
EFFICIENCY
C
TO 5.5V
IN
C
OUT
4.7µF
4.7µF
CER
CER
V
FB
887k
POWER LOSS
GND
412k
0.001
3410 TA01a
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
10
0
0.1
0.0001
1000
1
10
100
OUTPUT CURRENT (mA)
3410 TA01b
3410fb
1
LTC3410
W W U W
ABSOLUTE AXI U RATI GS (Note 1)
Input Supply Voltage .................................. –0.3V to 6V
RUN, VFB Voltages ..................................... –0.3V to VIN
SW Voltage (DC) ......................... –0.3V to (VIN + 0.3V)
P-Channel Switch Source Current (DC) ............. 500mA
N-Channel Switch Sink Current (DC) ................. 500mA
Peak SW Sink and Source Current .................... 630mA
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Notes 3, 5) ...................... 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
RUN 1
GND 2
SW 3
6 V
OUT
RUN 1
GND 2
SW 3
6 V
FB
5 GND
5 GND
4 V
IN
4 V
IN
SC6 PACKAGE
6-LEAD PLASTIC SC70
SC6 PACKAGE
6-LEAD PLASTIC SC70
TJMAX = 125°C, θJA = 250°C/ W
TJMAX = 125°C, θJA = 250°C/ W
ORDER PART NUMBER
LTC3410ESC6
ORDER PART NUMBER
SC6 PART MARKING
LBSD
SC6 PART MARKING
LTC3410ESC6-1.2
LTC3410ESC6-1.5
LTC3410ESC6-1.65
LTC3410ESC6-1.8
LTC3410ESC6-1.875*
LCHV
LCNB
LCJF
LCNC
LCFQ
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *A separate data sheet is available for the LT3410-1.875.
ELECTRICAL CHARACTERISTICS
The
IN
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.
A
V
= 3.6V unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
±30
6
UNITS
nA
I
I
I
Feedback Current
Adjustable Output Voltage
Fixed Output Voltage
●
●
VFB
VOUT
PK
Output Voltage Feedback Current
Peak Inductor Current
3.3
490
0.8
µA
V
IN
= 3V, V = 0.7V or V = 90%, Duty Cycle < 35%
OUT
380
mA
V
FB
V
Regulated Feedback Voltage
Reference Voltage Line Regulation
Regulated Output Voltage
Adjustable Output Voltage (LTC3410E)
= 2.5V to 5.5V
●
●
0.784
0.816
0.4
FB
∆V
V
IN
0.04
%/V
FB
V
LTC3410-1.2, I
LTC3410-1.5, I
LTC3410-1.65, I
LTC3410-1.8, I
LTC3410-1.875, I
= 100mA
= 100mA
●
●
●
●
●
1.176
1.47
1.617
1.764
1.837
1.2
1.5
1.65
1.8
1.875
1.224
1.53
1.683
1.836
1.913
V
V
V
V
V
OUT
OUT
OUT
= 100mA
OUT
= 100mA
OUT
= 100mA
OUT
∆V
Output Voltage Line Regulation
Output Voltage Load Regulation
Input Voltage Range
V
= 2.5V to 5.5V
●
0.04
0.5
0.4
%/V
%
OUT
LOADREG
IN
IN
V
V
I
= 50mA to 250mA
LOAD
●
2.5
5.5
V
3410fb
2
LTC3410
ELECTRICAL CHARACTERISTICS
The
IN
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C.
A
V
= 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
UVLO
Undervoltage Lockout Threshold
V
V
Rising
Falling
2
1.94
2.3
V
V
IN
IN
I
f
Input DC Bias Current
Burst Mode® Operation
Shutdown
(Note 4)
S
V
V
= 0.83V or V
= 104%, I = 0A
LOAD
26
0.1
35
1
µA
µA
FB
OUT
= 0V
RUN
Oscillator Frequency
V
V
= 0.8V or V = 100%
OUT
= 0V or V
●
1.8
0.3
2.25
310
2.7
MHz
kHz
OSC
FB
FB
= 0V
OUT
R
R
R
R
of P-Channel FET
of N-Channel FET
I
I
= 100mA
0.75
0.55
±0.01
1
0.9
0.7
±1
1.5
±1
Ω
Ω
PFET
NFET
LSW
DS(ON)
SW
SW
= –100mA
= 0V, V = 0V or 5V, V = 5V
DS(ON)
I
SW Leakage
V
µA
V
RUN
SW
IN
V
RUN Threshold
RUN Leakage Current
●
●
RUN
RUN
I
±0.01
µA
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3410E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
LTC3410: T = T + (P )(250°C/W)
J
A
D
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure1 Except for the Resistive Divider Resistor Values)
Efficiency vs Output Current
Efficiency vs Input Voltage
Efficiency vs Output Current
100
100
100
90
80
70
60
50
40
30
I
= 100mA
OUT
90
80
70
60
50
40
30
20
90
80
70
60
50
40
30
20
I
= 10mA
OUT
I
= 250mA
OUT
I
= 1mA
OUT
I
= 0.1mA
OUT
V
V
V
= 2.7V
= 3.6V
= 4.2V
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
IN
IN
IN
10
0
0.1
10
0
0.1
V
= 1.8V
1
V
= 1.2V
1
V
= 1.8V
OUT
OUT
OUT
4.5
INPUT VOLTAGE (V)
5.5
10
100
1000
10
100
1000
2.5
3
3.5
4
5
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
3410 G03
3410 G04
3410 G02
3410fb
3
LTC3410
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1 Except for the Resistive Divider Resistor Values)
Oscillator Frequency vs
Reference Voltage vs
Oscillator Frequency vs
Supply Voltage
Temperature
Temperature
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
0.814
0.809
0.804
0.799
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
V
= 3.6V
IN
V
= 3.6V
IN
0.794
0.789
0.784
1.8
1.8
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50 –25
0
25
125
50
75 100
2
6
3
4
5
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
3410 G05
3410 G06
3410 G07
Output Voltage vs Load Current
R
DS(ON)
vs Temperature
R
DS(ON
) vs Input Voltage
1.2
1.0
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.5
V
V
= 3.6V
IN
OUT
V
= 4.2V
IN
= 1.8V
V
= 3.6V
IN
V
= 2.7V
IN
0.8
MAIN SWITCH
0
0.6
0.4
V
= 4.2V
IN
–0.5
–1.0
–1.5
SYNCHRONOUS SWITCH
V
= 3.6V
IN
V
= 2.7V
IN
0.2
0
MAIN SWITCH
SYNCHRONOUS SWITCH
–50 –30 –10 10 30 50 70 90 110 130
100
200
LOAD CURRENT (mA)
400
0
500
300
1
3
4
5
6
7
2
TEMPERATURE (°C)
INPUT VOLTAGE (V)
3410 G10
3410 G08
3410 G09
Dynamic Supply Current
vs Temperature
Dynamic Supply Current vs V
Switch Leakage vs Temperature
IN
110
100
90
80
70
60
50
40
30
20
10
0
50
40
30
20
10
0
50
40
30
20
10
0
V
= 5.5V
IN
V
= 1.2V
OUT
RUN = 0V
I
0A
LOAD =
SYNCHRONOUS
SWITCH
MAIN
SWITCH
1
2
3
4
5
6
–50 –25
0
25
50
75 100 125
–50
0
25
50
75 100 125
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
V
(V)
IN
3410 G11
3410 G12
3410 G13
3410fb
4
LTC3410
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1 Except for the Resistive Divider Resistor Values)
Burst Mode Operation
Start-Up from Shutdown
Switch Leakage vs Input Voltage
600
550
500
450
400
350
300
250
200
150
RUN
SW
2V/DIV
5V/DIV
MAIN
SWITCH
V
OUT
V
OUT
50mV/DIV
1V/DIV
AC COUPLED
I
L
SYNCHRONOUS
SWITCH
100
50
0
I
L
100mA/DIV
200mA/DIV
0
2
3
4
5
6
1
2µs/DIV
200µs/DIV
3410 G15
V
V
I
= 3.6V
3410 G16
IN
V
V
LOAD
= 3.6V
IN
INPUT VOLTAGE (V)
= 1.8V
OUT
= 1.8V
OUT
= 10mA
3410 G14
LOAD
I
= 300mA
Load Step
Load Step
Start-Up from Shutdown
V
OUT
V
OUT
100mV/DIV
100mV/DIV
AC COUPLED
AC COUPLED
RUN
2V/DIV
V
OUT
1V/DIV
I
I
L
L
200mA/DIV
200mA/DIV
I
L
I
I
LOAD
LOAD
200mA/DIV
200mA/DIV
200mA/DIV
200µs/DIV
10µs/DIV
10µs/DIV
= 20mA TO 300mA
3410 G19
3410 G17
3410 G18
V
V
I
= 3.6V
V
V
I
= 3.6V
OUT
LOAD
IN
IN
V
V
LOAD
= 3.6V
OUT
IN
= 1.8V
= 0A
= 1.8V
OUT
LOAD
= 1.8V
I
= 0mA TO 300mA
3410fb
5
LTC3410
U
U
U
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
VIN (Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
V
FB (Pin 6 Adjustable Version ): Feedback Pin. Receives
the feedback voltage from an external resistive divider
across the output.
GND (Pins 2, 5): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
VOUT (Pin 6 Fixed Voltage Versions): Output Voltage
Feedback Pin. An internal resistive divider divides the
output voltage down for comparison to the internal refer-
ence voltage.
U
U
W
FU CTIO AL DIAGRA
SLOPE
COMP
0.65V
OSC
OSC
V
4
IN
FREQ
–
+
SHIFT
V
/V
FB OUT
EN
–
+
6
SLEEP
+
–
5Ω
0.8V
+
–
R1*
0.4V
I
COMP
EA
BURST
R2
240k
Q
Q
S
R
SWITCHING
LOGIC
AND
RS LATCH
V
IN
ANTI-
SHOOT-
THRU
BLANKING
CIRCUIT
RUN
1
SW
3
0.8V REF
+
–
SHUTDOWN
5
2
I
RCMP
GND
V
OUT
*R1 = 240k
– 1
(
)
3410 BD
0.8
3410fb
6
LTC3410
U
OPERATIO
(Refer to Functional Diagram)
Main Control Loop
Short-Circuit Protection
The LTC3410 uses a constant frequency, current mode Whentheoutputisshortedtoground,thefrequencyofthe
step-down architecture. Both the main (P-channel oscillator is reduced to about 310kHz, 1/7 the nominal
MOSFET)andsynchronous(N-channelMOSFET)switches frequency. This frequency foldback ensures that the in-
are internal. During normal operation, the internal top ductorcurrenthasmoretimetodecay,therebypreventing
power MOSFET is turned on each cycle when the oscillator runaway. The oscillator’s frequency will progressively
sets the RS latch, and turned off when the current com- increase to 2.25MHz when VFB rises above 0V.
parator, ICOMP, resets the RS latch. The peak inductor
Dropout Operation
current at which ICOMP resets the RS latch, is controlled by
the output of error amplifier EA. The VFB pin, described in
the Pin Functions section, allows EA to receive an output
feedback voltage from an external resistive divider. When
the load current increases, it causes a slight decrease in
the feedback voltage relative to the 0.8V reference, which
in turn, causes the EA amplifier’s output voltage to in-
crease until the average inductor current matches the new
load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse, as indicated by the current reversal
comparatorIRCMP,orthebeginningofthenextclockcycle.
Astheinputsupplyvoltagedecreasestoavalueapproach-
ingtheoutputvoltage, thedutycycleincreasestowardthe
maximum on-time. Further reduction of the supply volt-
ageforcesthemainswitchtoremainonformorethanone
cycle until it reaches 100% duty cycle. The output voltage
will then be determined by the input voltage minus the
voltage drop across the P-channel MOSFET and the
inductor.
Another important detail to remember is that at low input
supply voltages, the RDS(ON) of the P-channel switch
increases (see Typical Performance Characteristics).
Therefore,theusershouldcalculatethepowerdissipation
when the LTC3410 is used at 100% duty cycle with low
input voltage (See Thermal Considerations in the Applica-
tions Information section).
Burst Mode Operation
The LTC3410 is capable of Burst Mode operation in which
the internal power MOSFETs operate intermittently based
on load demand.
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 70mA re-
gardless of the output load. Each burst event can last from
a few cycles at light loads to almost continuously cycling
with short sleep intervals at moderate loads. In between
theseburstevents,thepowerMOSFETsandanyunneeded
circuitry are turned off, reducing the quiescent current to
26µA. In this sleep state, the load current is being supplied
solely from the output capacitor. As the output voltage
droops, the EA amplifier’s output rises above the sleep
thresholdsignalingtheBURSTcomparatortotripandturn
the top MOSFET on. This process repeats at a rate that is
dependent on the load demand.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3410 uses a
patented scheme that counteracts this compensating
ramp, which allows the maximum inductor peak current
to remain unaffected throughout all duty cycles.
3410fb
7
LTC3410
APPLICATIO S I FOR ATIO
W U U
U
Inductor Core Selection
4.7µH
V
IN
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Tor-
oid or shielded pot cores in ferrite or permalloy materials
aresmallanddon’tradiatemuchenergy, butgenerallycost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style induc-
tor to use often depends more on the price vs size require-
ments and any radiated field/EMI requirements than on
whattheLTC3410requirestooperate.Table1showssome
typical surface mount inductors that work well in
LTC3410 applications.
V
OUT
2.7V
V
SW
LTC3410
RUN
IN
1.2V
10pF
C
TO 5.5V
IN
C
OUT
4.7µF
4.7µF
CER
CER
V
FB
232k
GND
464k
3410 F01
Figure 1. High Efficiency Step-Down Converter
ThebasicLTC3410applicationcircuitisshowninFigure 1.
Externalcomponentselectionisdrivenbytheloadrequire-
ment and begins with the selection of L followed by CIN and
Table 1. Representative Surface Mount Inductors
MAX DC
COUT
.
MANUFACTURER PART NUMBER
VALUE CURRENT DCR HEIGHT
Inductor Selection
Taiyo Yuden
CB2016T2R2M
CB2012T2R2M
LBC2016T3R3M
2.2µH 510mA 0.13Ω 1.6mm
2.2µH 530mA 0.33Ω 1.25mm
3.3µH 410mA 0.27Ω 1.6mm
For most applications, the value of the inductor will fall in
the range of 2.2µH to 4.7µH. Its value is chosen based on
the desired ripple current. Large value inductors lower
ripple current and small value inductors result in higher
ripplecurrents.HigherVIN orVOUT alsoincreasestheripple
currentasshowninequation1. Areasonablestartingpoint
for setting ripple current is ∆IL = 120mA (40% of 300mA).
Panasonic
Sumida
ELT5KT4R7M
CDRH2D18/LD
4.7µH 950mA 0.2Ω 1.2mm
4.7µH 630mA 0.086Ω 2mm
Murata
LQH32CN4R7M23 4.7µH 450mA 0.2Ω 2mm
Taiyo Yuden
NR30102R2M
NR30104R7M
2.2µH 1100mA 0.1Ω 1mm
4.7µH 750mA 0.19Ω 1mm
FDK
FDKMIPF2520D
FDKMIPF2520D
FDKMIPF2520D
4.7µH 1100mA 0.11Ω 1mm
3.3µH 1200mA 0.1Ω 1mm
2.2µH 1300mA 0.08Ω 1mm
⎛
⎝
⎞
VOUT
1
∆IL =
VOUT 1−
(1)
⎜
⎟
⎠
f L
( )( )
V
IN
CIN and COUT Selection
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 360mA rated
inductor should be enough for most applications (300mA
+ 60mA). For better efficiency, choose a low DC-resistance
inductor.
Incontinuousmode,thesourcecurrentofthetopMOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
1/2
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
100mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
V
V − V
OUT
(
)
]
[
OUT IN
CIN requiredIRMS ≅IOMAX
V
IN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
3410fb
8
LTC3410
W U U
APPLICATIO S I FOR ATIO
U
2000hoursoflife.Thismakesitadvisabletofurtherderate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufac-
turer if there is any question.
can potentially cause a voltage spike at VIN, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment for COUT has been met, the RMS current rating
generally far exceeds the IRIPPLE(P-P) requirement. The
output ripple ∆VOUT is determined by:
The recommended capacitance value to use is 4.7µF for
both input and output capacitor. For applications with
V
OUT greaterthan2.5V,therecommendedvalueforoutput
capacitance should be increased. See Table 2.
⎛
⎝
1
⎞
∆VOUT ≅ ∆I ESR +
⎜
⎟
⎠
L
Table 2. Capacitance Selection
8fCOUT
OUTPUT
OUTPUT
INPUT
VOLTAGE RANGE
CAPACITANCE
CAPACITANCE
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
0.8V ≤ V
≤ 2.5V
4.7µF
4.7µF
4.7µF
OUT
V
OUT
> 2.5V
10µH or 2x 4.7µF
Output Voltage Programming (LTC3410 Only)
If tantalum capacitors are used, it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface mount tantalum. These are specially constructed
and tested for low ESR so they give the lowest ESR for a
given volume. Other capacitor types include Sanyo
POSCAP, KemetT510andT495series, andSprague593D
and 595D series. Consult the manufacturer for other
specific recommendations.
The output voltage is set by a resistive divider according
to the following formula:
R2
R1
⎛
⎝
⎞
⎟
⎠
VOUT = 0.8V 1+
(2)
⎜
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 2.
Efficiency Considerations
Using Ceramic Input and Output Capacitors
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3410’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
Efficiency = 100% – (L1 + L2 + L3 + ...)
0.8V ≤ V
≤ 5.5V
OUT
R2
However, care must be taken when ceramic capacitors are
usedattheinputandtheoutput.Whenaceramiccapacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
V
FB
LTC3410
R1
GND
3410 F02
Figure 2. Setting the LTC3410 Output Voltage
3410fb
9
LTC3410
W U U
U
APPLICATIO S I FOR ATIO
whereL1, L2, etc. aretheindividuallossesasapercentage
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3410 circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 3.
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
beobtainedfromtheTypicalPerformanceCharateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dtisthecurrentoutofVINthatistypicallylargerthan
the DC bias current. In continuous mode,
IGATECHG = f(QT + QB) where QT and QB are the
gate charges of the internal top and bottom
switches. Both the DC bias and gate charge
losses are proportional to VIN and thus their effects will
be more pronounced at higher supply voltages.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3410 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3410 is running at high ambient
temperature with low supply voltage and high duty
cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
1
V
= 3.6V
IN
0.1
0.01
0.001
V
V
V
= 3.3V
= 1.8V
= 1.2V
OUT
OUT
OUT
0.0001
0.00001
0.1
1
10
100
1000
LOAD CURRENT (mA)
3410 F03
Figure 3. Power Loss vs Load Current
3410fb
10
LTC3410
W U U
APPLICATIO S I FOR ATIO
U
Checking Transient Response
the junction temperature reaches approximately 150°C,
both power switches will be turned off and the SW node
will become high impedance.
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steady-
state value. During this recovery time VOUT can be moni-
toredforovershootorringingthatwouldindicateastability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
To avoid the LTC3410 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and
θJAis the thermal resistance from the junction of the die to
the ambient temperature.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
The junction temperature, TJ, is given by:
TJ = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3410 in dropout at an
input voltage of 2.7V, a load current of 300mA and an
ambient temperature of 70°C. From the typical perfor-
mance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 1.0Ω.
Therefore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 90mW
PC Board Layout Checklist
For the SC70 package, the θJA is 250°C/W. Thus, the
junction temperature of the regulator is:
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3410. These items are also illustrated graphically in
Figures 4 and 5. Check the following in your layout:
TJ = 70°C + (0.09)(250) = 92.5°C
which is well below the maximum junction temperature
of 125°C.
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (RDS(ON)).
3410fb
11
LTC3410
W U U
U
APPLICATIO S I FOR ATIO
1
2
3
1
RUN
RUN
LTC3410-1.875
LTC3410
2
6
4
6
GND
V
OUT
GND
V
FB
–
+
–
+
C
OUT
V
OUT
C
V
OUT
R2
R1
OUT
3
4
SW
V
IN
SW
V
IN
L1
L1
C
FWD
5
5
C
IN
C
IN
V
IN
V
IN
3410 F04b
3410 F04a
BOLD LINES INDICATE HIGH CURRENT PATHS
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 4a. LTC3410 Layout Diagram
Figure 4b. LTC3410-1.875 Layout Diagram
VIA TO GND
R1
V
OUT
V
V
OUT
V
IN
IN
VIA TO V
VIA TO V
LTC3410
IN
IN
VIA TO V
OUT
R2
PIN 1
PIN 1
L1
L1
C
FWD
LTC3410-
1.875
SW
SW
C
OUT
C
IN
C
OUT
C
IN
GND
3410 F05b
3410 F05a
Figure 5b. LTC3410 Fixed Output Voltage
Suggested Layout
Figure 5a. LTC3410 Suggested Layout
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of COUT and ground.
Design Example
As a design example, assume the LTC3410 is used in a
single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.3A but most of the time it will be in
standbymode, requiringonly2mA. Efficiencyatbothlow
and high load currents is important. Output voltage is
3V. With this information we can calculate L using
Equation (1),
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of CIN and COUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
VFB node.
⎛
⎝
⎞
1
f ∆I
VOUT
L=
VOUT 1−
(3)
⎜
⎟
⎠
V
L
IN
3410fb
12
LTC3410
W U U
APPLICATIO S I FOR ATIO
U
Substituting VOUT = 3V, VIN = 4.2V, ∆IL = 100mA of less than 0.5Ω. In most cases, a ceramic capacitor will
and f = 2.25MHz in Equation (3) gives:
satisfythisrequirement. FromTable2, CapacitanceSelec-
tion, COUT = 10µF and CIN = 4.7µF.
3V
3V
⎛
⎜
⎝
⎞
⎟
⎠
L=
1−
= 3.8µH
For the feedback resistors, choose R1 = 301k. R2 can
then be calculated from equation (2) to be:
2.25MHz(100mA)
4.2V
A 4.7µH inductor works well for this application. For best
efficiency choose a 350mA or greater inductor with less
than 0.3Ω series resistance.
V
0.8
⎛
⎜
⎝
⎞
⎠
OUT
R2=
−1 R1= 827.8k;use 825k
⎟
Figure 6 shows the complete circuit along with its
efficiency curve.
CIN will require an RMS current rating of at least 0.125A ≅
I
LOAD(MAX)/2 at temperature and COUT will require an ESR
4.7µH*
V
IN
4
1
3
6
V
OUT
3V
2.7V
V
SW
LTC3410
RUN
IN
††
10pF
C
TO 4.2V
IN
†
C
4.7µF
CER
OUT
10µF
CER
V
FB
825k
GND
2, 5
†TAIYO YUDEN JMK212BJ106
††TAIYO YUDEN JMK212BJ475
*MURATA LQH32CN4R7M23
301k
3410 F06a
Figure 6a
100
90
80
70
60
50
40
30
20
V
OUT
100mV/DIV
AC COUPLED
I
L
200mA/DIV
I
LOAD
200mA/DIV
V
V
= 3.6V
= 4.2V
IN
IN
10
0
0.1
1
10
(mA)
100
1000
20µs/DIV
3410 F06c
I
V
V
LOAD
= 3.6V
= 3V
LOAD
IN
OUT
3410 F06b
I
= 100mA TO 300mA
Figure 6b
Figure 6c
3410fb
13
LTC3410
TYPICAL APPLICATIO S
U
Using Low Profile Components, <1mm Height
4.7µH*
V
IN
3
4
V
OUT
2.7V
V
SW
IN
1.875V
†
TO 4.2V
†
C
OUT
C
LTC3410-1.875
IN
4.7µF
4.7µF
1
RUN
CER
6
V
OUT
GND
2, 5
† TAIYO YUDEN JMK212BJ475
*FDK MIPF2520D
3410 TA06a
Low Profile Efficiency
Load Step
100
90
80
70
60
50
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
V
OUT
100mV/DIV
AC COUPLED
I
L
200mA/DIV
I
LOAD
200mA/DIV
3410 TA06c
20µs/DIV
V
LOAD
= 3.6V
IN
I
= 100mA TO 300mA
0.1
1
10
LOAD (mA)
100
1000
3410 TA06b
3410fb
14
LTC3410
U
PACKAGE DESCRIPTIO
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638)
0.47
MAX
0.65
REF
1.80 – 2.20
(NOTE 4)
1.00 REF
INDEX AREA
(NOTE 6)
1.15 – 1.35
(NOTE 4)
1.80 – 2.40
2.8 BSC 1.8 REF
PIN 1
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.15 – 0.30
6 PLCS (NOTE 3)
0.65 BSC
0.10 – 0.40
0.80 – 1.00
0.00 – 0.10
REF
1.00 MAX
GAUGE PLANE
0.15 BSC
0.26 – 0.46
SC6 SC70 1205 REV B
0.10 – 0.18
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 INDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
3410fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC3410
U
TYPICAL APPLICATIO
Using Low Profile Components, <1mm Height
Efficiency
Load Step
100
4.7µH*
V
IN
4
1
3
6
V
OUT
1.5V
90
80
70
60
50
40
30
20
2.7V
V
SW
IN
†
10pF
C
V
OUT
TO 4.2V
IN
4.7µF
†
LTC3410
RUN
C
100mV/DIV
OUT
4.7µF
AC COUPLED
V
FB
3410 TA02
402k
464k
GND
2, 5
I
L
200mA/DIV
V
V
V
= 2.7V
= 3.6V
= 4.2V
IN
IN
IN
† TAIYO YUDEN JMK212BJ475
*FDK MIPF2520D
I
LOAD
200mA/DIV
10
0
0.1
1
10
(mA)
100
1000
20µs/DIV
3410 TA04
I
LOAD
V
V
LOAD
= 3.6V
OUT
IN
3410 TA03
= 1.5V
I
= 100mA TO 300mA
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
90% Efficiency, V = 3.6V to 25V, V
LT1616
500mA (I ), 1.4MHz, High Efficiency Step-Down
= 1.25V, I = 1.9mA,
Q
OUT
IN
OUT
OUT
OUT
OUT
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
LT1676
450mA (I ), 100kHz, High Efficiency Step-Down
90% Efficiency, V = 7.4V to 60V, V
I
= 1.24V, I = 3.2mA,
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= 2.5µA, S8 Package
SD
LT1776
500mA (I ), 200kHz, High Efficiency Step-Down
90% Efficiency, V = 7.4V to 40V, V
I
= 1.24V, I = 3.2mA,
Q
OUT
IN
DC/DC Converter
= 30µA, N8, S8 Packages
SD
LTC1877
LTC1878
LTC1879
LTC3403
LTC3404
LTC3405/LTC3405A
LTC3406
LTC3409
LTC3410B
LTC3411
LTC3412
LTC3440
600mA (I ), 550kHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 10V, V
I
= 0.8V, I = 10µA,
Q
OUT
IN
DC/DC Converter
= <1µA, MS8 Package
SD
600mA (I ), 550kHz, Synchronous Step-Down
DC/DC Converter
95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 10µA,
OUT Q
OUT
IN
I
= <1µA, MS8 Package
SD
1.2A (I ), 550kHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 10V, V
= 0.8V, I = 15µA,
OUT Q
OUT
IN
DC/DC Converter
I
= <1µA, TSSOP-16 Package
SD
600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
= Dynamically Adjustable,
OUT
OUT
IN
DC/DC Converter with Bypass Transistor
I = 20µA, I = <1µA, DFN Package
Q SD
600mA (I ), 1.4MHz, Synchronous Step-Down
95% Efficiency, V = 2.7V to 6V, V
= 0.8V, I = 10µA,
OUT Q
OUT
IN
DC/DC Converter
I
= <1µA, MS8 Package
SD
300mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 20µA,
OUT Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
600mA (I ), 1.5MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 5.5V, V
= 0.6V, I = 20µA,
OUT Q
OUT
IN
DC/DC Converter
I
= <1µA, ThinSOT Package
SD
600mA (I ), 1.5MHz/2.25MHz, Synchronous
95% Efficiency, V = 1.6V to 5.5V, V
= 0.613V, I = 65µA,
OUT Q
OUT
IN
Step-Down DC/DC Converter
DD8 Package
300mA (I ), 2.25MHz, Synchronous Step-Down
96% Efficiency, V = 2.5V to 3.5V, V
= 0.8V, I = 200µA,
OUT
IN
OUT(MIN)
Q
DC/DC Converter with Burst Disabled
I
= <1µA, SC70 Package
SD
1.25A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60µA,
OUT
IN
OUT
OUT
OUT
Q
DC/DC Converter
I
= <1µA, MS Package
SD
2.5A (I ), 4MHz, Synchronous Step-Down
95% Efficiency, V = 2.5V to 5.5V, V
= 0.8V, I = 60µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, TSSOP-16E Package
SD
600mA (I ), 2MHz, Synchronous Buck-Boost
95% Efficiency, V = 2.5V to 5.5V, V
= 2.5V, I = 25µA,
Q
OUT
IN
DC/DC Converter
I
= <1µA, MS Package
SD
3410fb
LT 0806 REV B • PRINTED IN USA
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16
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