J175-SOT-23-3L [Linear]
Small Signal Field-Effect Transistor, P-Channel, Junction FET,;
| 型号： | J175-SOT-23-3L |
| 厂家： | 
Linear |
| 描述： | Small Signal Field-Effect Transistor, P-Channel, Junction FET, |
| 文件： | 总2页 (文件大小：257K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
J/SST174 SERIES
SINGLE P-CHANNEL
JFET SWITCH
FEATURES
Replacement For SILICONIX J/SST174 SERIES
LOW ON RESISTANCE
rDS(on) ≤ 85Ω
LOW GATE OPERATING CURRENT
ABSOLUTE MAXIMUM RATINGS1
@ 25 °C (unless otherwise stated)
Maximum Temperatures
ID(off) = 10pA
SST SERIES
SOT-23
TOP VIEW
J SERIES
Storage Temperature
-55 to 150°C
-55 to 135°C
Junction Operating Temperature
Maximum Power Dissipation
Continuous Power Dissipation3
Maximum Currents
350mW
Gate Current
IG = -50mA
Maximum Voltages
Gate to Drain Voltage
Gate to Source Voltage
VGDS = 30V
VGSS = 30V
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL
BVGSS
VGS(F)
IGSS
CHARACTERISTIC
MIN TYP MAX UNITS CONDITIONS
Gate to Source Breakdown Voltage
Gate to Source Forward Voltage
Gate Reverse Current
30
IG = 1µA, VDS = 0V
V
-0.7
0.01
0.01
-0.01
IG = -1mA, VDS = 0V
VGS = 20V, VDS = 0V
VDG = -15V, ID = -1mA
VDS = -15V, VGS = 10V
1
IG
Gate Operating Current
Drain Cutoff Current
nA
ID(off)
-1
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
J/SST174
J/SST175
J/SST176
J/SST177
SYMBOL CHARACTERISTIC
UNITS CONDITIONS
MIN MAX MIN MAX MIN MAX MIN MAX
Gate to Source
VGS(off)
5
10
3
6
1
4
0.8
2.25
-30
V
mA
Ω
VDS = -15V, ID = -10nA
Cutoff Voltage
Drain to Source
IDSS
-20 -195
85
-7
-90
125
-2
-55
250
-1.5
VDS = -15V, VGS = 0V
VGS = 0V, VDS = -0.1V
Saturation Current
Drain to Source
rDS(on)
300
On Resistance
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201111 05/30/13 Rev#A5 ECN#J SST174
SWITCHING CHARACTERISTICS
SWITCHING CIRCUIT
SYMBOL CHARACTERISTIC TYP UNITS CONDITIONS
td(on)
tr
td(off)
tf
Turn On Time
10
15
10
20
VGS(L) = 0V
VGS(H) = 10V
See Switching
Circuit
1.2k
RL
Turn On Rise Time
Turn Off Time
VGS(H)
ns
VGS(L)
Turn Off Fall Time
0.1µF
RG
7.5k
51
SWITCHING CIRCUIT PARAMETERS
J/SST174 J/SST175 J/SST176 J/SST177
51
1.2k
51
VDD
VGG
RL
-10V
20V
-6V
-6V
8V
-6V
5V
Scope
12V
560Ω
100Ω
-15mA
750Ω
220Ω
-7mA
1800Ω
390Ω
-3mA
5600Ω
390Ω
-1mA
RG
ID(on)
SOT-23
0.89
1.03
0.37
0.51
1
3
2
1.78
2.05
2.80
3.04
1.20
1.40
0.89
1.12
2.10
2.64
0.085
0.180
0.013
0.100
0.55
DIMENSIONS IN
MILLIMETERS
2. Pulsed test: PW ≤ 300µS Duty Cycle: 3%
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
3. Derate 2.8mW/°C above 25 °C.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Linear Integrated Systems
•
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
Doc 201111 05/30/13 Rev#A5 ECN#J SST174
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