JPAD500-TO-92-2L [Linear]

Rectifier Diode, 1 Element, 0.1A, 35V V(RRM),;
JPAD500-TO-92-2L
型号: JPAD500-TO-92-2L
厂家: Linear    Linear
描述:

Rectifier Diode, 1 Element, 0.1A, 35V V(RRM),

二极管
文件: 总2页 (文件大小:257K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PAD SERIES  
PICO AMPERE DIODES  
FEATURES  
DIRECT REPLACEMENT FOR SILICONIX PAD SERIES  
REVERSE BREAKDOWN VOLTAGE  
BVR -30V  
Crss ≤ 2.0pF  
PAD1,2,5  
PAD50  
REVERSE CAPACITANCE  
ABSOLUTE MAXIMUM RATINGS1  
@ 25 °C (unless otherwise stated)  
Maximum Temperatures  
Storage Temperature  
-55 to +150 °C  
-55 to +150 °C  
JPAD  
Operating Junction Temperature  
Maximum Power Dissipation  
Continuous Power Dissipation (PAD)  
Continuous Power Dissipation (J/SSTPAD)  
Maximum Currents  
SSTPAD  
SOT-23  
TOP VIEW  
300mW  
350mW  
1
C
3
A
2
C
Forward Current (PAD)  
50mA  
10mA  
Forward Current (J/SSTPAD)  
COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)  
SYMBOL  
CHARACTERISTIC  
MIN TYP MAX UNITS CONDITIONS  
ALL PAD  
ALL SSTPAD  
ALL JPAD  
-45  
Reverse Breakdown  
Voltage  
BVR  
-30  
-35  
IR = -1µA  
V
VF  
Forward Voltage  
0.8  
0.5  
1.5  
1.5  
0.8  
2
IF = 5mA  
PAD1,5  
Crss  
Total Reverse Capacitance  
pF  
VR = -5V, f = 1MHz  
All Others  
SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)  
SYMBOL CHARACTERISTIC  
PAD  
-1  
JPAD  
SSTPAD  
UNITS CONDITIONS  
PAD1  
PAD2  
-2  
(SST/J)PAD5  
(SST/J)PAD10  
(SST/J)PAD20  
(SST/J)PAD50  
(SST/J)PAD100  
(SST/J)PAD200  
(SST/J)PAD500  
-5  
-5  
-5  
-10  
-20  
-50  
-100  
-10  
-10  
-20  
-50  
Maximum Reverse  
Leakage Current  
-20  
IR  
pA  
VR = -20V  
-50  
-100  
-200  
-500  
1. Derate 2mW/°C above 25°C  
2. Derate 2.8mW/°C above 25°C  
Linear Integrated Systems  
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261  
Doc 201142 11/01/12 Rev#A6 ECN# PAD SERIES  
Figure 1. Operational Amplifier Protection  
Input Differential Voltage limited to 0.8V (typ) by JPADs D1 and D2. Common  
Mode Input voltage limited by JPADs D3 and D4 to ±15V.  
Figure 2. Sample and Hold Circuit  
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset  
voltages fed capacitively from the JFET switch gate.  
FIGURE 2  
FIGURE 1  
+V -V  
+V  
JPAD5  
D1  
JPAD20  
-
D2  
2N4117A  
D1  
D3  
+15V -15V  
D2  
OP-27  
+
2N4393  
ein  
CONTROL  
SIGNAL  
D4  
C
VOUT  
R
TO-72  
Three Lead  
SOT-23  
0.89  
1.03  
0.37  
0.51  
1
3
2
1.78  
2.05  
2.80  
3.04  
1.20  
1.40  
0.89  
1.12  
2.10  
2.64  
0.085  
0.180  
0.013  
0.100  
0.55  
DIMENSIONS IN  
MILLIMETERS  
1. Absolute maximum ratings are limiting values above which serviceability may be impaired.  
2. The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown  
are available upon request.  
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its  
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Linear Integrated Systems.  
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing  
high-quality discrete components. Expertise brought to LIS is based on processes and products developed  
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,  
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,  
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.  
Linear Integrated Systems  
4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261  
Doc 201142 11/01/12 Rev#A6 ECN# PAD SERIES  

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