LT1027DCLS8-5#PBF_技术文档

LT1027LS8

Precision, Low Noise,

High Stability Hermetic

Voltage Reference

FeaTures

DescripTion

The LT^®1027LS8 is a precision reference that combines

low drift and noise with excellent long-term stability and

high output accuracy. The reference output will source up

to 15mA and sink up to 10mA, and remain constant with

input voltage variations.

n

Hermetic 5mm × 5mm LCC Leadless Chip Carrier

Package:

n

Insensitive to Humidity

n

Thermal Hysteresis: 8ppm (0°C to 70°C)

n

Thermal Hysteresis: 12ppm (–40°C to 85°C)

n

Low Drift: 5ppm/°C Max

High Accuracy: 0.10ꢀ Max

The hermetic package provides outstanding humidity and

thermal hysteresis performance. The LT1027LS8 is only

5mm × 5mm × 1.5mm, offering an alternative to large

through-hole metal can voltage references, such as the

industry standard LT1021. The LT1027LS8 offers similar

performance to the LT1027, with additional stability from

the hermetic package.

n

Low Noise: <1ppm Peak-to-Peak (0.1Hz to 10Hz)

n

Low Long Term Drift

n

12ppm at 1000Hr

18ppm at 3000Hr

n

Sinks 10mA, Sources 15mA

Wide Supply Range to 40V

8-Pin (5mm × 5mm) LS8 Package

n

LT1027LS8 is based on a buried Zener diode structure,

which enables temperature and time stability, and ex-

tremely low noise performance of < 1ppm peak-to-peak.

The LT1027LS8 operates on a supply voltage from 8V up

to 40V. The subsurface Zener exhibits better time stability

than even the best bandgap reference, and the hermetic

package maintains that stability over a wide range of

environmental conditions.

applicaTions

n

Instrumentation and Test Equipment

n

High Resolution Data Acquisition Systems

n

A/D and D/A Converters

n

Precision Regulators

n

Precision Scales

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

n

Digital Voltmeters

Typical applicaTion

Supplying V_REFand V_CCto the LTC1290 12-Bit ADC

Output Voltage Temperature Drift

5.010

V

CC

S

A

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CLK

5.005

5.000

4.995

4.990

D

TO µC

OUT

ANALOG

INPUTS

D

IN

CS

8V TO 40V

LTC1290

COM

V

IN

+

V

REF

OUT

+

–

REF

LT1027LS8

2.2µF

+

–40 –25

0

25

50

75 85

–

AGND

DGND

10k

22µF

V

TRIM

TEMPERATURE (°C)

GND

1027LS8 TA01b

1027LS8 TA01a

1027ls8f

1

For more information www.linear.com/LT1027LS8

LT1027LS8

absoluTe MaxiMuM raTings

pin conFiguraTion

(Note 1)

TOP VIEW

Input Voltage.............................................................40V

Input/Output Voltage Differential ..............................35V

Output to Ground Voltage ...........................................7V

V

IN

8

NR

1

2

3

7

6

5

NC*

V

to Ground Voltage

TRIM

V

OUT

Positive...................................................................5V

Negative.............................................................–0.3V

V

TRIM

4

Output Short-Circuit Duration

GND

LS8 PACKAGE

8-PIN LEADLESS CHIP CARRIER (5mm × 5mm)

V > 20V..........................................................10 sec

IN

V ≤ 20V..................................................... Indefinite

IN

*CONNECTED INTERNALLY.

D0 NOT CONNECT EXTERNAL

CIRCUITRY TO THESE PINS

Operating Temperature Range

LT1027C................................................... 0°C to 70°C

LT1027I................................................–40°C to 85°C

Storage Temperature Range .................. –65°C to 150°C

**SEE APPLICATIONS

INFORMATION SECTION

T

= 125°C, θ = 120°C/W

JA

JMAX

PACKAGE LID IS GND

orDer inForMaTion

(http://www.linear.com/product/LT1027LS8#orderinfo)

LEAD FREE FINISH

LT1027DCLS8-5#PBF

LT1027DILS8-5#PBF

PART MARKING

10275

PACKAGE DESCRIPTION

SPECIFIED TEMPERATURE RANGE

0°C to 70°C

8-Lead Ceramic LCC 5mm × 5mm

10275

–40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through

designated sales channels with #TRMPBF suffix.

1027ls8f

2

For more information www.linear.com/LT1027LS8

LT1027LS8

elecTrical characTerisTics ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_IN= 10V, I_LOAD= 0A unless otherwise specified.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

5.000

2

MAX

5.005

5

UNITS

V

Output Voltage (Note 2)

4.995

OUT

l

TCV

Output Voltage Temperature Coefficient (Note 3)

Line Regulation (Note 4)

ppm/°C

OUT

8V ≤ V ≤ 10V

6

12

25

ppm/V

IN

10V ≤ V ≤ 40V

3

8

6

8

ppm/V

IN

Load Regulation (Notes 4, 6)

Sourcing Current

–8

–10

12

15

ppm/mA

0 ≤ I

≤ 15mA, 0°C to 85°C

≤ 5mA, –40°C

OUT

Sinking Current 0 ≤ I

0°C to 85°C

–40°C

≤ 10mA

OUT

l

30

120

160

ppm/mA

Supply Current

Adjust Range

2.2

3.1

3.5

mA

l

V

30

50

3

mV

TRIM

e

n

Output Noise (Note 5)

0.1Hz ≤ f ≤ 10Hz

10Hz ≤ f ≤ 1kHz

µV

P-P

2.0

6.0

µV

RMS

Long-Term Stability of Output Voltage (Note 7)

Temperature Hysteresis of Output (Note 8)

∆t = First 1000Hrs

∆t = First 3000Hrs

12

18

ppm

∆T = 25°C

∆T = 0°C to 70°C

∆T = –40°C to 85°C

6

8

12

ppm

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Output voltage is measured immediately after turn-on. Changes

due to chip warm-up are typically less than 0.005ꢀ.

Note 7: Long-term stability typically has a logarithmic characteristic and

therefore, changes after 1000 hours tend to be much smaller than before

that time. Total drift in the second thousand hours is normally less than

one third that of the first thousand hours, with a continuing trend toward

reduced drift with time. Significant improvement in long-term drift can be

realized by preconditioning the IC with a 100-200 hour, 125°C burn in.

Long term stability will also be affected by differential stresses between

the IC and the board material created during board assembly. Temperature

cycling and baking of completed boards is often used to reduce these

stresses in critical applications.

Note 8: Hysteresis in output voltage is created by package stress that

differs depending on whether the IC was previously at a higher or lower

temperature. Output voltage is always measured at 25°C, but the IC is

cycled to high or low temperature before successive measurements.

Hysteresis is roughly proportional to the square of temperature change.

Hysteresis is not normally a problem for operational temperature

excursions, but can be significant in critical narrow temperature range

applications where the instrument might be stored at high or low

temperatures. Hysteresis measurements are preconditioned by one

temperature cycle.

Note 3: Temperature coefficient is measured by dividing the change in

output voltage over the temperature range by the change in temperature.

Note 4: Line and load regulation are measured on a pulse basis. Output

changes due to die temperature change must be taken into account

separately.

Note 5: RMS noise is measured with an 8-pole bandpass filter with a

center frequency of 30Hz and a Q of 1.5. The filter output is then rectified

and integrated for a fixed time period, resulting in an average, as opposed

to RMS voltage. A correction factor is used to convert average to RMS.

This value is then used to obtain RMS noise voltage in the 10Hz to 1000Hz

frequency band. This test also screens for low frequency “popcorn” noise

within the bandwidth of the filter.

Note 6: Devices typically exhibit a slight negative DC output impedance of

–0.015Ω. This compensates for PC trace resistance, improving regulation

at the load.

1027ls8f

3

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical perForMance characTerisTics

Ripple Rejection

Output Impedance vs Frequency

Output Voltage Temperature Drift

5.010

5.005

5.000

4.995

4.990

100

120

110

100

90

100

10

1

∆I = 3mA AC

V

= 10V

IN

I

= 5mA

SOURCE

80

70

0.1

60

0.01

50

–50 –25

0

25

50

75 100 125

10

100

1k

10k

100k

10

100

1k

FREQUENCY (Hz)

1M

10k

TEMPERATURE (°C)

FREQUENCY (Hz)

1027LS8 G03

1027LS8 G01

1027LS8 G02

Start-Up and Turn-Off (No Load)

Start-Up and Turn-Off

Quiescent Current

2.5

2.0

1.5

V

OUT

1V/DIV

10V

V

IN

V

IN

R

L

= 1k, C = 4.7µF

L

1.0

0.5

0

1027LS8 G04

1027LS8 G05

1µs/DIV

500µs/DIV

20

0

5

10 15

25 30 35 40

INPUT VOLTAGE (V)

1027LS8 G06

Output Short-Circuit Current

vs Temperature

Load Regulation

Line Regulation

25

20

500

400

300

200

100

0

800

400

SOURCING

15

10

0

–400

V

= 10V

= 5V

IN

OUT

5

0

–100

–200

–300

–5

–800

–10

–15

–20

–25

SINKING

–1200

–400

–500

–1600

24

–50 –30 –10 10

30

50

70

90

8

12 16 20

28 32 36 40

–10

2

4

6

14 16

10 12

–8 –6 –4 –2

0

8

Sink Source

(mA)

TEMPERATURE (°C)

INPUT VOLTAGE (V)

I

OUT

1027LS8 G08

1027LS8 G09

1027LS8 G07

1027ls8f

4

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical perForMance characTerisTics

Output Noise Voltage Density

Output Settling Time (Sourcing)

200

180

V

160

140

OUT

400µV/DIV

AC-COUPLED

120

100

10mA

LOAD STEP

80

60

40

20

0

1027LS8 G11

C

NR

= 0

2µs/DIV

C

= 1µF

NR

10

100

1k

10k

FREQUENCY (Hz)

1027LS8 G10

0.1Hz to 10Hz Output Noise

Filtering = 1 Zero at 0.1Hz

2 Poles at 10Hz

Output Settling Time (Sinking)

V

OUT

400µV/DIV

5µV/DIV

AC-COUPLED

–10mA

LOAD STEP

1027LS8 G13

1027LS8 G12

1sec/DIV

2µs/DIV

1027ls8f

5

For more information www.linear.com/LT1027LS8

LT1027LS8

pin FuncTions

NR (Pin 1): Noise Reduction Pin. Add a capacitor to re-

duce wideband noise. See the Applications Information

section for details.

V

(Pin 3): Allows adjustment of output voltage. See

TRIM

the Applications Information section for details.

GND (Pin 4): Device Ground. See the Applications Infor-

mation section for recommended connection methods.

V

(Pin 2): Output Voltage. See the Applications Infor-

OUT

mation section for details regarding DC and capacitive

NC (Pins 5, 6, 7): Connected internally, do not connect.

loading and stability.

V (Pin 8): Power Supply. Bypass with 0.1µF (or larger)

capacitor to ground.

IN

block DiagraM

V

IN

V

OUT

NR

V

TRIM

1027LS8 BD

OUTPUT CURRENT LIMIT AND

BIAS CIRCUITS NOT SHOWN

GND

1027ls8f

6

For more information www.linear.com/LT1027LS8

LT1027LS8

applicaTions inForMaTion

Effect of Reference Drift on System Accuracy

Noise Reduction

A large portion of the temperature drift error budget in

many systems is the system reference voltage. Figure 1

indicates the maximum temperature coefficient allowable

if the reference is to contribute no more than 0.5LSB error

to the overall system performance. The example shown is

a 12-bit system designed to operate over a temperature

rangefrom25°Cto65°C.Assumingthesystemcalibration

is performed at 25°C, the temperature span is 40°C. It can

be seen from the graph that the temperature coefficient

of the reference must be no worse than 6ppm/°C if it is

to contribute less than 1LSB error. For this reason, the

LT1027LS8 has been optimized for low drift.

Thepositiveinputoftheinternalscalingamplifierisbrought

out as the Noise Reduction (NR) pin. Connecting a 1µF

Mylar capacitor between this pin and ground will reduce

the wideband noise of the LT1027LS8 from 2.0µV

to

RMS

approximately 1.2µV

in a 10Hz to 1kHz bandwidth.

RMS

Transientresponseisnotaffectedbythiscapacitor.Start-up

settling time will increase to several milliseconds due to

the 7kΩ impedance looking into the NR pin. The capacitor

must be a low leakage type. Electrolytics are not suitable

for this application. Just 100nA leakage current will result

in a 150ppm error in output voltage. This pin is the most

sensitive pin on the device. For maximum protection a

guard ring is recommended. The ring should be driven

from a resistive divider from V

set to 4.4V (the open-

100

OUT

circuit voltage on the NR pin).

8-BIT

Transient Response

TheLT1027LS8hasbeenoptimizedfortransientresponse.

Settling time is under 2µs when an AC-coupled 10mA load

transientisappliedtotheoutput.TheLT1027LS8achieves

fastsettlingbyusingaclassBNPN/PNPoutputstage.When

sinking current, the device may oscillate with capacitive

loads greater than 100pF. The LT1027LS8 is stable with

all capacitive loads when at no DC load or when sourcing

current, although for best settling time either no output

bypasscapactorora4.7µFtantalumunitisrecommended.

An 0.1µF ceramic output capacitor will maximize output

ringing and is not recommended.

10-BIT

10

12-BIT

14-BIT

1.0

0

10 20

40

60 70 80

100

90

30

50

TEMPERATURE SPAN (°C)

1027LS8 F01

Figure 1. Maximum Allowable Reference Drift

Trimming Output Voltage

TheLT1027LS8hasanadjustmentpinfortrimmingoutput

voltage. The impedance of the V pin is approximately

Kelvin Connections

Although the LT1027LS8 does not have true force-sense

capability,properhook-upcanimprovelinelossandground

loop problems significantly. Since the ground pin of the

LT1027LS8 carries only 2mA, it can be used as a low-side

sense line, greatly reducing ground loop problems on the

TRIM

20kΩ with an open-circuit voltage of 2.5V. A 30mV

guaranteed trim range is achievable by tying the V pin

TRIM

to the wiper of a 10k potentiometer connecting between

the output and ground. Trimming output voltage does not

affect the TC of the device.

low side of the reference. The V

pin should be close to

OUT

the load or connected via a heavy trace as the resistance

of this trace directly affects load regulation. It is important

to remember that a 1.22mV drop due to trace resistance

is equivalent to a 1LSB error in a 5V , 12-bit system.

FS

1027ls8f

7

For more information www.linear.com/LT1027LS8

LT1027LS8

applicaTions inForMaTion

INPUT

R1

91Ω

2N4403

IN

LT1027LS8

KEEP THIS LINE RESISTANCE LOW

IN

OUT

INPUT

LT1027LS8

+

OUT

LOAD

+

GND

R2*

2.4k

LOAD

4.7µF

GND

GROUND

RETURN

GROUND

RETURN

1027LS8 F02

1027LS8 F03

*OPTIONAL–REDUCES CURRENT IN OUTPUT SENSE LEAD

Figure 2. Standard Connection

Figure 3. Driving Higher Load Currents

The circuits in Figure 2 and Figure 3 illustrate proper con-

nections to minimize errors due to ground loops and line

losses. Losses in the output lead can be further reduced

by adding a PNP boost transistor if load current is 5mA

or higher. R2 can be added to further reduce current in

the output sense load.

100

80

60

40

20

0

Long-Term Drift

–20

–40

–60

–80

–100

Long-term drift cannot be extrapolated from accelerated

high temperature testing. This erroneous technique gives

drift numbers that are wildly optimistic. The only way

long-term drift can be determined is to measure it over

the time interval of interest.

0

500 1000 1500 2000 2500 3000

HOURS

1027LS8 F04

The LT1027LS8 long-term drift data was collected on 80

parts that were soldered into printed circuit boards similar

to a real world application. The boards were then placed

Figure 4. Long-Term Drift

into a constant temperature oven with a T = 35°C, their

A

outputs were scanned regularly and measured with an 8.5

digit DVM. Typical long-term drift is illustrated in Figure 4.

1027ls8f

8

For more information www.linear.com/LT1027LS8

LT1027LS8

applicaTions inForMaTion

Hysteresis

Thermal hysteresis is a measure of change of output volt-

age as a result of temperature cycling. Figure 5, Figure 6

and Figure 7 illustrate the typical hysteresis based on data

takenfromtheLT1027LS8.Aproprietarydesigntechnique

minimizes thermal hysteresis.

26

24

22

20

18

16

14

12

10

8

24

22

20

18

16

14

12

10

8

25°C to 50°C to 25°C

25°C TO 0°C TO 25°C

25°C TO 70°C TO 25°C

25°C to 0°C to 25°C

6

4

2

0

–15 –12 –9 –6 –3

0

3

6

9

12 15

–15 –12 –9 –6 –3

0

3

6

9

12 15

DISTRIBUTION (ppm)

1027LS8 F05

1027LS8 F06

Figure 5. Thermal Hysteresis Plot, 0°C to 50°C

Figure 6. Thermal Hysteresis Plot, 0°C to 70°C

26

24

22

20

18

16

14

12

10

8

25°C TO 85°C TO 25°C

25°C TO –40°C TO 25°C

6

4

2

0

–15 –12 –9 –6 –3

0

3

6

9

12 15

DISTRIBUTION (ppm)

1027LS8 F07

Figure 7. Thermal Hysteresis Plot, –40°C to 85°C

1027ls8f

9

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical applicaTions

Humidity Sensitivity

Plastic mold compounds absorb water. With changes in

relative humidity, plastic packaging materials change the

amount of pressure they apply to the die inside. These

pressure changes can cause slight changes in the output

of a voltage reference, usually on the order of 100ppm.

The LS8 package is hermetic, so it is not affected by

humidity, and is therefore more stable in environments

where humidity may be a concern. However, PC board

material may absorb water and apply mechanical stress

to the LT1027LS8. Proper board materials and layout are

essential.

LS8

1027LS8 F08a

(a)

For best stability, the PC board layout is critical. Change

in temperature and position of the PC board, as well as

aging, can alter the mechanical stress applied to compo-

nentssolderedtotheboard.FR4andsimilarmaterialsalso

absorb water, causing the board to swell. Even conformal

coating or potting of the board does not always eliminate

this effect, though it may delay the symptoms by reducing

the rate of absorption.

LS8

Power and ground planes should be omitted under the

voltagereferenceICforbeststability.Figure8ashowsatab

cut through the PC board on three sides of an LT1027LS8,

which significantly reduces stress on the IC, as described

in Application Note 82. For even better performance,

Figure 8b shows slots cut through the PC board on all

four sides. The slots should be as long as possible, and

the corners just large enough to accommodate routing of

traces. It has been shown that for PC boards designed in

this way, humidity sensitivity can be reduced to less than

35ppm for a change in relative humidity of approximately

60%. Mounting the reference near the center of the board,

with slots on four sides, can further reduce the sensitivity

to less than 10ppm.

1027LS8 F08b

(b)

Figure 8. (a) 3-Sided PCB Tab Cutout, (b) 4-Sided PCB Cutout.

Lines Represent Cuts All the Way Through the PCB

80

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

V

= 10V

IN

HUMIDITY

TEMPERATURE

An additional advantage of slotting the PC board is that

the LT1027LS8 is thermally isolated from surrounding

circuitry. This separation can help reduce thermocouple

effects and improve accuracy.

–10

–20

–10

0

20 40 60 80 100 120 140 160 180 200 220

TIME (HRS)

1027LS8 F09

Figure 9. Illustrates Drift of LT1027LS8 with Large Changes in

Humidity. Using Proper PCB Layout Techniques Limits This Drift

to a Few ppm

1027ls8f

10

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical applicaTions

10V Reference

V

IN

+

OUT

TRIM

10.00V

OUTPUT

LT1097

LT1027LS8

–

V

5k

5k*

GND

5k*

* 0.1% METAL FILM

1027LS8 TA02

10V Reference

V

IN

V

OUT

V

IN

7

8

LT1027LS8

1F

11

OUT

LTC1043

12

13

16

GND

14

17

0.01µF

1027LS8 TA03

1027ls8f

11

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical applicaTions

Operating 5V Reference from 5V Supply

5V

LOGIC SUPPLY

CMOS LOGIC GATE**

1N914

LT1027LS8

1N914

+

5V

≈8.5V

IN

OUT

f

≥ 2kHz*

IN

REFERENCE

C1

5µF*

+

C2

5µF*

GND

1027LS 8 TA04

*FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED

**PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING

1027ls8f

12

For more information www.linear.com/LT1027LS8

LT1027LS8

package DescripTion

Please refer to http://www.linear.com/product/LT1027LS8#packaging/ for the most recent package drawings.

LS8 Package

8-Pin Leadless Chip Carrier (5mm × 5mm)

(Reference LTC DWG # 05-08-1852 Rev B)

8

2.50 0.15

PACKAGE OUTLINE

7

1

0.5

2

3

6

2.54 0.15

1.4

1.50 0.15

XYY ZZ

ABCDEF

4

Q12345

0.70 0.05 × 8

COMPONENT

PIN “A1”

5.00 SQ 0.15

5.80 SQ 0.15

TRAY PIN 1

BEVEL

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

PACKAGE IN TRAY LOADING ORIENTATION

5.00 SQ 0.15

4.20 SQ 0.10

8

1.45 0.10

0.95 0.10

5.00 SQ 0.15

8

R0.20 REF

2.00 REF

PIN 1

1

2

1

2

7

6

7

6

TOP MARK

(SEE NOTE 5)

0.5

2.54 0.15

4.20 0.10

1.4

5

3

5

R0.20 REF

1.00 × 7 TYP

LS8 0113 REV B

4

0.70 TYP

0.10 TYP

0.64 × 8 TYP

NOTE:

1. ALL DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS

PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE

4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM

5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

1027ls8f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

13

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LT1027LS8

LT1027LS8

Typical applicaTion

Precision Temperature Sensor

5V

V

2.5k

50Ω

2.5k

50Ω

REF

1nF

R

7.5V

REF

V

DD

400Ω

5k

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

MUXOUTN

ADCINN

–

+

R

TD

–2.5V

MUXOUTP

ADCINP

1nF

CH8

CH9

7.5V

0.1µF

0.01µF

LTC2449

THERMOCOUPLE

CH10

CH11

CH12

CH13

CH14

CH15

COM

–

+

SDI

SCK

SDO

CS

LTC6241

SPI INTERFACE

–2.5V

BUSY

EXT

V

REF

+

7.5V

IN

OUT

REF

–

F

REF

O

LT1027LS8

GND

4.7µF

1027LS8 TA05

relaTeD parTs

PART NUMBER DESCRIPTION

COMMENTS

LT1021

Precision References for Series or Shunt Operation in

Hermetic TO-5, SOP-8, DIP-8 Package

0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise

(0.1Hz to 10Hz), –55°C to 125°C (TO-5)

LT1236

Low Drift, Low Noise, 5V and 10V Voltage Reference in

SO8, DIP8 and LS8 Packages

0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise

(0.1Hz to 10Hz), –40°C to 85°C

LT1236LS8

LTC^®6652

Precision Series Reference, 0.05%, 5ppm/°C Drift

Low Profile Hermetic LS8 Package

High Precision, Buffered Voltage Reference Family in

MSOP8 and LS8 Package

0.05% Max Initial Error, 5ppm/°C Max Drift, Shutdown Current <2µA,

–40°C to 125°C Operation

LT6654

Precision, Low Noise, High Output Drive Voltage Reference 1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz) Sink/Source 10mA, 5ppm/°C

Family in MSOP8 and LS8 Package

Max Drift, –40°C to 125°C Operation

LTC6655

Exceptional Low Noise, High Precision Reference in

MSOP8 and LS8 Package

0.25ppm Peak-to-Peak Noise (0.1Hz to 10Hz), 2ppm/°C Maximum Drift,

0.025% Maximum Initial Error, –40°C to 125°C Operation

1027ls8f

LT 0216 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

14

For more information www.linear.com/LT1027LS8

●

 LINEAR TECHNOLOGY CORPORATION 2016

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT1027LS8


型号：	LT1027DCLS8-5#PBF
厂家：	Linear
描述：	LT1027LS8 - Precision, Low Noise, High Stability Hermetic Voltage Reference; Package: LCC; Pins: 8; Temperature Range: 0°C to 70°C
文件：	总14页 (文件大小：3059K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT1027DCLS8-5#PBF [Linear]

相关型号：

LT1027DCN

LT1027DCN8

LT1027DCN8-5

LT1027DCS

LT1027DCS8-5

LT1027DCS8-5#TRPBF

LT1027DMH

LT1027DMH/883B

LT1027DS

LT1027E

LT1027ECH

LT1027ECH-5