概述
数据手册LT1028M 概述
Ultra Low Noise Precision High Speed Op Amps 超低噪声精密高速运算放大器
LT1028M 数据手册
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PDF下载LT1028/LT1128
Ultra Low Noise Precision
High Speed Op Amps
U
DESCRIPTIO
EATURE
Voltage Noise
S
F
■
The LT1028(gain of –1 stable)/LT1128(gain of +1 stable)
achieveanewstandardofexcellenceinnoiseperformance
with 0.85nV/√Hz 1kHz noise, 1.0nV/√Hz 10Hz noise. This
ultra low noise is combined with excellent high speed
specifications (gain-bandwidth product is 75MHz for
LT1028, 20MHz for LT1128), distortion-free output, and
true precision parameters (0.1µV/°C drift, 10µV offset
voltage, 30 million voltage gain). Although the LT1028/
LT1128 input stage operates at nearly 1mA of collector
current to achieve low voltage noise, input bias current is
only 25nA.
1.1nV/√Hz Max. at 1kHz
0.85nV/√Hz Typ. at 1kHz
1.0nV/√Hz Typ. at 10Hz
35nVP-P Typ., 0.1Hz to 10Hz
Voltage and Current Noise 100% Tested
Gain-Bandwidth Product
LT1028: 50MHz Min.
■
■
LT1128: 13MHz Min.
■
Slew Rate
LT1028: 11V/µs Min.
LT1128: 5V/µs Min.
The LT1028/LT1128’s voltage noise is less than the noise
of a 50Ω resistor. Therefore, even in very low source
impedance transducer or audio amplifier applications, the
LT1028/LT1128’s contribution to total system noise will
be negligible.
■
■
■
■
Offset Voltage: 40µV Max.
Drift with Temperature: 0.8µV/°C Max.
Voltage Gain: 7 Million Min.
Available in 8-Pin SO Package
O U
PPLICATI
S
A
■
■
■
■
■
■
■
Low Noise Frequency Synthesizers
High Quality Audio
Infrared Detectors
Accelerometer and Gyro Amplifiers
350Ω Bridge Signal Conditioning
Magnetic Search Coil Amplifiers
Hydrophone Amplfiers
Flux Gate Amplifier
Voltage Noise vs Frequency
10
V
T
= ±15V
= 25°C
S
A
DEMODULATOR
SYNC
MAXIMUM
+
1/f CORNER = 14Hz
OUTPUT TO
DEMODULATOR
LT1028
TYPICAL
–
1k
1
SQUARE
WAVE
DRIVE
1kHz
FLUX GATE
TYPICAL
SCHONSTEDT
#203132
1/f CORNER = 3.5Hz
50Ω
0.1
0.1
1
10
1k
100
1028/1128 TA01
FREQUENCY (Hz)
1028/1128 TA02
1
LT1028/LT1128
W W W
U
ABSOLUTE AXI U RATI GS
Operating Temperature Range
Supply Voltage
LT1028/LT1128AM, M ..................... –55°C to 125°C
LT1028/LT1128AC, C ......................... –40°C to 85°C
Storage Temperature Range
–55°C to 105°C ................................................ ±22V
105°C to 125°C ................................................ ±16V
Differential Input Current (Note 8) ...................... ±25mA
Input Voltage ............................ Equal to Supply Voltage
Output Short Circuit Duration .......................... Indefinite
All Devices ........................................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
W
U
/O
PACKAGE RDER I FOR ATIO
TOP VIEW
ORDER PART
ORDER PART
V
OS
TRIM
NUMBER
NUMBER
TOP VIEW
8
V
OS
V
TRIM
V+
+
OS
1
2
3
4
8
7
6
5
1
3
V
V
TRIM
7
5
TRIM
OS
–IN
+IN
LT1028CS8
LT1128CS8
–
+
–
–IN
LT1028AMH
LT1028MH
LT1028ACH
LT1028CH
6
2
OUT
+
+IN
OUT
OVER-
COMP
–
OVER-
COMP
V
4
V
S8 PART MARKING
–
S8 PACKAGE
8-LEAD PLASTIC SOIC
(CASE)
1028
1128
H PACKAGE
8-LEAD TO-5 METAL CAN
TOP VIEW
ORDER PART
NUMBER
LT1028AMJ8
LT1028MJ8
LT1028ACJ8
LT1028CJ8
LT1028ACN8
LT1028CN8
LT1128AMJ8
LT1128MJ8
LT1128CJ8
LT1128ACN8
LT1128CN8
NC
NC
1
16
15
14
13
12
11
10
9
NC
TOP VIEW
2
3
4
5
6
7
8
NC
V
V
TRIM
V+
OS
OS
1
2
3
4
8
7
6
5
TRIM
TRIM
–IN
TRIM
LT1028CS16
–
+
–IN
+
–
+
V
OUT
+IN
+IN
OUT
OVER-
COMP
NC
NC
OVER-
COMP
–
–
V
V
NC
NC
J8 PACKAGE
8-LEAD CERAMIC DIP
N8 PACKAGE
8-LEAD PLASTIC DIP
S PACKAGE
16-LEAD PLASTIC SOL
NOTE: THIS DEVICE IS NOT RECOM-
MENDED FOR NEW DESIGNS
ELECTRICAL CHARACTERISTICS VS = ±15V, TA = 25°C, unless otherwise noted.
LT1028M/C
LT1128M/C
LT1028AM/AC
LT1128AM/AC
SYMBOL PARAMETER
CONDITIONS
(Note 1)
MIN
TYP
MAX
MIN
TYP
20
MAX
80
UNITS
µV
V
Input Offset Voltage
10
40
OS
∆V
∆Time
Long Term Input Offset
Voltage Stability
(Note 2)
0.3
0.3
µV/Mo
OS
I
I
e
Input Offset Current
Input Bias Current
Input Noise Voltage
V
V
= 0V
= 0V
12
±25
35
50
±90
75
18
±30
35
100
±180
90
nA
nA
OS
B
CM
CM
0.1Hz to 10Hz (Note 3)
nV
P-P
n
2
LT1028/LT1128
ELECTRICAL CHARACTERISTICS VS = ±15V, TA = 25°C, unless otherwise noted.
LT1028M/C
LT1128M/C
LT1028AM/AC
LT1128AM/AC
SYMBOL PARAMETER
Input Noise Voltage Density
CONDITIONS
f = 10Hz (Note 4)
f = 1000Hz, 100% tested
MIN
TYP
1.00
0.85
MAX
1.7
1.1
MIN
TYP
1.0
0.9
MAX
UNITS
1.9
1.2
nV/√Hz
nV/√Hz
O
O
I
Input Noise Current Density
f = 10Hz (Note 3 and 5)
f = 1000Hz, 100% tested
O
4.7
1.0
10.0
1.6
4.7
1.0
12.0
1.8
pA/√Hz
pA/√Hz
n
O
Input Resistance
Common Mode
Differential Mode
300
20
300
20
MΩ
kΩ
Input Capacitance
Input Voltage Range
5
5
pF
V
±11.0 ±12.2
±11.0 ±12.2
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V
= ±11V
114
117
7.0
5.0
3.0
126
133
30.0
20.0
15.0
110
110
5.0
3.5
2.0
126
132
30.0
20.0
15.0
dB
dB
V/µV
V/µV
V/µV
CM
V = ±4V to ±18V
R ≥ 2k, V = ±12V
R ≥ 1k, V = ±10V
R ≥ 600Ω, V = ±10V
S
A
VOL
L
O
L
O
L
O
V
Maximum Output Voltage Swing
Slew Rate
R ≥ 2k
±12.3 ±13.0
±11.0 ±12.2
11.0 15.0
±12.0 ±13.0
±10.5 ±12.2
V
V
V/µs
V/µs
OUT
L
R ≥ 600Ω
L
SR
A
VCL
A
VCL
= –1
= –1
LT1028
LT1128
11.0
4.5
15.0
6.0
5.0
6.0
GBW
Gain-Bandwidth Product
f = 20kHz (Note 6)
f = 200kHz (Note 6)
O
LT1028
LT1128
50
13
75
20
50
11
75
20
MHz
MHz
O
Z
Open-Loop Output Impedance
Supply Current
V = 0, I = 0
80
7.4
80
7.6
Ω
O
O
O
I
9.5
10.5
mA
S
VS = ±15V, –55°C ≤ TA ≤ 125°C, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LT1028M
LT1028AM
LT1128AM
TYP
LT1128M
TYP
SYMBOL PARAMETER
CONDITIONS
(Note 1)
MIN
MAX
120
0.8
MIN
MAX
180
1.0
UNITS
µV
µV/°C
V
Input Offset Voltage
●
●
30
0.2
45
0.25
OS
∆V
Average Input Offset Drift
(Note7)
OS
∆Temp
I
I
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V
V
= 0V
= 0V
●
●
●
●
●
●
25
±40
±10.3 ±11.7
90
±150
30
±50
±10.3 ±11.7
180
±300
nA
nA
V
dB
dB
OS
B
CM
CM
CMRR
PSRR
A
V
CM
= ±10.3V
106
110
3.0
2.0
122
130
14.0
10.0
100
104
2.0
1.5
120
130
14.0
10.0
V = ±4.5V to ±16V
S
R ≥ 2k, V = ±10V
R ≥ 1k, V = ±10V
V/µV
V/µV
VOL
L
O
L
O
V
Maximum Output Voltage Swing
Supply Current
R ≥ 2k
L
●
●
±10.3 ±11.6
±10.3 ±11.6
V
mA
OUT
I
8.7
11.5
9.0
13.0
S
3
LT1028/LT1128
ELECTRICAL CHARACTERISTICS VS = ±15V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
LT1028C
LT1028AC
LT1128AC
TYP
LT1128C
TYP
SYMBOL PARAMETER
CONDITIONS
(Note 1)
(Note7)
MIN
MAX
80
MIN
MAX
125
1.0
UNITS
µV
µV/°C
V
Input Offset Voltage
●
●
15
30
OS
∆V
Average Input Offset Drift
0.1
0.8
0.2
OS
∆Temp
I
I
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V
V
= 0V
= 0V
●
●
●
●
●
●
15
±30
±10.5 ±12.0
65
±120
22
±40
±10.5 ±12.0
130
±240
nA
nA
V
dB
dB
OS
B
CM
CM
CMRR
PSRR
A
V
= ±10.5V
110
114
5.0
4.0
124
132
25.0
18.0
106
107
3.0
2.5
124
132
25.0
18.0
CM
V = ±4.5V to ±18V
R ≥ 2k, V = ±10V
R ≥ 1k, V = ±10V
S
V/µV
V/µV
VOL
L
O
L
O
V
Maximum Output Voltage Swing
Supply Current
R ≥ 2k
R ≥ 600Ω (Note 9)
L
●
●
±11.5 ±12.7
±9.5 ±11.0
±11.5 ±12.7
±9.0 ±10.5
V
V
mA
OUT
L
I
8.0
10.5
8.2
11.5
S
ELECTRICAL CHARACTERISTICS VS = ±15V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 10)
LT1028C
LT1128C
TYP
LT1028AC
LT1128AC
TYP
SYMBOL PARAMETER
CONDITIONS
MIN
MAX
95
0.8
MIN
MAX
150
1.0
UNITS
µV
µV/°C
V
OS
Input Offset Voltage
●
●
20
0.2
35
0.25
∆V
Average Input Offset Drift
OS
∆Temp
I
I
Input Offset Current
Input Bias Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V
V
= 0V
= 0V
●
●
●
●
●
●
20
±35
±10.4 ±11.8
80
±140
28
±45
±10.4 ±11.8
160
±280
nA
nA
V
dB
dB
OS
B
CM
CM
CMRR
PSRR
A
V
= ±10.5V
108
112
4.0
3.0
123
131
20.0
14.0
102
106
2.5
2.0
123
131
20.0
14.0
CM
V = ±4.5V to ±18V
R ≥ 2k, V = ±10V
R ≥ 1k, V = ±10V
S
V/µV
V/µV
VOL
L
O
L
O
V
Maximum Output Voltage Swing
Supply Current
R ≥ 2k
L
●
●
±11.0 ±12.5
±11.0 ±12.5
V
mA
OUT
I
8.5
11.0
8.7
12.5
S
The
●
denotes specifications which apply over the full operating
on an RMS basis) is divided by the sum of the two source resistors to
obtain current noise. Maximum 10Hz current noise can be inferred from
100% testing at 1kHz.
Note 6: Gain-bandwidth product is not tested. It is guaranteed by design
and by inference from the slew rate measurement.
temperature range.
Note 1: Input Offset Voltage measurements are performed by automatic
test equipment approximately 0.5 sec. after application of power. In
addition, at T = 25°C, offset voltage is measured with the chip heated to
A
approximately 55°C to account for the chip temperature rise when the
Note 7: This parameter is not 100% tested.
device is fully warmed up.
Note 8: The inputs are protected by back-to-back diodes. Current-limiting
resistors are not used in order to achieve low noise. If differential input
voltage exceeds ±1.8V, the input current should be limited to 25mA.
Note 2: Long Term Input Offset Voltage Stability refers to the average
trend line of Offset Voltage vs. Time over extended periods after the first
30 days of operation. Excluding the initial hour of operation, changes in
Note 9: This parameter guaranteed by design, fully warmed up at T =
A
V
during the first 30 days are typically 2.5µV.
OS
70°C. It includes chip temperature increase due to supply and load
currents.
Note 3: This parameter is tested on a sample basis only.
Note 4: 10Hz noise voltage density is sample tested on every lot with the
exception of the S8 and S16 packages. Devices 100% tested at 10Hz are
available on request.
Note 5: Current noise is defined and measured with balanced source
resistors. The resultant voltage noise (after subtracting the resistor noise
Note 10: The LT1028/LT1128 are not tested and are not quality-
assurance-sampled at –40°C and at 85°C. These specifications are
guaranteed by design, correlation and/or inference from –55°C, 0°C, 25°C,
70°C and /or 125°C tests.
4
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Wideband Voltage Noise
(0.1Hz to Frequency Indicated)
10Hz Voltage Noise Distribution
Wideband Noise, DC to 20kHz
180
160
140
120
100
80
10
1
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
A
158
148
S
A
500 UNITS
MEASURED
FROM 4 RUNS
70
57
60
0.1
0.01
40
28
VERTICAL SCALE = 0.5µV/DIV
HORIZONTAL SCALE = 0.5ms/DIV
20
8
7
4
3
3
2
2
2
2
2
1
1
1
1
0
0.8 1.0 1.2
1.4 1.6 1.8 2.0 2.2
VOLTAGE NOISE DENSITY (nV/√Hz)
0.6
100
1k
10k
100k
1M
10M
BANDWIDTH (Hz)
LT1028/1128 • TPC03
LT1020/1120 • TPC01
Total Noise vs Matched Source
Resistance
Total Noise vs Unmatched
Source Resistance
Current Noise Spectrum
100
10
1
100
10
1
100
10
1
R
S
R
S
–
R
S
+
MAXIMUM
1/f CORNER = 800Hz
1/f CORNER = 250Hz
AT 10Hz
AT 1kHz
AT 1kHz
AT 10Hz
TYPICAL
2 R NOISE ONLY
S
2 R NOISE ONLY
S
V
T
= ±15V
= 25°C
V
T
= ±15V
S
A
S
A
= 25°C
0.1
0.1
0.1
10
100
1k
10k
1
3
10 30 100 300 1k 3k 10k
1
3
10 30 100 300 1k 3k 10k
FREQUENCY (Hz)
MATCHED SOURCE RESISTANCE (Ω)
UNMATCHED SOURCE RESISTANCE (Ω)
LT1028/1128 • TPC06
LT1028/1128 • TPC04
LT1028/1128 • TPC05
0.1Hz to 10Hz Voltage Noise
0.01Hz to 1Hz Voltage Noise
Voltage Noise vs Temperature
2.0
1.6
1.2
0.8
O.4
0
V
= ±15V
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
S
A
AT 10Hz
AT 1kHz
10nV
10nV
20
40
60
80
100
–50
–25
0
25
50
75 100 125
0
0
2
4
6
8
10
TEMPERATURE (°C)
TIME (SEC)
TIME (SEC)
LT1028/1128 • TPC07
LT1028/1128 • TPC09
LT1028/1128 • TPC07
5
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Offset Voltage Drift with
Long-Term Stability of Five
Representative Units
Distribution of Input Offset
Voltage
Temperature of Representative Units
50
40
20
18
16
14
12
10
8
10
8
V = ±15V
S
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
A
t = 0 AFTER 1 DAY PRE-WARM UP
800 UNITS TESTED
FROM FOUR RUNS
30
6
20
4
10
2
0
0
–10
–20
–30
–40
–50
–2
–4
–6
–8
–10
6
4
2
0
–50
0
25
50
75 100 125
–25
–50 –40 –30 –20 –10
0
10 20 30 40 50
0
1
2
3
4
5
TEMPERATURE (°C)
OFFSET VOLTAGE (µV)
TIME (MONTHS)
LT1028/1128 • TPC11
LT1028/1128 • TPC10
LT1028/1128 • TPC12
Input Bias and Offset Currents
Over Temperature
Bias Current Over the Common-
Mode Range
Warm-Up Drift
24
20
60
50
40
30
100
80
V
V
= ±15V
= 0V
V
T
= ±15V
= 25°C
S
CM
20V
65nA
V
S
T
A
= ±15V
= 25°C
S
A
R
=
≈ 300MΩ
CM
60
POSITIVE INPUT CURRENT
(UNDERCANCELLED) DEVICE
40
16
12
METAL CAN (H) PACKAGE
20
0
BIAS CURRENT
8
4
0
–20
–40
–60
20
10
0
DUAL-IN-LINE PACKAGE
NEGATIVE INPUT CURRENT
(OVERCANCELLED) DEVICE
OFFSET CURRENT
PLASTIC (N) OR CERDIP (J)
–80
0
1
2
3
4
5
50
TEMPERATURE (˚C)
100 125
–50 –25
0
25
75
–15
5
10
15
–10
–5
0
TIME AFTER POWER ON (MINUTES)
COMMON-MODE INPUT VOLTAGE (V)
LT1028/1128 • TPC13
LT1028/1128 • TPC14
LT1028/1128 • TPC15
Output Short-Circuit Current
vs Time
Voltage Noise vs Supply Voltage
Supply Current vs Temperature
10
9
8
7
6
5
4
3
2
1
0
50
40
1.5
1.25
1.0
V
= ±15V
T
= 25°C
–50°C
25°C
S
A
V
V
= ±15V
= ±5V
S
S
30
125°C
20
10
AT 10Hz
AT 1kHz
0
–10
–20
–30
–40
–50
125°C
25°C
0.75
0.5
–50°C
–50
0
25
50
75 100 125
–25
0
±5
±10
±15
±20
0
2
3
1
TEMPERATURE (°C)
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
SUPPLY VOLTAGE (V)
LT1028/1128 • TPC17
LT1028/1128 • TPC16
LT1028/1128 • TPC18
6
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1028
Capacitance Load Handling
LT1028
Voltage Gain vs Frequency
Gain, Phase vs Frequency
70
60
50
40
30
20
70
60
50
40
30
20
160
140
120
100
80
80
70
60
50
40
30
20
10
0
30pF
PHASE
V
T
= ±15V
= 25°C
= 2k
S
2k
A
R
L
RS
–
+
CL
LT1128
LT1028
A
= –1, R = 2k
S
V
60
GAIN
A
S
= –10
V
40
R
= 200Ω
10
0
10
0
20
A
= –100
V
R
V
T
= ±15V
= 25°C
= 10pF
S
A
L
= 20Ω
S
V
T
= ±15V
= 25°C
S
A
0
C
–10
10k
–10
100M
–20
100k
1M
10M
10
100
1000
10000
0.01 0.1
1
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
FREQUENCY (Hz)
CAPACITIVE LOAD (pF)
LT1028/1128 • TPC20
LT1028/1128 • TPC21
LT1028/1128 • TPC19
LT1128
Gain Phase vs Frequency
Gain Error vs Frequency
Closed-Loop Gain = 1000
LT1128
Capacitance Load Handling
1
0.1
70
60
50
40
30
20
70
60
50
40
30
20
80
70
60
50
40
30
20
10
0
30pF
TYPICAL
PRECISION
OP AMP
2k
PHASE
RS
–
LT1128
+
CL
A
= –1, R = 2k
S
V
LT1028
A
S
= –10
V
0.01
0.001
GAIN
1M
R
= 200Ω
10
0
10
0
V
= ±15V
= 25°C
= 10mV
S
A
O
V
= ±15V
= 25°C
= 10pF
S
A
T
T
CLOSED-LOOP GAIN
OPEN-LOOP GAIN
GAIN ERROR =
1
V
P-P
10000
C
L
A
= –100, R = 20Ω
V
S
–10
–10
100M
0.1
10
100
10k
100k
10M
10
100
1000
FREQUENCY (Hz)
FREQUENCY (Hz)
CAPACITIVE LOAD (pF)
LT1028/1128 • TPC22
LT1028/1128 • TPC23
LT1028/1128 • TPC 24
Maximum Undistorted Output
vs Frequency
Voltage Gain vs Supply Voltage
Voltage Gain vs Load Resistance
100
10
1
30
25
20
15
10
5
100
10
1
T
= 25°C
V
S
= ±15V
A
V
= ±15V
= 25°C
= 2k
S
A
L
T
R
R
L
= 2k
T
= 25°C
A
T
A
= –55°C
T
= 125°C
A
R
= 600Ω
L
LT1128
LT1028
I
= 35mA AT –55°C
= 27mA AT 25°C
= 16mA AT 125°C
LMAX
1
0.1
10
10k
100k
1M
10M
0
±5
±10
±20
±15
LOAD RESISTANCE (kΩ)
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
LT1028/1128 • TPC26
LT1028/1128 • TPC27
LT`1028/1128 • TPC25
7
LT1028/LT1128
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1028
Slew Rate, Gain-Bandwidth
Product Over Temperature
LT1028
LT1028
Small-Signal Transient Response
Large-Signal Transient Response
18
17
16
15
90
80
70
60
V
= ±15V
S
50mV
10V
GBW
FALL
RISE
–10V
–50mV
14
13
12
50
40
30
1µs/DIV
0.2µs/DIV
AV = –1, RS = RF = 2k
CF = 15pF, CL = 80pF
AV = –1, RS = RF = 2k, CF = 15pF
50
TEMPERATURE (˚C)
100 125
–50 –25
0
25
75
LT1028/1128 • TPC30
LT1128
Slew Rate, Gain-Bandwidth
Product Over Temperature
LT1128
LT1128
Large-Signal Transient Response
Small-Signal Transient Response
9
8
7
6
5
4
3
2
1
FALL
50mV
10V
RISE
GBW
30
20
10
0V
0V
–10V
–50mV
2µs/DIV
0.2µs/DIV
AV = +1, CL = 10pF
AV = –1, RS = RF = 2k, CF = 30pF
0
–50
50
75 100 125
–25
0
25
TEMPERATURE (°C)
LT1028/1128 • TPC33
LT1128
LT1028
Slew Rate, Gain-Bandwidth Product
Slew Rate, Gain-Bandwidth Product
Closed-Loop Output Impedance
vs Over-Compensation Capacitor
vs Over-Compensation Capacitor
100
1k
100
10
1
10k
1k
100
10
I
= 1mA
= ±15V
= 25°C
O
S
A
V
LT1128
T
LT1028
SLEW
GBW
GBW
10
1
100
A
= +1000
LT1128
V
1
SLEW RATE
0.1
10
100
10
A
= +5
V
0.01
0.001
C
V
FROM PIN 5 TO PIN 6
= ±15V
= 25°C
OC
S
A
LT1028
T
0.1
1
0.1
10
100
1k
10k
100k
1M
1
10
100
1000
10000
1
10
100
1000
10000
OVER-COMPENSATION CAPACITOR (pF)
FREQUENCY (Hz)
OVER-COMPENSATION CAPACITOR (pF)
LT1028/1128 • TPC35
LT1028/1128 • TPC36
LT1028/1128 • TPC34
8
LT1028/LT1128
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Common-Mode Limit Over
Temperature
Common-Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
+
V
140
120
100
80
160
140
120
100
80
V
T
= ±15V
= 25°C
S
A
V
= ±15V
= 25°C
–1
–2
–3
–4
S
A
T
V
V
= ±5V
S
S
= ±15V
NEGATIVE
SUPPLY
LT1128
LT1028
POSITIVE
SUPPLY
60
4
3
2
1
60
40
V
= ±5V TO ±15V
40
S
20
20
–
V
0
0
–50
0
25
50
75 100 125
–25
100k
10M
100 1k
10
100
1k
10k
1M
0.1
1
10
10k 100k 1M 10M
TEMPERATURE (°C)
FREQUENCY (Hz)
FREQUENCY (Hz)
LT1028/1128 • TPC37
LT1028/1128 • TPC38
LT1028/1128 • TPC39
LT1028
LT1028
Total Harmonic Distortion vs
Closed-Loop Gain
Total Harmonic Distortion vs
High Frequency Voltage Noise
vs Frequency
Frequency and Load Resistance
10
1.0
0.1
0.1
0.1
0.01
V
= 20V
P-P
A
= +1000
L
O
V
f = 1kHz
R
= 2k
NON-INVERTING
GAIN
V
= ±15V
= 25°C
= 10k
S
A
A
= +1000
= 600Ω
V
L
T
R
R
L
0.01
A
= –1000
= 2k
V
L
R
INVERTING
GAIN
0.001
0.0001
A
= +1000
= 600Ω
V
L
R
V
V
= 20V
P-P
= ±15V
= 25°C
O
S
A
MEASURED
EXTRAPOLATED
T
0.001
10k
100k
FREQUENCY (Hz)
1M
1
10
FREQUENCY (kHz)
100
10
100
1k
10k 100k
CLOSED LOOP GAIN
LT1028/1128 • TPC42
LT1028/1128 • TPC40
LT1028/1128 • TPC41
LT1128
Total Harmonic Distortion vs
Frequency and Load Resistance
LT1128
Total Harmonic Distortion vs
Closed-Loop Gain
1.0
0.1
0.1
0.01
V
= 20V
P-P
O
NON-INVERTING
GAIN
f = 1kHz
V
T
= ±15V
A
= +1000
= 600Ω
S
V
L
= 25°C
R
A
A
= +1000
L
V
R
R
= 10k
L
= 2k
A
= –1000
= 2k
V
L
R
INVERTING
GAIN
A
= +1000
= 600Ω
V
L
0.01
0.001
0.001
R
V
V
= 20V
P-P
O
S
A
MEASURED
= ±15V
= 25°C
EXTRAPOLATED
T
0.0001
1.0
10
FREQUENCY (kHz)
100
10
100
1k
10k
100k
CLOSED LOOP GAIN
LT1028/1128 • TPC43
LT1028/1128 • TPC44
9
LT1028/LT1128
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A
S
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– OISE
Voltage Noise vs Current Noise
largest term, as in the example above, and the LT1028/
LT1128’s voltage noise becomes negligible. As Req is
further increased, current noise becomes important. At
1kHz, when Req is in excess of 20k, the current noise
componentislargerthantheresistornoise.Thetotalnoise
versus matched source resistance plot illustrates the
above calculations.
The LT1028/LT1128’s less than 1nV/√Hz voltage noise is
threetimesbetterthanthelowestvoltagenoiseheretofore
available(ontheLT1007/1037). Anecessaryconditionfor
suchlowvoltagenoiseisoperatingtheinputtransistorsat
nearly 1mA of collector currents, because voltage noise is
inversely proportional to the square root of the collector
current. Currentnoise, however, isdirectlyproportionalto
the square root of the collector current. Consequently, the
LT1028/LT1128’s current noise is significantly higher
than on most monolithic op amps.
The plot also shows that current noise is more dominant
at low frequencies, such as 10Hz. This is because resistor
noise is flat with frequency, while the 1/f corner of current
noise is typically at 250Hz. At 10Hz when Req > 1k, the
current noise term will exceed the resistor noise.
Therefore, to realize truly low noise performance it is
important to understand the interaction between voltage
noise (en), current noise (In) and resistor noise (rn).
When the source resistance is unmatched, the total noise
versus unmatched source resistance plot should be con-
sulted. Note that total noise is lower at source resistances
below 1k because the resistor noise contribution is less.
When RS > 1k total noise is not improved, however. This
is because bias current cancellation is used to reduce
input bias current. The cancellation circuitry injects two
correlated current noise components into the two inputs.
With matched source resistors the injected current noise
creates a common-mode voltage noise and gets rejected
by the amplifier. With source resistance in one input only,
the cancellation noise is added to the amplifier’s inherent
noise.
Total Noise vs Source Resistance
The total input referred noise of an op amp is given by
et = [en2 + rn2 + (InReq)2]1/2
where Req is the total equivalent source resistance at the
two inputs, and
rn = √4kTReq = 0.13√Req in nV/√Hz at 25°C
As a numerical example, consider the total noise at 1kHz
of the gain 1000 amplifier shown below.
In summary, the LT1028/LT1128 are the optimum ampli-
fiers for noise performance, provided that the source
resistance is kept low. The following table depicts which
op amp manufactured by Linear Technology should be
used to minimize noise, as the source resistance is in-
creased beyond the LT1028/LT1128’s level of usefulness.
100Ω
100Ω
100k
–
LT1028
LT1128
+
1028/1128 AI01
Best Op Amp for Lowest Total Noise vs Source Resistance
BEST OP AMP
SOURCE RESIS-
TANCE(
0 to 400
400 to 4k
4k to 40k
40k to 500k
500k to 5M
>5M
Req = 100Ω + 100Ω || 100k ≈ 200Ω
rn = 0.13√200 = 1.84nV√Hz
en = 0.85nV√Hz
AT LOW FREQ(10Hz)
WIDEBAND(1kHz)
Ω) (Note 1)
LT1028/LT1128
LT1007/1037
LT1001
LT1028/LT1128
LT1028/LT1128
LT1007/1037
LT1001
LT1012
LT1055
In = 1.0pA/√Hz
et = [0.852 + 1.842 + (1.0 × 0.2) 2]1/2 = 2.04nV/√Hz
Output noise = 1000 et = 2.04µV/√Hz
LT1012
LT1012 or LT1055
LT1055
Note 1: Source resistance is defined as matched or unmatched, e.g.,
R = 1k means: 1k at each input, or 1k at one input and zero at the other.
At very low source resistance (Req < 40Ω) voltage noise
dominates.AsReq isincreasedresistornoisebecomesthe
S
10
LT1028/LT1128
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– OISE
Measuring the typical 35nV peak-to-peak noise perfor-
mance of the LT1028/LT1128 requires special test pre-
cautions:
Noise Testing – Voltage Noise
The LT1028/LT1128's RMS voltage noise density can be
accurately measured using the Quan Tech Noise Analyzer,
Model 5173 or an equivalent noise tester. Care should be
taken,however,tosubtractthenoiseofthesourceresistor
used. Prefabricated test cards for the Model 5173 set the
device under test in a closed-loop gain of 31 with a 60Ω
source resistor and a 1.8k feedback resistor. The noise of
this resistor combination is 0.13√58 = 1.0nV/√Hz. An
LT1028/LT1128 with 0.85nV/√Hz noise will read (0.852 +
1.02)1/2 = 1.31nV/√Hz. For better resolution, the resistors
should be replaced with a 10Ω source and 300Ω feedback
resistor. Even a 10Ω resistor will show an apparent noise
which is 8% to 10% too high.
(a) The device should be warmed up for at least five
minutes. As the op amp warms up, its offset voltage
changes typically 10µV due to its chip temperature
increasing 30°C to 40°C from the moment the power
supplies are turned on. In the 10 second measure-
ment interval these temperature-induced effects can
easily exceed tens of nanovolts.
(b) For similar reasons, the device must be well shielded
from air current to eliminate the possibility of thermo-
electric effects in excess of a few nanovolts, which
would invalidate the measurements.
The 0.1Hz to 10Hz peak-to-peak noise of the LT1028/
LT1128 is measured in the test circuit shown. The fre-
quency response of this noise tester indicates that the
0.1Hz corner is defined by only one zero. The test time to
measure 0.1Hz to 10Hz noise should not exceed 10
seconds, as this time limit acts as an additional zero to
eliminate noise contributions from the frequency band
below 0.1Hz.
(c) Sudden motion in the vicinity of the device can also
“feedthrough” to increase the observed noise.
A noise-voltage density test is recommended when mea-
suring noise on a large number of units. A 10Hz noise-
voltage density measurement will correlate well with a
0.1Hz to 10Hz peak-to-peak noise reading since both
results are determined by the white noise and the location
of the 1/f corner frequency.
0.1Hz to 10Hz Peak-to-Peak Noise
Tester Frequency Response
0.1Hz to 10Hz Noise Test Circuit
100
0.1µF
90
100k
80
–
2k
70
22µF
+
100Ω
*
SCOPE
4.3k
× 1
60
+
LT1001
4.7µF
R
IN
= 1M
–
50
40
30
2.2µF
110k
100k
VOLTAGE GAIN = 50,000
* DEVICE UNDER TEST
0.1µF
24.3k
0.01
0.1
1.0
10
100
NOTE ALL CAPACITOR VALUES ARE FOR
NONPOLARIZED CAPACITORS ONLY
1028/1128 AI02
FREQUENCY (Hz)
LT1028/1128 • AI03
11
LT1028/LT1128
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S
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– OISE
Noise Testing – Current Noise
10Hz voltage noise density is sample tested on every lot.
Devices 100% tested at 10Hz are available on request for
an additional charge.
Current noise density (In) is defined by the following
formula, and can be measured in the circuit shown:
10Hz current noise is not tested on every lot but it can be
inferred from 100% testing at 1kHz. A look at the current
noise spectrum plot will substantiate this statement. The
only way 10Hz current noise can exceed the guaranteed
limits is if its 1/f corner is higher than 800Hz and/or its
whitenoiseishigh. Ifthatisthecasethenthe1kHztestwill
fail.
[e 2 – (31 × 18.4nV/√Hz)2]1/2
no
I =
n
20k × 31
1.8k
10k
10k
–
LT1028
LT1128
e
60Ω
no
Automated Tester Noise Filter
+
1028/1128 AI04
10
0
–10
–20
If the Quan Tech Model 5173 is used, the noise reading is
input-referred, therefore the result should not be divided
by 31; the resistor noise should not be multiplied by 31.
CURRENT
NOISE
VOLTAGE
NOISE
100% Noise Testing
–30
–40
–50
The 1kHz voltage and current noise is 100% tested on the
LT1028/LT1128aspartofautomatedtesting;theapproxi-
matefrequencyresponseofthefiltersisshown. Thelimits
on the automated testing are established by extensive
correlation tests on units measured with the Quan Tech
Model 5173.
100
1k
10k
100k
FREQUENCY (Hz)
LT1028/1128 • AI05
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1k
15V
General
1
2
3
8
–
The LT1028/LT1128 series devices may be inserted di-
rectly into OP-07, OP-27, OP-37, LT1007 and LT1037
sockets with or without removal of external nulling com-
ponents. In addition, the LT1028/LT1128 may be fitted to
5534 sockets with the removal of external compensation
components.
7
6
LT1028
LT1128
INPUT
OUTPUT
+
4
1028/1128 AI06
–15V
than zero creates a drift of (VOS/300)µV/°C, e.g., if VOS is
adjusted to 300µV, the change in drift will be 1µV/°C.
Offset Voltage Adjustment
The adjustment range with a 1k pot is approximately
±1.1mV.
TheinputoffsetvoltageoftheLT1028/LT1128anditsdrift
with temperature, are permanently trimmed at wafer test-
ing to a low level. However, if further adjustment of VOS is
necessary, the use of a 1k nulling potentiometer will not
degrade drift with temperature. Trimming to a value other
Offset Voltage and Drift
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
12
LT1028/LT1128
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terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leadsshouldbeclosetogetherandmaintainedatthesame
temperature.
Frequency Response
TheLT1028’sGain, PhasevsFrequencyplotindicatesthat
the device is stable in closed-loop gains greater than +2 or
–1 because phase margin is about 50° at an open-loop
gain of 6dB. In the voltage follower configuration phase
margin seems inadequate. This is indeed true when the
output is shorted to the inverting input and the noninvert-
ing input is driven from a 50Ω source impedance. How-
ever, when feedback is through a parallel R-C network
(provided CF < 68pF), the LT1028 will be stable because of
interaction between the input resistance and capacitance
and the feedback network. Larger source resistance at the
noninverting input has a similar effect. The following
voltage follower configurations are stable:
The circuit shown to measure offset voltage is also used
as the burn-in configuration for the LT1028/LT1128.
Test Circuit for Offset Voltage
and Offset Voltage Drift with Temperature
10k*
15V
2
7
–
6
LT1028
LT1128
V
O
200Ω*
3
+
4
33pF
10k*
–15V
2k
V
= 100V
O
OS
* RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
1028/1128 AI08
–
+
–
+
LT1028
LT1028
500Ω
50Ω
Unity-Gain Buffer Applications (LT1128 Only)
When RF ≤ 100Ω and the input is driven with a fast, large-
signal pulse (>1V), the output waveform will look as
shown in the pulsed operation diagram.
50Ω
1028/1128 AI09
R
F
Another configuration which requires unity-gain stability
is shown below. When CF is large enough to effectively
short the output to the input at 15MHz, oscillations can
occur. The insertion of RS2 ≥ 500Ω will prevent the
LT1028fromoscillating. WhenRS1 ≥500Ω, theadditional
noise contribution due to the presence of RS2 will be
minimal. When RS1 ≤ 100Ω, RS2 is not necessary, be-
cause RS1 represents a heavy load on the output through
theCF short.When100Ω<RS1 <500Ω,RS2 shouldmatch
RS1 . For example, RS1 = RS2 = 300Ω will be stable. The
noise increase due to RS2 is 40%.
–
+
OUTPUT
6V/µs
1028/1128 AI07
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
inputandacurrent, limitedonlybytheoutputshort-circuit
protection, will be drawn by the signal generator. With RF
≥ 500Ω, the output is capable of handling the current
requirements (IL ≤ 20mA at 10V) and the amplifier stays
in its active mode and a smooth transition will occur.
C1
As with all operational amplifiers when RF > 2k, a pole will
be created with RF and the amplifier’s input capacitance,
creating additional phase shift and reducing the phase
margin.Asmallcapacitor(20pFto50pF)inparallelwithRF
will eliminate this problem.
R1
R
S1
–
+
LT1028
R
S2
1028/1128 AI10
13
LT1028/LT1128
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tion has a high (≈70%) overshoot without the 10pF
capacitor because of additional phase shift caused by the
feedback resistor – input capacitance pole. The presence
of the 10pF capacitor cancels this pole and reduces
overshoot to 5%.
If CF is only used to cut noise bandwidth, a similar effect
can be achieved using the over-compensation terminal.
The Gain, Phase plot also shows that phase margin is
about 45° at gain of 10 (20dB). The following configura-
10pF
Over-Compensation
10k
The LT1028/LT1128 are equipped with a frequency over-
compensation terminal (pin 5). A capacitor connected
between pin 5 and the output will reduce noise bandwidth.
Details are shown on the Slew Rate, Gain-Bandwidth
Product vs Over-Compensation Capacitor plot. An addi-
tional benefit is increased capacitive load handling capa-
bility.
1.1k
–
LT1028
+
50Ω
1028/1128 AI11
U
O
TYPICAL APPLICATI
Strain Gauge Signal Conditioner with Bridge Excitation
Low Noise Voltage Regulator
28V
10
15V
+
7
121Ω
330Ω
3
5.0V
+
–
LT1021-5
LT317A
6
LT1128
10
2.3k
2
PROVIDES PRE-REG
AND CURRENT
LIMITING
4
28V
–15V
REFERENCE
OUTPUT
1k
+
–
LT1021-10
15V
7
350Ω
BRIDGE
330Ω
LT1028
2N6387
3
–
6
0V TO 10V
OUTPUT
LT1028
301k*
1000pF
20V OUTPUT
10k
ZERO
TRIM
2
+
1µF
4
30.1k*
2k
2k
–15V
15V
7
5k
GAIN
TRIM
3
2
–
49.9Ω*
*RN60C FILM RESISTORS
6
LT1028
1028/1128 TA04
+
330Ω
4
THE LT1028’s NOISE CONTRIBUTION IS NEGLIGIBLE
COMPARED TO THE BRIDGE NOISE.
–15V
1028/1128 TA05
14
LT1028/LT1128
U
O
TYPICAL APPLICATI
Paralleling Amplifiers to Reduce Voltage Noise
Phono Preamplifier
10Ω
+
1.5k
A1
787Ω
15V
0.1µF
LT1028
–
10k
2
3
7
0.33µF
–
+
7.5Ω
7.5Ω
7.5Ω
470Ω
6
OUTPUT
100pF
47k
LT1028
4.7k
+
4
1.5k
1.5k
A2
LT1028
–
+
–15V
OUTPUT
LT1028
ALL RESISTORS METAL FILM
–
MAG PHONO
INPUT
470Ω
1028/1128 TA06
+
An
LT1028
Tape Head Amplifier
–
0.1µF
499Ω
470Ω
31.6k
1. ASSUME VOLTAGE NOISE OF LT1028 AND 7.Ω5 SOURCE RESISTOR = 0.9nV/√Hz.
2. GAIN WITH n LT1028s IN PARALLEL = n× 200.
10Ω
2
3. OUTPUT NOISE =√n × 200 × 0.9nV/√Hz.
–
0.9
√n
6
OUTPUT NOISE
4. INPUT REFERRED NOISE =
=
nV√/Hz.
OUTPUT
LT1028
n × 200
3
TAPE HEAD
INPUT
5. NOISE CURRENT AT INPUT INCREASES√n TIMES.
+
2µV
√5
6. IF n = 5, GAIN = 1000, BANDWIDTH = 1MHz, RMS NOISE, DC TO 1MHz =
= 0.µ9V.
1028/1128 TA03
1028/1128 TA07
ALL RESISTORS METAL FILM
Low Noise, Wide Bandwidth Instrumentation Amplifier
Gyro Pick-Off Amplifier
–INPUT
+
300Ω
10k
LT1028
GYRO TYPICAL–
NORTHROP CORP.
GR-F5AH7-5B
–
820Ω
68pF
SINE
DRIVE
50Ω
10Ω
+
–
+
OUTPUT TO SYNC
DEMODULATOR
68pF
300Ω
LT1028
820Ω
•
OUTPUT
LT1028
–
+
–
1k
LT1028
+INPUT
10k
100Ω
GAIN = 1000, BANDWIDTH = 1MHz
INPUT REFERRED NOISE = 1.5nV/√Hz AT 1kHz
WIDEBAND NOISE –DC to 1MHz = 3µV
1028/1128 TA09
RMS
IF BW LIMITED TO DC TO 100kHz = 0.55µV
1028/1128 TA08
RMS
15
LT1028/LT1128
U
O
TYPICAL APPLICATI
Chopper-Stabilized Amplifier
Super Low Distortion Variable Sine Wave Oscillator
R1
C2
C1
0.047
15V
0.047
20Ω
2k
1N758
3
2
7
+
6
LT1052
1V
RMS
OUTPUT
20Ω
8
+
1.5kHz TO 15kHz
–
2k
1
4
f =
LT1028
(
)
2 RC
1
R2
–
0.1
0.1
WHERE R1C1 = R2C2
4.7k
0.01
15V
5.6k
2.4k
LT1004-1.2V
1N758
10pF
15V
22k
–15V
15µF
130Ω
68Ω
30k
100k
MOUNT 1N4148s
IN CLOSE PROXIMITY
1
7
–
+
10k
3
2N4338
INPUT
+
100k
8
LT1055
LT1028
OUTPUT
10k
560Ω
TRIM FOR
LOWEST
DISTORTION
2
20k
–
4
10k
–15V
<0.0018% DISTORTION AND NOISE.
MEASUREMENT LIMITED BY RESOLUTION OF
HP339A DISTORTION ANALYZER
10Ω
1028/1128 TA10
1028/1128 TA11
Low Noise Infrared Detector
5V
10Ω
+
100µF
1k
33Ω
SYNCHRONOUS
DEMODULATOR
+
100µF
10k*
10k*
5V
OPTICAL
CHOPPER
WHEEL
267Ω
5V
1000µF
2
7
3
2
7
5V
7
+
+
IR
1/4 LTC1043
6
2
6
LM301A
RADIATION
+
13
LT1028
39Ω
8
3
6
8
12
16
–
1M
DC OUT
LT1012
PHOTO-
ELECTRIC
PICK-OFF
–
1
4
10k
8
3
4
–
1
–5V
14
–5V
30pF
4
INFRA RED ASSOCIATES, INC.
HgCdTe IR DETECTOR
13Ω AT 77°K
–5V
10Ω
1028/1128 TA12
16
LT1028/LT1128
W
W
SCHE ATIC DIAGRA
NULL
8
+
V
7
R5
130Ω
R6
130Ω
NULL
1
Q4
1.1mA
2.3mA
400µA
R2
3k
R1
3k
C1
257pF
500µA
R10
400Ω
R11
400Ω
Q17
Q16
Q19
Q18
R10
500Ω
900µA
900µA
C2
Q26
Q6
Q5
1
3
3
1
Q11
R11
100Ω
Q22
NON-
INVERTING
INPUT
Q9
Q8
Q7
C3
250pF
4.5µA
3
Q10
4.5µA
OUTPUT
Q24
6
4.5µA
4.5µA
Q25
Q2
Q1
1.5µA
Q12
C4
35pF
R12
240Ω
Q13
Q14
Q27
1.5µA
INTERVING
INPUT
0
2
1.8mA
300µA
Q3
Q15
Q23
BIAS
Q21
R8
480Ω
600µA
R7
80Ω
Q20
–
V
4
OVER-
COMP
5
1028/1128 TA13
C2 = 50pF for LT1028
C2 = 275pF for LT1128
17
LT1028/LT1128
U
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
PACKAGE DESCRIPTIO
0.405
8-Lead Ceramic DIP
(10.287)
MAX
0.005
(0.127)
MIN
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
6
5
4
8
7
0.015 – 0.060
(0.381 – 1.524)
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
0.008 – 0.018
0° – 15°
(0.203 – 0.460)
1
2
3
0.055
(1.397)
MAX
0.038 – 0.068
(0.965 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
MIN
0.100 ± 0.010
0.014 – 0.026
(2.540 ± 0.254)
(0.360 – 0.660)
TJMAX
θJA
165°C 100°C/W
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.320
(7.620 – 8.128)
0.045 – 0.065
(1.143 – 1.651)
8
7
6
5
4
0.065
(1.651)
TYP
0.250 ± 0.010
(6.350 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
+0.025
–0.015
1
2
3
0.045 ± 0.015
(1.143 ± 0.381)
0.325
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
TJMAX
θJA
130°C 130°C/W
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.228 – 0.244
0.150 – 0.157
0.016 – 0.050
0.406 – 1.270
(5.791 – 6.197)
(3.810 – 3.988)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
0°– 8° TYP
TJMAX
θJA
1
2
3
4
135°C 140°C/W
18
LT1028/LT1128
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
S Package
16-Lead Plastic SOL
0.398 – 0.413
(10.109 – 10.490)
0.291 – 0.299
(7.391 – 7.595)
15 14
12
10
9
16
13
11
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.005
(0.127)
RAD MIN
0.010 – 0.029
× 45°
(0.254 – 0.737)
0° – 8° TYP
0.394 – 0.419
(10.007 – 10.643)SOL16
SEE NOTE
0.050
(1.270)
TYP
0.004 – 0.012
(0.102 – 0.305)
0.009 – 0.013
(0.229 – 0.330)
SEE NOTE
0.014 – 0.019
0.016 – 0.050
(0.406 – 1.270)
(0.356 – 0.482)
TYP
NOTE:
PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
2
3
5
7
8
1
4
6
TJMAX
θJA
140°C 130°C/W
H Package
8-Lead TO-5 Metal Can
0.335 – 0.370
(8.509 – 9.398)
DIA
0.305 – 0.335
(7.747 – 8.509)
0.027 – 0.045
(0.686 – 1.143)
0.040
(1.016)
MAX
45°TYP
0.050
(1.270)
MAX
0.027 – 0.034
0.165 – 0.185
(4.191 – 4.699)
(0.686 – 0.864)
1
5
8
2
0.200 – 0.230
REFERENCE
PLANE
3
7
6
SEATING
PLANE
(5.080 – 5.842)
GAUGE
PLANE
0.500 – 0.750
(12.70 – 19.05)
BSC
4
0.010 – 0.045
(0.254 – 1.143)
0.110 – 0.160
0.016 – 0.021
(2.794 – 4.064)
INSULATING
STANDOFF
(0.406 – 0.533)
TYP
TJMAX
θJA
θJC
NOTE: LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE.
175°C 140°C/W 40°C/W
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1028/LT1128
U.S. Area Sales Offices
NORTHEAST REGION
Linear Technology Corporation
One Oxford Valley
CENTRAL REGION
Linear Technology Corporation
Chesapeake Square
NORTHWEST REGION
Linear Technology Corporation
782 Sycamore Dr.
2300 E. Lincoln Hwy.,Suite 306
Langhorne, PA 19047
Phone: (215) 757-8578
FAX: (215) 757-5631
229 Mitchell Court, Suite A-25
Addison, IL 60101
Phone: (708) 620-6910
FAX: (708) 620-6977
Milpitas, CA 95035
Phone: (408) 428-2050
FAX: (408) 432-6331
SOUTHEAST REGION
Linear Technology Corporation
17060 Dallas Parkway
Suite 208
SOUTHWEST REGION
Linear Technology Corporation
22141 Ventura Blvd.
Suite 206
Dallas, TX 75248
Phone: (214) 733-3071
FAX: (214) 380-5138
Woodland Hills, CA 91364
Phone: (818) 703-0835
FAX: (818) 703-0517
International Sales Offices
FRANCE
KOREA
TAIWAN
Linear Technology S.A.R.L.
Immeuble "Le Quartz"
58 Chemin de la Justice
92290 Chatenay Mallabry
France
Linear Technology Korea Branch
Namsong Building, #505
Itaewon-Dong 260-199
Yongsan-Ku, Seoul
Korea
Linear Technology Corporation
Rm. 801, No. 46, Sec. 2
Chung Shan N. Rd.
Taipei, Taiwan, R.O.C.
Phone: 886-2-521-7575
FAX: 886-2-562-2285
Phone: 33-1-46316161
FAX: 33-1-46314613
Phone: 82-2-792-1617
FAX: 82-2-792-1619
GERMANY
SINGAPORE
UNITED KINGDOM
Linear Techonolgy GMBH
Untere Hauptstr. 9
D-8057 Eching
Linear Technology Pte. Ltd.
101 Boon Keng Road
#02-15 Kallang Ind. Estates
Singapore 1233
Linear Technology (UK) Ltd.
The Coliseum, Riverside Way
Camberley, Surrey GU15 3YL
United Kingdom
Germany
Phone: 49-89-3197410
FAX: 49-89-3194821
Phone: 65-293-5322
FAX: 65-292-0398
Phone: 44-276-677676
FAX: 44-276-64851
JAPAN
Linear Technology KK
4F Ichihashi Building
1-8-4 Kudankita Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
07/10/92
LT/GP 0792 10K REV 0
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
20
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1992
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