LT1056S8#PBF_技术文档

LT1055/LT1056

Precision, High Speed,

JFET Input Operational Amplifiers

FEATURES

DESCRIPTION

The LT^®1055/LT1056 JFET input operational amplifiers

combine precision specifications with high speed per-

formance.

n

Guaranteed Offset Voltage: 150µV Max

–55°C to 125°C: 500µV Max

n

Guaranteed Drift: 4µV/°C Max

n

Guaranteed Bias Current

For the first time, 16V/µs slew rate and 6.5MHz gain

bandwidthproductaresimultaneouslyachievedwithoffset

voltage of typically 50µV, 1.2µV/°C drift, bias currents of

40pA at 70°C and 500pA at 125°C.

70°C: 150pA Max

125°C: 2.5nA Max

n

Guaranteed Slew Rate: 12V/µs Min

n

Available in 8-Pin PDIP and SO Packages

The 150µV maximum offset voltage specification is the

best available on any JFET input operational amplifier.

APPLICATIONS

TheLT1055andLT1056aredifferentiatedbytheiroperating

currents. The lower power dissipation LT1055 achieves

lower bias and offset currents and offset voltage. The ad-

ditional power dissipation of the LT1056 permits higher

slew rate, bandwidth and faster settling time with a slight

sacrifice in DC performance.

n

Precision, High Speed Instrumentation

n

Logarithmic Ampliﬁers

n

D/A Output Ampliﬁers

Photodiode Ampliﬁers

n

Voltage-to-Frequency Converters

n

Frequency-to-Voltage Converters

The voltage-to-frequency converter shown below is one

of the many applications which utilize both the precision

and high speed of the LT1055/LT1056.

n

Fast, Precision Sample-and-Hold

For a JFET input op amp with 23V/µs guaranteed slew

rate, refer to the LT1022 data sheet.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

TYPICAL APPLICATION

Distribution of Input Offset Voltage

1Hz to 10kHz Voltage-to-Frequency Converter

(H Package)

4.7k

3M

140

120

15V

V

=

15V

50% TO 60µV

S

A

T

= 25°C

0.001 (POLYSTYRENE)

634 UNITS TESTED

FROM THREE RUNS

10kHz

TRIM

5k

100

OUTPUT

15V

2

75k

1Hz TO 10kHz

0.005%

0V TO 10V

INPUT

–

7

80

60

40

20

1.5k

6

LINEARITY

LT1056

0.1µF

22k

3

4

+

–15V

33pF

LM329

3.3M

0.1µF

2N3906

= 1N4148

0

–200

0

200

400

–400

*1% FILM

THE LOW OFFSET VOLTAGE OF LT1056

CONTRIBUTES ONLY 0.1Hz OF ERROR

WHILE ITS HIGH SLEW RATE PERMITS

10kHz OPERATION.

–15V

INPUT OFFSET VOLTAGE (µV)

LT1055/56 TA02

LT1055/56 TA01

10556fd

1

For more information www.linear.com/LT1055

LT1055/LT1056

ABSOLUTE MAXIMUM RATINGS ^{(Note 1)}

Supply Voltage ....................................................... 20V

Differential Input Voltage ........................................ 40V

Input Voltage .......................................................... 20V

Output Short-Circuit Duration.......................... Indefinite

Operating Temperature Range

LT1055AC/LT1055C/LT1056AC/

LT1056C .................................................. 0°C to 70°C

Storage Temperature Range

All Devices......................................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec)...................300°C

LT1055AM/LT1055M/LT1056AM/

LT1056M (OBSOLETE) ...................... –55°C to 125°C

PIN CONFIGURATION

TOP VIEW

BAL

–IN

+IN

1

2

3

4

N/C

8

7

6

5

BAL

–IN

+IN

1

2

3

4

8

7

6

5

N/C

+

V

OUT

BAL

OUT

BAL

–

V

N8 PACKAGE

8-LEAD PDIP

= 150°C, θ = 130°C/W

JA

S8 PACKAGE

8-LEAD PLASTIC SO

= 150°C, θ = 130°C/W

T

JMAX

T

JMAX

JA

TOP VIEW

NC

8

+

V

6

BALANCE

1

3

7

5

2

–IN

OUT

BALANCE

+IN

4

–

V

H PACKAGE

8-LEAD TO-5 METAL CAN

= 150°C, θ = 150°C/W, θ = 45°C/W

T

JMAX

JA

JC

OBSOLETE PACKAGE

Consider the N8 for Alternate Source

10556fd

2

For more information www.linear.com/LT1055

LT1055/LT1056

ORDER INFORMATION

LEAD FREE FINISH

LT1055CN8#PBF

LT1056CN8#PBF

LT1055S8#PBF

LT1056S8#PBF

TAPE AND REEL

PART MARKING

LT1055CN8

LT1056CN8

1055

PACKAGE DESCRIPTION

8-Lead PDIP

TEMPERATURE RANGE

0°C to 70°C

LT1055CN8#TRPBF

LT1056CN8#TRPBF

LT1055S8#TRPBF

LT1056S8#TRPBF

8-Lead PDIP

0°C to 70°C

8-Lead Plastic SO

0°C to 70°C

1056

0°C to 70°C

OBSOLETE PACKAGE

LT1055ACH#PBF

LT1055CH#PBF

LT1055AMH#PBF

LT1055MH#PBF

LT1056ACH#PBF

LT1056CH#PBF

LT1056AMH#PBF

LT1056MH#PBF

LT1055ACH#TRPBF

LT1055CH#TRPBF

LT1055AMH#TRPBF

LT1055MH#TRPBF

LT1056ACH#TRPBF

LT1056CH#TRPBF

LT1056AMH#TRPBF

LT1056MH#TRPBF

LT1055ACH

LT1055CH

LT1055AMH

LT1055MH

LT1056ACH

LT1056CH

LT1056AMH

LT1056MH

8-Lead TO-5 Metal Can

0°C to 70°C

–55°C to 125°C

0°C to 70°C

–55°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Consult LTC Marketing for information on nonstandard lead based finish parts.

For more information on lead free part markings, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^T_A^{= 25°C. V}_S⁼15Vꢀ V_CM= 0V unless otherwise noted.

LT1055M/LT1056M

LT1055CH/LT1056CH

LT1055CN8/LT1056CN8

LT1055AM/LT1056AM

LT1055AC/LT1056AC

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

V

Input Offset Voltage (Note 2)

LT1055 H Package

LT1056 H Package

LT1055 N8 Package

LT1056 N8 Package

50

150

180

70

120

140

400

450

700

800

µV

OS

I

Input Offset Current

Input Bias Current

Fully Warmed Up

2

10

2

20

pA

OS

Fully Warmed Up

10

30

50

130

10

30

50

150

pA

B

V

= 10V

CM

12

Input Resistance:Differential

10

Ω

12

Common Mode

0.1Hz to 10Hz

V

= –11V to 8V

= 8V to 11V

CM

11

Input Capacitance

Input Noise Voltage

4

pF

e

LT1055

LT1056

1.8

2.5

2.0

2.8

µV

n

P-P

Input Noise Voltage Density

f = 10Hz (Note 3)

f = 1kHz (Note 4)

O

28

14

50

20

30

15

60

22

nV/√Hz

O

I

Input Noise Current Density

Large-Signal Voltage Gain

f = 10Hz, 1kHz (Note 5)

1.8

4

1.8

4

fA/√Hz

n

O

A

V = 10V

R = 2k

R = 1k

150

130

400

300

120

100

400

300

V/mV

VOL

O

L

Input Voltage Range

11

86

90

12

100

106

13.2

11

83

88

12

98

V

dB

CMRR

PSRR

Common Mode Rejection Ratio

Power Supply Rejection Ratio

Output Voltage Swing

V

= 11V

CM

V = 10V to 18V

104

13.2

S

V

R = 2k

V

OUT

L

10556fd

3

For more information www.linear.com/LT1055

LT1055/LT1056

ELECTRICAL CHARACTERISTICS ^T_A^{= 25°C. V}_S⁼15Vꢀ V_CM= 0V unless otherwise noted.t

LT1055M/LT1056M

LT1055CH/LT1056CH

LT1055CN8/LT1056CN8

LT1055AM/LT1056AM

LT1055AC/LT1056AC

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

SR

Slew Rate

LT1055

LT1056

10

12

13

16

7.5

9.0

12

14

V/µs

GBW

Gain Bandwidth Product

Supply Current

f = 1MHz

LT1055

LT1056

5.0

6.5

4.5

5.5

MHz

I

LT1055

LT1056

2.8

5.0

4.0

6.5

2.8

5.0

4.0

7.0

mA

S

Offset Voltage Adjustment Range R

= 100k

5

mV

POT

The l denotes the specifications which apply over the temperature range 0°C ≤ T_A≤ 70°C. V_S= 15Vꢀ V_CM= 0V unless otherwise noted.

LT1055AC

LT1056AC

LT1055CH/LT1056CH

LT1055CN8/LT1056CN8

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

l

V

Input Offset Voltage (Note 2)

LT1055 H Package

LT1056 H Package

LT1055 N8 Package

LT1056 N8 Package

100

330

360

140

250

280

750

800

1250

1350

µV

OS

l

Average Temperature

Coefficient of Input Offset

Voltage

H Package (Note 6)

N8 Package (Note 6)

1.2

4.0

1.6

3.0

8.0

12.0

µV/°C

l

I

Input Offset Current

Warmed Up

T = 70°C

A

LT1055

LT1056

10

14

50

70

16

18

80

100

pA

OS

l

Input Bias Current

Warmed Up

T = 70°C

A

LT1055

LT1056

30

40

150

80

40

50

200

240

pA

B

l

A

Large-Signal Voltage Gain

Common Mode Rejection Ratio

Power Supply Rejection Ratio

Output Voltage Swing

V = 10V, R = 2k

80

85

89

12

250

100

105

13.1

60

82

87

12

250

98

V/mV

dB

VOL

O

L

CMRR

PSRR

V

= 10.5V

CM

V = 10V to 18V

S

103

13.1

dB

V

R = 2k

L

V

OUT

The ^ldenotes the specifications which apply over the temperature range –55°C ≤ T_A≤ 125°C. V_S= 15Vꢀ V_CM= 0Vꢀ unless otherwise noted.

LT1055AM

LT1056AM

LT1055M

LT1056M

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

l

V

Input Offset Voltage (Note 2)

LT1055

LT1056

180

500

550

250

1200

1250

µV

OS

l

Average Temperature

Coefficient of Input Offset

Voltage

(Note 6)

1.3

4.0

1.8

8.0

µV/°C

l

I

Input Offset Current

Warmed Up

T = 125°C

A

LT1055

LT1056

0.20

0.25

1.2

1.5

0.25

0.30

1.8

2.4

nA

OS

l

Input Bias Current

Warmed Up

T = 125°C

A

LT1055

LT1056

0.4

0.5

2.5

3.0

0.5

0.6

4.0

5.0

nA

B

l

A

Large-Signal Voltage Gain

Common Mode Rejection Ratio

Power Supply Rejection Ratio

Output Voltage Swing

V = 10V, R = 2k

40

85

88

12

120

100

104

12.9

35

82

86

12

120

98

V/mV

dB

VOL

O

L

CMRR

PSRR

V

= 10.5V

CM

V = 10V to 17V

S

102

12.9

dB

V

R = 2k

L

V

OUT

10556fd

4

For more information www.linear.com/LT1055

LT1055/LT1056

ELECTRICAL CHARACTERISTICS ^T_A^{= 25°C. V}_S⁼15Vꢀ V_CM= 0V unless otherwise noted.

LT1055CS8/LT1056CS8

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

500

5

MAX

1500

30

UNITS

µV

V

Input Offset Voltage (Note 2)

Input Offset Current

OS

I

Fully Warmed Up

pA

OS

Input Bias Current

30

100

150

pA

B

V

= 10V

CM

Input Resistance Differential

0.4

0.05

TΩ

Common Mode

V

CM

V

CM

= –11V to 8V

= 8V to 11V

Input Capacitance

Input Noise Voltage

4

pF

e

0.1Hz to 10Hz

f = 10Hz (Note 4)

LT1055

LT1056

2.5

3.5

µV

n

P-P

Input Noise Voltage Density

35

15

70

22

nV/√Hz

O

f = 1kHz (Note 4)

O

i

Input Noise Current Density

Large-Signal Voltage Gain

f = 10Hz, 1kHz (Note 5)

2.5

10

fA/√Hz

n

O

A

V = 10V

R = 2k

R = 1k

120

100

400

300

V/mV

VOL

O

L

Input Voltage Range

11

83

88

12

98

V

dB

V

CMRR

PSRR

Common Mode Rejection Ratio

Power Supply Rejection Ratio

Output Voltage Swing

Slew Rate

V

= 11V

CM

V = 10V to 18V

104

13.2

S

V

R = 2K

OUT

L

SR

LT1055

LT1056

7.5

9.0

12

14

V/µs

GBW

Gain Bandwidth Product

Supply Current

f = 1MHz

LT1055

LT1056

4.5

5.5

MHz

I

LT1055

LT1056

2.8

5.0

4.0

7.0

mA

S

Offset Voltage Adjustment Range

R

= 100k

5

mV

POT

The ^ldenotes the specifications which apply over the temperature range 0°C ≤ T_A≤ 70°C. V_S= 15Vꢀ V_CM= 0V unless otherwise noted.

LT1055CS8/LT1056CS8

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

800

4

MAX

2200

15

UNITS

µV

l

V

Input Offset Voltage (Note 2)

Average Temperature Coefficient of Input Offset Voltage

Input Offset Current

OS

µV/°C

pA

I

Warmed Up, T = 70°C

18

150

400

OS

A

Input Bias Current

Warmed Up, T = 70°C

60

pA

B

A

VOL

Large-Signal Voltage Gain

V = 10V, R = 2k

60

82

87

12

250

98

V/mV

dB

O

L

CMRR

PSRR

Common Mode Rejection Ratio

Power Supply Rejection Ratio

Output Voltage Swing

V

CM

= 10.5V

V = 10V to 18V

S

103

13.1

dB

V

R = 2K

L

V

OUT

10556fd

5

For more information www.linear.com/LT1055

LT1055/LT1056

ELECTRICAL CHARACTERISTICS

For MIL-STD components, please refer to LTC883 data sheet for test

listing and parameters.

Note 3: 10Hz noise voltage density is sample tested on every lot of A

grades. Devices 100% tested at 10Hz are available on request.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: This parameter is tested on a sample basis only.

1/2

Note 5: Current noise is calculated from the formula: i = (2ql ) , where

n

B

–19

q = 1.6 • 10 coulomb. The noise of source resistors up to 1GΩ swamps

the contribution of current noise.

Note 2: Offset voltage is measured under two different conditions:

Note 6: Offset voltage drift with temperature is practically unchanged when

(a) approximately 0.5 seconds after application of power; (b) at T = 25°C

A

the offset voltage is trimmed to zero with a 100k potentiometer between

+

only, with the chip heated to approximately 38°C for the LT1055 and to

45°C for the LT1056, to account for chip temperature rise when the device

is fully warmed up.

the balance terminals and the wiper tied to V . Devices tested to tighter

drift specifications are available on request.

TYPICAL PERFORMANCE CHARACTERISTICS

Input Bias and Offset Currents

vs Temperature

Input Bias Current Over the

Common Mode Range

Distribution of Input Offset

Voltage (N8 Package)

1200

800

120

80

1000

300

100

30

160

140

120

100

80

V

T

=

15V

V

=

CM

15V

S

A

S

V = 15V

S

WARMED UP

50% YIELD

TO 140µV

= 25°C

= 0V

550 UNITS

TESTED FROM

TWO RUNS

(LT1056)

WARMED UP

T

= 125°C

T

A

BIAS OR OFFSET CURRENTS

MAY BE POSITIVE OR NEGATIVE

T

= 70°C

A

400

40

A

= 25°C

A

BIAS CURRENT

0

60

–400

–800

–1200

–40

–80

–120

T

= 70°C

A

T

= 125°C

40

A

10

B

OFFSET CURRENT

20

A = POSITIVE INPUT CURRENT

B = NEGATIVE INPUT CURRENT

3

0

–15

–5

0

5

10

15

25

AMBIENT TEMPERATURE (°C)

50

75

100

125

–10

0

200

400 600

0

–800 –600

800

–400 –200

COMMON MODE INPUT VOLTAGE (V)

INPUT OFFSET VOLTAGE (µV)

LT1055/56 G01

LT1055/56 G02

LT1055/56 G03

Distribution of Offset Voltage Drift

with Temperature (H Package)*

Long Term Drift of

Warm-Up Drift

Representative Units

100

50

40

140

120

50% TO

1.5µV/°C

V

= 15V

V

T

=

15V

S

V

T

=

15V

S

A

S

A

634 UNITS TESTED

FROM THREE RUNS

= 25°C

80

60

40

20

0

30

20

100

10

80

60

40

20

LT1056CN8

0

–10

–20

LT1055CN8

LT1056 H PACKAGE

LT1055 H PACKAGE

–30

–40

–50

0

1

2

3

4

5

10

0

1

2

3

4

5

–10

–4

2

4

6

8

–8 –6

–2

0

TIME AFTER POWER ON (MINUTES)

OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)

TIME (MONTHS)

LT1055/56 G05

LT1055/56 GO6

*DISTRIBUTION IN THE PLASTIC (N8) PACKAGE

IS SIGNIFICANTLY WIDER.

LT1055/56 G04

10556fd

6

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL PERFORMANCE CHARACTERISTICS

0.1Hz to 10Hz Noise

Noise vs Chip Temperature

Voltage Noise vs Frequency

1000

300

100

30

10

7

100

70

V

=

15V

S

A

T

= 25°C

LT1056

PEAK-TO-PEAK

NOISE

5

50

3

2

30

20

LT1056

1/f CORNER = 28HZ

f

O

= 10kHz

LT1055

f

= 1kHz

60

O

LT1055

1/f CORNER

= 20HZ

1

10

80

10

2

4

6

8

10

1

3

10

100

300 1000

0

30

10

20

30

40

50

70

TIME (SECONDS)

FREQUENCY (Hz)

CHIP TEMPERATURE (°C)

LT1055/56 GO7

LT1055/56 G09

LT1055/56 G08

LT1056 Large-Signal Response

Small-Signal Response

LT1055 Large-Signal Response

A

= 1, C = 100pf, 0.5µs/DIV

L

A

= 1, C = 100pf, 0.5µs/DIV

L

V

LT1055/56 G10

LT1055/56 G12

A

= 1, C = 100pf, 0.2µs/DIV

L

V

LT1055/56 G11

Undistorted Output Swing vs

Frequency

Slew Rateꢀ Gain Bandwidth vs

Temperature

Output Impedance vs Frequency

100

10

1

10

8

30

20

30

24

V

=

15V

S

A

V

=

15V

S

A

A = 100

V

T

= 25°C

T

= 25°C

LT1056 GBW

LT1055 GBW

LT1055

LT1056

= 10

6

18

12

6

A

V

4

2

LT1055

LT1056

LT1055

LT1056

LT1056 SLEW

LT1055 SLEW

10

0

LT1055

LT1056

= 1

A

V

O

=

15V

S

f

= 1MHz FOR GBW

0.1

0

1

10

100

1000

0.1

1

10

–25

25

75

125

FREQUENCY (kHz)

FREQUENCY (MHz)

TEMPERATURE (°C)

LT1055/56 G15

LT1055/56 G13

LT1055/56 G14

10556fd

7

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL PERFORMANCE CHARACTERISTICS

Gain vs Frequency

Gainꢀ Phase Shift vs Frequency

Voltage Gain vs Temperature

100

120

140

160

1000

140

120

100

80

V

T

=

15V

V

=

15V

10V

S

A

S

O

= 25°C

20

10

R = 2k

L

PHASE

300

100

LT1056

LT1055

R

= 1k

L

60

GAIN

LT1056

LT1055

40

LT1056

LT1055

0

20

30

10

0

V

=

15V

S

A

T

= 25°C

–20

–10

10k 100k

1

10 100 1k

1M 10M 100M

–75

–25

25

125

75

4

6

1

2

8

10

TEMPERATURE (°C)

FREQUENCY (Hz)

FREQUENCY (MHz)

LT1055/56 G16

LT1055/56 G18

LT1055/56 G17

Common Mode Range vs

Temperature

LT1055 Settling Time

LT1056 Settling Time

15

14

10

5

10

5

2mV

10mV

2mV

0.5mV

13

12

11

5mV

1mV

5mV

1mV

V

=

15V

S

A

0

10

T

= 25°C

5mV 2mV

–11

–12

–13

–14

–15

–5

–10

–5

10mV

0.5mV

2

2mV

0.5mV

1mV

V

=

15V

S

A

T

= 25°C

V

= 15V

S

–10

1

2

0

3

0

3

–50

0

50

100

SETTLING TIME (µS)

TEMPERATURE (°C)

LT1055/56 G19

LT1055/56 G20

LT1055/56 G21

Common Mode and Power Supply

Rejections vs Temperature

Common Mode Rejection Ratio vs

Frequency

Power Supply Rejection Ratio vs

Frequency

120

110

120

100

80

60

40

20

0

140

120

100

80

V

=

10V Tꢀ 17V ꢁꢀR PSRR

V

T

=

15V

T

= 25°C

S

A

15V, V

=

10ꢂ5V ꢁꢀR CMRR

= 25°C

CM

POSITIVE

SUPPLY

PSRR

CMRR

NEGATIVE

SUPPLY

60

100

90

40

20

0

125

–25

25

75

10

1k

10k 100k

1M

10M

100k

FREQUENCY (Hz)

10M

100

10

100

1k

10k

1M

FREQUENCY (Hz)

TEMPERATURE (°C)

LT1055/56 G22

LT1055/56 G23

LT1055/56 G24

10556fd

8

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL PERFORMANCE CHARACTERISTICS

Supply Current vs Supply Voltage

Output Swing vs Load Resistance

Short-Circuit Current vs Time

8

6

4

2

0

50

40

15

12

9

T

= –55°C

= 25°C

A

T

= –55°C

A

30

T

= 125°C

T

= –25°C

A

T

= –55°C

20

6

A

LT1056

LT1055

10

3

T

= –125°C

A

25°C

T

= 125°C

= –55°C

A

V

=

15V

0

V

= 15V

0

S

SINKING

–10

–20

–30

–40

–50

A

–3

–6

–9

–12

–15

T

= –25°C

T

A

T

= 125°C

= 25°C

A

T

= 125°C

A

T

A

= –125°C

A

T

= –55°C

0.3

A

T

= –55°C

2

A

10

15

0

20

5

0

1

3

0.1

1

3

10

LOAD RESISTANCE (kΩ)

TIME FROM OUTPUT SHORT TO GROUND

(MINUTES)

SUPPLY VOLTAGE (V)

LT1055/56 G26

LT1055/56 G25

LT1055/56 G27

APPLICATIONS INFORMATION

TheLT1055/LT1056maybeinserteddirectlyintoLF155A/

LT355A, LF156A/LT356A, OP-15 and OP-16 sockets.

Offset nulling will be compatible with these devices with

the wiper of the potentiometer tied to the positive supply.

example, leakage currents in circuitry external to the op

amp can significantly degrade performance. High quality

insulation should be used (e.g. Teflon, Kel-F); cleaning of

all insulating surfaces to remove fluxes and other resi-

dues will probably be required. Surface coating may be

necessary to provide a moisture barrier in high humidity

environments.

Offset Nulling

+

V

1

R

P

Board leakage can be minimized by encircling the input

circuitry with a guard ring operated at a potential close to

thatoftheinputs:ininvertingconfigurationstheguardring

should be tied to ground, in noninverting connnections

to the inverting input at pin 2. Guarding both sides of the

2

3

5

7

–

6

LT1055

LT1056

OUT

+

4

–

V

LT1055/56 AI1

N/C

No appreciable change in offset voltage drift with tem-

perature will occur when the device is nulled with a

OFFSET

TRIM

+

V

potentiometer, R , ranging from 10k to 200k.

P

8

OUTPUT

7

The LT1055/LT1056 can also be used in LF351, LF411,

AD547, AD611, OPA-111, and TL081 sockets, provided

thatthenullingcicuitryisremoved.BecauseoftheLT1055/

LT1056’s low offset voltage, nulling will not be necessary

in most applications.

1

6

2

5

OFFSET

TRIM

4

3

–

Achieving Picoampere/Microvolt Performance

V

Inordertorealizethepicoampere-microvoltlevelaccuracy

of the LT1055/LT1056 proper care must be exercised. For

GUARD

LT1055/56 AI2

10556fd

9

For more information www.linear.com/LT1055

LT1055/LT1056

APPLICATIONS INFORMATION

printed circuit board is required. Bulk leakage reduction

depends on the guard ring width.

ing an LT1056 at 5V supplies or with a 20°C/W case-

to-ambient heat sink reduces 0.1Hz to 10Hz noise from

typically 2.5µV ( 15V, free-air) to 1.5µV . Similiarly,

P-P

The LT1055/LT1056 has the lowest offset voltage of any

JFET input op amp available today. However, the offset

voltage and its drift with time and temperature are still

not as good as on the best bipolar amplifiers because the

transconductance of FETs is considerably lower than that

of bipolar transistors. Conversely, this lower transcon-

ductanceisthemaincauseofthesignificantlyfasterspeed

performance of FET input op amps.

the noise of an LT1055 will be 1.8µV typically because

P-P

of its lower power dissipation and chip temperature.

High Speed Operation

Settlingtimeismeasuredinthetestcircuitshown.Thistest

configuration has two features which eliminate problems

common to settling time measurments: (1) probe capaci-

tance is isolated from the “false summing” node, and (2)

it does not require a “flat top” input pulse since the input

pulse is merely used to steer current through the diode

bridges. For more details, please see Application Note 10.

Offset voltage also changes somewhat with temperature

cycling. The AM grades show a typical 20µV hysteresis

(30µV on the M grades) when cycled over the –55°C to

125°C temperature range. Temperature cycling from 0°C

to 70°C hasa negligible(lessthan 10µV) hysteresis effect.

Aswithmosthighspeedamplifiers,careshouldbetakenwith

supply decoupling, lead dress and component placement.

The offset voltage and drift performance are also affected

by packaging. In the plastic N8 package the molding com-

pound is in direct contact with the chip, exerting pressure

on the surface. While NPN input transistors are largely

unaffectedbythispressure,JFETdevicematchinganddrift

are degraded. Consequently, for best DC performance, as

shown in the typical performance distribution plots, the

TO-5 H package is recommended.

When the feedback around the op amp is resistive (R ),

F

a pole will be created with R , the source resistance and

F

capacitance (R , C ), and the amplifier input capacitance

S

(C ≈ 4pF). In low closed-loop gain configurations and

IN

with R and R in the kilohm range, this pole can create

S

F

excess phase shift and even oscillation. A small capaci-

tor (C ) in parallel with R eliminates this problem. With

F

R (C + C ) = R C , the effect of the feedback pole is

S

IN

F F

Noise Performance

completely removed.

C

F

The current noise of the LT1055/LT1056 is practically

immeasurable at 1.8fA/√Hz. At 25°C it is negligible up to

R

F

1G of source resistance, R (compound to the noise of

S

R ). Even at 125°C it is negligible to 100M of R .

S

–

+

The voltage noise spectrum is characterized by a low 1/f

corner in the 20Hz to 30Hz range, significantly lower than

on other competitive JFET input op amps. Of particular

interest is the fact that with any JFET IC amplifier, the

frequency location of the 1/f corner is proportional to

the square root of the internal gate leakage currents and,

therefore, noise doubles every 20°C. Furthermore, as il-

lustrated in the noise versus chip temperature curves, the

0.1Hz to 10Hz peak-to-peak noise is a strong function of

C

IN

OUTPUT

R

C

S

LT1055/56 AI03

Phase Reversal Protection

Most industry standard JFET input op amps (e.g., LF155/

LF156, LF351, LF411, OP15/16) exhibit phase reversal at

the output when the negative common mode limit at the

input is exceeded (i.e., from –12V to –15V with 15V sup-

plies). This can cause lock-up in servo systems. As shown

below, the LT1055/LT1056 does not have this problem

due to unique phase reversal protection circuitry (Q1 on

temperature, while wideband noise (f = 1kHz) is practi-

O

cally unaffected by temperature.

Consequently, for optimum low frequency noise, chip

temperature should be minimized. For example, operat-

simplified schematic).

10556fd

10

For more information www.linear.com/LT1055

LT1055/LT1056

APPLICATIONS INFORMATION

Settling Time Test Circuit

10pF (TYPICAL)

15V

15k

+ ^10µF

10k

0.01 DISC

SOLID

TANTALUM

–

LT1055

LT1056

–15V

AUT OUTPUT

15V

4.7k

15k

+

10µF

SOLID

TANTALUM

AMPLIFIER

UNDER

TEST

0.01 DISC

10k

+

2N3866

15V

2k

50Ω

2N160

1/2

U440

PULSE GEN

INPUT

(5V MIN STEP)

15V

2W

15k

3Ω

HP5082-8210

HEWLETT

PACKARD

10µF

–15V

15V

+

50Ω

OUTPUT

TO SCOPE

0.01 DISC

SOLID

+

2k

TANTALUM

3Ω

1/2

U440

2N3866

–15V

100Ω

2N5160

15k

10µF

DC ZERO

4.7k

0.01 DISC

+

SOLID TANTALUM

= 1N4148

–15V

LT1055/56 AI04

–15V

Voltage Follower with Input Exceeding the Negative

Common Mode Range

15V

7

2

3

–

6

LT1055/56

OUTPUT

2k

INPUT

15V

SINE WAVE

+

4

–15V

LT1055/56 AI05

Output

LT1055/LT1056

Input

(LF155/LF56ꢀ LF441ꢀ OP-15/OP-16)

0.5ms/DIV

LT1055/56 AI08

LT1055/56 AI07

LT1055/56 AI06

10556fd

11

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL APPLICATIONS ^†

Exponential Voltage-to-Frequency Converter for Music Synthesizers

INPUT

0V TO 10V

EXPONENT

11.3k*

TRIM

500pF

2N3906

2500Ω*

POLYSTYRENE

15V

5

2N3904

2

6

4

7

–

500Ω*

6

LT1055

3.57k*

ZERO TRIM

500k

3

+

SAWTOOTH

OUTPUT

–15V

1.1k

4.7k

1k*

562Ω*

15V

LM329

4.7k

15V

10k*

1k*

15V

7

2

–

+

9

3k

6

8

LM301A

13

14

8

3

7

1N148

1

4

2

33Ω

3

15

0.01µF

2.2k

SCALE FACTOR

–15V

TEMPERATURE CONTROL LOOP

†

1V IN OCTAVE OUT

For ten additional applications utilizing the

*1% METAL FILM RESISTOR

PIN NUMBERED TRANSISTORS = CA3096 ARRAY

LT1055 and LT1056, please see the LTC1043

data sheet and Application Note 3.

LT1055/56 TA03

12-Bit Charge Balance A/D Converter

74C00

0.003µF

28k

14k

0.01µF

CLK OUTPUT (B)

15V

7

10k

2

OUTPUT

(A)

–

CLK

74C74

1N4148

Q

6

LT1055

D

Q

3

P

CL

+

4

10k

–15V

2N3904

1N4148

LM329

249k*

15V

0V TO 10V INPUT

33k

10k

15V

COUPLE

THERMALLY

15V

7

2

3

–

CIRCUIT OUTPUT

6

LT1001

f

(A)

(B)

OUT

RATIO

CLK

4

+

33k

–15V

1N4148

LT1055/56 TA04

10556fd

12

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL APPLICATIONS

Fast “No Trims” 12-Bit Multiplying CMOS DAC Amplifier

Fastꢀ 16-Bit Current Comparator

R

FEEDBACK

REFERENCE

IN

DELAY = 250ns

* = 1% FILM RESISTOR

15V

HP5082-2810

I

OUT1

TYPICAL 12-BIT

CMOS DAC

–

15V

7

OUTPUT

50k*

4.7k

LT1055

2

3

15V

–

I

OUT2

3k

2

+

6

100k*

8

LT1056

+

–

INPUT

7

4

OUTPUT

+

LT1011

4

LT1009

2.5V

3

LT1055/56 TA05

1

–15V

LT1055/56 TA06

Temperature-to-Frequency Converter

560Ω

1k*

15V

10k

2N2222

2N2907

TTL OUTPUT

0kHz TO 1kHz =

0°C TO 100°C

6.2k*

0.01µF

POLYSTYRENE

LM329

510pF

2.7k

2N2222

4.7k

2k

100°C

ADJ

500Ω

0°C ADJ

15V

10k

2

3

7

–

6

LT1055

6.2k*

820Ω*

+

4

–15V

LM134

510Ω

2V

137Ω*

*1% FILM RESISTOR

LT1055/56 TA07

10556fd

13

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL APPLICATIONS

100kHz Voltage Controlled Oscillator

15V

7

2

3

*1% FILM RESISTOR

=1N4148

–

6

X1

X2

U1

+V

CC

W

+15V

SINE OUT

2V

RMS

LT1056

FREQUENCY LINEARITY = 0.1%

FREQUENCY STABILITY = 150ppm/°C

SETTLING TIME = 1.7µs

DISTORTION = 0.25% AT 100kHz,

0.07% AT 10zHz

+

4

22.1k

4.5k

U2 AD639 Z1

0kHs TO 100kHs

–15V

1k

COM

Z2

68k

VR

Y1

Y2

GT

UP

–V

15V

50k

10Hz

FINE

DISTORTION

TRIMS

100kHz

DISTORTION

TRIM

10k

–15

DISTORTION

TRIM

2k

5k

9.09k*

68k

POLYSTYRENE

500pF

22M

–15V

FREQUENCY

TRIM

15pF

–15V

15V

10k*

2

3

0V TO 10V

INPUT

15V

7

4

–

15V

7

10k

5k*

2N4391

6

2

3

10k*

2

LT1056

–

22k

6

1k

8

LT1056

+

–

2.5k*

1k

7

HP5082-

2810

LT1011

4

+

4

–15V

3

2N4391

1

–15V

20pF

0.01µF

LM329

–15V

10k

4.7k

15V

–15V

LT1055/56 TA08

12-Bit Voltage Output D/A Converter

12-BIT CURRENT OUTPUT D/A

CONVERTER (e.g., 6012,565

OR DAC-80)

C

2

F

15V

7

–

+

6

0 TO 2

OR 4mA

LT1056

OUTPUT

0V TO 10V

3

4

C = 15pF TO 33pF

F

SETTLING TIME TO 2mV

(0.8 LSB) = 1.5µs TO 2µs

–15V

LT1055/56 TA09

10556fd

14

For more information www.linear.com/LT1055

LT1055/LT1056

SIMPLIFIED SCHEMATIC

NULL

5

+

7

V

Q8

7k

Q7

NULL

1

J5 J6

J7

7.5pF

2

3

–INPUT

+INPUT

300Ω

Q9

J1

J2

Q15

Q12

Q10

20Ω

6

Q11

OUTPUT

J3

J4

J8

Q13

Q14

Q2

Q1

Q5

8k

Q3

200Ω

Q16

50Ω

120µA*

(160)

120µA*

(160)

800µA*

(1000)

400µA*

(1100)

9pF

14k

3k

Q4

–

4

V

*CURRENTS AS SHOWN FOR LT1055. (X) = CURRENTS FOR LT1056.

LT1055/56 SCHM

10556fd

15

For more information www.linear.com/LT1055

LT1055/LT1056

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

H Package

8-Lead TO-5 Metal Can (.200 Inch PCD)

(Reference LTC DWG # 05-08-1320)

.335 – .370

(8.509 – 9.398)

DIA

.305 – .335

(7.747 – 8.509)

.040

(1.016)

MAX

.050

(1.270)

MAX

.165 – .185

(4.191 – 4.699)

REFERENCE

PLANE

SEATING

PLANE

GAUGE

PLANE

.500 – .750

(12.700 – 19.050)

.010 – .045*

(0.254 – 1.143)

.016 – .021**

(0.406 – 0.533)

.027 – .045

(0.686 – 1.143)

45°

PIN 1

.028 – .034

(0.711 – 0.864)

.200

(5.080)

TYP

.110 – .160

(2.794 – 4.064)

INSULATING

STANDOFF

*LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE

AND THE SEATING PLANE

.016 – .024

(0.406 – 0.610)

**FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS

H8(TO-5) 0.200 PCD 0204

OBSOLETE PACKAGE

10556fd

16

For more information www.linear.com/LT1055

LT1055/LT1056

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

N Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510 Rev I)

.400*

(10.160)

MAX

8

7

6

5

4

.255 ±.015*

(6.477 ±0.381)

1

2

3

.130 ±.005

.300 – .325

.045 – .065

(3.302 ±0.127)

(1.143 – 1.651)

(7.620 – 8.255)

.065

(1.651)

TYP

.008 – .015

(0.203 – 0.381)

.120

.020

(0.508)

MIN

(3.048)

MIN

+.035

.325

–.015

.018 ±.003

(0.457 ±0.076)

.100

(2.54)

BSC

+0.889

8.255

N8 REV I 0711

(

)

–0.381

NOTE:

INCHES

1. DIMENSIONS ARE

MILLIMETERS

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

10556fd

17

For more information www.linear.com/LT1055

LT1055/LT1056

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)

.189 – .197

(4.801 – 5.004)

.045 ±.005

NOTE 3

.050 BSC

7

5

8

6

.245

MIN

.160 ±.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

.030 ±.005

TYP

1

3

4

2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

× 45°

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0°– 8° TYP

.016 – .050

(0.406 – 1.270)

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

NOTE:

INCHES

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

SO8 REV G 0212

10556fd

18

For more information www.linear.com/LT1055

LT1055/LT1056

REVISION HISTORY ^{(Revision history begins at Rev D)}

REV

DATE

DESCRIPTION

PAGE NUMBER

D

08/15 Corrected application circuit.

20

10556fd

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

19

For more information www.linear.com/LT1055

LT1055/LT1056

TYPICAL APPLICATION

120V Output Precision Op Amp

125V

1µF

25ꢀA OUTPUT

HEAT SINK OUTPUT

TRANSISTORS

330Ω

510Ω

10k

2N5415

1N965

100pF

10k

2N3440

50k

1k

1M

2N2222

2

27Ω

1N4148

7

4

–

6

OUTPUT

LT1055

10k

3

INPUT

+

1N4148

2N2907

1M

2N5415

2N3440

330Ω

1N965

10k

510Ω

1µF

33pF

100k

–125V

LT1055/56 TA10

RELATED PARTS

PART NUMBER

LT1122

DESCRIPTION

COMMENTS

340ns Settling Time, GBW = 14MHz, SR = 60V/µs

e = 6nV/√Hz Max at f = 1kHz

Fast Settling JFET Op Amp

Low Noise JFET Op Amp

LT1792

n

10556fd

LT 0815 REV D • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

For more information www.linear.com/LT1055

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT1055

●

 LINEAR TECHNOLOGY CORPORATION 1994


型号：	LT1056S8#PBF
厂家：	Linear
描述：	LT1056 - Precision, High Speed, JFET Input Operational Amplifiers; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C 放大器光电二极管
文件：	总20页 (文件大小：316K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT1056S8#PBF [Linear]

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