LT1064 [Linear]
Low Noise, Fast, Quad Universal Filter Building Block; 低噪声，快速，四路通用滤波器积木
| 型号： | LT1064 |
| 厂家： | 
Linear |
| 描述： | Low Noise, Fast, Quad Universal Filter Building Block |
| 文件： | 总16页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1064
Low Noise, Fast, Quad
Universal Filter Building Block
U
FEATURES
DESCRIPTION
The LTC®1064 consists of four high speed, low noise
switched-capacitor filter building blocks. Each filter build-
ing block, together with an external clock and three to five
resistors can provide various 2nd order functions like
lowpass, highpass, bandpass and notch. The center fre-
quency of each 2nd order function can be tuned with an
external clock, or a clock and resistor ratio. For Q ≤ 5, the
center frequency range is from 0.1Hz to 100kHz. For Q ≤
3, the center frequency range can be extended to 140kHz.
Up to 8th order filters can be realized by cascading all four
2nd order sections. Any classical filter realization (such as
Butterworth,Cauer,BesselandChebyshev)canbeformed.
■
Four Filters in a 0.3-Inch Wide Package
■
One Half the Noise of the LTC1059/LTC1060/
LTC1061 Devices
■
Maximum Center Frequency: 140kHz
■
Maximum Clock Frequency: 7MHz
Clock-to-Center Frequency Ratio of 50:1 and 100:1
Simultaneously Available
Power Supplies: ±2.375V to ±8V
Low Offsets
Low Harmonic Distortion
Customized Version with Internal Resistors
■
■
■
■
■
Available
U
A customized monolithic version of the LTC1064 includ-
ing internal thin film resistors can be obtained for high
volume applications. Consult LTC Marketing for details.
APPLICATIONS
■
Anti-Aliasing Filters
Wide Frequency Range Tracking Filters
Spectral Analysis
■
The LTC1064 is manufactured using Linear Technology’s
enhanced LTCMOSTM silicon gate process.
■
■
Loop Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
LTCMOS is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATION
Clock-Tunable 8th Order Cauer Lowpass Filter with fCUTOFF up to 100kHz
13k
66.5k
R
H2
102k
Gain vs Frequency
PIN 12
22.1k
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
IN
10k
10k
0
–15
18.25k
10.7k
12.1k
17.4k
3
R
4
L2
LPB
LPC
26.7k
–30
5
SB
SC
–45
f
= 5MHz
CLK
6
–
AGND
V
RIPPLE = ±0.1dB
–8V
–60
0.1µF
LTC1064
7
+
8V
V
CLK
50/100
LPD
5MHz
8V
–75
0.1µF
10k
f
= 1MHz
8
CLK
SA
–90
RIPPLE = ±0.05dB
V
OUT
9
LPA
–105
–120
–135
41.2k
12.7k
14k
49.9K
11.5K
10
11
12
BPA
BPD
HPA/NA
INV A
HPD
1k
10k
100k
1M
(FROM
INV D
INPUT FREQUENCY (Hz)
R
, R )
H2 L2
121k
10k
1064 TA02
FOR f
CLK
= 5MHz, ADD C1 = 10pF BETWEEN PINS 4, 1
C2 = 10pF BETWEEN PINS 21, 24
WIDEBAND NOISE 140µV
RMS
1064 TA01
C3 = 27pF BETWEEN PINS 9, 12
1
LTC1064
W W U W
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) ............................. 16V
Power Dissipation............................................. 500mW
Operating Temperature Range
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
LTC1064AC/LTC1064C.................... –40°C to 85°C
LTC1064AM/LTC1064M ................ –55°C to 125°C
U
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PACKAGE/ORDER INFORMATION
TOP VIEW
ORDER PART
NUMBER
TOP VIEW
ORDER PART
NUMBER
INV B
HPB/NB
BPB
1
2
INV C
HPC/NC
BPC
24
23
22
21
INV B
HPB/NB
BPB
1
2
INV C
HPC/NC
BPC
24
23
22
21
20
19
18
17
16
15
14
13
3
3
LTC1064ACJ
LTC1064CJ
LTC1064AMJ
LTC1064MJ
LTC1064ACN
LTC1064CN
LTC1064CS
LPB
4
LPC
LPB
4
LPC
SB
5
20 SC
–
SB
5
SC
–
AGND
6
V
19
18
17
16
15
14
13
AGND
6
V
+
+
V
7
CLK
V
7
CLK
SA
LPA
8
50/100
LPD
BPD
HPD
INV D
SA
LPA
8
50/100
LPD
9
9
BPA
10
11
12
BPA
10
11
12
BPD
HPA/NA
INV A
HPA/NA
INV A
HPD
INV D
SW PACKAGE
24-LEAD PLASTIC SO
J PACKAGE
N PACKAGE
24-LEAD CERAMIC DIP 24-LEAD PLASTIC DIP
TJMAX = 150°C, θJA = 100°C/ W (J)
TJMAX = 100°C, θJA = 85°C/ W
T
JMAX = 110°C, θJA = 65°C/ W (N)
Consult factory for Industrial grade parts.
ELECTRICAL CHARACTERISTICS
(Internal Op Amps) TA = 25°C, unless otherwise specified.
PARAMETER
CONDITIONS
V = ±5V, R = 5k
MIN
TYP
MAX
UNITS
Operating Supply Voltage Range
Voltage Swings
±2.375
±3.2
±3.1
±8
V
V
V
±3.6
S
L
●
Output Short-Circuit Current (Source/Sink)
DC Open-Loop Gain
GBW Product
V = ±5V
3
80
7
mA
dB
MHz
V/µs
S
V = ±5V, R = 5k
S
L
V = ±5V
S
Slew Rate
V = ±5V
S
10
2
LTC1064
ELECTRICAL CHARACTERISTICS
(Complete Filter) VS = ±5V, TA = 25°C, TTL clock input level, unless otherwise specified.
PARAMETER
Center Frequency Range, f
Input Frequency Range
CONDITIONS
V = ±8V, Q ≤ 3
MIN
TYP
0.1 to 140
0 to 1
MAX
UNITS
kHz
MHz
O
S
Clock-to-Center Frequency
LTC1064
LTC1064A (Note 1)
f
= 1MHz, f = 20kHz, Pin 17 High
50 ± 0.3
%
%
CLK
O
Ratio, f /f
Sides A, B, C: Mode 1,
R1 = R3 = 5k, R2 = 5k, Q = 10,
Sides D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k
●
●
50 ± 0.8
50 ± 0.9
CLK
O
%
LTC1064
LTC1064A (Note 1)
Same as Above, Pin 17 Low, f
= 1MHz
100 ± 0.3
%
%
CLK
f = 10kHz
O
Sides A, B, C
Side D
●
●
100 ± 0.8
100 ± 0.9
Clock-to-Center Frequency
Ratio, Side-to-Side Matching LTC1064A (Note 1)
LTC1064
f
= 1MHz
0.4
%
%
CLK
●
1
Clock-to-Center Frequency
LTC1064
LTC1064A (Note 1)
f
= 4MHz, f = 80kHz, Pin 17 High
50 ± 0.6
%
%
CLK
O
Ratio, f /f (Note 2)
Sides A, B, C: Mode 1, V = ±7.5V
50 ± 1.3
CLK
O
S
R1 = R3 = 50k, R2 = 5k, Q = 5
Side D: Mode 3, R1 = R3 = 50k
R2 = R4 = 5k, f
= 4MHz
CLK
LTC1064
LTC1064 A (Note 1)
Same as Above, Pin 17 Low
= 4MHz, f = 40kHz
100 ± 0.6
%
%
f
100 ± 1.3
CLK
O
Q Accuracy
Sides A, B, C: Mode 1, Q = 10
Side D: Mode 3, f = 1MHz
●
●
±2
±3
6
8
%
%
CLK
f Temperature Coefficient
O
Mode 1, 50:1, f
< 2MHz
±1
ppm/°C
CLK
Q Temperature Coefficient
Mode 1, 100:1, f
< 2MHz
±5
±5
ppm/°C
ppm/°C
CLK
Mode 3, f
< 2MHz
CLK
DC Offset Voltage
V
OS1
V
OS2
V
OS3
(Table 1)
(Table 1)
(Table 1)
f
f
f
f
= 1MHz, 50:1 or 100:1
= 1MHz, 50:1 or 100:1
= 1MHz, 50:1 or 100:1
< 1MHz
●
●
●
2
3
3
0.2
7
12
15
45
45
mV
mV
mV
CLK
CLK
CLK
CLK
Clock Feedthrough
Maximum Clock Frequency
Power Supply Current
mV
RMS
MHz
Mode 1, Q < 5, V ≥ ±5V
S
9
23
26
mA
mA
●
The
● denotes specifications which apply over the full operating
Note 1: Contact LTC Marketing.
Note 2: Not tested, guaranteed by Design.
temperature range.
Table 1. Output DC Offsets, One 2nd Order Section
V
V
V
OSLP
PINS 4, 9, 16, 21
OSN
OSBP
MODE
PINS 2, 11, 14, 23
PINS 3, 10, 15, 22
1
1b
2
V
V
V
[(1/Q) + 1 + ] – V /Q
H
V
V
V
V
OSN
– V
OS1
OS1
OS1
OLP
OS3
OS3
OS3
OS3
OS2
[(1/Q) + 1 + (R2/R1)] – V /Q
~(V
– V )[1 + (R5/R6)]
OSN OS2
OS3
[(1 + (R2/R1) + (R2/R3) + (R2/R4) – V (R2/R3)]
V
– V
OSN OS2
OS3
× [R4/(R2 + R4)] + V [R2/(R2 + R4)]
OS2
3
V
OS2
V
V
[1 + (R4/R1) + (R4/R2) + (R4/R3)]
OS1
OS3
– V (R4/R2) – V (R4/R3)
OS2
OS3
3
LTC1064
W
BLOCK DIAGRA
HPA/NA
(11)
BPA
(10)
LPA
(9)
+
V
(7)
INV A
(12)
–
50/100 (17)
+
+
+
+
+
+
+
+
+
+
+
Σ
–
∫
∫
∫
∫
∫
∫
∫
∫
AGND
(6)
+
CLK (18)
–
BPB
(3)
LPB
(4)
HPB/NB
(2)
V
(19)
SA
(8)
INV B
(1)
–
Σ
–
+
HPC/NC
(23)
LPC
(21)
BPC
(22)
SB
(5)
+
INV C
(24)
BY TYING PIN 17 TO V , ALL SECTIONS
OPERATE WITH (f /f ) = 50:1.
–
+
CLK
O
–
Σ
–
BY TYING PIN 17 TO V , ALL SECTIONS
OPERATE WITH (f /f ) = 100:1.
CLK
O
BY TYING PIN 17 TO AGND, SECTIONS B, C
LPD
(16)
HPD
(14)
BPD
(15)
OPERATE WITH (f /f ) = 50:1 AND
CLK
O
SECTIONS A, D OPERATE AT 100:1.
SC
(20)
INV D
(13)
–
+
1064 BD
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TYPICAL PERFORMANCE CHARACTERISTICS
Mode 1, (fCLK/fO) = 50:1
Mode 1, (fCLK/fO) = 100:1
Mode 2, (fCLK/fO) = 25:1
T
= 25°C
Q = 5
T
= 25°C
T = 25°C
A
A
A
Q = 5
Q = 10
+
20
15
10
5
20
15
10
5
20
15
10
5
Q = 10
Q = 10
PIN 17 AT V
(R2/R4) = 3
V = ±5V
S
V
= ±5V
S
V
= ±7.5V
V
= ±2.5V
C
S
S
V
S
= ±2.5V
V
= ±7.5V
C
= 15pF
V
= ±5V
= 15pF
S
S
C
C
0
0
0
V
= ±2.5V
S
–5
–5
–5
T
= 25°C
T
= 25°C
A
A
V
= ±7.5V
S
Q = 5 OR 10
Q = 5 OR 10
V
= ±5V
S
1.5
1.0
0.5
0
1.5
1.0
0.5
0
1.5
1.0
0.5
0
V
S
= ±5V
V
= ±2.5V
S
V
= ±2.5V
S
V
= ±7.5V
S
V
= ±5V
V
= ±2.5V
S
S
10 20 30
40
60 70 80 90 100110 120
50
0
10
40
60 70 80 90 100110 120
0
0
10
40
60 70 80 90 100110 120
50
20 30
50
20 30
CENTER FREQUENCY (kHz)
CENTER FREQUENCY (kHz)
CENTER FREQUENCY (kHz)
1064 G01
1064 G02
1064 G03
4
LTC1064
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TYPICAL PERFORMANCE CHARACTERISTICS
Mode 2, (fCLK/fO) = 25:1
Mode 2, (fCLK/fO) = 50:1
Mode 3, (fCLK/fO) = 50:1
T
= 25°C
T
= 25°C
T
= 25°C
A
C
A
S
A
–
C
= 5pF
V
= ±7.5V
PIN 17 AT V
(R2/R4) = 3
Q = 5
20
15
10
5
20
15
10
5
20
15
10
5
+
V
= ±5V
R2 = R4
S
PIN 17 AT V
(R2/R4) = 3
V
S
= ±2.5V
V
= ±5V
S
Q = 5
Q = 10
V
S
= ±2.5V
Q = 10
Q = 5
= 22pF
Q = 2
= 39pF
V
= ±7.5V
S
C
C
V
S
= ±7.5V
C
C
0
0
0
–5
–5
–5
1.5
1.0
0.5
0
1.5
1.0
0.5
0
1.5
1.0
0.5
0
V
= ±5V
S
V
= ±5V
S
Q = 2
Q = 5
V
S
= ±7.5V
V
= ±2.5V
V
= ±2.5V
S
S
V
S
= ±7.5V
0
20
80
120140160180200
0
10
40
60 70 80 90 100110 120
0
10
40
60 70 80 90 100110 120
50
40 60
100
20 30
50
20 30
CENTER FREQUENCY (kHz)
CENTER FREQUENCY (kHz)
CENTER FREQUENCY (kHz)
1064 G04
1064 G05
1064 G06
Mode 3, (fCLK/fO) = 50:1
Wideband Noise vs Q
Mode 3, (fCLK/fO) = 100:1
240
220
200
180
160
140
120
100
80
T
= 25°C
T = 25°C
A
C = 5pF
C
ANY OUTPUT
R3 = R1
ONE SECOND ORDER
SECTION
MODE 1 OR 3
100:1 OR 50:1
A
C
C
= 15pF
20
15
10
5
20
15
10
5
R2 = R4
V
R2 = R4
Q = 10
V
= ±2.5V
S
V
= ±5V
= ±7.5V
S
S
±7.5V
±5V
Q = 2
Q = 1
V
= ±7.5V
S
±2.5V
0
0
–5
–5
V
= ±5V
S
V
= ±2.5V
S
V
S
= ±7.5V
1.5
1.0
0.5
0
1.5
1.0
0.5
0
60
V
S
= ±2.5V
V
= ±7.5V
S
40
V
S
= ±5V
20
0
0
10
40
60 70 80 90 100110 120
0
10 20 30 40 50 60 70 80 90 100110 120
CENTER FREQUENCY (kHz)
1064 G08
20 30
50
0
2
8 12 14 16 18 20 22 24
10
4
6
CENTER FREQUENCY (kHz)
Q
1064 G07
1064 G09
Harmonic Distortion, 8th Order
LP Butterworth, fC = 20kHz,
THD = 0.015% for 3VRMS Input
Power Supply Current vs
Supply Voltage
48
44
40
36
32
28
24
20
16
12
8
–55°C
25°C
125°C
4
0
1064 G11
0
2
8 12 14 16 18 20 22 24
10
POWER SUPPLY VOLTAGE (V – V )
4
6
+
–
1064 G10
5
LTC1064
U
U
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PIN FUNCTIONS
V+, V– (Pins 7, 19): Power Supplies. They should be
bypassed with a 0.1µF ceramic capacitor. Low noise,
nonswitching power supplies are recommended. The de-
vice operates with a single 5V supply and with dual
supplies. The absolute maximum operating power supply
voltage is ±8V.
AGND (Pin 6): Analog Ground. When the LTC1064 oper-
ates with dual supplies, Pin 6 should be tied to system
ground.WhentheLTC1064operateswithasinglepositive
supply, the analog ground pin should be tied to 1/2 supply
and it should be bypassed with a 1µF solid tantalum in
parallel with a 0.1µF ceramic capacitor, Figure 1. The
positive input of all the internal op amps, as well as the
common reference of all the internal switches, are inter-
nally tied to the analog ground pin. Because of this, a very
“clean” ground is recommended.
50/100 (Pin 17): By tying Pin 17 to V+, all filter sections
operate with a clock-to-center frequency ratio internally
setat50:1. WhenPin17isatmid-supplies, sectionsBand
C operate with (fCLK/fO) = 50:1 and sections A and D
operate at 100:1. When Pin 17 is shorted to the negative
supply pin, all filter sections operate with (fCLK/fO) =
100:1.
CLK (Pin 18): Clock. For ±5V supplies the logic threshold
level is 1.4V. For ±8V and 0V to 5V supplies the logic
threshold levels are 2.2V and 3V respectively. The logic
threshold levels vary ±100mV over the full military tem-
perature range. The recommended duty cycle of the input
clockis50%,althoughforclockfrequenciesbelow500kHz,
the clock “on” time can be as low as 200ns. The maximum
clock frequency for ±5V supplies is 4MHz. For ±7V
supplies and above, the maximum clock frequency is
7MHz.
1
24
2
23
22
21
20
19
18
17
16
15
14
13
+
V
LTC1064
3
4
5
5k
5k
V+/2
6
–
AGND
V
CLOCK INPUT
+
7
+
V
V
V
= 15V, TRIP VOLTAGE = 7V
= 10V, TRIP VOLTAGE = 6.4V
= 5V, TRIP VOLTAGE = 3V
+
V
CLK
50/100
+
+
1µF
8
0.1µF
9
10
11
12
TO DIGITAL
GROUND
ANALOG
GROUND
PLANE
1064 F01
NOTE: PINS 5, 8, 20, IF NOT USED, SHOULD BE CONNECTED TO PIN 6
Figure 1. Single Supply Operation
6
LTC1064
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APPLICATIONS INFORMATION
ANALOG CONSIDERATIONS
Grounding and Bypassing
Figure2showsanexampleofanidealgroundplanedesign
for a two-sided board. Of course this much ground plane
will not always be possible, but users should strive to get
as close to this as possible. Protoboards are not
recommended.
The LTC1064 should be used with separated analog and
digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Buffering the Filter Output
Pin 7 (V+) should be bypassed to the ground plane with a
0.1µF ceramic capacitor with leads as short as possible.
Pin 19 (V–) should be bypassed with a 0.1µF ceramic
capacitor. For single supply applications, V– can be tied to
the analog ground plane.
For good noise performance, V+ and V– must be free of
noise and ripple.
When driving coaxial cables and 1× scope probes, the
filter output should be buffered. This is important espe-
cially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise, distor-
tion, Q and gain measurements. When 10× probes are
used, buffering is usually not required. An inverting buffer
is recommended especially when THD tests are per-
formed. As shown in Figure 3, the buffer should be
adequately bypassed to minimize clock feedthrough.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
PIN 1 IDENT
1
24
23
22
21
20
19
18
17
16
15
14
13
V
IN
2
3
4
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLE-
SIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
5k
–7.5V
0.1µF CERAMIC
5
LTC1064
6
7.5V
7
8
CLOCK
DIGITAL
GROUND
PLANE
0.1µF
CERAMIC
9
(SINGLE POINT
GROUND)
10
11
12
ANALOG
GROUND
PLANE
NOTE: CONNECT ANALOG AND DIGITAL
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
1064 F02
Figure 2. Example Ground Plane Breadboard Technique for LTC1064
7
LTC1064
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APPLICATIONS INFORMATION
Noise
Offset Nulling
All the noise performance mentioned excludes the clock
feedthrough. Noise measurements will degrade if the
already described grounding bypassing and buffering
techniques are not practiced. The graph Wideband Noise
vs Q in the Typical Performance Characteristics section is
a very good representation of the noise performance of
this device.
Lowpass filters may have too much DC offset for some
users. A servo circuit may be used to actively null the
offsets of the LTC1064 or any LTC switched-capacitor
filter.ThecircuitshowninFigure4willnulloffsetstobetter
than300µV. Thiscircuittakessecondstosettlebecauseof
the integrator pole frequency.
+
SEPARATE V POWER SUPPLY TRACE FOR BUFFER
R12
+
FROM
R11
1µF
0.1µF
10k
FILTER OUTPUT
V
IN
R21
R31
R22
R32
10k
R1
1M
4
–
LT®318
+
V
TRACE FOR FILTER
R3
100k
+
LT1007
LT1056
TO FILTER
FIRST SUMMING
NODE
C1
19
LTC1064
LT1012
0.1µF
+
7
POSITIVE
SUPPLY
7
0.1µF
–
0.1µF
1µF
R2
1M
0.1µF
NEGATIVE
SUPPLY
C2
0.1µF
+
C1 = C2 = LOW LEAKAGE FILM
(I.E. POLYPROPYLENE)
R1 = R2 = METAL FILM 1%
1064 F04
1064 F03
Figure 3. Buffering the Output of a 4th Order Bandpass Realization
Figure 4. Servo Amplifier
W
U
ODES OF OPERATIO
PRIMARY MODES
Mode 1
R3
R2
In Mode 1, the ratio of the external clock frequency to the
center frequency of each 2nd order section is internally
fixed at 50:1 or 100:1. Figure 5 illustrates Mode 1 provid-
ing 2nd order notch, lowpass and bandpass outputs.
Mode 1 can be used to make high order Butterworth
lowpass filters; it can also be used to make low Q notches
and for cascading 2nd order bandpass functions tuned at
thesamecenterfrequencywithunitygain.Mode1isfaster
than Mode 3. Note that Mode 1 can only be implemented
with three of the four LTC1064 sections because Section
D has no externally available summing node. Section D,
however, can be internally connected in Mode 1 upon
special request.
BP
LP
N
S
R1
V
IN
–
+
–
+
Σ
∫
∫
1/4 LTC1064
AGND
R2
R1
R3
R1
R2
R1
R3
R2
f
CLK
100(50)
f
O
=
; f= f ; H
= –
; H
= –
; H = –
ON1
; Q =
n
O
OLP
OBP
1064 F05
Figure 5. Mode 1: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
8
LTC1064
W
U
ODES OF OPERATIO
Mode 3
SECONDARY MODES
Mode 1b
Mode3isthesecondoftheprimarymodes. InMode3, the
ratio of the external clock frequency to the center fre-
quencyofeach2ndordersectioncanbeadjustedabove or
below 50:1 or 100:1. Side D of the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing highpass,
bandpass and lowpass 2nd order filter functions. Mode 3
is slower than Mode 1. Mode 3 can be used to make high
order all-pole bandpass, lowpass, highpass and notch
filters.
Mode1bisderivedfromMode1.InMode1b,Figure7,two
additional resistors R5 and R6 are added to alternate the
amount of voltage fed back from the lowpass output into
the input of the SA (or SB or SC) switched-capacitor
summer. This allows the filter’s clock-to-center frequency
ratio to be adjusted beyond 50:1 or 100:1. Mode 1b
maintains the speed advantages of Mode 1.
R6
R5
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case. This was done to provide
speed without penalizing the noise performance.
R3
R2
BP
LP
N
S
R1
V
IN
–
+
–
+
Σ
∫
∫
C
C
1064 F07
1/4 LTC1064
R4
R3
R2
AGND
BP
LP
HP
S
R3
f
R6
R6
R5 + R6
CLK
f
O
=
; f= f Q =
;
n
O;
√
√
R2
100(50) R5 + R6
R1
V
IN
–
+
R2
R1
R6
R5 + R6
–
+
R2
R1
f
CLK
2
H
(f→ 0) = H
f→
= –
; H
OLP
= –
;
Σ
ON1
OBP
ON2
(
)
∫
∫
1064 F06
1/4 LTC1064
R3
H
= –
; R5 R6 ≤ 5k
1064 F07 Eq
R1
AGND
Figure 7. Mode 1b: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
R2
R4
R3 R2
R2
R1
f
CLK
MODE 3 (100:1):
MODE 3 (50:1):
f
=
; Q =
; H = –
OHP
;
O
√
√
R1
R2 R4
100
R3
R1
R4
H
= –
; H
= –
OLP
OBP
Mode 2
R2
R4
1.005
f
R2
R4
√
CLK
50
f
=
; Q =
;
O
Mode 2 is a combination of Mode 1 and Mode 3, as shown
in Figure 8. With Mode 2, the clock-to-center frequency
ratio fCLK/fO is always less than 50:1 or 100:1. The
advantage of Mode 2 is that it provides less sensitivity to
resistor tolerances than does Mode 3. As in Mode 1, Mode
2 has a notch output which depends on the clock fre-
quency and the notch frequency is therefore less than the
center frequency fO.
√
R2
R2
–
R3 16R4
R3
R1
R3
R2
R1
R4
R1
H
= –
; H
= –
OBP
; H = –
OLP
OHP
1 –
16R4
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATIONS OF THE LTC1059, LTC1060 AND LTC1061. START WITH
f , CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
O
R2
R3 =
; THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
1.005
Q
R2
R4
R2
16R4
1064 F06 Eq
+
√
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case.
Figure 6. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass and Lowpass
9
LTC1064
W
U
ODES OF OPERATIO
R2
R1
R4
R3
R2
R2
R4
f
R3
R2
R2
R4
f
CLK
50
CLK
MODE 2 (100:1):
f
=
1 +
; f
=
; Q =
1 +
; H
= –
OLP
;
O
n
√
√
R2
100
1 +
R4
R2
R1
R3
R1
R2
f
CLK
2
BP
LP
N
S
H
= –
; H (f→ 0) = –
; H
f→
= –
OBP
ON1
ON2
(
)
R1
R2
1 +
R4
R1
V
IN
–
+
R2
R1
–
R2
R4
+
1.005 1 +
f
R2
R4
f
√
CLK
50
CLK
50
Σ
f
=
1 +
; f
=
; Q =
; H
= –
;
∫
∫
MODE 2 (50:1):
O
n
OLP
√
R2
R2
R2
R4
1 +
–
R3 16R4
1064 F08
1/4 LTC1064
R3
R1
R3
R2
f
R2
R1
R1
; H
1 +
AGND
CLK
2
H
= –
; H (f→ 0) = –
=
f→
=
–
OBP
ON1
ON2
(
)
R2
R4
1 –
16R4
NOTE: THE 50:1 EQUATIONS FOR MODE 2 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 2 OPERATION OF THE LTC1059, LTC1060 AND LTC1061. START WITH
f , CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
O
R2
R3 =
; THEN CALCULATE R1 TO SET THE DESIRED GAIN.
1.005
Q
R2
R2
1 +
+
√
1064 F08Eq
R4 16R4
Figure 8. Mode 2: 2nd Order Filter Providing Notch, Bandpass and Lowpass
puts can be summed directly into the inverting input of the
next section. The topology of Mode 3a is useful for elliptic
highpass and notch filters with clock-to-cutoff frequency
ratios higher than 100:1. This is often required to extend
the allowed input signal frequency range and to avoid
premature aliasing.
Mode 3a
This is an extension of Mode 3 where the highpass and
lowpass outputs are summed through two external resis-
tors RH and RL to create a notch. This is shown in Figure
9. Mode 3a is more versatile than Mode 2 because the
notch frequency can be higher or lower than the center
frequencyofthe2ndordersection. Theexternalopampof
Figure 9 is not always required. When cascading the
sections of the LTC1064, the highpass and lowpass out-
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case.
R2
R4
f
R
R
R2
R1
R3
R1
f
CLK
H
CLK
MODE 3a (100:1):
f
=
; f
=
; H =
OHP
; HOBP =
–
–
=
;
O
n
√
√
100
100
L
R
R
R2
R1
R4
R1
R
R
R4
R1
f
G
G
CLK
2
H
H
f
= –
; H (f→ 0) =
; H
f→
;
C
C
OLP
ON1
ON2
(
)(
)
(
)
(
)(
)
H
L
R
G
R
R
R3
R2
R2
R4
G
R4
R3
R2
(f = f ) = Q
O
H
–
H
; Q =
ON
OLP
OHP
(
)
R
√
CLK
L
H
R2
R1
f
R2
R4
f
f
R
H
CLK
50
CLK
50
–
=
;
=
1 +
; f
=
; H
f→
MODE 3a (50:1):
O
n
OHP
(
)
√
√
2
R
L
R
BP
LP
R
HP
S
G
R3
R1
R3
R2
R4
1.005
R1
R4
R1
√
H
= –
; H (f = 0) =
Q =
;
–
–
–
+
V
IN
OBP
OLP
+
L
R2
–
R2
1 –
–
Σ
∫
∫
16R4
R3 16R4
NOTCH
NOTE: THE 50:1 EQUATIONS FOR MODE 3A ARE DIFFERENT FROM
+
1/4 LTC1064
THE EQUATIONS FOR MODE 3A OPERATION OF THE LTC1059,
R
H
AGND
LTC1060 AND LTC1061. START WITH f , CALCULATE R2/R4, SET R4;
O
FROM THE Q VALUE, CALCULATE R3:
R2
EXTERNAL OP AMP OR INPUT
OP AMP OF THE LTC1064,
R3 =
; THEN CALCULATE R1 TO
R2
SET THE DESIRED GAIN.
SIDE A, B, C, D
1.005 R2
1064 F09Eq
1064 F09
+
Q
R4 16R4
Figure 9. Mode 3a: 2nd Order Filter Providing Highpass, Bandpass, Lowpass and Notch
10
LTC1064
U
TYPICAL APPLICATIONS
Amplitude Response
Wideband Bandpass: Ratio of High to Low Corner Frequency Equal to 2
R14
15
0
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
f
= 7MHz
R23
R33
R43
R24
R34
R44
CLK
–15
–30
–45
–60
–75
–90
–105
3
4
LPB
LPC
V
5
OUT
SB
SC
f
= 2MHz
CLK
6
–
C1
AGND
V
–5V TO –8V
LTC1064
0.1µF
7
+
5V TO 8V
V
CLK
50/100
LPD
f
≤ 7MHz
CLK
0.1µF
8
SA
R41
R31
R21
V
S
= ±8V
9
LPA
C2
R42
R32
R22
R12
10
11
12
10k
100k
INPUT FREQUENCY (Hz)
1M
BPA
BPD
HPA/NA
INV A
HPD
1064 TA04
R11
INV D
V
IN
R13
RESISTOR VALUES:
R11 = 16k
R12 = 10k
R21 = 16k
R22 = 10k
R31 = 7.32k
R32 = 22.6k
R41 = 10k
R42 = 13.3k
R43 = 10k
R44 = 32.4k
R13 = 23.2k R23 = 13.3k R33 = 21.5k
R14 = 6.8k
R24 = 20k
R34 = 15.4k
1064 TA03
NOTE: FOR f
≥ 3MHz, USE C1 = C2 = 22pF
CLK
Amplitude Response
Quad Bandpass Filter with Center Frequency Equal to fO, 2fO, 3fO, and 4fO
10.5k
5
R12
R13
f
= 2MHz
CLK
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
V
0
–5
IN1
IN2
R22
R32
R23
R33
R43
3
–10
–15
–20
–25
–30
–35
–40
4
LPB
LPC
5
SB
SC
6
–
AGND
V
–5V TO –8V
0.1µF
LTC1064
7
+
V
CLK
50/100
LPD
f
5V TO 8V
CLK
8
SA
0.1µF
R44
R34
R24
9
LPA
R31
R21
10
11
12
0
10
20
30
40
50
BPA
BPD
INPUT FREQUENCY (kHz)
HPA/NA
INV A
HPD
1064 TA06
R11
R14
INV D
V
IN4
V
IN3
20k
17.4k
20k
20k
–
+
RESISTOR VALUES:
V
LT1056
OUT
R11 = 249k
R12 = 249k
R13 = 499k
R14 = 453k
R21 = 10k
R31 = 249k
R32 = 249k
R33 = 174k
R34 = 249k
R22 = 10k
R23 = 10k
R24 = 10k
R43 = 17.8k
R44 = 40.2k
1064 TA05
11
LTC1064
TYPICAL APPLICATIONS
U
Amplitude Response
8th Order Bandpass Filter with 2 Stopband Notches
R
L2
10
0
R
V
f
= ±5V
CLK
PIN 17 AT V
H2
S
= 1.28MHz
R
H3
+
R12
1
2
24
23
22
21
20
19
18
17
16
15
14
13
–10
–20
–30
–40
–50
–60
–70
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
R22
R32
R42
R23
R33
R43
3
4
LPB
LPC
R
L3
5
SB
SC
6
–
AGND
V
–5V TO –8V
LTC1064
0.1µF
7
+
V
CLK
50/100
LPD
1.28MHz
5V TO 8V
8
+
0.1µF
TO V
SA
R41
R31
R21
R44
R34
R24
1
5
10
20
40
100
9
LPA
INPUT FREQUENCY (kHz)
10
11
12
BPA
BPD
1064 TA08
HPA/NA
INV A
HPD
R11
V
IN
INV D
V
OUT
RESISTOR VALUES:
R11 = 46.95k
R12 = 93.93k
R21 = 10k
R22 = 10k
R23 = 16.3k
R31 = 38.25k
R32 = 81.5k
R33 = 70.3k
R34 = 39.42k
R41 = 11.81k
R42 = 14.72k =R27.46k
R43 = 10k
R44 = 10.5k
R = 6.9k
H2
R = 69.7k
H3
L2
L3
=R17.9k
R24 = 13.19k
+
–
NOTE1: THE V , V PINS SHOULD BE BYPASSED WITH A 0.1µF TO 0.22µF
CERAMIC CAPACITOR, RIGHT AT THE PINS.
NOTE 2: THE RATIOS OF ALL (R2/R4) RESISTORS SHOULD BE MATCHED
TO BETTER THAN 0.25%. THE REMAINING RESISTORS SHOULD BE
BETTER THAN 0.5% ACCURATE.
1064 TA07
C-Message Filter
Amplitude Response
R13
10
0
V
= ±5V
S
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
R22
R32
R42
R23
R33
R43
–10
–20
–30
–40
–50
–60
–70
3
4
LPB
LPC
0.1µF
5
SB
SC
R14
6
–
–5V
AGND
V
LTC1064
7
3.5795MHz
16
+
f
=
V
CLK
50/100
LPD
5V
CLK
0.1µF
R12
R41
R31
R21
8
SA
R44
R34
R24
9
LPA
10
11
12
0
1
2
3
4
5
BPA
BPD
INPUT FREQUENCY (kHz)
HPA/NA
INV A
HPD
1064 TA10
R11
V
INV D
IN
V
OUT
RESISTOR VALUES:
R11 = 88.7k
R12 = 10k
R21 = 10k
R22 = 44.8k
R23 = 48.9k
R24 = 44.8k
R31 = 35.7k
R32 = 33.2k
R33 = 63.5k
R34 = 16.5k
R41 = 88.7k
R42 = 24.9k
R43 = 25.5k
R44 = 24.9k
R13 = 15.8k
R14 = 15.8k
1064 TA09
12
LTC1064
U
TYPICAL APPLICATIONS
8th Order Chebyshev Lowpass Filter with a Passband
Amplitude Response
Ripple of 0.1dB and Cutoff Frequency up to 100kHz
R13
15
0
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
R22
R32
R42
R23
R33
R43
R14
–15
–30
–45
–60
–75
–90
–105
3
R12
4
LPB
LPC
5
SB
SC
6
–
–5V TO –8V
= 5MHz
AGND
V
0.1µF
LTC1064
7
+
V
CLK
50/100
LPD
f
5V TO 8V
CLK
5V TO 8V
R44
0.1µF
8
SA
V
f
= ±8V
CLK
S
R41
R31
R21
= 5MHz
9
LPA
PASSBAND RIPPLE = 0.1dB
R34
R24
10
11
12
BPA
BPD
10k
100k
1M
HPA/NA
INV A
HPD
INPUT FREQUENCY (Hz)
R11
V
IN
INV D
1064 TA12
V
OUT
RESISTOR VALUES:
R11 = 100.86k R21 = 16.75k
1064 TA11
R31 = 23.6k
R41 = 99.73k
R42 = 25.52k
R43 = 99.83k
R44 = 25.42k
R12 = 25.72k
R13 = 16.61k
R14 = 13.84k
R22 = 20.93k
R23 = 10.18k
R24 = 11.52k
R32 = 45.2k
R33 = 68.15k
R34 = 17.72k
FOR f
> 3MHz, ADD C2 = 10pF ACROSS R42
C3 = 10pF ACROSS R43
CLK
C4 = 10pF ACROSS R44
WIDEBAND NOISE = 170µV
RMS
8th Order Clock-Sweepable Lowpass Elliptic Antialiasing Filter
Amplitude Response
R
H1
0
R
L1
–15
–30
–45
–60
–75
–90
–105
R
H2
R
L2
R11
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
V
IN
R22
R32
R42
R21
R31
R41
3
4
LPB
LPC
5
SB
SC
6
–
–7.5V
AGND
V
LTC1064
7
0.1µF
+
V
CLK
50/100
LPD
f
≤ 2MHz
7.5V
CLK
0
10
20
30
40
FREQUENCY (kHz)
50
60
70
0.1µF
8
–7.5V
SA
R43
R44
R34
R24
9
LPA
8TH ORDER CLOCK-SWEEPABLE LOWPASS
ELLIPTIC ANTIALIASING FILTER MAINTAINS,
R33
R23
10
11
12
BPA
BPD
FOR 0.1Hz ≤ f
≤ 20kHz, A ±0.1dB MAX
CUTOFF
PASSBAND ERROR AND 72dB MIN STOPBAND
ATTENUATION AT 1.5 × f
HPA/NA
INV A
HPD
.
CUTOFF
INV D
TOTAL WIDEBAND NOISE = 150µV
,
,
RMS
V
OUT
THD = 70dB (0.03%) FOR V = 3V
R
IN
RMS
L3
f
/f
= 100:1. THIS FILTER AVAILABLE
CLK CUTOFF
R
H3
AS LTC1064-1 WITH INTERNAL THIN FILM
RESISTORS.
1064 TA14
RESISTOR VALUES:
R11 = 19.1k
R21 = 10k
R22 = 10k
R23 = 11.3k
R24 = 15.4k
R31 = 13.7k
R32 = 23.7k
R33 = 84.5k
R34 = 15.2k
R41 = 15.4k =R14k
L1
R
= 30.9k
= 76.8k
= 60.2k
H1
R42 = 10.2k =R26.7k
R
H2
L2
R43 = 10k
=R10k
R
H3
L3
R44 = 42.7k
NOTE: FOR t
>15kHz, ADD A 5pF CAPACITOR ACROSS R41 AND R43
CUTOFF
1064 TA13
13
LTC1064
U
TYPICAL APPLICATIONS
Dual 4th Order Bessel Filter with 140kHz Cutoff Frequency
Amplitude Response
R13
15
0
R12
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
V
IN1
R22
R32
R42
R23
R33
R43
–15
–30
–45
–60
–75
–90
–105
3
4
LPB
LPC
5
SB
SC
V
OUT1
–8V
0.1µF
6
–
AGND
V
LTC1064
7
+
7MHz
CLOCK
8V
V
CLK
50/100
LPD
8V
8
0.1µF
SA
V
f
= ±8V
CLK
S
V
OUT2
= 7MHz
9
LPA
R44
R34
R24
R41
R31
R21
10
11
12
10k
100k
1M
BPA
BPD
INPUT FREQUENCY (Hz)
HPA/NA
INV A
HPD
1064 TA16
R11
INV D
V
IN2
R14
RESISTOR VALUES:
R11 = 14.3k
R12 = 15.4k
R13 = 3.92k
R14 = 3.92k
R21 = 13k
R31 = 7.5k
R32 = 7.5k
R33 = 27.4k
R34 = 6.8k
R41 = 10k
R22 = 15.4k
R23 = 20k
R24 = 20k
R42 = 10k
R43 = 40k
R44 = 10k
WIDEBAND NOISE = 64µV
RMS
1064 TA15
fCLK
=
65
1
Amplitude Response
8th Order Linear Phase (Bessel) Filter with
f–3dB
R12
15
0
R11
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
V
IN1
R21
R31
R41
R22
R32
R42
–15
–30
–45
–60
–75
–90
–105
3
4
LPB
LPC
5
SB
SC
TO R13
6
–
–5V TO –8V
0.1µF
AGND
V
LTC1064
7
f
+
CLK
V
= ±8V
S
V
CLK
50/100
LPD
5V TO 8V
≤7MHz
f
= 4.5MHz
CLK
CLK
–3dB
8
0.1µF
+
SA
f
f
= 50% DUTY CYCLE
= 70kHz
TO V
V
OUT
9
LPA
R44
R34
R24
R43
R33
R23
10
11
12
10k
100k
INPUT FREQUENCY (Hz)
1M
BPA
BPD
HPA/NA
INV A
HPD
1064 TA18
R13
FROM
PIN 20
INV D
R14
RESISTOR VALUES:
R11 = 34.8k
R12 = 10.5k
R13 = 12.7k
R14 = 20k
R21 = 34.8k
R31 = 14.3k
R32 = 22.1k
R33 = 24.3k
R34 = 13.3k
R41 = 40.2k
R42 = 39.2k
R43 = 20k
R44 = 20k
R22 = 45.3k
R23 = 34.8k
R24 = 34.8k
WIDEBAND NOISE = 70µV
RMS
1064 TA17
14
LTC1064
U
TYPICAL APPLICATIONS
Amplitude Response
Dual 5th Order Chebyshev Lowpass Filter with
50kHz and 100kHz Cutoff Frequencies
15
0
PASSBAND RIPPLE = 0.2dB
R14
R13a
R13b
1
2
24
23
22
21
20
19
18
17
16
15
14
13
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
V
IN2
–15
–30
–45
–60
–75
–90
–105
R23
R33
R43
R24
R34
R44
C2
1000pF
3
4pF
4
LPB
LPC
V
C
OUT2
= 100kHz
5
SB
SC
f
2pF
6
–
–8V
AGND
V
LTC1064
7
5MHz
T L
0.1µF
+
V
CLK
50/100
LPD
8V
2
22pF
8
V
C
0.1µF
OUT1
SA
f
= 50kHz
R42
R32
R22
9
LPA
10k
50k 100k
INPUT FREQUENCY (Hz)
1M
R41
10
11
12
39pF
RESISTOR VALUES:
BPA
BPD
R31
R21
1064 TA20
HPA/NA
INV A
HPD
R11a = 4.32k
R11b = 27.4k
R12 = 10.5k
R13a = 3k
R21 = 11.8k
R31 = 29.4k
R32 = 21.5k
R33 = 29.4k
R34 = 21.6k
R41 = 10k
R11a
R11b
INV D
R22 = 20k
R23 = 11.8k
R24 = 20k
R42 = 31.6k
R43 = 10k
V
IN1
C1
1000pF
R12
R44 = 31.6k
R13b = 29.4k
R14 = 10.5k
1064 TA19
Clock-Tunable, 30kHz to 90kHz 8th Order Notch
Filter Providing Notch Depth in Excess of 60dB
R13
C2
R14
Amplitude Response
1
2
24
23
22
21
20
19
18
17
16
15
14
13
10
0
INV B
HPB/NB
BPB
INV C
HPC/NC
BPC
R23
R33
R22
R32
R42
BW
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
3
4
LPB
LPC
0.1µF
5
SB
SC
6
–
C1
AGND
V
–8V
LTC1064
7
+
8V
V
CLK
50/100
LPD
f
≤ 5MHz
CLK
C3
0.1µF
8
SA
R12
9
LPA
V
f
= ±8V
= 4MHz
S
CLK
R31
R21
R44
R34
R24
10
11
12
C1 = C2 = C3 = 15pF
BPA
BPD
THE NOTCH DEPTH FROM
5kHz TO 30kHz IS 50dB
HPA/NA
INV A
HPD
10
30
40
50
60
70
20
R11
WIDEBAND NOISE = 300µV
RMS
INV D
V
INPUT FREQUENCY (kHz)
IN1
R
L4
0.1%
R
1064 TA22
G
R
H4
0.1%
–
+
RESISTOR VALUES:
R11 = 50k
R12 = 15.4k
R13 = 10k
R14 = 9.09k
R21 = 5k
R22 = 10k
R23 = 10k
R24 = 10k
R31 = 50k
= 6R8.1k
L4
H4
LT1056
V
G
OUT
R32 = 88.7k
R33 = 100k
R34 = 63.4k
R42 = 48.7k =R10k (0.1%)
=R10k (0.1%)
R44 = 12.4k
1064 TA21
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENT
LTC1061
Triple Universal Filter Building Block
Three Filter Building Blocks in a 20-Pin Package
Low Noise, Low Power Pin-for-Pin LTC1064 Compatible
Up to 250kHz Center Frequency
LTC1164
Low Power, Quad Universal Filter Building Block
High Speed, Quad Universal Building Block
LTC1264
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1064
PACKAGE DESCRIPTION
U
Dimension in inches (millimeters) unless otherwise noted.
1.290
(32.77)
MAX
CORNER LEADS OPTION
(4 PLCS)
21
24
23
22
20
19
18
17
16
15
10
14
11
13
12
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.220 – 0.310
(5.588 – 7.874)
0.025
(0.635)
RAD TYP
0.045 – 0.068
1
2
3
4
5
6
(1.143 – 1.727)
FULL LEAD
OPTION
7
8
9
J Package
24-Lead Ceramic DIP
0.005
(0.127)
MIN
0.200
(5.080)
MAX
0.300 BSC
(0.762 BSC)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
0.125
(3.175)
MIN
0.385 ± 0.025
(9.779 ± 0.635)
0.100 ± 0.010
(2.540 ± 0.254)
0.014 – 0.026
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
J24 0695
1.265*
(32.131)
24
23
22
21
20
19
18
17
16
15
14
11
13
12
0.255 ± 0.015*
(6.477 ± 0.381)
3
4
5
6
7
8
9
10
1
2
N Package
24-Lead Plastic DIP
0.300 – 0.325
(7.620 – 8.255)
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.015
(0.381)
MIN
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.025
0.125
(3.175)
MIN
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
0.325
–0.015
+0.635
8.255
N24 0695
(
)
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.598 – 0.614
(15.190 – 15.600)
(NOTE 2)
24 23 22 21 20 19 18
16 15 14 13
17
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM
OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF
THE OPTIONS.
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH.
SW Package
24-Lead Plastic SO
INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.291 – 0.299
(7.391 – 7.595)
(NOTE 2)
2
3
5
7
8
9
10
1
4
6
11 12
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029
(0.254 – 0.737)
× 45°
0° – 8° TYP
0.050
(1.270)
TYP
0.004 – 0.012
0.009 – 0.013
(0.229 – 0.330)
(0.102 – 0.305)
NOTE 1
0.014 – 0.019
0.016 – 0.050
(0.356 – 0.482)
SW24 0695
(0.406 – 1.270)
LT/GP 0895 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1989
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
16
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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