LT1167CN8#TR [Linear]
IC INSTRUMENTATION AMPLIFIER, 80 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDIP8, 0.300 INCH, PLASTIC, DIP-8, Instrumentation Amplifier;
| 型号： | LT1167CN8#TR |
| 厂家： | 
Linear |
| 描述： | IC INSTRUMENTATION AMPLIFIER, 80 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDIP8, 0.300 INCH, PLASTIC, DIP-8, Instrumentation Amplifier 仪表放大器 放大器电路 |
| 文件： | 总20页 (文件大小：429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1167
Single Resistor Gain
Programmable, Precision
Instrumentation Amplifier
U
FEATURES
DESCRIPTION
The LT®1167 is a low power, precision instrumentation
amplifier that requires only one external resistor to set gains
of 1 to 10,000. The low voltage noise of 7.5nV/√Hz (at 1kHz)
isnotcompromisedbylowpowerdissipation(0.9mAtypical
for ±2.3V to ±15V supplies).
■
Single Gain Set Resistor: G = 1 to 10,000
■
Gain Error: G = 10, 0.08% Max
■
Gain Nonlinearity: G = 10, 10ppm Max
Input Offset Voltage: G = 10, 60µV Max
■
■
Input Offset Voltage Drift: 0.3µV/°C Max
■
■
■
■
■
■
■
■
■
Input Bias Current: 350pA Max
PSRR at G = 1: 105dB Min
CMRR at G = 1: 90dB Min
Supply Current: 1.3mA Max
Wide Supply Range: ±2.3V to ±18V
1kHz Voltage Noise: 7.5nV/√Hz
0.1Hz to 10Hz Noise: 0.28µVP-P
Available in 8-Pin PDIP and SO Packages
Meets IEC 1000-4-2 Level 4 ESD Tests with
Two External 5k Resistors
The high accuracy of 10ppm maximum nonlinearity and
0.08% max gain error (G = 10) is not degraded even for load
resistors as low as 2k (previous monolithic instrumentation
amps used 10k for their nonlinearity specifications). The
LT1167 is laser trimmed for very low input offset voltage
(40µV max), drift (0.3µV/°C), high CMRR (90dB, G = 1) and
PSRR (105dB, G = 1). Low input bias currents of 350pA max
are achieved with the use of superbeta processing. The
output can handle capacitive loads up to 1000pF in any gain
configuration while the inputs are ESD protected up to 13kV
(human body). The LT1167 with two external 5k resistors
passes the IEC 1000-4-2 level 4 specification.
U
APPLICATIONS
■
TheLT1167,offeredin8-pinPDIPandSOpackages,requires
significantly less PC board area than discrete multi op amp
andresistordesigns.TheseadvantagesmaketheLT1167the
most cost effective solution for precision instrumentation
amplifier applications.
Bridge Amplifiers
■
Strain Gauge Amplifiers
■
Thermocouple Amplifiers
■
Differential to Single-Ended Converters
Medical Instrumentation
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
Single Supply Barometer
V
S
Gain Nonlinearity
R5
LUCAS NOVA SENOR
NPC-1220-015-A-3L
V
S
392k
3
2
8
+
–
1
3
–
+
2
1
–
1
7
1/2
LT1490
4
1
2
5k
5k
LT1634CCZ-1.25
R1
4
6
825Ω
LT1167
G = 60
R6
1k
R2
12Ω
5k
2
6
5k
5
8
3
TO
4-DIGIT
DVM
+
R
SET
4
R4
50k
5
6
5
+
–
R3
50k
7
1/2
LT1490
1167 TA02
R7
50k
R8
100k
VOLTS INCHES Hg
0.2% ACCURACY AT 25°C
1.2% ACCURACY AT 0°C TO 60°C
= 8V TO 30V
OUTPUT VOLTAGE (2V/DIV)
G = 1000
= 1k
OUT
2.800
3.000
3.200
28.00
30.00
32.00
R
L
V
S
V
= ±10V
1167 TA01
1
LT1167
W W U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
ORDER PART
NUMBER
Supply Voltage ...................................................... ±20V
Differential Input Voltage (Within the
TOP VIEW
Supply Voltage) ..................................................... ±40V
Input Voltage (Equal to Supply Voltage) ................ ±20V
Input Current (Note 3) ........................................ ±20mA
Output Short-Circuit Duration .......................... Indefinite
Operating Temperature Range ................ –40°C to 85°C
Specified Temperature Range
LT1167AC/LT1167C (Note 4) .................. 0°C to 70°C
LT1167AI/LT1167I ............................. –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
LT1167ACN8
R
1
2
3
4
R
G
8
7
6
5
G
LT1167ACS8
LT1167AIN8
LT1167AIS8
LT1167CN8
LT1167CS8
LT1167IN8
LT1167IS8
–
+
–IN
+IN
+V
S
OUTPUT
REF
–V
S
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/ W (N8)
TJMAX = 150°C, θJA = 190°C/ W (S8)
S8 PART MARKING
1167
1167I
1167A
1167AI
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS VS = ±15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
LT1167C/LT1167I
LT1167AC/LT1167AI
SYMBOL PARAMETER
CONDITIONS (Note 7)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
G
Gain Range
Gain Error
G = 1 + (49.4k/R )
1
10k
1
10k
G
G = 1
0.008
0.010
0.025
0.040
0.02
0.08
0.08
0.10
0.015
0.020
0.030
0.040
0.03
0.10
0.10
0.10
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
Gain Nonlinearity (Note 5)
V
V
V
= ±10V, G = 1
= ±10V, G = 10 and 100
= ±10V, G = 1000
1
2
15
6
10
40
1.5
3
20
10
15
60
ppm
ppm
ppm
O
O
O
V
V
= ±10V, G = 1, R = 600
= ±10V, G = 10 and 100,
5
6
12
15
6
7
15
20
ppm
ppm
O
O
L
R = 600
L
V
= ±10V, G = 1000,
20
65
25
80
ppm
O
R = 600
L
V
V
V
Total Input Referred Offset Voltage
Input Offset Voltage
V
= V + V /G
OST OSI OSO
OST
OSI
G = 1000, V = ±5V to ±15V
15
40
90
50
40
20
50
60
µV
µV
pA
pA
S
Output Offset Voltage
Input Offset Current
G = 1, V = ±5V to ±15V
200
320
350
300
450
500
OSO
S
I
I
100
80
OS
Input Bias Current
B
e
Input Noise Voltage, RTI
0.1Hz to 10Hz, G = 1
0.1Hz to 10Hz, G = 10
0.1Hz to 10Hz, G = 100 and 1000
2.00
0.50
0.28
2.00
0.50
0.28
µV
µV
µV
n
P-P
P-P
P-P
2
2
Total RTI Noise =
√
e
+ (e /G)
ni no
e
e
Input Noise Voltage Density, RTI
Output Noise Voltage Density, RTI
f
f
= 1kHz
7.5
67
12
90
7.5
67
12
90
nV/√Hz
nV/√Hz
ni
O
O
= 1kHz (Note 3)
no
2
LT1167
ELECTRICAL CHARACTERISTICS
VS = ±15V, VCM = 0V, TA = 25°C, RL = 2k, unless otherwise noted.
LT1167AC/LT1167AI LT1167C/LT1167I
SYMBOL PARAMETER
CONDITIONS (Note 7)
f = 0.1Hz to 10Hz
MIN
TYP
10
MAX
MIN
TYP
10
MAX
UNITS
pA
i
Input Noise Current
Input Noise Current Density
Input Resistance
n
O
P-P
f = 10Hz
O
124
1000
1.6
124
1000
1.6
fA/√Hz
GΩ
pF
R
V
= ±10V
IN
200
200
IN
C
C
Differential Input Capacitance f = 100kHz
O
IN(DIFF)
IN(CM)
Common Mode Input
Capacitance
f = 100kHz
O
1.6
1.6
pF
V
CM
Input Voltage Range
G = 1, Other Input Grounded
V = ±2.3V to ±5V
–V + 1.9
–V + 1.9
S
+V – 1.2 –V + 1.9
+V – 1.2
+V – 1.4
S
V
V
S
S
S
S
S
V = ±5V to ±18V
S
+V – 1.4 –V + 1.9
S
S
CMRR
PSRR
Common Mode
Rejection Ratio
1k Source Imbalance,
V
= 0V to ±10V
G = 1
CM
90
95
85
95
dB
dB
dB
dB
G = 10
G = 100
G = 1000
106
120
126
115
125
140
100
110
120
115
125
140
Power Supply
Rejection Ratio
V = ±2.3 to ±18V
S
G = 1
105
125
131
135
120
135
140
150
100
120
126
130
120
135
140
150
dB
dB
dB
dB
G = 10
G = 100
G = 1000
I
Supply Current
V = ±2.3V to ±18V
S
0.9
1.3
0.9
1.3
mA
S
V
OUT
Output Voltage Swing
R = 10k
L
V = ±2.3V to ±5V
–V + 1.1
–V + 1.2
S
+V – 1.2 –V + 1.1
+V – 1.2
+V – 1.3
S
V
V
S
S
S
S
S
V = ±5V to ±18V
S
+V – 1.3 –V + 1.2
S
S
I
Output Current
Bandwidth
20
27
20
27
mA
OUT
BW
G = 1
G = 10
G = 100
G = 1000
1000
800
120
12
1000
800
120
12
kHz
kHz
kHz
kHz
SR
Slew Rate
G = 1, V
= ±10V
0.75
1.2
0.75
1.2
V/µs
OUT
Settling Time to 0.01%
10V Step
G = 1 to 100
G = 1000
14
130
14
130
µs
µs
R
Reference Input Resistance
Reference Input Current
Reference Voltage Range
Reference Gain to Output
20
50
20
50
kΩ
µA
V
REFIN
I
V
= 0V
REF
REFIN
V
A
–V + 1.6
+V – 1.6 –V + 1.6
+V – 1.6
S
REF
S
S
S
1 ± 0.0001
1 ± 0.0001
VREF
3
LT1167
ELECTRICAL CHARACTERISTICS
VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C, RL = 2k, unless otherwise noted.
LT1167AC
TYP
LT1167C
TYP
SYMBOL PARAMETER
CONDITIONS (Note 7)
MIN
MAX
MIN
MAX
UNITS
Gain Error
G = 1
●
●
●
●
0.01
0.08
0.09
0.14
0.03
0.30
0.30
0.33
0.012
0.100
0.120
0.140
0.04
0.33
0.33
0.35
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
Gain Nonlinearity
V
V
V
= ±10V, G = 1
= ±10V, G = 10 and 100
= ±10V, G = 1000
●
●
●
1.5
3
20
10
15
60
2
4
25
15
20
80
ppm
ppm
ppm
OUT
OUT
OUT
G/T
Gain vs Temperature
G < 1000 (Note 2)
= V + V /G
●
20
50
20
50
ppm/°C
V
OST
Total Input Referred
Offset Voltage
V
OST
OSI
OSO
V
V
V
V
V
V
Input Offset Voltage
V = ±5V to ±15V
●
●
18
3.0
60
60
23
3.0
70
80
µV
µV
OSI
S
Input Offset Voltage Hysteresis
Output Offset Voltage
(Notes 3, 6)
OSIH
OSO
OSOH
V = ±5V to ±15V
S
380
500
µV
Output Offset Voltage Hysteresis (Notes 3, 6)
30
30
µV
/T
Input Offset Drift (RTI)
Output Offset Drift
(Note 3)
(Note 3)
●
●
●
●
●
●
0.05
0.7
100
0.3
75
0.3
3
0.06
0.8
120
0.4
105
0.4
0.4
4
µV/°C
µV/°C
pA
OSI
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
400
550
OS
/T
pA/°C
pA
OS
450
600
B
I /T
B
Input Bias Current Drift
Input Voltage Range
0.4
pA/°C
V
CM
G = 1, Other Input Grounded
V = ±2.3V to ±5V
V = ±5V to ±18V
S
●
●
–V +2.1
–V +2.1
S
+V –1.3 –V +2.1
+V –1.3
+V –1.4
S
V
V
S
S
S
S
S
+V –1.4 –V +2.1
S
S
CMRR
PSRR
Common Mode
Rejection Ratio
1k Source Imbalance,
V
= 0V to ±10V
G = 1
CM
●
●
●
●
88
92
83
97
113
114
92
dB
dB
dB
dB
G = 10
G = 100
G = 1000
100
115
117
110
120
135
110
120
135
Power Supply Rejection Ratio
V = ±2.3V to ±18V
S
G = 1
●
●
●
●
103
123
127
129
115
130
135
145
98
115
130
135
145
dB
dB
dB
dB
G = 10
G = 100
G = 1000
118
124
126
I
Supply Current
V = ±2.3V to ±18V
S
●
1.0
1.5
1.0
1.5
mA
S
V
OUT
Output Voltage Swing
R = 10k
L
V = ±2.3V to ±5V
●
●
–V +1.4
–V +1.6
S
+V –1.3 –V +1.4
+V –1.3
+V –1.5
S
V
V
S
S
S
S
S
V = ±5V to ±18V
S
+V –1.5 –V +1.6
S
S
I
Output Current
Slew Rate
●
●
●
16
21
16
0.65
+V –1.6 –V +1.6
21
mA
V/µs
V
OUT
SR
G = 1, V
= ±10V
0.65
1.1
1.1
OUT
V
REF Voltage Range
(Note 3)
–V +1.6
S
+V –1.6
S
REF
S
S
4
LT1167
ELECTRICAL CHARACTERISTICS
VS = ±15V, VCM = 0V, –40°C ≤ TA ≤ 85°C, RL = 2k, unless otherwise noted. (Note 4)
LT1167AI
TYP
LT1167I
TYP
SYMBOL PARAMETER
CONDITIONS (Note 7)
MIN
MAX
MIN
MAX
UNITS
Gain Error
G = 1
●
●
●
●
0.014
0.130
0.140
0.160
0.04
0.40
0.40
0.40
0.015
0.140
0.150
0.180
0.05
0.42
0.42
0.45
%
%
%
%
G = 10 (Note 2)
G = 100 (Note 2)
G = 1000 (Note 2)
G
Gain Nonlinearity (Notes 2, 4)
Gain vs Temperature
V = ±10V, G = 1
●
●
●
2
5
15
20
70
3
6
20
30
ppm
ppm
ppm
N
O
V = ±10V, G = 10 and 100
O
V = ±10V, G = 1000
26
30
100
O
G/T
G < 1000 (Note 2)
●
20
50
20
50
ppm/°C
V
OST
Total Input Referred
Offset Voltage
V = V + V /G
OST OSI OSO
V
V
V
V
V
V
Input Offset Voltage
●
●
20
3.0
180
30
75
25
3.0
200
30
100
600
µV
µV
OSI
Input Offset Voltage Hysteresis
Output Offset Voltage
(Notes 3, 6)
OSIH
OSO
OSOH
500
µV
Output Offset Voltage Hysteresis (Notes 3, 6)
µV
/T
Input Offset Drift (RTI)
Output Offset Drift
(Note 3)
(Note 3)
●
●
●
●
●
●
0.05
0.8
110
0.3
180
0.5
0.3
5
0.06
1
0.4
6
µV/°C
µV/°C
pA
OSI
/T
OSO
I
I
I
Input Offset Current
Input Offset Current Drift
Input Bias Current
550
120
0.3
220
0.6
700
OS
/T
pA/°C
pA
OS
B
600
800
I /T
B
Input Bias Current Drift
Input Voltage Range
pA/°C
V
CM
V = ±2.3V to ±5V
●
●
–V + 2.1
S
+V – 1.3 –V + 2.1
+V – 1.3
V
V
S
S
S
S
S
S
V = ±5V to ±18V
–V + 2.1
+V – 1.4 –V + 2.1
+V – 1.4
S
S
S
CMRR
PSRR
Common Mode Rejection Ratio 1k Source Imbalance,
V
= 0V to ±10V
CM
G = 1
G = 10
G = 100
G = 1000
●
●
●
●
86
98
90
81
90
dB
dB
dB
dB
105
118
133
95
105
118
133
114
116
112
112
Power Supply Rejection Ratio
V = ±2.3V to ±18V
S
G = 1
●
●
●
●
100
120
125
128
112
125
132
140
95
112
125
132
140
dB
dB
dB
dB
G = 10
G = 100
G = 1000
115
120
125
I
Supply Current
●
1.1
1.6
+V – 1.3 –V + 1.4
1.1
1.6
mA
S
V
Output Voltage Swing
V = ±2.3V to ±5V
S
●
●
–V + 1.4
S
+V – 1.3
V
V
OUT
S
S
S
S
S
V = ±5V to ±18V
–V + 1.6
+V – 1.5 –V + 1.6
+V – 1.5
S
S
S
I
Output Current
Slew Rate
●
●
●
15
20
15
0.55
+V – 1.6 –V + 1.6
20
mA
V/µs
V
OUT
SR
G = 1, V
= ±10V
0.55
0.95
0.95
OUT
V
REF Voltage Range
(Note 3)
–V + 1.6
S
+V – 1.6
S
REF
S
S
The
●
denotes specifications that apply over the full specified
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 6: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but
the IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade
(0°C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.
of a device may be imparied.
Note 2: Does not include the effect of the external gain resistor R .
G
Note 3: This parameter is not 100% tested.
Note 4: The LT1167AC/LT1167C are designed, characterized and expected
to meet the industrial temperature limits, but are not tested at –40°C and
85°C. I-grade parts are guaranteed.
Note 5: This parameter is measured in a high speed automatic tester that
does not measure the thermal effects with longer time constants. The
Note 7: Typical parameters are defined as the 60% of the yield parameter
distribution.
5
LT1167
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Gain Nonlinearity, G = 100
Gain Nonlinearity, G = 1
Gain Nonlinearity, G = 10
1167 G01
1167 G02
1167 G03
OUTPUT VOLTAGE (2V/DIV)
OUTPUT VOLTAGE (2V/DIV)
OUTPUT VOLTAGE (2V/DIV)
G = 10
L = 2k
OUT = ±10V
G = 100
L = 2k
VOUT = ±10V
G = 1
L = 2k
R
R
R
V
VOUT = ±10V
Gain Error vs Temperature
Gain Nonlinearity, G = 1000
Gain Nonlinearity vs Temperature
80
0.20
0.15
V
V
= ±15V
OUT
= 2k
S
= –10V TO 10V
70
60
R
L
0.10
50
40
30
20
10
0.05
G = 1
0
–0.05
–0.10
–0.15
–0.20
V
V
= ±15V
OUT
= 2k
S
G = 10*
G = 1000
= ±10V
R
L
G = 100*
G = 1000*
1167 G04
*DOES NOT INCLUDE
OUTPUT VOLTAGE (2V/DIV)
G = 1000
RL = 2k
G = 1, 10
TEMPERATURE EFFECTS
OF R
G
G = 100
25
V
OUT = ±10V
0
–25
0
50
75 100 150
–50
–50
–25
0
25
100
50
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1167 G05
1167 G06
Distribution of Input
Offset Voltage, TA = –40°C
Distribution of Input
Offset Voltage, TA = 85°C
Distribution of Input
Offset Voltage, TA = 25°C
40
35
30
25
20
15
10
5
40
30
25
V
= ±15V
137 N8 (2 LOTS)
V
= ±15V
V = ±15V
S
G = 1000
137 N8 (2 LOTS)
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
S
S
G = 1000
165 S8 (3 LOTS)
G = 1000
165 S8 (3 LOTS)
35
30
25
20
15
10
5
302 TOTAL PARTS
302 TOTAL PARTS
20
15
10
5
0
0
0
0
0
–80 –60 –40 –20
20
40
60
–60 –40 –20
0
20
40
60
–80 –60 –40 –20
20 40
60
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
1167 G40
1167 G41
1167 G42
6
LT1167
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Distribution of Output
Offset Voltage, TA = –40°C
Distribution of Output
Offset Voltage, TA = 25°C
Distribution of Output
Offset Voltage, TA = 85°C
30
25
20
15
10
5
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
V
= ±15V
V = ±15V
S
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
V = ±15V
S
G = 1
137 N8 (2 LOTS)
165 S8 (3 LOTS)
302 TOTAL PARTS
S
G = 1
0
0
0
–400 –300 –200 –100
0
100 200 300 400
–200 –150 –100 –50
0
50 100 150 200
–400 –300 –200 –100
0
100 200 300 400
OUTPUT OFFSET VOLTAGE (µV)
OUTPUT OFFSET VOLTAGE (µV)
OUTPUT OFFSET VOLTAGE (µV)
1167 G43
1167 G44
1167 G45
Distribution of Input Offset
Voltage Drift
Distribution of Output Offset
Voltage Drift
Warm-Up Drift
30
25
20
15
10
5
40
35
30
25
20
15
10
5
14
12
V
T
= ±15V
137 N8 (2 LOTS)
V
T
= ±15V
137 N8 (2 LOTS)
S
A
V
= ±15V
S
S
A
= –40°C TO 85°C
165 S8 (3 LOTS)
= –40°C TO 85°C
165 S8 (3 LOTS)
T
= 25°C
A
G = 1000
302 TOTAL PARTS
G = 1
302 TOTAL PARTS
G = 1
S8
N8
10
8
6
4
2
0
0
0
–0.4
–0.2 –0.1
0
0.1 0.2 0.3
–0.3
–5 –4 –3 –2 –1
0
1
2
3
4
5
1
2
5
0
3
4
INPUT OFFSET VOLTAGE (µV)
OUTPUT OFFSET VOLTAGE (µV)
TIME AFTER POWER ON (MINUTES)
1167 G46
1167 G47
1167 G09
Input Bias and Offset Current
vs Temperature
Input Bias Current
Input Offset Current
500
400
50
40
30
20
10
0
50
40
30
20
10
0
V
T
= ±15V
= 25°C
270 S8
122 N8
V
T
= ±15V
= 25°C
270 S8
122 N8
V
V
= ±15V
CM
S
A
S
A
S
= 0V
392 TOTAL PARTS
392 TOTAL PARTS
300
200
I
OS
100
0
I
B
–100
–200
–300
–400
–500
125
100
–100
–60
–20
20
60
100
–100
–60
–20
20
60
100
–75 –50
50
TEMPERATURE (°C)
–25
0
25
75
INPUT BIAS CURRENT (pA)
INPUT OFFSET CURRENT (pA)
1167 G10
1167 G11
1167 G12
7
LT1167
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Negative Power Supply Rejection
Ratio vs Frequency
Common Mode Rejection Ratio
vs Frequency
Input Bias Current
vs Common Mode Input Voltage
500
400
160
140
120
100
160
140
120
100
+
V
T
= ±15V
= 25°C
V
T
= 15V
= 25°C
S
A
G = 1000
G = 100
G = 10
G = 100
G = 10
G = 1
A
1k SOURCE
IMBALANCE
300
200
G = 1000
G = 1
100
70°C
85°C
0
80
60
80
60
–100
–200
–300
–400
–500
0°C
25°C
40
20
0
40
20
0
–40°C
3
6
9
12 15
0.1
1
10
1k
10k 100k
0.1
1
10
1k
10k 100k
–15 –12 –9 –6 –3
0
100
100
COMMON MODE INPUT VOLTAGE (V)
FREQUENCY (Hz)
FREQUENCY (Hz)
1167 G13
1167 G14
1167 G15
Positive Power Supply Rejection
Ratio vs Frequency
Supply Current vs Supply Voltage
Gain vs Frequency
60
50
1.50
1.25
1.00
0.75
0.50
160
140
120
100
–
G = 1000
V
= –15V
= 25°C
T
A
G = 1000
G = 100
G = 10
G = 1
G = 10
G = 1
40
G = 100
85°C
25°C
30
20
80
60
–40°C
10
0
40
20
0
V
= ±15V
= 25°C
–10
–20
S
A
T
1
10
1k
0.01
0.1
1
10
100
1000
0.1
10k 100k
10
100
0
15
20
5
FREQUENCY (kHz)
FREQUENCY (Hz)
SUPPLY VOLTAGE (±V)
1167 G17
1167 G16
1167 G18
Voltage Noise Density
vs Frequency
0.1Hz to 10Hz Noise Voltage,
G = 1
0.1Hz to 10Hz Noise Voltage, RTI
G = 1000
1000
100
V
= ±15V
= 25°C
V
= ±15V
= 25°C
V
= ±15V
= 25°C
S
A
S
A
S
A
T
T
T
1/f
CORNER
= 10Hz
GAIN = 1
1/f
= 9Hz
= 7Hz
CORNER
GAIN = 10
1/f
CORNER
GAIN = 100, 1000
10
0
BW LIMIT
GAIN = 1000
1
10
100
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME (SEC)
TIME (SEC)
1167 G19
1167 G20
1167 G21
8
LT1167
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Current Noise Density
vs Frequency
0.1Hz to 10Hz Current Noise
Short-Circuit Current vs Time
1000
100
10
50
40
V
= ±15V
S
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
A
S
A
T
= –40°C
A
30
T
= 25°C
= 85°C
A
A
20
T
T
10
0
–10
–20
–30
–40
–50
R
S
= 85°C
A
T
A
= –40°C
T
A
= 25°C
1
10
100
1000
0
1
2
3
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (Hz)
TIME FROM OUTPUT SHORT TO GROUND (MINUTES)
TIME (SEC)
1167 G22
1167 G24
1167 G23
Overshoot vs Capacitive Load
Large-Signal Transient Response
Small-Signal Transient Response
100
90
V
V
= ±15V
OUT
= ∞
L
S
= ±50mV
R
80
70
60
50
A
= 1
V
40
30
20
10
0
A
= 10
V
1167 G28
1167 G29
10µs/DIV
10µs/DIV
G = 1
G = 1
VS = ±15V
V
S = ±15V
A
≥ 100
V
R
L = 2k
RL = 2k
L = 60pF
C
L = 60pF
C
10
100
1000
10000
CAPACITIVE LOAD (pF)
1167 G25
Output Impedance vs Frequency
Large-Signal Transient Response
Small-Signal Transient Response
1000
100
V
= ±15V
= 25°C
S
A
T
G = 1 TO 1000
10
1
1167 G31
1167 G32
10µs/DIV
10µs/DIV
G = 10
S = ±15V
RL = 2k
L = 60pF
G = 10
S = ±15V
RL = 2k
L = 60pF
V
V
0.1
C
C
1
10
100
1000
FREQUENCY (kHz)
1167 G26
9
LT1167
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undistorted Output Swing
vs Frequency
Large-Signal Transient Response
Small-Signal Transient Response
35
30
25
20
15
10
5
V
= ±15V
= 25°C
S
A
T
G = 10, 100, 1000
G = 1
1167 G35
1167 G34
10µs/DIV
10µs/DIV
G = 100
S = ±15V
RL = 2k
L = 60pF
G = 100
V
VS = ±15V
R
L = 2k
0
C
CL = 60pF
1
10
100
1000
FREQUENCY (kHz)
1167 G27
Settling Time vs Gain
Large-Signal Transient Response
Small-Signal Transient Response
1000
100
10
V
= ±15V
= 25°C
S
A
T
∆V
= 10V
OUT
1mV = 0.01%
1167 G37
1167 G38
50µs/DIV
50µs/DIV
G = 1000
S = ±15V
L = 2k
CL = 60pF
G = 1000
S = ±15V
L = 2k
CL = 60pF
V
V
R
R
1
1
10
100
1000
GAIN (dB)
1167 G30
Output Voltage Swing
vs Load Current
Settling Time vs Step Size
Slew Rate vs Temperature
1.8
1.6
1.4
1.2
1.0
0.8
10
8
+V
S
V
= ±15V
S
85°C
V
= ±15V
S
V
= ±15
TO 0.1%
S
V
= ±10V
OUT
25°C
G = 1
+V – 0.5
S
G = 1
–40°C
T
= 25°C
= 30pF
= 1k
A
6
+V – 1.0
S
C
L
L
TO 0.01%
V
R
4
+V – 1.5
S
SOURCE
SINK
OUT
2
0V
+V – 2.0
S
+SLEW
0
–V + 2.0
S
0V
–2
–4
–6
–8
–10
V
OUT
–V + 1.5
S
–SLEW
TO 0.01%
–V + 1.0
S
–V + 0.5
S
TO 0.1%
–V
S
–50 –25
0
25
50
75 100 125
2
3
4
5
6
7
8
9
10 11 12
0.01
0.1
1
10
100
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
SETTLING TIME (µs)
1167 G39
1167 G36
1167 G33
10
LT1167
W
BLOCK DIAGRAM
+
VB
V
R5
10k
R6
10k
+
–
OUTPUT
6
A1
R3
C1
400Ω
–IN
2
Q1
R1
24.7k
–
+
–
V
A3
1
8
R
R
G
–
–
V
V
VB
G
+
V
R7
10k
R8
10k
+
–
REF
A2
5
R4
400Ω
C2
+IN
3
Q2
R2
24.7k
+
V
7
4
–
V
–
V
1167 F01
PREAMP STAGE
DIFFERENCE AMPLIFIER STAGE
Figure 1. Block Diagram
U
THEORY OF OPERATIO
The LT1167 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and monolithic
construction allow tight matching and tracking of circuit
parameters over the specified temperature range. Refer to
the block diagram (Figure 1) to understand the following
circuitdescription. ThecollectorcurrentsinQ1andQ2are
trimmed to minimize offset voltage drift, thus assuring a
high level of performance. R1 and R2 are trimmed to an
absolute value of 24.7k to assure that the gain can be set
accurately (0.05% at G = 100) with only one external
resistor RG. The value of RG in parallel with R1 (R2)
determines the transconductance of the preamp stage. As
RG is reduced for larger programmed gains, the transcon-
ductanceoftheinputpreampstageincreasestothatofthe
input transistors Q1 and Q2. This increases the open-loop
gain when the programmed gain is increased, reducing
the input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
withprogrammedgain.Therefore,thebandwidthdoesnot
drop proportional to gain.
The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process-
ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
input voltage across the external gain set resistor RG.
SincethecurrentthatflowsthroughRG alsoflowsthrough
R1andR2, theratios provide agained-updifferential volt-
age,G=(R1+R2)/RG, totheunity-gaindifferenceamplifier
A3. The common mode voltage is removed by A3, result-
ing in a single-ended output voltage referenced to the
voltage on the REF pin. The resulting gain equation is:
–
VOUT – VREF = G(VIN+ – VIN
)
where:
G = (49.4kΩ/RG) + 1
solving for the gain set resistor gives:
RG = 49.4kΩ/(G – 1)
11
LT1167
U
THEORY OF OPERATIO
Input and Output Offset Voltage
Output Offset Trimming
The offset voltage of the LT1167 has two components: the
output offset and the input offset. The total offset voltage
referred to the input (RTI) is found by dividing the output
offset by the programmed gain (G) and adding it to the
input offset. At high gains the input offset voltage domi-
nates, whereas at low gains the output offset voltage
dominates. The total offset voltage is:
The LT1167 is laser trimmed for low offset voltage so that
no external offset trimming is required for most applica-
tions. In the event that the offset needs to be adjusted, the
circuitinFigure2isanexampleofanoptionaloffsetadjust
circuit. Theopampbufferprovidesalowimpedancetothe
REF pin where resistance must be kept to minimum for
best CMRR and lowest gain error.
Total input offset voltage (RTI)
= input offset + (output offset/G)
–
2
–IN
1
Total output offset voltage (RTO)
= (input offset • G) + output offset
6
R
LT1167
REF
OUTPUT
+
G
V
8
3
5
+
+IN
Reference Terminal
–
2
10mV
1
1/2
LT1112
The reference terminal is one end of one of the four 10k
resistors around the difference amplifier. The output volt-
age of the LT1167 (Pin 6) is referenced to the voltage on
the reference terminal (Pin 5). Resistance in series with
the REF pin must be minimized for best common mode
rejection. For example, a 2Ω resistance from the REF pin
to ground will not only increase the gain error by 0.02%
but will lower the CMRR to 80dB.
100Ω
3
+
±10mV
10k
ADJUSTMENT RANGE
100Ω
–10mV
–
V
1167 F02
Figure 2. Optional Trimming of Output Offset Voltage
Single Supply Operation
Input Bias Current Return Path
Forsinglesupplyoperation, theREFpincanbeatthesame
potential as the negative supply (Pin 4) provided the
output of the instrumentation amplifier remains inside the
specified operating range and that one of the inputs is at
least2.5Vaboveground.Thebarometerapplicationonthe
front page of this data sheet is an example that satisfies
these conditions. The resistance Rb from the bridge trans-
ducer to ground sets the operating current for the bridge
and also has the effect of raising the input common mode
voltage. The output of the LT1167 is always inside the
specified range since the barometric pressure rarely goes
low enough to cause the output to rail (30.00 inches of Hg
corresponds to 3.000V). For applications that require the
output to swing at or below the REF potential, the voltage
on the REF pin can be level shifted. An op amp is used to
buffer the voltage on the REF pin since a parasitic series
resistance will degrade the CMRR. The application in the
back of this data sheet, Four Digit Pressure Sensor, is an
example.
The low input bias current of the LT1167 (350pA) and the
high input impedance (200GΩ) allow the use of high
impedance sources without introducing additional offset
voltage errors, even when the full common mode range is
required. However, a path must be provided for the input
bias currents of both inputs when a purely differential
signal is being amplified. Without this path the inputs will
float to either rail and exceed the input common mode
range of the LT1167, resulting in a saturated input stage.
Figure 3 shows three examples of an input bias current
path. The first example is of a purely differential signal
sourcewitha10kΩinputcurrentpathtoground.Sincethe
impedance of the signal source is low, only one resistor is
needed. Two matching resistors are needed for higher
impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset. The need for input
resistors is eliminated if a center tap is present as shown
in the third example.
12
LT1167
U
THEORY OF OPERATIO
–
–
+
–
+
MICROPHONE,
HYDROPHONE,
ETC
R
G
R
G
R
G
LT1167
THERMOCOUPLE
LT1167
LT1167
+
200k
200k
10k
CENTER-TAP PROVIDES
BIAS CURRENT RETURN
1167 F03
Figure 3. Providing an Input Common Mode Current Path
U
W U U
APPLICATIONS INFORMATION
The LT1167 is a low power precision instrumentation
amplifier that requires only one external resistor to accu-
rately set the gain anywhere from 1 to 1000. The output
can handle capacitive loads up to 1000pF in any gain
configuration and the inputs are protected against ESD
strikes up to 13kV (human body).
A2N4393drain/sourcetogateisagoodlowleakagediode
for use with 1k resistors, see Figure 4. The input resistors
should be carbon and not metal film or carbon film.
RFI Reduction
In many industrial and data acquisition applications,
instrumentation amplifiers are used to accurately amplify
small signals in the presence of large common mode
voltages or high levels of noise. Typically, the sources of
these very small signals (on the order of microvolts or
millivolts) are sensors that can be a significant distance
from the signal conditioning circuit. Although these sen-
sors may be connected to signal conditioning circuitry,
using shielded or unshielded twisted-pair cabling, the ca-
bling may act as antennae, conveying very high frequency
interference directly into the input stage of the LT1167.
Input Protection
The LT1167 can safely handle up to ±20mA of input
current in an overload condition. Adding an external 5k
input resistor in series with each input allows DC input
fault voltages up to ±100V and improves the ESD immu-
nityto8kV(contact)and15kV(airdischarge), whichisthe
IEC 1000-4-2 level 4 specification. If lower value input
resistors are needed, a clamp diode from the positive
supply to each input will maintain the IEC 1000-4-2
specification to level 4 for both air and contact discharge.
The amplitude and frequency of the interference can have
an adverse effect on an instrumentation amplifier’s input
stage by causing an unwanted DC shift in the amplifier’s
input offset voltage. This well known effect is called RFI
rectification and is produced when out-of-band interfer-
ence is coupled (inductively, capacitively or via radiation)
and rectified by the instrumentation amplifier’s input tran-
sistors. These transistors act as high frequency signal
detectors, in the same way diodes were used as RF
envelope detectors in early radio designs. Regardless of
the type of interference or the method by which it is
coupled into the circuit, an out-of-band error signal ap-
pearsinserieswiththeinstrumentationamplifier’sinputs.
V
CC
V
CC
OPTIONAL FOR HIGHEST
ESD PROTECTION
J1
2N4393
J2
2N4393
V
CC
R
IN
IN
+
–
OUT
R
LT1167
G
REF
R
1167 F04
V
EE
Figure 4. Input Protection
13
LT1167
U
W U U
APPLICATIONS INFORMATION
To significantly reduce the effect of these out-of-band
signals on the input offset voltage of instrumentation
amplifiers, simple lowpass filters can be used at the
inputs. This filter should be located very close to the input
pins of the circuit. An effective filter configuration is
illustrated in Figure 5, where three capacitors have been
added to the inputs of the LT1167. Capacitors CXCM1 and
signal to be processed, set the common mode time
constant an order of magnitude (or more) larger than the
differentialmodetimeconstant.Toavoidanypossibilityof
common mode to differential mode signal conversion,
match the common mode time constants to 1% or better.
If the sensor is an RTD or a resistive strain gauge, then the
series resistors RS1, 2 can be omitted, if the sensor is in
proximity to the instrumentation amplifier.
CXCM2 form lowpass filters with the external series resis-
tors RS1, 2 to any out-of-band signal appearing on each of
the input traces. Capacitor CXD forms a filter to reduce any
unwantedsignalthatwouldappearacrosstheinputtraces.
An added benefit to using CXD is that the circuit’s AC
common mode rejection is not degraded due to common
mode capacitive imbalance. The differential mode and
commonmodetimeconstantsassociatedwiththecapaci-
tors are:
“Roll Your Own”—Discrete vs Monolithic LT1167
Error Budget Analysis
The LT1167 offers performance superior to that of “roll
your own” three op amp discrete designs. A typical appli-
cation that amplifies and buffers a bridge transducer’s
differential output is shown in Figure 6. The amplifier, with
itsgainsetto100, amplifiesadifferential, full-scaleoutput
voltage of 20mV over the industrial range. To make the
comparisonchallenging,thelowcostversionoftheLT1167
will be compared to a discrete instrumentation amp made
withtheAgradeofoneofthebestprecisionquadopamps,
the LT1114A. The LT1167C outperforms the discrete
amplifier that has lower VOS, lower IB and comparable VOS
drift. The error budget comparison in Table 1 shows how
various errors are calculated and how each error affects
the total error budget. The table shows the greatest
differences between the discrete solution and the LT1167
are input offset voltage and CMRR. Note that for the
discrete solution, the noise voltage specification is multi-
pliedby √2whichistheRMSsumoftheuncorelatednoise
of the two input amplifiers. Each of the amplifier errors is
referenced to a full-scale bridge differential voltage of
20mV. The common mode range of the bridge is 5V. The
LT1114 data sheet provides offset voltage, offset voltage
drift and offset current specifications for the matched op
amp pairs used in the error-budget table. Even with an
excellent matching op amp like the LT1114, the discrete
solution’s total error is significantly higher than the
LT1167’s total error. The LT1167 has additional advan-
tages over the discrete design, including lower compo-
nent cost and smaller size.
tDM(LPF) = (2)(RS)(CXD)
tCM(LPF) = (RS1, 2)(CXCM1, 2
)
Setting the time constants requires a knowledge of the
frequency, or frequencies of the interference. Once this
frequency is known, the common mode time constants
can be set followed by the differential mode time constant.
To avoid any possibility of inadvertently affecting the
+
V
C
R
XCM1
S1
100pF
1.6k
+
–
+
–
IN
IN
C
XD
R
LT1167
V
G
OUT
10pF
R
S2
1.6k
C
XCM2
–
100pF
V
1167 F05
EXTERNAL RFI
FILTER
Figure 5. Adding a Simple RC Filter at the Inputs to an
Instrumentation Amplifier is Effective in Reducing Rectification
of High Frequency Out-of-Band Signals
14
LT1167
U
W U U
APPLICATIONS INFORMATION
+
10k*
10k*
1/4
LT1114A
10V
+
–
10k**
10k**
–
350Ω
350Ω
1/4
LT1114A
R
G
LT1167C
REF
100Ω**
499Ω
+
350Ω
350Ω
–
–
10k*
10k*
1/4
LT1114A
+
LT1167 MONOLITHIC
PRECISION BRIDGE TRANSDUCER
INSTRUMENTATION AMPLIFIER
“ROLL YOUR OWN” INST AMP, G = 100
G = 100, R = ±10ppm TC
G
* 0.02 RESISTOR MATCH, 3ppm/°C TRACKING
** DISCRETE 1% RESISTOR, ±100ppm/°C TC
100ppm TRACKING
SUPPLY CURRENT = 1.3mA MAX
SUPPLY CURRENT = 1.35mA FOR 3 AMPLIFIERS
1167 F06
Figure 6. “Roll Your Own” vs LT1167
Table 1. “Roll Your Own” vs LT1167 Error Budget
ERROR, ppm OF FULL SCALE
LT1167C “ROLL YOUR OWN”
“ROLL YOUR OWN”’ CIRCUIT
CALCULATION
ERROR SOURCE
LT1167C CIRCUIT CALCULATION
Absolute Accuracy at T = 25
°C
A
Input Offset Voltage, µV
Output Offset Voltage, µV
Input Offset Current, nA
CMR, dB
60µV/20mV
(300µV/100)/20mV
[(450pA)(350/2)Ω]/20mV
110dB→[(3.16ppm)(5V)]/20mV
100µV/20mV
3000
150
4
5000
60
4
[(60µV)(2)/100]/20mV
[(450pA)(350Ω)/2]/20mV
[(0.02% Match)(5V)]/20mV
790
500
Total Absolute Error
3944
5564
Drift to 85
Gain Drift, ppm/°C
Input Offset Voltage Drift, µV/°C
Output Offset Voltage Drift, µV/°C
°C
(50ppm + 10ppm)(60°C)
[(0.4µV/°C)(60°C)]/20mV
[6µV/°C)(60°C)]/100/20mV
(100ppm/°C Track)(60°C)
[(1.6µV/°C)(60°C)]/20mV
[(1.1µV/°C)(2)(60°C)]/100/20mV
3600
1200
180
6000
4800
66
Total Drift Error
4980
10866
Resolution
Gain Nonlinearity, ppm of Full Scale
Typ 0.1Hz to 10Hz Voltage Noise, µV
15ppm
0.28µV /20mV
10ppm
15
14
10
21
(0.3µV )(√2)/20mV
P-P
P-P
P-P
Total Resolution Error
Grand Total Error
29
8953
31
16461
G = 100, V = ±15V
S
All errors are min/max and referred to input.
Current Source
current. The 50µA bias current flowing from Pin 5 is
buffered by the LT1464 JFET operational amplifier. This
has the effect of improving the resolution of the current
source to 3pA, which is the maximum IB of the LT1464A.
Replacing RG with a programmable resistor greatly
increases the range of available output currents.
Figure 7 shows a simple, accurate, low power program-
mable current source. The differential voltage across Pins
2 and 3 is mirrored across RG. The voltage across RG is
amplified and applied across RX, defining the output
15
LT1167
U
W U U
APPLICATIONS INFORMATION
V
S
important, R6 and C2 make up a 0.3Hz highpass filter.
The AC signal at LT1112’s Pin 5 is amplified by a gain of
101 set by (R7/R8) +1. The parallel combination of C3
and R7 form a lowpass filter that decreases this gain at
frequencies above 1kHz. The ability to operate at ±3V on
0.9mA of supply current makes the LT1167 ideal for
battery-powered applications. Total supply current for
this application is 1.7mA. Proper safeguards, such as
isolation, must be added to this circuit to protect the
patient from possible harm.
3
8
+
+IN
7
R
V
X
6
R
LT1167
4
G
REF
5
X
2
1
2
–IN
–
I
L
–
+
–V
S
1
1/2
LT1464
3
V
R
[(+IN) – (–IN)]G
X
I
=
=
L
R
X
X
LOAD
49.4kΩ
G =
+ 1
R
G
Low IB Favors High Impedance Bridges,
Lowers Dissipation
1167 F07
Figure 7. Precision Voltage-to-Current Converter
The LT1167’s low supply current, low supply voltage
operation and low input bias currents optimize it for
battery-powered applications. Low overall power dissi-
pationnecessitatesusinghigherimpedancebridges.The
single supply pressure monitor application (Figure 9)
shows the LT1167 connected to the differential output of
a 3.5k bridge. The bridge’s impedance is almost an order
of magnitude higher than that of the bridge used in the
error-budget table. The picoampere input bias currents
keep the error caused by offset current to a negligible
level. The LT1112 level shifts the LT1167’s reference pin
and the ADC’s analog ground pins above ground. The
LT1167’s and LT1112’s combined power dissipation is
still less than the bridge’s. This circuit’s total supply
current is just 2.8mA.
Nerve Impulse Amplifier
The LT1167’s low current noise makes it ideal for high
source impedance EMG monitors. Demonstrating the
LT1167’s ability to amplify low level signals, the circuit in
Figure 8 takes advantage of the amplifier’s high gain and
low noise operation. This circuit amplifies the low level
nerve impulse signals received from a patient at Pins 2
and 3. RG and the parallel combination of R3 and R4 set
a gain of ten. The potential on LT1112’s Pin 1 creates a
ground for the common mode signal. C1 was chosen to
maintainthestabilityofthepatientground. TheLT1167’s
high CMRR ensures that the desired differential signal is
amplified and unwanted common mode signals are at-
tenuated. Since the DC portion of the signal is not
3V
PATIENT/CIRCUIT
PROTECTION/ISOLATION
3
8
0.3Hz
HIGHPASS
7
+IN
+
–
3V
C1
0.01µF
C2
0.47µF
R3
R1
12k
30k
6
5
6
8
R
LT1167
G = 10
G
+
–
6k
R2
1M
7
1/2
OUTPUT
1V/mV
R4
30k
R6
1M
LT1112
1
2
5
4
4
R7
10k
–
+
2
3
–3V
1/2
LT1112
1
–3V
PATIENT
GROUND
R8
100Ω
A
= 101
C3
15nF
V
POLE AT 1kHz
–IN
1167 F08
Figure 8. Nerve Impulse Amplifier
16
LT1167
U
W U U
APPLICATIONS INFORMATION
BI TECHNOLOGIES
67-8-3 R40KQ
(0.02% RATIO MATCH)
5V
1
3
8
40k
+
–
7
3.5k
3.5k
3.5k
3.5k
REF
IN
G = 200
249Ω
6
LT1167
4
DIGITAL
DATA
OUTPUT
ADC
20k
3
LTC®1286
1
2
5
+
1
1/2
AGND
40k
LT1112
2
–
1167 F09
Figure 9. Single Supply Pressure Monitor
U
TYPICAL APPLICATION
AC Coupled Instrumentation Amplifier
2
1
–IN
+IN
–
6
R
LT1167
REF
OUTPUT
G
R1
500k
8
3
C1
0.3µF
5
+
–
+
2
1
1/2
LT1112
1
f
=
–3dB
3
(2π)(R1)(C1)
= 1.06Hz
1167 TA04
17
LT1167
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
4
0.255 ± 0.015*
(6.477 ± 0.381)
1
2
3
0.130 ± 0.005
0.300 – 0.325
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.035
0.325
–0.015
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
+0.889
8.255
(
)
N8 1197
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
18
LT1167
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.053 – 0.069
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 0996
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1167
U
TYPICAL APPLICATION
4-Digit Pressure Sensor
9V
R8
LUCAS NOVA SENOR
392k
9V
NPC-1220-015A-3L
3
2
4
+
2
1
1
3
–
–
1
4
1/4
LT1114
1
2
7
5k
5k
LT1634CCZ-1.25
R1
–
11
825Ω
6
LT1167
G = 60
R9
1k
R2
12Ω
5k
2
6
5k
8
3
5
TO
+
4-DIGIT
DVM
+
4
R
SET
10
9
+
8
1/4
LT1114
5
–
12
13
+
14
1/4
0.2% ACCURACY AT ROOM TEMP
LT1114
–
1.2% ACCURACY AT 0°C TO 60°C
R7
180k
R6
50k
R5
100k
R4
100k
VOLTS INCHES Hg
2.800
3.000
3.200
28.00
30.00
32.00
C1
1µF
1167 TA03
R3
51k
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Single 5V Supply, Bipolar Input Range: ±10V,
Power Dissipation: 55mW Typ
1167f LT/GP 1298 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1998
20 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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