LT1219CN8#PBF [Linear]
暂无描述;型号: | LT1219CN8#PBF |
厂家: | Linear |
描述: | 暂无描述 运算放大器 |
文件: | 总16页 (文件大小:378K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1218/LT1219
Precision Rail-to-Rail Input
and Output Op Amps
U
FEATURES
DESCRIPTION
The LT®1218/LT1219 are bipolar op amps which combine
rail-to-railinputandoutputoperationwithprecisionspeci-
fications. Unlike other rail-to-rail amplifiers, the LT1218/
LT1219’s input offset voltage is a low 90µV across the
entire rail-to-rail input range, not just a portion of it. Using
a patented technique, both input stages of the LT1218/
LT1219 are trimmed: one at the negative supply and the
other at the positive supply. The resulting common mode
rejection of 97dB minimum is much better than other rail-
to-rail input op amps. A minimum open-loop gain of
500V/mV into a 10k load virtually eliminates all gain error.
■
Rail-to-Rail Input and Output
90µ
V VOS(MAX) for VCM = V– to V+
■
■
■
■
■
High Common Mode Rejection Ratio: 97dB Min
C-LoadTM Stable Version (LT1219)
High AVOL: 500V/mV Minimum Driving 10kΩ Load
Wide Supply Range:
2V to ±15V (LT1218/LT1219)
2V to ±5V (LT1218L/LT1219L)
■
■
■
■
■
Shutdown Mode: IS < 30µA
Low Supply Current: 420µA Max
Low Input Bias Current: 18nA Typical
300kHz Gain-Bandwidth Product (LT1218)
Slew Rate: 0.10V/µs (LT1218)
The LT1218 has conventional compensation which
assures stability for capacitive loads of 1000pF or less.
The LT1219 has compensation that requires the use of a
0.1µF output capacitor, which improves the amplifier’s
supply rejection and reduces output impedance at high
frequencies. The output capacitor’s filtering action also
reduces high frequency noise, which is beneficial when
driving A/D converters.
U
APPLICATIONS
■
Driving A/D Converters
Test Equipment Amplifiers
MUX Amplifiers
■
■
High and low voltage versions of the devices are offered.
Operation is specified for 3V, 5V and ±5V supplies for the
LT1218L/LT1219L and 3V, 5V and ±15V for the LT1218/
LT1219.
, LTC and LT are registered trademarks of Linear Technology Corporation.
C-Load is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATION
MUX Amplifier
Voltage Follower Input to Output Error
10
5V
V
A
= 5V
= 1
S
V
+
V
NO LOAD
IN1
V
LT1218L
OUT
1.0
0.1
–
SHDN
MAX ERROR = 110µV
0.05V ≤ V ≤ 4.8V
5V
IN
+
–
V
IN2
LT1218L
MAXIMUM IN
TO OUT ERROR
= 110µV FOR
SHDN
0.01
0
1
2
3
4
5
0.05
4.95
0.05V ≤ V ≤ 4.8V
IN
INPUT VOLTAGE (V)
R
= 10k
L
INPUT
LT1218/19 • TA02
SELECT
1218/19 • TA01
74HCO4
1
LT1218/LT1219
W W
U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
Supply Voltage
ORDER PART
NUMBER
LT1218/LT1219 ................................................. ±18V
LT1218L/LT1219L ............................................... ±8V
Input Current ...................................................... ±15mA
Output Short-Circuit Duration (Note 1).........Continuous
Operating Temperature Range ................ –40°C to 85°C
Specified Temperature Range (Note 3)... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Junction Temperature........................................... 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
LT1218CN8
V
TRIM
–IN
1
2
3
4
V
V
TRIM
8
7
6
5
OS
OS
+
LT1218CS8
LT1218LCN8
LT1218LCS8
LT1219CN8
LT1219CS8
LT1219LCN8
LT1219LCS8
+IN
OUT
SHDN
–
V
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/ W (N8)
TJMAX = 150°C, θJA = 190°C/ W (S8)
S8 PART MARKING
1218 1219
1218L 1219L
Consult factory for Industrial and Military grades.
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
V
V
V
V
V
V
V
V
= V
= V
= V to V
= V
= V
= V to V
= V
= V
= V to V
25
25
15
30
–18
50
5
2
5
33
0.09
1000
750
110
106
90
90
70
70
µV
µV
µV
nA
nA
nA
OS
CM
CM
–
–
+
+
+
∆V
Input Offset Voltage Shift
Input Bias Current
OS
CM
+
I
B
CM
CM
–
–70
–
∆I
Input Bias Current Shift
Input Offset Current
140
18
18
B
CM
+
I
nA
nA
OS
CM
CM
–
–
∆I
Input Offset Current Shift
Input Noise Voltage Density
Input Noise Current Density
Large-Signal Voltage Gain
18
nA
nV/√Hz
pA/√Hz
V/mV
V/mV
OS
CM
e
f = 1kHz
f = 1kHz
n
i
n
A
V = 5V, V = 50mV to 4.8V, R = 10k
250
200
97
92
VOL
S
O
L
V = 3V, V = 50mV to 2.8V, R = 10k
S
O
L
–
+
+
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
dB
dB
S
CM
–
V = 3V, V = V to V
S
CM
PSRR
Power Supply Rejection Ratio
Output Voltage Swing LOW
V = 2.3V to 12V, V = 0V, V = 0.5V
No Load
90
100
4
45
120
dB
S
CM
O
V
V
12
90
240
mV
mV
mV
V
V
V
OL
OH
I
I
= 0.5mA
= 2.5mA
SINK
SINK
+
+
Output Voltage Swing HIGH
No Load
V – 0.012 V – 0.003
V – 0.130 V – 0.065
V – 0.400 V – 0.210
+
+
I
= 0.5mA
= 2.5mA
SOURCE
SOURCE
+
+
I
I
I
Short-Circuit Current
Supply Current
V = 5V
5
4
10
7
370
370
mA
mA
µA
µA
SC
S
V = 3V
S
V = 5V
420
410
S
S
V = 3V
S
Positive Supply Current, SHDN
V = 5V, V
V = 3V, V
S
= 0V
= 0V
9
6
30
20
µA
µA
S
SHDN
SHDN
2
LT1218/LT1219
ELECTRICAL CHARACTERISTICS
TA = 25°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN
TYP
MAX
UNITS
SR
Slew Rate (LT1218/LT1218L)
(LT1219/LT1219L)
Gain Bandwidth Product
A = –1
A = –1
V
0.10
0.05
V/µs
V/µs
V
GBW
(LT1218/LT1218L)
(LT1219/LT1219L)
A = 1000
A = 1000
V
0.30
0.15
MHz
MHz
V
0°C ≤ TA ≤ 70°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
OS
Input Offset Voltage
V
CM
V
CM
= V
= V
●
●
75
75
200
200
µV
µV
–
V
∆V
TC
Input Offset Drift
Input Offset Voltage Shift
Input Bias Current
(Note 2)
●
●
1
25
30
–18
50
5
3
3
80
75
µV/°C
µV
OS
–
+
+
+
V
= V to V
OS
CM
+
I
V
CM
V
CM
= V
= V
= V to V
= V
●
●
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
dB
B
–
–75
–
∆I
Input Bias Current Shift
Input Offset Current
V
CM
●
150
25
25
B
+
I
V
CM
V
CM
●
●
OS
–
= V
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
= V to V
●
5
25
OS
A
VOL
V = 5V, V = 50mV to 4.8V, R = 10k
●
●
250
150
96
91
1000
750
104
106
100
4
S
O
L
V = 3V, V = 50mV to 2.8V, R = 10k
S
O
L
–
+
+
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = V to V
●
●
S
CM
–
V = 3V, V = V to V
S
CM
Power Supply Rejection Ratio
Output Voltage Swing LOW
V = 2.3V to 12V, V = 0V, V = 0.5V
●
88
dB
S
CM
O
V
OL
No Load
●
●
●
14
100
290
mV
mV
mV
V
V
V
I
I
= 0.5mA
= 2.5mA
45
130
SINK
SINK
+
+
V
OH
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.014 V – 0.004
V – 0.150 V – 0.075
V – 0.480 V – 0.240
+
+
I
I
= 0.5mA
= 2.5mA
SOURCE
SOURCE
+
+
I
I
Short-Circuit Current
Supply Current
V = 5V
●
●
4
3
7
6
370
370
mA
mA
µA
µA
SC
S
V = 3V
S
V = 5V
●
●
485
475
S
S
V = 3V
S
Positive Supply Current, SHDN
V = 5V, V
V = 3V, V
S
= 0V
= 0V
●
●
9
6
36
26
µA
µA
S
SHDN
SHDN
–40°C ≤ TA ≤ 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
OS
Input Offset Voltage
V
CM
V
CM
= V – 0.15
= V + 0.15
●
●
400
400
µV
µV
–
V
∆V
TC
Input Offset Drift
Input Offset Voltage Shift
Input Bias Current
(Note 2)
●
●
1
30
4
105
80
µV/°C
µV
OS
+
–
V
CM
= V – 0.15 to V + 0.15
OS
+
I
V
CM
V
CM
= V – 0.15
= V + 0.15
●
●
nA
nA
nA
nA
nA
nA
B
–
–80
+
–
∆I
Input Bias Current Shift
Input Offset Current
V
CM
= V – 0.15 to V + 0.15
●
160
40
40
B
+
I
V
CM
V
CM
= V – 0.15
= V + 0.15
●
●
OS
–
+
–
∆I
Input Offset Current Shift
V
CM
= V – 0.15 to V + 0.15
●
40
OS
3
LT1218/LT1219
ELECTRICAL CHARACTERISTICS
–40°C ≤ TA ≤ 85°C, VS = 5V, 0V; VS = 3V, 0V; VCM = VO = half supply, VSHDN = V+, unless otherwise noted. (Note 3)
SYMBOL PARAMETER
CONDITIONS
V = 5V, V = 50mV to 4.8V, R = 10k
MIN
TYP
MAX
UNITS
A
VOL
Large-Signal Voltage Gain
●
●
150
100
93
88
500
500
102
100
100
5
V/mV
V/mV
dB
dB
S
O
L
V = 3V, V = 50mV to 2.8V, R = 10k
S
O
L
+
–
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = V – 0.15 to V + 0.15
●
●
S
CM
+
–
V = 3V, V = V – 0.15 to V + 0.15
S
CM
Power Supply Rejection Ratio
Output Voltage Swing LOW
V = 2.3V to 12V, V = 0V, V = 0.5V
●
86
dB
S
CM
O
V
OL
No Load
●
●
●
15
105
300
mV
mV
mV
mV
mV
mV
I
I
= 0.5mA
= 2.5mA
50
130
SINK
SINK
+
+
V
OH
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.015 V – 0.004
V – 0.160 V – 0.070
V – 0.500 V – 0.250
+
+
I
= 0.5mA
= 2.5mA
SOURCE
SOURCE
+
+
I
I
I
Short-Circuit Current
Supply Current
V = 5V
●
●
4
3
7
7
410
400
mA
mA
µA
µA
SC
S
V = 3V
S
V = 5V
●
●
505
495
S
S
V = 3V
S
Positive Supply Current, SHDN
V = 5V, V
V = 3V, V
S
= 0V
= 0V
●
●
15
13
50
40
µA
µA
S
SHDN
SHDN
LT1218L/LT1219L only; TA = 25°C, VS = ±5V, VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
35
35
20
30
–18
50
5
2
5
MAX
140
140
70
70
UNITS
+
V
OS
Input Offset Voltage
V
V
= V
= V
= V to V
= V
= V
= V to V
= V
= V
= V to V
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
CM
CM
–
–
+
+
+
∆V
Input Offset Voltage Shift
Input Bias Current
V
CM
OS
+
I
V
CM
V
CM
B
–
–70
–
∆I
Input Bias Current Shift
Input Offset Current
V
CM
140
18
18
B
+
I
V
CM
V
CM
OS
–
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
18
OS
A
VOL
V = –4.7V to 4.7V, R = 10k
500
300
103
2800
1300
114
O
L
V = –4.5V to 4.5V, R = 2k
O
L
–
+
CMRR
Common Mode Rejection Ratio
Output Voltage Swing LOW
V
= V to V
CM
–
–
V
No Load
V + 0.004 V + 0.012
V + 0.045 V + 0.090
V + 0.180 V + 0.525
V
V
V
V
V
V
OL
OH
–
–
I
I
= 0.5mA
= 5mA
SINK
SINK
–
–
+
+
V
Output Voltage Swing HIGH
No Load
V – 0.012 V – 0.003
V – 0.130 V – 0.065
V – 0.800 V – 0.350
+
+
I
I
= 0.5mA
= 5mA
SOURCE
SOURCE
+
+
I
I
Short-Circuit Current
Supply Current
Positive Supply Current, SHDN
6
12
400
10
mA
µA
µA
SC
430
40
S
V
SHDN
= 0V
SR
Slew Rate (LT1218/LT1218L)
(LT1219/LT1219L)
A = –1, R = Open, V = ±3.5V
0.06
0.03
0.10
0.05
V/µs
V/µs
V
L
O
A = –1, R = Open, V = ±3.5V
V
L
O
GBW
Gain-Bandwidth Product
(LT1218/LT1218L)
(LT1219/LT1219L)
A = 1000
A = 1000
V
0.2
0.1
0.30
0.15
MHz
MHz
V
4
LT1218/LT1219
ELECTRICAL CHARACTERISTICS
LT1218L/LT1219L only; 0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
100
100
30
30
–18
50
5
3
5
MAX
250
250
90
75
UNITS
+
V
Input Offset Voltage
V
V
V
V
V
V
V
V
V
= V
= V
= V to V
= V
= V
= V to V
= V
= V
= V to V
●
●
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
OS
CM
CM
–
–
+
+
+
∆V
Input Offset Voltage Shift
Input Bias Current
●
OS
CM
+
I
●
●
B
CM
CM
–
–75
–
∆I
Input Bias Current
Input Offset Current
●
150
25
25
B
CM
+
I
●
●
OS
CM
CM
–
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
●
20
OS
CM
A
V = –4.7V to 4.7V, R = 10k
●
●
375
275
100
2800
1300
110
VOL
O
L
V = –4.5V to 4.5V, R = 2k
O
L
–
+
CMRR
Common Mode Rejection Ratio
Output Voltage Swing LOW
V
= V to V
●
CM
–
–
V
No Load
●
●
●
V + 0.004 V + 0.014
V + 0.045 V + 0.100
V + 0.200 V + 0.580
V
V
V
V
V
V
OL
–
–
I
I
= 0.5mA
= 5mA
SINK
SINK
–
–
+
+
V
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.014 V – 0.004
V – 0.150 V – 0.075
V – 0.920 V – 0.450
OH
+
+
I
= 0.5mA
= 5mA
SOURCE
SOURCE
+
+
I
I
I
Short-Circuit Current
Supply Current
Positive Supply Current, SHDN
●
●
●
5
10
400
11
mA
µA
µA
SC
495
54
S
V
= 0V
SHDN
LT1218L, LT1219L only; –40°C ≤ TA ≤ 85°C, VS = ±5V; VCM = 0V, VO = 0V, VSHDN = 5V, unless otherwise noted. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
125
125
MAX
500
500
120
80
UNITS
+
V
OS
Input Offset Voltage
V
V
= V – 0.15
●
●
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
CM
CM
–
= V + 0.15
+
–
∆V
Input Offset Voltage Shift
Input Bias Current
V
CM
= V – 0.15 to V + 0.15
●
35
OS
+
I
V
CM
V
CM
= V – 0.15
●
●
B
–
= V + 0.15
–80
+
–
∆I
Input Bias Current
V
CM
= V – 0.15 to V + 0.15
●
160
40
40
B
+
I
Input Offset Current Shift
V
CM
V
CM
= V – 0.15
●
●
OS
–
= V + 0.15
+
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
= V – 0.15 to V + 0.15
●
40
OS
A
VOL
V = –4.7V to 4.7V, R = 10k
●
●
300
200
98
2000
600
109
O
L
V = –4.5V to 4.5V, R = 2k
O
L
–
+
CMRR
Common Mode Rejection Ratio
Output Voltage Swing LOW
V
= V – 0.15 to V + 0.15
●
CM
–
–
V
No Load
●
●
●
V + 0.005 V + 0.015
V + 0.050 V + 0.105
V + 0.200 V + 0.620
V
V
V
V
V
V
OL
OH
–
–
I
I
= 0.5mA
= 2.5mA
SINK
SINK
–
–
+
+
V
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.015 V – 0.004
V – 0.160 V – 0.070
V – 1.000 V – 0.400
+
+
I
I
= 0.5mA
= 2.5mA
SOURCE
SOURCE
+
+
I
I
Short-Circuit Current
Supply Current
Positive Supply Current, SHDN
●
●
●
5
10
420
18
mA
µA
µA
SC
525
60
S
V
SHDN
= 0V
5
LT1218/LT1219
ELECTRICAL CHARACTERISTICS
LT1218/LT1219 only; TA = 25°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
OS
Input Offset Voltage
V
V
= V
= V
= V to V
= V
= V
= V to V
= V
= V
= V to V
85
85
30
30
–18
50
5
2
200
200
70
70
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
dB
CM
CM
–
–
+
+
+
∆V
Input Offset Voltage Shift
Input Bias Current
V
CM
OS
+
I
V
CM
V
CM
B
–
–70
–
∆I
Input Bias Current
Input Offset Current
V
CM
140
18
18
B
+
I
V
CM
V
CM
OS
–
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
5
18
OS
A
VOL
V = –14.7V to 14.7V, R = 10k
1000
500
113
100
4000
2000
120
110
O
L
V = –10V to 10V, R = 2k
O
L
–
+
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing LOW
V
= V to V
CM
V = ±5V to ±15V
S
–
–
V
OL
No Load
V + 0.004 V + 0.012
V + 0.045 V + 0.090
V + 0.270 V + 0.525
V
V
V
V
V
V
–
–
I
I
= 0.5mA
= 5mA
SINK
SINK
–
–
+
+
V
OH
Output Voltage Swing HIGH
No Load
V – 0.012 V – 0.003
V – 0.130 V – 0.065
V – 0.800 V – 0.580
+
+
I
I
= 0.5mA
= 5mA
SOURCE
SOURCE
+
+
I
I
Short-Circuit Current
Supply Current
Positive Supply Current, SHDN
10
20
425
15
mA
µA
µA
SC
550
40
S
V
SHDN
= 0V
SR
Slew Rate (LT1218/LT1218L)
(LT1219/LT1219L
A = –1
A = –1
V
0.10
0.05
V/µs
V/µs
V
GBW
Gain Bandwidth Product
(LT1218/LT1218L)
(LT1219/LT1219L)
A = 1000
A = 1000
V
0.28
0.15
MHz
MHz
V
LT1218/LT1219 only; 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
OS
Input Offset Voltage
V
V
= V
= V
= V to V
= V
= V
= V to V
= V
= V
= V to V
●
●
120
120
50
30
–18
50
5
3
300
300
105
75
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
dB
CM
CM
–
–
+
+
+
∆V
Input Offset Voltage Shift
Input Bias Current
V
CM
●
OS
+
I
V
CM
V
CM
●
●
B
–
–75
–
∆I
Input Bias Current
Input Offset Current
V
CM
●
150
25
25
B
+
I
V
CM
V
CM
●
●
OS
–
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
●
5
20
OS
A
VOL
V = –14.7V to 14.7V, R = 10k
●
●
750
500
109
97
3000
1500
114
110
O
L
V = –10V to 10V, R = 2k
O
L
–
+
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing LOW
V
= V to V
●
●
CM
V = ±5V to ±15V
S
–
–
V
OL
No Load
●
●
●
V + 0.004 V + 0.014
V + 0.045 V + 0.100
V + 0.310 V + 0.580
V
V
V
V
V
V
–
–
I
I
= 0.5mA
= 5mA
SINK
SINK
–
–
+
+
V
OH
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.014 V – 0.003
V – 0.150 V – 0.075
V – 0.920 V – 0.700
+
+
I
I
= 0.5mA
= 5mA
SOURCE
SOURCE
+
+
6
LT1218/LT1219
ELECTRICAL CHARACTERISTICS
LT1218/LT1219 only; 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V, VO = 0V, VSHDN = 15V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
17
450
20
MAX
UNITS
mA
I
I
Short-Circuit Current
Supply Current
●
●
●
8
SC
S
600
54
µA
µA
Positive Supply Current, SHDN
V
SHDN
= 0V
LT1218, LT1219 only; –40°C ≤ TA ≤ 85°C, VS = ±15V; VCM = 0V = VO = 0V, VSHDN = 15V, unless otherwise noted. (Note 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
150
150
MAX
600
600
165
80
UNITS
+
V
OS
Input Offset Voltage
V
V
= V – 0.15
●
●
µV
µV
µV
nA
nA
nA
nA
nA
nA
V/mV
V/mV
dB
dB
CM
CM
–
= V + 0.15
+
–
∆V
Input Offset Voltage Shift
Input Bias Current
V
CM
= V – 0.15 to V + 0.15
●
50
OS
+
I
V
CM
V
CM
= V – 0.15
●
●
B
–
= V + 0.15
–80
+
–
∆I
Input Bias Current
Input Offset Current
V
CM
= V – 0.15 to V + 0.15
●
160
40
40
B
+
I
V
CM
V
CM
= V – 0.15
●
●
OS
–
= V + 0.15
+
–
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
CM
= V – 0.15 to V + 0.15
●
40
OS
A
VOL
V = –14.7V to 14.7V, R = 10k
●
●
500
400
105
96
3000
1000
114
110
O
L
V = –10V to 10V, R = 2k
O
L
–
+
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing LOW
V
= V – 0.15 to V + 0.15
●
●
CM
V = ±5V to ±15V
S
–
–
V
OL
No Load
●
●
●
V + 0.005 V + 0.015
V + 0.050 V + 0.105
V + 0.200 V + 0.620
V
V
V
V
V
V
–
–
I
I
= 0.5mA
= 2.5mA
SINK
SINK
–
–
+
+
V
OH
Output Voltage Swing HIGH
No Load
●
●
●
V – 0.015 V – 0.004
V – 0.160 V – 0.070
V – 1.000 V – 0.400
+
+
I
I
= 0.5mA
= 2.5mA
SOURCE
SOURCE
+
+
I
I
Short-Circuit Current
Supply Current
Positive Supply Current, SHDN
●
●
●
5
14
mA
µA
µA
SC
650
60
S
V
SHDN
= 0V
The
●
denotes specifications which apply over the full operating
Note 2: This parameter is not 100% tested.
temperature range.
Note 3: The LT1218/LT1219 are designed, characterized and expected to
meet these extended temperature limits, but are not tested at –40°C and
85°C. Guaranteed I grade part are available: consult factory.
Note 1: A heat sink may be required to keep the junction temperature
below the Absolute Maximum Rating when the output is shorted
indefinitely.
7
LT1218/LT1219
TYPICAL PERFORMANCE CHARACTERISTICS
W
U
VOS Distribution, VCM = 0V
VOS Shift, VCM = 0V to 5V
VOS Distribution, VCM = 5V
30
25
20
15
10
5
40
35
30
25
20
15
10
5
30
25
20
15
10
5
V
V
= 5V, 0V
= 0V
V
V
= 5V, 0V
CM
S
CM
V
V
= 5V, 0V
= 5V
S
S
CM
= 0V TO 5V
0
0
0
–100
–60
–20
20
60
100
–100
–60
–20
20
60
100
–100
–60
–20
20
60
100
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
LT1218/19 • TPC01
LT1218/19 • TPC03
LT1218/19 • TPC02
Input Bias Current vs
Common Mode Voltage
Supply Current vs Temperature
Minimum Supply Voltage
200
150
100
50
500
400
300
200
100
0
50
25
V
= 5V, 0V
S
T
= –40°C
A
V
= ±15V
S
T
A
= 25°C
= 85°C
T = 25°C
A
V
= ±2.5V
T
= 85°C
S
A
T
= –40°C
A
T
A
0
–25
0
T
= 25°C
A
–50
–50
3
4
1.0 1.5 2.0 2.5
3.0 3.5 4.0 4.5 5.0
TOTAL SUPPLY VOLTAGE (V)
–1
0
1
2
5
6
7
–40
0
20
40
60
80 100
–20
COMMON MODE VOLTAGE (V)
TEMPERATURE (°C)
LT1218/19 • TPC06
LT1218/19 • TPC05
LT1218/19 • TPC04
Output Saturation Voltage vs
Load Current (Output Low)
Output Saturation Voltage vs
Load Current (Output High)
0.1Hz to 10Hz Output
Voltage Noise
10
1
10
1
V
S
= 5V, 0V
V = 5V, 0V
S
V
V
= ±2.5V
CM
S
= 0V
T
A
= 85°C
T
= 25°C
A
0.1
0.1
T
= 25°C
A
T
= –40°C
A
T
= 85°C
A
0.01
0.001
0.01
0.001
T
= –40°C
A
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
TIME (1s/DIV)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LT1218/19 • TPC08
LT1218/19 • TPC07
LT1218/19 • TPC09
8
LT1218/LT1219
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Noise Voltage Spectrum
Noise Current Spectrum
2.5
100
90
80
70
60
50
40
30
20
10
0
V
= 5V, 0V
S
V = 5V, 0V
S
2.0
1.5
1.0
0.5
0
V
= 4V
CM
V
= 2.5V
CM
V
= 2.5V
CM
V
= 4V
CM
1
10
100
1000
1
10
100
1000
FREQUENCY (Hz)
FREQUENCY (Hz)
LT1218/19 • TPC11
LT1218/19 • TPC10
LT1218 Gain and Phase
Shift vs Frequency
LT1219 Gain and Phase
Shift vs Frequency
70
60
140
120
100
80
70
60
140
120
100
80
V
S
= ±2.5V
V
S
C
L
= ±2.5V
= 0.1µF
50
50
PHASE
40
40
30
60
30
60
20
40
20
40
GAIN
PHASE
1000
10
20
10
20
0
0
0
0
–10
–20
–30
–20
–40
–60
–10
–20
–30
–20
–40
–60
GAIN
1
10
100
FREQUENCY (kHz)
1000
10000
1
10
100
FREQUENCY (kHz)
10000
LT1218/19 • TPC12
LT1218/19 • TPC13
LT1218 Gain Bandwidth and
Phase Margin vs Supply Voltage
LT1218 Common Mode Rejection
Ratio vs Frequency
LT1219 Power Supply Rejection
Ratio vs Frequency
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
400
350
300
250
200
150
100
50
80
70
60
50
40
30
20
10
0
V
= ±2.5V
V
POSITIVE SUPPLY
NEGATIVE SUPPLY
= ±2.5V
S
S
PHASE MARGIN
GBW
0
1
10
100
1000
1
10
100
1000
5
10
20
0
25
30
15
FREQUENCY (kHz)
FREQUENCY (kHz)
SUPPLY VOLTAGE (V)
LT1218/19 • TPC15
LT1218/19 • TPC16
LT1218/19 • TPC
9
LT1218/LT1219
TYPICAL PERFORMANCE CHARACTERISTICS
W
U
LT1218 Power Supply Rejection
Ratio vs Frequency
LT1218 Closed Loop Output
Impedance vs Frequency
LT1219 Closed Loop Output
Impedance vs Frequency
1000
100
10
1000
100
10
100
90
80
70
60
50
40
30
20
10
0
V
S
= ±2.5V
V
S
C
L
= ±2.5V
= 0.1µF
V
= ±2.5V
S
A
= 10
V
A
V
= 10
POSITIVE SUPPLY
A
= 1
A
V
= 1
V
1.0
1.0
NEGATIVE SUPPLY
10
0.1
0.1
1
100
1000
0.1
1
10
FREQUENCY (kHz)
100
1000
0.1
1
10
FREQUENCY (kHz)
100
1000
FREQUENCY (kHz)
LT1218/19 • TPC17
LT1218/19 • TPC18
LT1218/19 • TPC19
LT1219 Overshoot vs Load
Current, VS = ±2.5V
LT1219 Overshoot vs Load
Current, VS = ±15V
LT1218 Capacitive Load Handling
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
V
= ±2.5V
V
A
= ±15V
S
V
S
A
V
= ±2.5V
S
V
= 1
= 1
C
L
= 0.22µF
C
L
= 0.22µF
C
L
= 0.047µF
A
= 1
V
C
L
= 0.047µF
A
= 5
V
C
= 0.1µF
L
C
= 0.1µF
A
= 10
L
V
–5
0
10
10
100
1000
10000
100000
–10
–5
0
5
10
–10
5
CAPACITIVE LOAD (pF)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LT1218/19 • TPC20
LT1218/19 • TPC22
LT1218/19 • TPC21
Input Offset Drift vs Time
THD + Noise vs Frequency
Open-Loop Gain, VS = ±15V
40
30
1
0.1
40
V
V
= ±1.5V
S
V
S
= ±15V
= 2V
IN P-P
= 10k
30
20
R
L
20
10
10
R
= 10k
V
S
= ±15V
L
0
0
A
= 1
V
V
S
= ±2.5V
R
= 2k
L
–10
–20
–30
–40
–10
–20
–30
–40
0.01
0.001
A
= –1
V
0
5
0.01
0.1
1
10
–20 –15 –10 –5
10 15 20
0
20 40 60 80 100 120 140 160 180 200
TIME AFTER POWER-UP (SEC)
LT1218/19 • TPC24
FREQUENCY (kHz)
OUTPUT VOLTAGE (V)
LT1218/19 • TPC25
LT1218/19 • TPC23
10
LT1218/LT1219
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
THD + Noise vs
Peak-to-Peak Voltage
Small-Signal Response
VS = ±15V
Large-Signal Response
VS = ±15V
10
1
f = 1kHz
R
= 10k
L
(ALL CURVES)
V
V
= ±1.5V
= –1
V
S
A
V
= ±1.5V
= 1
S
0.1
A
V
S
A
V
= ±2.5V
= 1
0.01
0.001
AV = 1
AV = 1
VS = ±15V
V
A
= ±2.5V
= –1
S
V
V
S = ±15V
LT1218/18 • TPC27
LT1218/18 • TPC28
0
1
2
3
4
5
INPUT VOLTAGE (PEAK-TO-PEAK)
LT1218/19 • TPC26
U
W U U
APPLICATIONS INFORMATION
Q1/Q2 and an NPN stage Q3/Q4, which are active over
different portions of the input common mode range.
Lateral devices are used in both input stages, eliminating
theneedforclampsacrosstheinputpins.Eachinputstage
is trimmed for offset voltage. A complementary output
configuration (Q23 through Q26) is employed to create an
Rail-to-Rail Operation
The LT1218/LT1219 differ from conventional op amps in
the design of both the input and output stages. Figure 1
shows a simplified schematic of the amplifier. The input
stage consists of two differential amplifiers, a PNP stage
TRIM
+
V
D7
D6
D4
D5
BIAS
CONTROL
Q21
Q24
I1
Q10
Q17
Q11
Q23
SHDN
Q16
Q5
–
–
V
V
–
V
C1
OUT
–
V
+
+
V
V
+
IN
C2
V
Q1 Q2
+
+
V
C
C
D1
D2
–
IN
Q3 Q4
Q20
Q7
Q14 Q15
Q25
Q8
Q9
Q26
Q22
Q12
+
V
Q6
D8
– 300mV
Q13
Q18
Q19
D3
D7
–
V
LT1218/19 • F01
Figure 1. LT1218 Simplified Schematic Diagram
11
LT1218/LT1219
U
W U U
APPLICATIONS INFORMATION
output stage with rail-to-rail swing. The amplifier is fabri-
cated on Linear Technology’s proprietary complementary
bipolar process, which ensures very similar DC and AC
characteristics for the output devices Q24 and Q26.
ure 1) turns on, pulling the output of the second stage low,
which forces the output high. For input below the negative
supply, diodes D1 and D2 turn on, overcoming the satu-
ration of the input pair Q1/Q2.
A simple comparator Q5 steers current from current
source I1 between the two input stages. When the input
common mode voltage VCM is near the negative supply,
Q5isreversebiased,andI1 becomesthetailcurrentforthe
PNP differential pair Q1/Q2. At the other extreme, when
VCM is within about 1.3V from the positive supply, Q5
diverts I1 to the current mirror D3/Q6, which furnishes the
tail current for the NPN differential pair Q3/Q4.
When overdriven, the amplifier draws input current that
exceeds the normal input bias current. Figures 2 and 3
show typical input current as a function of input voltage.
The input current must be less than 10mA for the phase
reversalprotectiontoworkproperly. Whentheamplifieris
severelyoverdriven, anexternalresistorshouldbeusedto
limit the overdrive current.
110
MEASURED AS A
FOLLOWER
100
90
80
70
60
50
40
30
20
10
0
The collector currents of the two input pairs are combined
in the second stage, consisting of Q7 through Q11. Most
of the voltage gain in the amplifier is contained in this
stage. Differential amplifier Q14/Q15 buffers the output of
the second stage, converting the output voltage to differ-
ential currents. The differential currents pass through
current mirrors D4/Q17 and D5/Q16, and are converted to
differential voltages by Q18 and Q19. These voltages are
also buffered and applied to the output Darlington pairs
Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local
feedback loops around the output devices, lowering the
output impedance at high frequencies.
+
–
T = 25°C
T = 85°C
T = 70°C
T = –55°C
–500
–300
–100 V 100
300
500
S
COMMON MODE VOLTAGE RELATIVE TO
POSITIVE SUPPLY (mV)
LT1218/19 • F02
Figure 2. Input Bias Current vs Common Mode Voltage
Input Offset Voltage
0
Since the amplifier has two input stages, the input offset
voltage changes depending upon which stage is active.
The input offsets are random, but bounded voltages.
When the amplifier switches between stages, offset volt-
ages may go up, down or remain flat; but will not exceed
the guaranteed limits. This behavior is illustrated in three
distribution plots of input offset voltage in the Typical
Performance Characteristics section.
MEASURED AS A FOLLOWER
–10
+
–20
–
–30
–40
T = –55°C T = 25°C
T = 70°C
–50
–60
T = 85°C
–70
–80
–90
–100
–110
Overdrive Protection
–800
–600
–400
–200
V
S
200
Two circuits prevent the output from reversing polarity
when the input voltage exceeds the common mode range.
When the noninverting input exceeds the positive supply
by approximately 300mV, the clamp transistor Q12 (Fig-
COMMON MODE VOLTAGE RELATIVE TO
NEGATIVE SUPPLY (mV)
LT1218/19 • F03
Figure 3. Input Bias Current vs Common Mode Voltage
12
LT1218/LT1219
U
W U U
APPLICATIONS INFORMATION
Shutdown
TheSHDNpincanbedrivendirectlyfromCMOSlogicifthe
logic and the LT1218/LT1219 are operated from the same
supplies. For higher supply operation, an interface is
required. An easy way to interface between supplies is to
use open-drain logic, an example is shown in Figure 5.
BecausetheSHDNpinisreferencedtothepositivesupply,
the logic used should have a breakdown voltage greater
than the positive supply.
The biasing of the LT1218/LT1219 is controlled by the
SHDN pin. When the SHDN pin is low, the part is shut
down. In the shutdown mode, the output looks like a 40pF
capacitor and the supply current is less than 30µA. The
SHDN pin is referenced to the positive supply through an
internal bias circuit (see Figure 1). The SHDN pin current
with the pin low is typically 3µA.
15V
The switching time between the shutdown and active
states is about 20µs, however, the total time to settle will
be greater by the slew time of the amplifier. For example,
if the DC voltage at the amplifier output is 0V in shutdown
and –2V in the active mode, an additional 20µs is required.
Figures 4a and 4b show the switching waveforms for a
sinusoidal and a –2V DC input to the LT1218.
LT1218/
+
LT1219
SHDN
–
–15V
5V
SHDN
74C906
LT1218/19 • F05
0V
VOUT
Figure 5. Shutdown Interface
Trim Pins
Trim pins are provided for compatibility with other single
op amps. Input offset voltage can be adjusted over a
±2.3mV range with a 10k potentiometer.
SHDN
0V
+
RL = 10V
V
V
S = ±2.5V
LT1218/19 • F04a
Figure 4a
10k
1
–
2
3
8
7
LT1218/
LT1219
0V
OUT
+
VOUT
4
–
LT1218/19 • F06
V
Figure 6. Optional Offset Nulling
SHDN
Improved Supply Rejection in the LT1219
0V
The LT1219 is a variation of the LT1218 offering greater
supply rejection and lower high frequency output imped-
ance. The LT1219 requires a 0.1µF load capacitance for
R
L = 10V
VS = ±2.5V
LT1218/19 • F04a
Figure 4b
13
LT1218/LT1219
U
W U U
APPLICATIONS INFORMATION
compensation. The output capacitance forms a filter,
which reduces pickup from the supply and lowers the
output impedance. This additional filtering is helpful in
mixed analog/digital systems with common supplies or
systems employing switching supplies. Filtering also
reduces high frequency noise, which may be beneficial
when driving A/D converters.
positive supply. The LT1219 power supply rejection is
about ten times greater than that of the LT1218 at 50kHz.
Note the 5-to-1 scale change in the output voltage traces.
The tolerance of the external compensation capacitor is
not critical. The plots of Overshoot vs Load Current in the
Typical Performance Characteristics section illustrate the
effect of a capacitive load.
Figures7aand7bshowtheoutputsoftheLT1218/LT1219
perturbed by a 200mVP-P 50kHz square wave added to the
V+
(AC)
V+
(AC)
VOUT
VOUT
LT1218/19 • F07b
LT1218/19 • F07a
Figure 7b. LT1219 Power Supply Rejection Test
Figure 7a. LT1218 Power Supply Rejection Test
U
TYPICAL APPLICATIONS
Buffer for 12-Bit A/D Converter
High-Side Current Source
V
3V
R
CC
SENSE
0.2Ω
1µF
1k
0.1µF
0.1µF
+
–
V
IN
0.0033µF
100Ω
LT1004-1.2
LT1219
–
1
2
3
4
8
7
6
5
Q1
MTP23P06
V
V
CC
LT1218
R
REF
P
10k
+
+IN
–IN
CLK
LTC1285
I
LOAD
D
OUT
TO µP
40k
GND CS/SHDN
5V < V < 30V
CC
0A < I
< 1A AT V = 5V
LOAD
0mA < I
CC
LT1218/19 • TA03
< 160mA AT V = 30V
LOAD
CC
Q2
2N4340
LT1218/19 • TA04
14
LT1218/LT1219
U
TYPICAL APPLICATIONS
Positive Supply Current Sense
V
CC
R1
200Ω
–
R
S
0.2Ω
Q1
TP0610L
LT1218
+
I
LOAD
V
O
R2
R1
R2
20k
LOAD
V
= (I
= (I
)(R )
S
O
LOAD
(
)
)(20Ω)
LOAD
1218/19 • TA06
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.130 ± 0.005
(3.302 ± 0.127)
0.300 – 0.325
(7.620 – 8.255)
0.045 – 0.065
(1.143 – 1.651)
0.400*
(10.160)
MAX
8
1
7
6
5
4
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.255 ± 0.015*
(6.477 ± 0.381)
0.125
(3.175)
MIN
0.005
0.015
(0.380)
MIN
(0.127)
MIN
+0.025
–0.015
0.325
+0.635
8.255
2
3
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.150 – 0.157**
(3.810 – 3.988)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
1
3
4
2
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
SO8 0996
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1218/LT1219
TYPICAL APPLICATION
U
8-Channel, 12-Bit Data Acquisition System with Programmable Gain
5V
5V
1µF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
V
1µF
CH0
CH1
CH2
CH3
CH4
CH5
CH6
D
+
–
V
LT1219L
5V
D
0.1µF
OUT
INPUTS
–
D
IN
17
ADCIN
16
V
15, 19
1µF
CS
CLK
V
REF
CC
64R
32R
16R
8R
4R
2R
R
20 CH0
21 CH1
22 CH2
23 CH3
24 CH4
CH7 GND
10
6
CSADC
CSMUX
CLK
LTC1391
8-CHANNEL
MUX
5, 14
11
8-CHANNEL
MUX
12-BIT
SAMPLING
ADC
+
µP/µC
D
OUT
1
2
3
CH5
CH6
CH7
7
D
IN
–
R
GAIN
MUX
LTC1598
12
13
CHANNEL
GAIN
1
2
4
8
16
32
64
18 MUXOUT
COM
NC
NC
0
1
2
3
4
5
6
7
8
GND
4, 9
1218/19 • TA05
128
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
High DC Accuracy, 10µV V
LTC®1152
Rail-to-Rail Input and Output, Zero-Drift Op Amp
, 100nV/°C Drift, 0.7MHz GBW, 0.5V/µs
OS(MAX)
Slew Rate, Maximum Supply Current 3mA
LT1366/LT1367
LT1466/LT1467
Dual/Quad Precision, Rail-to-Rail Input and Output
Op Amps
475µV V , 400kHz GBW, 0.13V/µs Slew Rate,
Maximum Supply Current 520µA per Op Amp
OS(MAX)
Dual/Quad Micropower, Rail-to-Rail Input and Output
Op Amps
Maximum Supply Current 75µA per Op Amp, 390µV V
120kHz Gain Bandwidth
,
OS(MAX)
12189f LT/TP 0697 7K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1997
Linear Technology Corporation
●
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900
16
●
●
FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com
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