LT1224CS8 [Linear]
Very High Speed Operational Amplifier; 超高速运算放大器
| 型号： | LT1224CS8 |
| 厂家： | 
Linear |
| 描述： | Very High Speed Operational Amplifier |
| 文件： | 总8页 (文件大小：235K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1224
Very High Speed
Operational Amplifier
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
■
■
■
■
■
■
Unity-Gain Stable
TheLT1224isaveryhighspeedoperationalamplifierwith
excellent DC performance. The LT1224 features reduced
input offset voltage and higher DC gain than devices with
comparable bandwidth and slew rate. The circuit is a
singlegainstagewithoutstandingsettlingcharacteristics.
The fast settling time makes the circuit an ideal choice for
data acquisition systems. The output is capable of driving
a 500Ω load to ±12V with ±15V supplies and a 150Ω load
to ±3V on ±5V supplies. The circuit is also capable of
driving large capacitive loads which makes it useful in
buffer or cable driver applications.
45MHz Gain-Bandwidth
400V/µs Slew Rate
7V/mV DC Gain: RL = 500Ω
Maximum Input Offset Voltage: 2mV
±12V Minimum Output Swing into 500Ω
Wide Supply Range: ±2.5V to ±15V
7mA Supply Current
90ns Settling Time to 0.1%, 10V Step
Drives All Capacitive Loads
O U
PPLICATI
S
A
The LT1224 is a member of a family of fast, high per-
formance amplifiers that employ Linear Technology
Corporation’s advanced bipolar complementary
processing.
■
■
■
■
■
■
Wideband Amplifiers
Buffers
Active Filters
Video and RF Amplification
Cable Drivers
Data Acquisition Systems
U
O
TYPICAL APPLICATI
DAC Current-to-Voltage Converter
Inverter Pulse Response
7pF
5k
DAC-08
TYPE
–
+
LT1224
V
OUT
0.1µF
5k
1 LSB SETTLING = 140ns
LT1224 • TA01
LT1224 • TA02
1
LT1224
W W W
U
/O
ABSOLUTE AXI U RATI GS
PACKAGE RDER I FOR ATIO
Total Supply Voltage (V+ to V–) ............................... 36V
Differential Input Voltage ......................................... ±6V
Input Voltage ............................................................±VS
Output Short Circuit Duration (Note 1) ............ Indefinite
Operating Temperature Range
LT1224C................................................ 0°C to 70°C
Maximum Junction Temperature
Plastic Package .............................................. 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec.)................. 300°C
TOP VIEW
ORDER PART
NUMBER
NULL
–IN
1
2
3
4
8
7
6
5
NULL
+
V
LT1224CN8
LT1224CS8
+IN
OUT
NC
–
V
N8 PACKAGE
S8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC
S8 PART MARKING
1224
LT1224 • POI01
TJMAX = 150°C, θJA = 100°C/W (N8)
JMAX = 150°C, θJA = 150°C/W (S8)
T
ELECTRICAL CHARACTERISTICS VS = ±15V, TA = 25°C, RL = 1k, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
0.5
100
4
MAX
2.0
400
8
UNITS
mV
V
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Current
Input Resistance
(Note 2)
OS
I
I
nA
OS
µA
B
e
f = 10kHz
f = 10kHz
22
nV/√Hz
pA/√Hz
n
i
1.5
n
R
V
= ±12V
CM
24
12
40
250
MΩ
kΩ
IN
Differential
C
Input Capacitance
Input Voltage Range
Input Voltage Range
2
14
–13
100
84
7
pF
V
IN
+
–
–12
V
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Output Swing
V
= ±12V
86
75
dB
CM
V = ±5V to ±15V
S
dB
A
V
V
= ±10V, R = 500Ω
3.3
V/mV
V
VOL
OUT
OUT
OUT
L
R = 500Ω
L
±12.0
24
±13.3
40
400
6.4
45
5
I
Output Current
V
A
= ±12V
mA
V/µs
MHz
MHz
ns
OUT
VCL
SR
Slew Rate
= –2, (Note 3)
250
Full Power Bandwidth
Gain-Bandwidth
10V Peak, (Note 4)
f = 1MHz
GBW
t , t
r
Rise Time, Fall Time
Overshoot
A
A
= 1, 10% to 90%, 0.1V
= 1, 0.1V
f
VCL
VCL
30
5
%
Propagation Delay
Settling Time
50% V to 50% V
ns
IN
OUT
t
10V Step, 0.1%
90
1
ns
s
Differential Gain
f = 3.58MHz, R = 150Ω
%
L
Differential Phase
Output Resistance
Supply Current
f = 3.58MHz, R = 150Ω
2.4
2.5
7
Deg
Ω
L
R
A
= 1, f = 1MHz
VCL
O
I
9
mA
S
2
LT1224
ELECTRICAL CHARACTERISTICS
VS = ±5V, TA = 25°C, RL = 1k, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
1
MAX
4
UNITS
mV
nA
V
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
Input Voltage Range
(Note 2)
OS
I
I
100
4
400
8
OS
µA
V
B
+
–
2.5
4
–3
98
–2.5
V
CMRR
Common-Mode Rejection Ratio
Large-Signal Voltage Gain
V
= ±2.5V
86
dB
CM
A
V
V
= ±2.5V, R = 500Ω
2.5
7
3
V/mV
V/mV
VOL
OUT
OUT
OUT
OUT
L
= ±2.5V, R = 150Ω
L
V
Output Swing
R = 500Ω
R = 150Ω
±3.0
±3.0
±3.7
±3.3
V
V
L
L
I
Output Current
Slew Rate
V
A
= ±3V
20
40
250
13.3
34
7
mA
V/µs
MHz
MHz
ns
OUT
VCL
SR
= –2, (Note 3)
Full Power Bandwidth
Gain-Bandwidth
Rise Time, Fall Time
Overshoot
3V Peak, (Note 4)
f = 1MHz
GBW
t , t
A
A
= 1, 10% to 90%, 0.1V
= 1, 0.1V
r
f
VCL
VCL
20
7
%
Propagation Delay
Settling Time
50% V to 50% V
ns
IN
OUT
t
I
–2.5V to 2.5V, 0.1%
90
7
ns
s
Supply Current
9
mA
S
0°C ≤ TA ≤ 70°C, RL = 1k, VCM = 0V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
V = ±15V, (Note 2)
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage
1
2
4
5
mV
mV
S
V = ±5V, (Note 2)
S
Input V Drift
25
100
4
µV/°C
nA
OS
I
I
Input Offset Current
V = ±15V and V = ±5V
600
9
OS
S
S
Input Bias Current
V = ±15V and V = ±5V
µA
B
S
S
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V = ±15V, V = ±12V and V = ±5V, V = ±2.5V
83
73
98
84
dB
S
CM
S
CM
V = ±5V to ±15V
S
dB
A
V = ±15V, V
= ±10V, R = 500Ω
2.5
2.0
7
7
V/mV
V/mV
VOL
OUT
OUT
S
OUT
L
V = ±5V, V
= ±2.5V, R = 500Ω
S
OUT
L
V
Output Swing
Output Current
V = ±15V, R = 500Ω
±12.0
±3.0
±13.3
±3.3
V
V
S
L
V = ±5V, R = 500Ω or 150Ω
S
L
I
V = ±15V, V
= ±12V
= ±3V
24
20
40
40
mA
mA
S
OUT
V = ±5V, V
S
OUT
SR
Slew Rate
V = ±15V, A
= –2, (Note 3)
VCL
250
400
7
V/µs
S
I
Supply Current
V = ±15V and V = ±5V
S
10.5
mA
S
S
Note 1: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 2: Input offset voltage is tested with automated test equipment
Note 3: Slew rate is measured in a gain of –2 between ±10V on the output
with ±6V on the input for ±15V supplies and ±2V on the output with
±1.75V on the input for ±5V supplies.
in <1 second.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πVp.
3
LT1224
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input Common-Mode Range vs
Supply Voltage
Output Voltage Swing vs
Supply Voltage
Supply Current vs Supply Voltage
20
15
10
5
8.0
7.5
7.0
6.5
6.0
20
15
10
5
T
= 25°C
A
L
T
= 25°C
OS
T = 25°C
A
A
R
= 500Ω
∆V < 1mV
∆V = 30mV
OS
+V
SW
+V
–V
CM
–V
SW
CM
0
0
0
5
10
15
20
0
5
10
15
20
0
5
10
15
20
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
SUPPLY VOLTAGE (±V)
LT1224 • TPC03
LT1224 • TPC01
LT1224 • TPC02
Output Voltage Swing vs
Resistive Load
Input Bias Current vs Input
Common-Mode Voltage
Open-Loop Gain vs
Resistive Load
30
25
20
15
10
5
5.0
4.5
4.0
3.5
3.0
100
90
80
70
60
50
T
= 25°C
OS
T
= 25°C
A
A
V
= ±15V
S
A
∆V = 30mV
T
= 25°C
+
–
I
+ I
2
B
B
I
=
B
V
= ±15V
S
V
= ±15V
= ±5V
S
V
S
V
= ±5V
S
0
10
100
1k
10k
–15 –10
–5
0
5
10
15
10
100
1k
10k
LOAD RESISTANCE (Ω)
INPUT COMMON-MODE VOLTAGE (V)
LOAD RESISTANCE (Ω)
LT1224 • TPC04
LT1224 • TPC05
LT1224 • TPC06
Output Short Circuit Current vs
Temperature
Supply Current vs Temperature
Input Bias Current vs Temperature
10
9
50
4.75
4.5
55
50
45
40
35
30
25
V
= ±15V
S
V
= ±15V
V = ±5V
S
S
+
–
I
+ I
2
B
B
I
=
B
8
7
4.25
4.0
SINK
SOURCE
6
5
3.75
3.5
4
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1224 • TPC07
LT1224 • TPC08
LT1224 • TPC09
4
LT1224
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Rejection Ratio vs
Frequency
Common Mode Rejection Ratio vs
Frequency
Input Noise Spectral Density
100
80
60
40
20
0
10000
1000
100
100
10
1
120
100
80
60
40
20
0
V
T
= ±15V
= 25°C
V
T
V
R
= ±15V
V
T
= ±15V
= 25°C
S
A
S
A
S
A
= 25°C
= +101
= 100k
A
S
+PSRR
–PSRR
i
n
e
n
10
0.1
100k
100
1k
10k 100k
1M
10M 100M
10
100
1k
FREQUENCY (Hz)
10k
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
LT1224 • TPC11
LT1224 • TPC10
LT1224 • TPC12
Voltage Gain and Phase vs
Frequency
Frequency Response vs
Capacitive Load
Output Swing vs Settling Time
10
8
80
60
40
20
0
100
80
60
40
20
0
10
8
V
= ±15V
= 25°C
= –1
S
A
V
V
= ±15V
= 25°C
S
A
V
= ±15V
S
T
T
A
V
= ±5V
6
10mV SETTLING
S
6
4
4
2
0
V
= ±15V
S
A
= +1
A
= –1
= –1
C = 100pF
C = 50pF
V
V
2
V
= ±5V
S
0
–2
–4
–2
–4
–6
–8
–10
C = 0
C = 500pF
C = 1000pF
A
= +1
40
A
V
V
–6
–8
T
= 25°C
1k
A
–10
–20
1M
10M
FREQUENCY (Hz)
100M
100
10k 100k
1M
10M 100M
0
20
60
80
100
120
FREQUENCY (Hz)
SETTLING TIME (ns)
LT1224 • TPC15
LT1224 • TPC14
LT1224 • TPC13
Closed-Loop Output Impedance vs
Frequency
Gain-Bandwidth vs Temperature
Slew Rate vs Temperature
48
47
46
45
44
43
42
500
450
400
350
300
250
200
100
10
V
= ±15V
= 25°C
= 1
S
A
V
V
= ±15V
V
A
= ±15V
= –2
S
S
V
T
A
–SR
+SR
1
0.1
0.01
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
10k
100k
1M
10M
100M
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (Hz)
LT1224 • TPC17
LT1224 • TPC18
LT1224 • TPC16
5
LT1224
PPLICATI
O U
W
U
A
S I FOR ATIO
TheLT1224maybeinserteddirectlyintoHA2541,HA2544,
AD847, EL2020 and LM6361 applications, provided that
the nulling circuitry is removed. The suggested nulling
circuit for the LT1224 is shown below.
overshoot in the unity-gain small-signal transient re-
sponse. Higher noise gain configurations exhibit less
overshoot as seen in the inverting gain of one response.
Small Signal, AV = 1
Small Signal, AV = –1
Offset Nulling
+
V
5k
1
0.1µF
8
3
2
+
–
7
4
6
LT1224
LT1224 • TA04
0.1µF
–
The large-signal responses in both inverting and non-
inverting gain show symmetrical slewing characteristics.
Normally the noninverting response has a much faster
rising edge than falling edge due to the rapid change in
input common-mode voltage which affects the tail current
of the input differential pair. Slew enhancement circuitry
has been added to the LT1224 so that the noninverting
slew rate response is balanced.
V
LT1224 • TA03
Layout and Passive Components
As with any high speed operational amplifier, care must be
taken in board layout in order to obtain maximum perfor-
mance. Key layout issues include: use of a ground plane,
minimization of stray capacitance at the input pins, short
lead lengths, RF-quality bypass capacitors located close
to the device (typically 0.01µF to 0.1µF), and use of low
ESR bypass capacitors for high drive current applications
(typically 1µF to 10µF tantalum). Sockets should be
avoided when maximum frequency performance is
required, although low profile sockets can provide
reasonable performance up to 50MHz. For more details
see Design Note 50. Feedback resistor values greater than
5karenotrecommendedbecauseapoleisformedwiththe
input capacitance which can cause peaking. If feedback
resistors greater than 5k are used, a parallel
capacitorof5pFto10pFshouldbeusedtocanceltheinput
pole and optimize dynamic performance.
Large Signal, AV = 1
Large Signal, AV = –1
LT1224 • TA06
Input Considerations
Resistors in series with the inputs are recommended for
the LT1224 in applications where the differential input
voltage exceeds ±6V continuously or on a transient basis.
An example would be in noninverting configurations with
high input slew rates or when driving heavy capacitive
loads. The use of balanced source resistance at each input
isrecommendedforapplicationswhereDCaccuracymust
be maximized.
Transient Response
The LT1224 gain bandwidth is 45MHz when measured at
f = 1MHz. The actual frequency response in unity-gain is
considerablyhigherthan45MHzduetopeakingcausedby
a second pole beyond the unity-gain crossover. This is
reflected in the 50° phase margin and shows up as
6
LT1224
O U
W
U
PPLICATI
A
S I FOR ATIO
Capacitive Loading
The LT1224 is stable with all capacitive loads. This is
accomplishedbysensingtheloadinducedoutputpoleand
adding compensation at the amplifier gain node. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response. The photo of the
small-signalresponsewith1000pFloadshows50%peak-
ing.Thelarge-signalresponsewitha10,000pFloadshows
the output slew rate being limited by the short-circuit
current.
Cable Driving
R3
75Ω
+
–
V
75Ω CABLE
IN
LT1224
V
OUT
R4
R1
1k
75Ω
R2
1k
LT1224 • TA07
AV = –1, CL = 1000pF
AV = 1, CL = 10,000pF
DAC Current-to-Voltage Converter
The wide bandwidth, high slew rate and fast settling time
of the LT1224 make it well-suited for current-to-voltage
conversion after current output D/A converters. A typical
application is shown on the first page of this data sheet
with a DAC-08 type converter with a full-scale output of
2mA. A compensation capacitor is used across the feed-
back resistor to null the pole at the inverting input caused
by the DAC output capacitance. The combination of the
LT1224 and DAC settles to 40mV in 140ns for both a 0V
to 10V step and for a 10V to 0V step.
LT1224 • TA06
The LT1224 can drive coaxial cable directly, but for best
pulse fidelity the cable should be doubly terminated with
a resistor in series with the output.
U
O
TYPICAL APPLICATI S
Two Op Amp Instrumentation Amplifier
1MHz, 2nd Order Butterworth Filter
R5
220Ω
R4
10k
R2
619Ω
R1
10k
R2
1k
C2
100pF
R1
619Ω
R3
R3
1k
825Ω
–
+
V
–
+
IN
LT1224
–
+
LT1224
V
OUT
LT1224
V
–
IN
OUT
C1
500pF
V
+
R4
R3
1
2
R2
R1
R3
R4
R2 + R3
R5
A
=
1 +
+
+
= 102
[
(
)
]
V
–38dB AT 10MHz
SMALL SIGNAL OVERSHOOT = 10%
LT1224 • TA08
TRIM R5 FOR GAIN
LT1224 • TA09
TRIM R1 FOR COMMON-MODE REJECTION
BW = 430kHz
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
7
LT1224
W
W
SI PLIFIED SCHE ATIC
V+
7
NULL
1
8
BIAS 1
–IN
BIAS 2
+IN
3
2
6
OUT
V–
4
LT1224 • TA10
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic DIP
0.300 – 0.320
(7.620 – 8.128)
0.130 ± 0.005
(3.302 ± 0.127)
0.400
(10.160)
MAX
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
8
1
7
6
5
4
0.009 - 0.015
(0.229 - 0.381)
0.250 ± 0.010
(6.350 ± 0.254)
0.125
(3.175)
MIN
0.020
(0.508)
MIN
+0.025
–0.015
0.045 ± 0.015
(1.143 ± 0.381)
0.325
+0.635
8.255
(
)
3
2
–0.381
0.100 ± 0.010
0.018 ± 0.003
(2.540 ± 0.254)
(0.457 ± 0.076)
N8 1291
S8 Package
8-Lead Plastic SOIC
0.189 – 0.197
(4.801 – 5.004)
7
5
8
6
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.753)
0.004 – 0.010
(0.102 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0.228 – 0.244
0.150 – 0.157
(5.791 – 6.198)
(3.810 – 3.988)
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.356 – 0.483)
0°– 8° TYP
1
2
3
4
S8 1291
LT/GP 1192 5K REV A
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
8
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1991
相关型号：
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