LT1236ALS8 [Linear]
Precision, Low Noise, Low Profile Hermetic Voltage Reference; 精密，低噪声，低轮廓密封基准电压源
| 型号： | LT1236ALS8 |
| 厂家： | 
Linear |
| 描述： | Precision, Low Noise, Low Profile Hermetic Voltage Reference |
| 文件： | 总16页 (文件大小：232K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1236LS8
Precision, Low Noise, Low
Profile Hermetic Voltage Reference
FeaTures
DescripTion
The LT®1236LS8 is a precision reference that combines
low drift and noise with excellent long-term stability and
highoutputaccuracy.Thereferenceoutputwillbothsource
and sink up to 10mA and remains very constant with input
voltage variations.
n
Hermetic 5mm × 5mm LCC Leadless Chip Carrier
Package:
Insensitive to Humidity
Thermal Hysteresis: 8ppm (0°C to 70°C)
Thermal Hysteresis: 60ppm (–40°C to 85°C)
Low Drift:
n
The hermetic package provides outstanding humidity and
thermal hysteresis performance. The LT1236LS8 is only
5mm × 5mm × 1.5mm, offering an alternative to large
through-hole metal can voltage references, such as the
industry standard LT1021. The LT1236LS8 offers similar
performance to the LT1236, with additional stability from
the hermetic package.
A-Grade: 5ppm/°C Max
B-Grade: 10ppm/°C Max
High Accuracy:
n
A-Grade: 0.05% Max
B-Grade: 0.10% Max
n
Low Noise: <1ppm Peak-to-Peak (0.1Hz to 10Hz)
n
100% Noise Tested
LT1236LS8 is based on a buried Zener diode structure,
whichenablestemperatureandtimestability,andextremely
low noise performance of < 1ppm peak-to-peak. Noise is
100% tested in production. The LT1236LS8 operates on a
supply voltage from 7.2V up to 40V. The subsurface Zener
exhibits better time stability than even the best bandgap
reference,andthehermeticpackagemaintainsthatstability
over a wide range of environmental conditions.
n
Sinks and Sources 10mA
n
Wide Supply Range to 40V
n
8-Pin (5mm × 5mm) LS8 Package
applicaTions
n
Instrumentation and Test Equipment
n
High Resolution Data Acquisition Systems
n
A/D and D/A Converters
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Precision Regulators
n
Precision Scales
n
Digital Voltmeters
Typical applicaTion
Typical Distribution of Temperature Drift
24
DISTRIBUTION
OF THREE RUNS
22
20
18
16
14
12
10
8
Basic Connection
LT1236LS8
V
IN
V
OUT
OUT
IN
GND
6
LT1236LS8 TA01
4
2
0
–3
–1
0
1
2
3
–2
OUTPUT DRIFT (ppm/°C)
LT1236LS8 TA02
1236ls8f
1
LT1236LS8
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
NC*
Input Voltage.............................................................40V
Input/Output Voltage Differential ..............................35V
Trim Pin-to-Ground Voltage
8
NC*
1
2
3
7
6
5
NC*
Positive................................................. Equal to V
V
IN
V
OUT
OUT
Negative..............................................................–20V
NC*
TRIM**
4
Output Short-Circuit Duration
V = 35V..........................................................10 sec
GND
LS8 PACKAGE
8-PIN LEADLESS CHIP CARRIER (5mm × 5mm)
IN
V ≤ 20V..................................................... Indefinite
IN
Operating Temperature Range .................–40°C to 85°C
*CONNECTED INTERNALLY.
D0 NOT CONNECT EXTERNAL
CIRCUITRY TO THESE PINS
Storage Temperature Range .................. –65°C to 150°C
**SEE APPLICATIONS
INFORMATION SECTION
T
= 125°C, θ = 120°C/W
JA
JMAX
PACKAGE LID IS GND
orDer inForMaTion
LEAD FREE FINISH
LT1236AILS8-5#PBF
LT1236BILS8-5#PBF
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
–40°C to 85°C
†
†
12365
8-Lead Ceramic LCC 5mm × 5mm
8-Lead Ceramic LCC 5mm × 5mm
12365
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
†
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, IOUT = 0, unless otherwise noted.
LT1236LS8-5
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Voltage (Note 2)
LT1236ALS8
LT1236BLS8
4.9975
4.9950
5.000
5.000
5.0025
5.0050
V
V
Output Voltage Temperature Coefficient (Note 3)
Line Regulation (Note 4)
LT1236ALS8
LT1236BLS8
2
5
5
ppm/°C
ppm/°C
10
7.2V ≤ V ≤ 10V
4
12
20
6
ppm/V
ppm/V
ppm/V
ppm/V
IN
l
l
10V ≤ V ≤ 40V
2
IN
10
Load Regulation (Sourcing Current)
(Note 4)
0 ≤ I
≤ 10mA
15
25
40
ppm/mA
ppm/mA
OUT
l
1236ls8f
2
LT1236LS8
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, IOUT = 0, unless otherwise noted.
LT1236LS8-5
PARAMETER
CONDITIONS
0 ≤ I ≤ 10mA
MIN
TYP
MAX
UNITS
Load Regulation (Sinking Current)
(Note 4)
60
100
150
ppm/mA
ppm/mA
OUT
l
l
Supply Current
0.8
1.2
1.5
mA
mA
Output Voltage Noise
(Note 5)
0.1Hz ≤ f ≤ 10Hz
10Hz ≤ f ≤ 1kHz
3.0
2.2
µV
P-P
µV
RMS
3.5
Long-Term Stability of Output Voltage (Note 6)
Temperature Hysteresis of Output (Note 7)
∆t = 1000Hrs Non-Cumulative
20
ppm
∆T = 25°C
∆T = 0°C to 70°C
∆T = –40°C to 85°C
3
8
60
ppm
ppm
ppm
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Output voltage is measured immediately after turn-on. Changes
due to chip warm-up are typically less than 0.005%.
Note 3: Temperature coefficient is measured by dividing the change in
output voltage over the temperature range by the change in temperature.
Incremental slope is also measured at 25°C.
Note 4: Line and load regulation are measured on a pulse basis. Output
changes due to die temperature change must be taken into account
separately.
Note 5: RMS noise is measured with a 2-pole highpass filter at 10Hz and a
2-pole lowpass filter at 1kHz. The resulting output is full-wave rectified and
then integrated for a fixed period, making the final reading an average as
opposed to RMS. Correction factors are used to convert from average to
RMS, and 0.88 is used to correct for the non-ideal bandbass of the filters.
Peak-to-peak noise is measured with a single highpass filter at 0.1Hz and a
2-pole lowpass filter at 10Hz. The unit is enclosed in a still-air environment
to eliminate thermocouple effects on the leads. Test time is 10 seconds.
Note 6: Long-term stability typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the first thousand hours, with a continuing trend toward
reduced drift with time. Significant improvement in long-term drift can
be realized by preconditioning the IC with a 100-200 hour, 125°C burn in.
Long term stability will also be affected by differential stresses between
the IC and the board material created during board assembly. Temperature
cycling and baking of completed boards is often used to reduce these
stresses in critical applications.
Note 7: Hysteresis in output voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled to high or low temperature before successive measurements.
Hysteresis is roughly proportional to the square of temperature change.
Hysteresis is not normally a problem for operational temperature
excursions, but can be significant in critical narrow temperature range
applications where the instrument might be stored at high or low
temperatures. Hysteresis measurements are preconditioned by one
temperature cycle.
1236ls8f
3
LT1236LS8
Typical perForMance characTerisTics
Ripple Rejection
Ripple Rejection
Start-Up
130
8
7
6
5
4
3
115
110
105
100
95
V
C
= 15V
OUT
V
= 0V TO 12V
f = 150Hz
IN
IN
= 0
120
110
100
90
80
70
90
60
50
85
25 30
10 15 20
INPUT VOLTAGE (V)
10
100
1k
10k
0
5
35 40
12
0
2
4
6
8
10
14
TIME (µs)
FREQUENCY (Hz)
1236ls8 G01
1236ls8 G03
1236ls8 G02
Output Voltage Noise
Output Voltage Temperature Drift
Output Voltage Noise Spectrum
16
14
12
10
8
5.005
5.004
5.003
5.002
5.001
5.000
400
350
300
250
200
150
100
50
C
= 0
OUT
FILTER = 1 POLE
= 0.1Hz
f
LOW
6
4
2
0
0
10
100
1k
10k
10
100
1k
10k
–40
0
20
40
60
–20
80 100
FREQUENCY (Hz)
BANDWIDTH (Hz)
TEMPERATURE (°C)
1236ls8 G04
1236ls8 G05
1236ls8 G06
Load Regulation
Quiescent Current
Sink Mode Current Limit
5
4
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
60
50
V
= 8V
I
= 0
V
= 8V
IN
OUT
IN
3
2
40
T
= – 55°C
J
1
0
T
= 25°C
30
20
J
–1
– 2
– 3
– 4
– 5
T
= 125°C
J
10
0
0
–10 –8 – 6 – 4 – 2
SOURCING
0
2
4
6
8
10
0
5
10 15 20 25
INPUT VOLTAGE (V)
40
30 35
0
2
4
6
8
10 12 14 16 18
SINKING
OUTPUT VOLTAGE (V)
1236ls8 G08
1236ls8 G09
OUTPUT CURRENT (mA)
1236ls8 G07
1236ls8f
4
LT1236LS8
Typical perForMance characTerisTics
Load Transient Response,
CLOAD = 0
Thermal Regulation
V
= 25V
IN
∆POWER = 200mW
I
= 0
I
= 0
SOURCE
SINK
LOAD
REGULATION
0
– 0.5
–1.0
50mV
50mV
THERMAL
REGULATION*
I
= 0.2mA
SINK
I
= 0.5mA
SOURCE
I
= 2-10mA
I
= 2-10mA
SINK
SOURCE
I
= 10mA
LOAD
∆I
= 100µA
∆I
0
= 100µA
P-P
SOURCE
P-P
SINK
60 80
20 40
TIME (ms)
0
1
2
4
1
2
3
4
0
100 120 140
3
TIME (µs)
1236ls8 G11
*INDEPENDENT OF TEMPERATURE COEFFICIENT
1236ls8 G10
Load Transient Response,
C
LOAD = 1000pF
Output Noise 0.1Hz to 10Hz
FILTERING = 1 ZERO AT ORIGIN
1 POLE AT 0.1Hz
I
= 0
I
= 0
SINK
SOURCE
2 POLES AT 10Hz
5µV (1ppm)
20mV
20mV
I
= 0.2mA
I
= 0.2mA
SINK
SOURCE
I
= 2-10mA
SINK
I
= 2-10mA
SOURCE
∆I
SOURCE
= 100µA
P-P
∆I
SINK
= 100µA
P-P
4
6
0
5
10 15 20
0
5
10 15 20
0
1
2
3
5
TIME (µs)
TIME (MINUTES)
1236ls8 G13
1236ls8 G12
1236ls8f
5
LT1236LS8
pin FuncTions
NC (Pins 1, 3, 7, 8): Connected internally, do not connect.
TRIM (Pin 5): Allows adjustment of output voltage. See
Applications Information section for details.
V (Pin 2): Power Supply. Bypass with 0.1µF (or larger)
IN
capacitor to ground.
V
OUT
(Pin6):OutputVoltage.SeeApplicationsInformation
section for details regarding DC and capacitive loading
and stability.
GND(Pin4):DeviceGround.SeeApplicationsInformation
section for recommended connection methods.
block DiagraM
INPUT
Q2
R1
R2
OUTPUT
D6
+
–
D5
6.3V
A1
R3
R4
D3
D4
TRIM
Q1
GND
1236sl8 ES
1236ls8f
6
LT1236LS8
applicaTions inForMaTion
Effect of Reference Drift on System Accuracy
LT1236LS8
IN
GND TRIM
A large portion of the temperature drift error budget in
many systems is the system reference voltage. This graph
indicates the maximum temperature coefficient allowable
if the reference is to contribute no more than 0.5LSB error
to the overall system performance. The example shown is
a 12-bit system designed to operate over a temperature
rangefrom25°Cto65°C.Assumingthesystemcalibration
is performed at 25°C, the temperature span is 40°C. It can
be seen from the graph that the temperature coefficient
of the reference must be no worse than 3ppm/°C if it is
to contribute less than 0.5LSB error. For this reason, the
LT1236LS8 has been optimized for low drift.
V
OUT
OUT
R1
27k
R2
50k
1N4148
1236ls8 AI02
Capacitive Loading and Transient Response
The LT1236LS8 is stable with all capacitive loads, but for
optimum settling with load transients, output capacitance
should be under 1000pF. The output stage of the reference
is class AB with a fairly low idling current. This makes
transient response worst-case at light load currents.
Because of internal current drain on the output, actual
Maximum Allowable Reference Drift
100
worst-case occurs at I
= 0. Significantly better load
LOAD
8-BIT
transient response is obtained by moving slightly away
from these points. See Load Transient Response curves
for details. In general, best transient response is obtained
when the output is sourcing current. In critical applica-
tions, a 10µF solid tantalum capacitor with several ohms
in series provides optimum output bypass.
10-BIT
10
12-BIT
14-BIT
Load Regulation
1.0
10 20
40
60 70 80
100
90
30
50
The LT1236LS8 is capable of driving 10mA to a load. The
load regulation at the output of the LT1236LS8 is very
good, with a change of less than 25ppm/mA when driving
the load. However, the load current will cause a voltage
drop in the connecting wire between the LT1236LS8 and
the load. This IR drop is dependent on the resistance of
the connecting wire and will appear as additional load
regulation error. For example, 12 feet of #22 gauge wire or
1 foot of 0.025 inch printed circuit board trace will create
2mV loss at 10mA output current. This is equivalent to
1LSB in a 10V, 12-bit system.
TEMPERATURE SPAN (°C)
1236ls8 AI01
Trimming Output Voltage
The LT1236LS8 has an output voltage trim pin, but the
temperature drift of the nominal 4V open circuit voltage
at pin 5 is about –1.7mV/°C. For the voltage trimming not
to affect reference output temperature drift, the external
trim voltage must track the voltage on the trim pin. Input
impedance of the trim pin is about 100kΩ and attenua-
tion to the output is 13:1. The technique shown below
is suggested for trimming the output of the LT1236LS8
while maintaining minimum shift in output temperature
coefficient. The R1/R2 ratio is chosen to minimize interac-
tion of trimming and temperature drift shifts, so the exact
values shown should be used.
Therearethreeapproachesthatwillreducethiseffect.First,
limiting the distance between the LT1236LS8 and the load
will reduce the trace length, and improve load regulation.
Second, use wider traces for the connections between
the LT1236LS8 and the load to reduce IR drop. Finally,
1236ls8f
7
LT1236LS8
applicaTions inForMaTion
Series Mode with Boost Transistor
use a star-ground method, with the LT1236LS8 ground
tied directly to the load, rather than through a ground
plane or other shared ground trace. This last method will
reduce drop in the ground trace between the LT1236LS8
and the load. The ground wire in this case will carry only
approximately 1mA, which is the ground current of the
LT1236LS8, while the load return current will shunt to the
system ground separate from the reference-to-load path.
INPUT
R1
220Ω
2N3906
IN
LT1236LS8
OUT
LOAD
GND
R2*
The following circuits show proper hook-up to minimize
errors due to ground loops and line losses. Losses in the
output lead can be greatly reduced by adding a PNP boost
transistor if load currents are 5mA or higher. R2 can be
added to further reduce current in the output sense lead.
GROUND
RETURN
*OPTIONAL—REDUCES CURRENT IN OUTPUT SENSE
LEAD: R2 = 2.4k
1236ls8 AI04
Long-Term Drift
Effects of Air Movement on Low Frequency Noise
Long-term drift cannot be extrapolated from accelerated
high temperature testing. This erroneous technique gives
drift numbers that are wildly optimistic. The only way
long-term drift can be determined is to measure it over
the time interval of interest.
The LT1236LS8 has very low noise because of the buried
zener used in its design. In the 0.1Hz to 10Hz band, peak-
to-peaknoiseisabout0.5ppmoftheDCoutput.Toachieve
this low noise, however, care must be taken to shield the
reference from ambient air turbulence. Air movement can
createnoisebecauseofthermoelectricdifferencesbetween
ICpackageleadsandprintedcircuitboardmaterialsand/or
sockets. Powerdissipationinthereference, eventhoughit
rarely exceeds 20mW, is enough to cause small tempera-
ture gradients in the package leads. Variations in thermal
resistance, caused by uneven air flow, create differential
leadtemperatures,therebycausingthermoelectricvoltage
noise at the output of the reference.
The LT1236LS8 long-term drift data was collected on 80
parts that were soldered into printed circuit boards similar
to a real world application. The boards were then placed
into a constant temperature oven with a T = 35°C, their
A
outputs were scanned regularly and measured with an 8.5
digit DVM. Typical long-term drift is illustrated in Figure 1.
200
NORMALIZED TO 10 HOURS
DUE TO SYSTEM WARM-UP
160
120
80
Standard Series Mode
40
LT1236LS8
KEEP THIS LINE RESISTANCE LOW
0
INPUT
IN
OUT
+
LOAD
GND
–40
–80
–120
–160
–200
GROUND
RETURN
1236ls8 AI03
0
500
1000
1500
2000
HOURS
1236ls8 F01
Figure 1. Long-Term Drift
1236ls8f
8
LT1236LS8
applicaTions inForMaTion
Hysteresis
stresses on the die have changed position. This shift is
similar, but more extreme than thermal hysteresis.
Thermal hysteresis is a measure of change of output volt-
age as a result of temperature cycling. Figure 2a and 2b
illustrate the typical hysteresis based on data taken from
theLT1236LS8. Aproprietarydesigntechniqueminimizes
thermal hysteresis.
Experimental results of IR reflow shift are shown below
in Figure 4. These results show only shift due to reflow
and not mechanical stress.
300
380s
T
= 260°C
P
IR Reflow Shift
RAMP
DOWN
T
= 217°C
L
225
150
75
The mechanical stress of soldering a part to a board can
cause the output voltage to shift. Moreover, the heat of
an IR reflow or convection soldering oven can also cause
the output voltage to shift. The materials that make up a
semiconductor device and its package have different rates
of expansion and contraction. After a part undergoes the
extreme heat of a lead-free IR reflow profile, like the one
shown in Figure 3, the output voltage shifts. After the
device expands, due to the heat, and then contracts, the
T
= 200°C
S(MAX)
t
P
T
= 190°C
S
30s
T = 150°C
t
L
RAMP TO
150°C
130s
40s
120s
4
0
0
2
6
8
10
MINUTES
1236ls8 F03
22
Figure 3. Lead-Free Reflow Profile
25°C TO 0°C TO 25°C
25°C TO 70°C TO 25°C
20
18
16
14
12
10
8
10
9
8
7
6
5
4
3
2
1
0
1× REFLOW
3× REFLOW
24Hr REST
6
4
2
0
–50 –30 –10 10
30
50
70
90
DISTRIBUTION (ppm)
1236ls8 F02a
–0.05 –0.04 –0.03 –0.02 –0.01
REFLOW SHIFT (%)
0
0.01
Figure 2a. Hysteresis Plot 0°C to 70°C
1236ls8 F04
35
Figure 4. Output Voltage Shift Due to IR Reflow
25°C TO –40°C TO 25°C
25°C TO 85°C TO 25°C
30
25
20
15
10
5
Humidity Sensitivity
Plastic mold compounds absorb moisture. With changes
in relative humidity, plastic packaging materials change
the amount of pressure they apply to the die inside, which
can cause slight changes in the output of a voltage refer-
ence, usually on the order of 100ppm. The LS8 package is
hermetic, so it is not affected by humidity, and is therefore
more stable in environments where humidity may be a
concern.However,PCBoardmaterialmayabsorbmoisture
and apply mechanical stress to the LT1236LS8. Proper
0
–120 –80 –40
0
40
80
120
DISTRIBUTION (ppm)
1236ls8 F02b
board materials and layout are essential.
Figure 2b. Hysteresis Plot –40°C to 85°C
1236ls8f
9
LT1236LS8
Typical applicaTions
Boosted Output Current
with Current Limit
Boosted Output Current
with No Current Limit
+
+
V
≥ 9V
V ≥ 10V
D1*
LED
R1
220Ω
R1
220Ω
8.2Ω
2N2905
2N2905
IN
LT1236LS8
OUT
IN
LT1236LS8
OUT
5V AT
100mA
5V AT
100mA
GND
+
2µF
SOLID
TANT
GND
+
2µF
SOLID
TANT
1236ls8 TA03
*GLOWS IN CURRENT LIMIT,
DO NOT OMIT
1236ls8 TA04
Handling Higher Load Currents
10V
30mA
R1*
169Ω
IN
LT1236LS8
V
OUT
OUT
5V
GND
TYPICAL LOAD
CURRENT = 30mA
R
L
*SELECT R1 TO DELIVER TYPICAL LOAD CURRENT.
LT1236 WILL THEN SOURCE OR SINK AS NECESSARY
TO MAINTAIN PROPER OUTPUT. DO NOT REMOVE LOAD
AS OUTPUT WILL BE DRIVEN UNREGULATED HIGH. LINE
REGULATION IS DEGRADED IN THIS APPLICATION
1236ls8 TA05
1236ls8f
10
LT1236LS8
Typical applicaTions
Operating 5V Reference from 5V Supply
5V LOGIC
SUPPLY
1N914
CMOS LOGIC GATE**
≥ 2kHz*
LT1236LS8
IN
1N914
+
≈8.5V
5V
f
OUT
IN
REFERENCE
+
C2*
5µF
GND
C1*
5µF
*FOR HIGHER FREQUENCIES C1 AND C2 MAY BE DECREASED
**PARALLEL GATES FOR HIGHER REFERENCE CURRENT LOADING
1236ls8 TA06
2-Pole Lowpass Filtered Reference
1µF
MYLAR
V
IN
–
V
LT1236LS8
IN
LT1001
REF
OUT
+
V
IN
R1
36k
R2
36k
GND
TOTAL NOISE
0.5µF
MYLAR
≤2µV
f = 10Hz
RMS
1Hz ≤ f ≤ 10kHz
–V
REF
1236ls8 TA07
1236ls8f
11
LT1236LS8
Typical applicaTions
High Precision, High Stability, Differential Measurement System
8V TO 12V
5V
LT1236LS8
4.7µF
0.01µF
10µF
15
V
CC
BUSY
R1
5k
14
+
f
O
REF
LTC2440
–
13
12
11
4
0.1µF
SCK
REF
C1
0.01µF
R2
SDO
–
+
10Ω
5
6
+
CS
IN
C2
7
+
–
IN
IN
IN
SDI
1µF
1
/
/
LTC2051HV
LTC2051HV
2
R4
5k
1, 8, 9, 16
10
EXT
C4
0.01µF
1236ls8 TA08
R5
10Ω
–
+
C5
1µF
–
1
2
C2, C5 TAIYO YUDEN JMK107BJ105MA
1236ls8f
12
LT1236LS8
Typical applicaTions
Use Resistor Arrays to Provide Precise Matching in Excitation Amplifier
15V
5V
3
2
+
LT1236LS8
20Ω
1/2
LT1112
1
+
Q1
C3
47µF
C1
0.1µF
2N3904
22Ω
–
C1
0.1µF
RN1
10k
10V
5V
1
8
7
1
RN1
10k
V
CC
6
350Ω BRIDGE
TWO ELEMENTS
VARYING
LTC2411/
LTC2411-1
2
3
+
REF
–
REF
4
5
+
IN
–5V
–
IN
4
5
RN1
10k
GND
6
RN1
10k
3
6
15V
C2
0.1µF
33Ω
×2
RN1 IS LT5400ACMS8E-1
8
6
–
Q2, Q3
2N3906
×2
20Ω
1/2
7
LT1112
5
+
4
–15V
1236ls8 TA09
–15V
1236ls8f
13
LT1236LS8
Typical applicaTions
10V Range Precision Measurement System
+
REF
2
6
5
V
IN1
5V
IN
OUT
LT1236LS8
GND TRIM
C15
4.7k
R20
1k
C13
0.1µF
C8
0.1µF
4
–2.5V
2.5V
5V
–2.5V
29
21
+
R1
40k
R3
5k
R4
5k
V
V
CC
+
REF
–2.5V
30
31
6
35
+
REF
REF
CS
5V
1
–
LTC2442
SCK
SD0
6
36
33
3
4
R5
8.87k
CH0
+
1
7
CH1
SDI
8
9
2
CH2
BUSY
–
5
34
3
2
CH3
F
O
28
LTC2050HV
–5V
–2.5V
COM
ADCINB
ADCINA
OUTA
–INA
OUTB
–INB
EXT
10
11
12
13
17
18
27
26
MUOUTA
C14
0.1µF
MUXOUTB
V
IN2
R6
30k
R9
10k
R10
7.5k
C10
0.1µF
25
19
+INA
+INB
–
GND GND GND
32
V
4
5
24
74HC4053
–5V
–2.5V
12
13
2
14
15
4
C17
0.1µF
C9
–2.5V
2.5V
X0
X1
Y0
Y1
Z0
X
Y
Z
0.1µF
R21
5k
1
5V
5
SDO
3
Z1
R22
1.8k
6
MMBT3904
INH
11
10
9
A
B
C
V
SDI
CS
5V
CC
V
–2.5V
EE
GND
R1, R3, R4 ARE CADDOCK T914
SCK
1236sl8 TA10
1236ls8f
14
LT1236LS8
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LS8 Package
8-Pin Leadless Chip Carrier (5mm × 5mm)
(Reference LTC DWG # 05-08-1852 Rev Ø)
8
2.50 0.15
PACKAGE OUTLINE
7
1
2
3
6
5
2.54 0.15
1.50 0.15
4
0.70 0.05
5.00 SQ 0.15
5.80 SQ 0.15
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
5.00 SQ 0.15
4.20 SQ 0.10
8
1.45 0.10
0.95 0.10
R0.20 REF
8
2.00 REF
PIN 1
1
1
2
7
6
7
6
TOP MARK
(SEE NOTE 5)
2
2.54 0.15
4.20 0.10
5
3
3
5
R0.20 REF
1.00 TYP
LS8 0609 REV Ø
4
4
0.70 TYP
0.10 TYP
0.64 TYP
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS
PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE
4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
1236ls8f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1236LS8
Typical applicaTion
Measure DC to Daylight Using the LTC2408 and LT1236LS8
DC
VOLTMETER
INPUT
R1
GUARD RING
900k
5V
0.1%, 1W, 1000 WVDC
7
ELECTROMETER
1mV TO 1000V
3
2
R5
5k, 1%
+
INPUT
R2
4.7k
6
(pH, PIEZO)
LT1793
0.1%
0V TO 5V
–
4
–60mV TO 4V
–5V
R3, 10k
LT1236LS8
OUT IN
R4
1k
6
2
5V
8V
REF
C1, 0.1µF
+
+
5V
MAX
GND
4
10µF
100µF
3-WIRE R-PACK
60Hz
R6
10k, 0.1%
R7
5V
10k, 0.1%
AC
INPUT
5V
7
7
4
3
V
2, 8
V
CC
1µF
SERIAL DATA LINK
1µF
RT
R9
1k
1%
R10
MUXOUT
ADCIN
REF
5k
IN914
IN914
2
–
1%
9
CH0
6
MICROWIRE AND
SPI COMPATABLE
10 CH1
11 CH2
12 CH3
13 CH4
14 CH5
15 CH6
17 CH7
LTC1050
23
20
CSADC
R8
100Ω, 5%
3
+
CSMUX
4
19, 25
21
24-BIT
CLK
8-CHANNEL
MUX
20mV TO 80mV
MPU
∆∑ ADC
–5V
D
IN
R11
24
SDO
24.9k, 0.1%
V
REF
5V
LTC2408
GND
INTERNAL OSC
60Hz–RF
RF POWER
26
F
SELECTED FOR
O
60Hz REJECTION
<1mV
J1
J2
100Ω
1, 5, 6, 16, 18, 22, 27, 28
Pt RTD
50Ω
(3-WIRE)
FORCE SENSE
2.7V AT 0°C
0.9V AT 40°C
1236sl8 TA11
–2.2mV to 16mV
0V to 4V
R12
24.9k, 0.1%
V
REF
5V
J3
50Ω LOAD
BONDED TO
RTD ON
INSULATED
MOUNTING
LOCAL
TEMP
THERMISTOR
10k NTC
5V
DAYLIGHT
HAMAMATSU
PHOTODIODE
S1336-5BK
OMEGA
0S36-01
INFRARED
R13
5k
0.1%
INFRARED
THERMOCOUPLE
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LT1021
Precision References for Series or Shunt Operation in
Hermetic TO-5, SOP-8, DIP-8 Package
0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise
(0.1Hz to 10Hz), –55°C to 125°C (TO-5)
LT1236S8/
LT1236N8
Low Drift, Low Noise, 5V and 10V Voltage Reference in
SO8, and DIP8 Package
0.05% Max Initial Error, 5ppm/°C Max Drift, 1ppm Peak-to-Peak Noise
(0.1Hz to 10Hz), –40°C to 85°C
LTC6652LS8
High Precision, Buffered Voltage Reference Family in
5mm × 5mm Hermetic QFN Package
0.05% Max Initial Error, 5ppm/°C Max Drift, Shutdown Current <2µA,
–40°C to 125°C Operation
LT6654LS8
Precision, Low Noise, High Output Drive Voltage Reference 1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz, Sink/Source 10mA, 5ppm/°C
Family in 5mm × 5mm Hermetic QFN Package
Max Drift, –40°C to 125°C Operation
1236ls8f
LT 0812 • PRINTED IN USA
16 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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