LT1242IN8#PBF [Linear]
LT1242 - High Speed Current Mode Pulse Width Modulators; Package: PDIP; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LT1242IN8#PBF |
| 厂家： | 
Linear |
| 描述： | LT1242 - High Speed Current Mode Pulse Width Modulators; Package: PDIP; Pins: 8; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总16页 (文件大小：286K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1241 Series
High Speed Current Mode
Pulse Width Modulators
U
DESCRIPTIO
EATURE
S
F
Low Start-Up Current: < 250µA
50ns Current Sense Delay
Current Mode Operation: To 500kHz
Pin Compatible with UC1842 Series
Undervoltage Lockout with Hysteresis
No Cross-Conduction Current
The LT®1241 series devices are 8-pin, fixed frequency,
currentmode,pulsewidthmodulators.Theyareimproved
plugcompatibleversionsoftheindustrystandardUC1842
series. These devices have both improved speed and
lower quiescent current. The LT1241 series is optimized
for off-line and DC/DC converter applications. They con-
tain a temperature-compensated reference, high gain er-
ror amplifier, current sensing comparator and a high
current totem pole output stage ideally suited to driving
power MOSFETs. Start-up current has been reduced to
less than 250µA. Cross-conduction current spikes in
the output stage have been eliminated, making 500kHz
operation practical. Several new features have been incor-
porated. Leading edge blanking has been added to the
current sense comparator. Trims have been added to the
oscillator circuit for both frequency and sink current, and
both of these parameters are tightly specified. The output
stage is clamped to a maximum VOUT of 18V in the
on state. The output and the reference output are actively
pulled low during undervoltage lockout.
■
■
■
■
■
■
■
■
■
■
Trimmed Bandgap Reference
1A Totem Pole Output
Trimmed Oscillator Frequency and Sink Current
Active Pull-Down on Reference and Output During
Undervoltage Lockout
■
■
High Level Output Clamp: 18V
Current Sense LeO adU ing Edge Blanking
PPLICATI
S
A
■
Off-Line Converters
DC/DC Converters
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
W
BLOCK DIAGRA
UV
LOCKOUT
REFERENCE ENABLE
REFERENCE PULL-DOWN
5V REF
MAIN BIAS
8
7
V
V
REF
CC
OUTPUT
PULL-DOWN
4
OSCILLATOR
R /C
T
T
T
6
5
OUTPUT
GND
S
R
5.6V
1
2
1V
COMP
FB
1mA
–
+
2R
BLANKING
1.5V
–
+
2.5V
18V
R
+
3
I
SENSE
–
1241 BD01
1
LT1241Series
W W W
U
ABSOLUTE AXI U RATI GS
/O
PACKAGE RDER I FOR ATIO
Supply Voltage ........................................................ 25V
Output Current....................................................... ±1A*
Output Energy (Capacitive Load per Cycle)...............5µJ
Analog Inputs (Pins 2, 3)............................... –0.3 to 6V
Error Amplifier Output Sink Current...................... 10mA
Power Dissipation at TA ≤ 25°C ................................ 1W
Operating Junction Temperature Range
LT124XC ............................................. 0°C to 100°C
LT124XI......................................... – 40°C to 100°C
LT124XM........................................ –55°C to 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
TOP VIEW
NUMBER
COMP
FB
V
V
1
2
3
4
8
7
6
5
REF
CC
LT124XCJ8
LT124XCN8
LT124XCS8
LT124XIN8
LT124XIS8
LT124XMJ8
I
OUTPUT
GND
SENSE
R /C
T
T
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
S8 PART MARKING
TJMAX = 125°C, θJA = 100°C/W (J8)
TJMAX = 100°C, θJA = 130°C/W (N8)
TJMAX = 100°C, θJA = 150°C/W (S8)
124X
124XI
*The 1A rating for output current is based on transient switching
requirements.
(Notes 1, 2)
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Section
Output Voltage
I = 1mA, T = 25°C
4.925
5.000
3
5.075
20
V
mV
O
J
Line Regulation
12V < V < 25V
●
●
CC
Load Regulation
1mA < I
< 20mA
–6
–25
mV
VREF
Temperature Stability
Total Output Variation
Output Noise Voltage
Long Term Stability
Output Short-Circuit Current
Oscillator Section
Initial Accuracy
0.1
mV/°C
V
Line, Load, Temp
10Hz < F < 10kHz, T = 25°C
●
●
4.87
–30
5.13
50
5
µV
J
T = 125°C, 1000 Hrs.
A
25
mV
–90
–180
mA
R = 10k, C = 3.3nF, T = 25°C
47.5
228
50
52.5
268
1
kHz
kHz
%
T
T
J
R = 13.0k, C = 500pF, T = 25°C
248
T
T
J
Voltage Stability
12V < V < 25V, T = 25°C
CC J
Temperature Stability
Amplitude
T
< T < T
MAX
–0.05
1.7
%/°C
V
MIN
J
T = 25°C (Pin 4)
J
Clock Ramp Reset Current
Error Amplifier Section
Feedback Pin Input Voltage
Input Bias Current
V
(Pin 4) = 2V, T = 25°C
7.9
8.2
8.5
mA
OSC
J
V
V
= 2.5V
●
●
●
2.42
2.50
2.58
–2
V
µA
PIN1
= 2.5V
FB
Open-Loop Voltage Gain
Unity-Gain Bandwidth
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
2 < V < 4V
65
0.7
60
90
dB
O
T = 25°C
J
1.3
2
MHz
dB
12V < V < 25V
●
●
●
CC
V
PIN2
V
PIN2
= 2.7V, V
= 2.3V, V
= 1.1V
= 5V
2
6
mA
mA
PIN1
PIN1
–0.5
–0.75
2
LT1241 Series
(Notes 1, 2)
ELECTRICAL CHARACTERISTICS
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Error Amplifier Section
Output Voltage High Level
Output Voltage Low Level
Current Sense Section
Gain
V
V
= 2.3V, R = 15k to GND
●
●
5
5.6
0.2
V
V
PIN2
L
= 2.7V, R = 15k to Pin 8
1.1
PIN2
L
●
●
●
●
●
2.85
0.90
3.00
1.00
70
3.15
1.10
V/V
V
Maximum Current Sense Input Threshold
Power Supply Rejection Ratio
Input Bias Current
V
PIN3
< 1.1V
dB
µA
ns
ns
V
–1
10
Delay to Output
50
100
Blanking Time
100
1.5
Blanking Override Voltage
Output Section
Output Low Level
I
I
= 20mA
= 200mA
●
●
0.25
0.75
0.4
2.2
V
V
OUT
OUT
Output High Level
I
I
= 20mA
= 200mA
●
●
12.0
11.75
V
V
OUT
OUT
Rise Time
C = 1nF, T = 25°C
50
30
18
80
60
ns
ns
V
L
J
Fall Time
C = 1.0nF, T = 25°C
L J
Output Clamp Voltage
Undervoltage Lockout
I = 1mA
O
●
19.5
Start-Up Threshold
LT1241
●
●
●
9.0
15
7.8
9.6
16
8.4
10.2
17
9.0
V
V
V
LT1242/LT1244
LT1243/LT1245
Minimum Operating Voltage
LT1241/LT1243/LT1245
LT1242/LT1244
●
●
7.0
9.0
7.6
10
8.2
11
V
V
Hysteresis
LT1241
LT1242/LT1244
LT1243/LT1245
1.6
5.5
0.4
2.0
6.0
0.8
V
V
V
PWM
Maximum Duty Cycle
LT1241/LT1244/LT1245
LT1242/LT1243
T = 25°C
T = 25°C
J
46
94
48
96
%
%
J
Minimum Duty Cycle
Total Device
●
0
%
Start-Up Current
Operating Current
●
●
170
7
250
10
µA
mA
The
temperature range.
Note 1: Unless otherwise specified, V = 15V, R = 10k, C = 3.3nF.
●
denotes those specifications which apply over the full operating
Note 2: Low duty cycle pulse techniques are used during test to maintain
junction temperature close to ambient.
CC
T
T
3
LT1241Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undervoltage Lockout –
LT1242, LT1244
Undervoltage Lockout –
LT1243, LT1245
Undervoltage Lockout – LT1241
17
16
15
11
10
9
11
10
9
11
10
9
START-UP THRESHOLD
START-UP THRESHOLD
START-UP THRESHOLD
8
8
7
6
MINIMUM OPERATING VOLTAGE
MINIMUM OPERATING VOLTAGE
MINIMUM OPERATING VOLTAGE
7
6
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1241 • TPC02
LT1241 • TPC01
LT1241 • TPC03
Start-Up Current
Start-Up Current
Supply Current
200
180
160
140
120
100
80
10
9
200
150
100
50
V
= 15V
= 10k
START-UP
THRESHOLD
CC
R
T
T
C
= 3300pF
LT1241
LT1242/4
LT1243/5
8
7
60
40
6
T = 25°C
20
J
0
5
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
2
4
6
8
10 12 14 16 18
(V)
TEMPERATURE (°C)
TEMPERATURE (°C)
V
CC
LT1241 • TPC05
LT1241 • TPC06
LT1241 • TPC04
Supply Current vs
Oscillator Frequency
Oscillator Frequency
Oscillator Sink Current
8.7
8.6
8.5
8.4
8.3
8.2
8.1
8.0
7.9
7.8
7.7
60
58
56
54
52
50
48
46
44
42
40
10
9
V
R
C
= 5V
V
= 2V
CC
T
PIN4
= 10k
LT1242, LT1243
= 3300pF
T
8
LT1241, LT1244, LT1245
7
6
5
4
3
2
1
0
V
= 15V
= 10k
CC
R
C
T
= 15pF
L
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
10k
100k
OSCILLATOR FREQUENCY (Hz)
1M
TEMPERATURE (°C)
LT1241 • TPC08
LT1241 • TPC07
LT1241 • TPC18
4
LT1241 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Reference Voltage
Reference Short-Circuit Current
Feedback Pin Input Voltage
140
120
100
80
2.55
2.54
2.53
2.52
2.51
2.50
2.49
2.48
2.47
5.05
5.04
5.03
5.02
5.01
5.00
I
= 1mA
O
4.99
4.98
4.97
60
40
2.46
2.45
4.96
4.95
20
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LT1241 • TPC09
LT1241 • TPC11
LT1241 • TPC10
Error Amplifier Open-Loop Gain
and Phase
Current Sense Clamp Voltage
Current Sense Input Threshold
1.05
1.2
1.0
100
80
225
180
V
V
= 15V
CC
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
= 2.0V - 4.0V
= 100k
O
GAIN
R
L
T
= 25°C
A
0.8
0.6
0.4
60
40
20
135
90
T = –55°C
J
PHASE
T =125°C
J
45
T = 25°C
J
0
0
0.2
0
0.96
0.95
–20
–45
–50 –25
0
25
50
75 100 125
0
1
2
3
4
5
6
10
100
1k
10k
100k 1M
10M
TEMPERATURE (°C)
FREQUENCY (Hz)
ERROR AMP OUTPUT VOLTAGE (V)
LT1241 • TPC12
LT1241 • TPC17
LT1241 • TPC16
Low Level Output Saturation
Voltage During Undervoltage
Lockout
High Level Output
Saturation Voltage
Low Level Output
Saturation Voltage
4.0
3.5
3.0
2.5
2.0
1.5
1.0
1.0
0.5
0
4.0
3.5
3.0
T = –55°C
J
T = 125°C
J
2.5
2.0
1.5
1.0
0.5
0
T = –55°C
J
T = 25°C
J
T = 125°C
J
T = 25°C
J
T = –55°C
J
T = 125°C
J
T = 25°C
J
0.5
0
0
100
OUTPUT SOURCE CURRENT (mA)
200
0
100
200
0
5
10
OUTPUT SINK CURRENT (mA)
OUTPUT SINK CURRENT (mA)
LT1241 • TPC13
LT1241 • TPC14
LT1241 • TPC15
5
LT1241Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Output Deadtime vs Oscillator
Frequency – LT1242, LT1244
Output Deadtime vs Oscillator
Timing Resistor vs Oscillator
Frequency
Frequency – LT1241, LT1243,LT1245
75
70
65
60
55
50
100
10
1
60
50
100pF
200pF
500pF
1nF
2nF
5nF
2nF 1nF
40
30
10nF
5nF
2nF 1nF
5nF
500pF
500pF
C
=10nF
T
20
10
0
V
J
= 15V
CC
100pF
1000
T = 25°C
100pF
1000
10k
100k
OSCILLATOR FREQUENCY (Hz)
1M
0
100
OSCILLATOR FREQUENCY (kHz)
0
100
OSCILLATOR FREQUENCY (kHz)
LT1241 • TPC21
LT1241 • TPC19
LT1241 • TPC20
Output Rise and Fall Time
Output Cross-Conduction Current
Current Sense Delay
TIME 50ns/DIV
VCC = 15V
CL = 1nF
TIME 50ns/DIV
VCC = 15V
CL = 1nF
TIME 50ns/DIV
LT1241 • TPC24
LT1241 • TPC22
LT1241 • TPC23
VCC = 15V
C
L = 15pF
6
LT1241 Series
U
O
U
U
PI
FU CTI
S
COMP (Pin 1): Compensation Pin. This pin is the output of
theErrorAmplifierandismadeavailableforloopcompen-
sation. It can also be used to adjust the maximum value of
the current sense clamp voltage to less than 1V. This pin
can source a minimum of 0.5mA (0.8mA typ) and sink a
minimum of 2mA (4mA typ)
The rise time of the oscillator waveform is set by the RC
time constant of RT and CT. The fall time, which is equal to
theoutputdeadtime,issetbyacombinationoftheRCtime
constant and the oscillator sink current (8.2mA typ).
GND (Pin 5): Ground.
OUTPUT (Pin 6): This pin is the output of a high current
totem pole output stage. It is capable of driving up to ±1A
of current into a capacitive load such as the gate of a
MOSFET.
FB (Pin 2) Voltage Feedback Pin. This pin is the inverting
input of the error amplifier. The output voltage is normally
fed back to this pin through a resistive divider. The non-
inverting input of the error amplifier is internally commit-
ted to a 2.5V reference point.
VCC (Pin 7): This pin is the positive supply of the control
IC.
I
SENSE (Pin 3): Current Sense Pin. This is the input to the
VREF (Pin 8):Reference. This is the reference output of the
IC.Thereferenceoutputisusedtosupplychargingcurrent
to the external timing resistor RT. The reference provides
biasing to a large portion of the internal circuitry, and is
used to generate several internal reference levels includ-
ing the VFB level and the current sense clamp voltage.
current sense comparator. The trip point of the compara-
tor is set by, and is proportional to, the output voltage of
the Error Amplifier.
RT/CT (Pin 4): The oscillator frequency and the deadtime
are set by connecting a resistor (RT) from VREF to RT/CT
and a capacitor (CT) from RT/CT to GND.
O U
W
U
PPLICATI
A
S
I FOR ATIO
connected from the RT/CT pin to ground. The charging
current for CT is determined by the value of RT. The
discharge current for CT is set by the difference between
thecurrentsuppliedbyRT andthedischargecurrentofthe
LT124X. The discharge current of the device is trimmed to
8.2mA. For large values of RT discharge time will be
determined by the discharge current of the device and the
value of CT. As the value of RT is reduced it will have more
effect on the discharge time of CT. During an oscillator
cycle capacitor CT is charged to approximately 2.8V and
discharged to approximately 1.1V. The output is enabled
during the charge time of CT and disabled, in an off state,
duringthedischargetimeofCT.Thedeadtimeofthecircuit
is equal to the discharge time of CT. The maximum duty
cycle is limited by controlling the deadtime of the oscilla-
tor. There are many combinations of RT and CT that will
yield a given oscillator frequency, however there is only
one combination that will yield a specific deadtime at that
frequency. Curves of oscillator frequency and deadtime
MINIMUM
START-UP OPERATING
MAXIMUM
VOLTAGE DUTY CYCLE REPLACES
DEVICE
LT1241
LT1242
LT1243
LT1244
LT1245
THRESHOLD
9.6V
7.6V
10V
7.6V
10V
7.6V
50%
100%
100%
50%
NONE
16V
UC1842
UC1843
UC1844
UC1845
8.4V
16V
8.4V
50%
Oscillator
The LT1241 series devices are fixed frequency current
mode pulse width modulators. The oscillator frequency
and the oscillator discharge current are both trimmed and
tightly specified to minimize the variations in frequency
and deadtime. The oscillator frequency is set by choosing
a resistor and capacitor combination, RT and CT. This RC
combination will determine both the frequency and the
maximum duty cycle. The resistor RT is connected from
VREF (Pin 8) to the RT/CT pin (Pin 4). The capacitor CT is
7
LT1241Series
O U
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U
PPLICATI
A
S I FOR ATIO
for various values of RT and CT appear in the Typical
Performance Characteristics section. Frequency and
deadtime can also be calculated using the following
formulas:
frequency for LT1241, LT1244 and LT1245. The oscillator
of LT1241 series devices will run at frequencies up to
1MHz, allowing 500kHz output switching frequencies for
all devices.
Oscillator Rise Time: tr = 0.583 • RC
Error Amplifier
3.46• RC
The LT1241 series of devices contain a fully compensated
error amplifier with a DC gain of 90dB and a unity-gain
frequency of 1MHz. Phase margin at unity-gain is 80°. The
noninverting input is internally committed to a 2.5V refer-
ence point derived from the 5V reference of Pin 8. The
inverting input (Pin 2) and the output (Pin 1) are made
available to the user. The output voltage in a regulator
circuit is normally fed back to the inverting input of the
error amplifier through a resistive divider.
t =
Oscillator Discharge Time:
d
0.0164 R −11.73
(
)
Oscillator Period: TOSC = tr + td
1
Oscillator Frequency:
f
=
OSC
T
OSC
Maximum Duty Cycle:
LT1241, LT1244, LT1245
t
T
− t
r
OSC
d
The output of the error amplifier is made available for
external loop compensation. The output current of the
error amplifier is limited to approximately 0.8mA sourcing
and approximately 6mA sinking. In a current mode PWM
the peak switch current is a function of the output voltage
of the error amplifier. In the LT1241 series devices the
output of the error amplifier is offset by two diodes (1.4V
at 25°C), divided by a factor of three, and fed to the
inverting input of the current sense comparator. For error
amplifier output voltages less than 1.4V the duty cycle of
the output stage will be zero. The maximum offset that can
appear at the current sense input is limited by a 1V clamp.
This occurs when the error amplifier output reaches 4.4V
at 25°C.
D
=
=
MAX
2 T
2 T
OSC
OSC
t
T
− t
r
OSC d
LT1242, LT1243
D
=
=
MAX
T
T
OSC
OSC
The above formulas will give values that will be accurate
to approximately ±5%, at the oscillator, over the full
operating frequency range. This is due to the fact that the
oscillatortriplevelsareconstantversusfrequencyandthe
discharge current and initial oscillator frequency are
trimmed.Somefineadjustmentmayberequiredtoachieve
moreaccurateresults. OncethefinalRT/CTcombinationis
selected the oscillator characteristics will be repeatable
from device to device. Note that there will be some slight
differences between maximum duty cycle at the oscillator
and maximum duty cycle at the output due to the finite rise
and fall times of the output.
The output of the error amplifier can be clamped below
4.4V in order to reduce the maximum voltage allowed
across the current sensing resistor to less than 1V. The
supply current will increase by the value of the output
source current when the output voltage of the error
amplifier is clamped.
The output switching frequency will be equal to the
oscillator frequency for LT1242 and LT1243. The output
switching frequency will be equal to one-half the oscillator
8
LT1241 Series
O U
W
U
PPLICATI
A
S I FOR ATIO
Current Sense Comparator and PWM Latch
changeintheerroramplifieroutputvoltage. Thethreshold
voltage will be 0.333V for an error amplifier voltage of
2.4V. To reduce the maximum current sense threshold to
less than 1V the error amplifier output should be clamped
to less than 4.4V.
LT1241 series devices are current mode controllers.
Under normal operating conditions the output (Pin 6) is
turned on at the start of every oscillator cycle, coincident
with the rising edge of the oscillator waveform. The output
is then turned off when the current reaches a threshold
level proportional to the error voltage at the output of the
error amplifier. Once the output is turned off it is latched
off until the start of the next cycle. The peak current is thus
proportional to the error voltage and is controlled on a
cycle by cycle basis. The peak switch current is normally
sensed by placing a sense resistor in the source lead of the
output MOSFET. This resistor converts the switch current
toavoltagethatcanbefedintothecurrentsenseinput. For
normal operating conditions the peak inductor current,
which is equal to the peak switch current, will be equal to:
Blanking
A unique feature of the LT1241 series devices is the built-
in blanking circuit at the output of the current sense
comparator. A common problem with current mode
PWM circuits is erratic operation due to noise at the
current sense input. The primary cause of noise problems
is the leading edge current spike due to transformer
interwinding capacitance and diode reverse recovery
time. This current spike can prematurely trip the current
sense comparator causing an instability in the regulator
circuit. A filter at the current sense input is normally
required to eliminate this instability.
V
− 1.4V
(
)
PIN1
I
=
PK
This filter will in turn slow down the current sense loop.
Aslowcurrentsenseloopwillincreasetheminimumpulse
width which will increase the short-circuit current in an
overloadcondition. TheLT1241seriesdevicesblank(lock
out) the signal at the output of the current sense compara-
tor for a fixed amount of time after the switch is turned on.
This effectively prevents the PWM latch from tripping due
to the leading edge current spike.
3R
(
)
S
During fault conditions the maximum threshold voltage at
the input of the current sense comparator is limited by the
internal 1V clamp at the inverting input. The peak switch
current will be equal to:
1.0V
RS
IPK(MAX)
=
The blanking time will be a function of the voltage at the
feedback pin (Pin 2). The blanking time will be 100ns for
normal operating conditions (VFB = 2.5V). The blanking
time goes to zero as the feedback pin is pulled to 0V. This
means that the blanking time will be minimized during
start-up and also during an output short-circuit fault. This
blanking circuit eliminates theneed foraninput filterat the
current sense input except in extreme cases. Eliminating
the filter allows the current sense loop to operate with
minimum delays, reducing peak currents during fault
conditions.
In certain applications, such as high power regulators, it
may be desirable to limit the maximum threshold voltage
to less than 1V in order to limit the power dissipated in the
sense resistor or to limit the short-circuit current of the
regulator circuit. This can be accomplished by clamping
the output of the error amplifier. A voltage level of
approximately 1.4V at the output of the error amplifier will
give a threshold voltage of 0V. A voltage level of approxi-
mately 4.4V at the output of the error amplifier will give
a threshold level of 1V. Between 1.4V and 4.4V the
thresholdvoltagewillchangebyafactorofone-thirdofthe
9
LT1241Series
O U
W
U
PPLICATI
S I FOR ATIO
A
Undervoltage Lockout
ground. If the OUTPUT pin is pulled negative by more than
a diode drop the parasitic diode formed by the collector of
the output NPN and the substrate will turn on. This can
cause erratic operation of the device. In these cases a
Schottky clamp diode is recommended from the output to
ground.
The LT1241 series devices incorporate an undervoltage
lockout comparator which prevents the internal reference
circuitry and the output from starting up until the supply
voltage reaches the start-up threshold voltage. The quies-
cent current, below the start-up threshold, has been
reduced to less than 250µA (170µA typ.) to minimize the
power loss due to the bleed resistor used for start-up in
off-line converters. In undervoltage lockout both VREF
(Pin 8) and the output (Pin 6) are actively pulled low by
Darlington connected PNP transistors. They are designed
to sink a few milliamps of current and will pull down to
about1V.Thepull-downtransistoratthereferencepincan
be used to reset the external soft start capacitor. The pull-
down transistor at the output eliminates the external pull-
down resistor required, with earlier devices, to hold the
external MOSFET gate low during undervoltage lockout.
Reference
The internal reference of the LT1241 series devices is a 5V
bandgap reference, trimmed to within ±1% initial toler-
ance. The reference is used to power the majority of
internal logic and the oscillator circuitry. The oscillator
charging current is supplied from the reference. The
feedback pin voltage and the clamp level for the current
sense comparator are derived from the reference voltage.
The reference can supply up to 20mA of current to power
external circuitry. Note that using the reference in this
manner, as a voltage regulator, will significantly increase
power dissipation in the device which will reduce the
useful operating ambient temperature range.
Output
The LT1241 series devices incorporate a single high
current totem pole output stage. This output stage is
capable of driving up to ±1A of output current. Cross-
conduction current spikes in the output totem pole have
been eliminated. This device is primarily intended for
driving MOSFET switches. Rise time is typically 40ns and
fall time is typically 30ns when driving a 1.0nF load. A
clamp is built into the device to prevent the output from
rising above 18V in order to protect the gate of the
MOSFET switch.
Design/Layout Considerations
LT1241 series devices are high speed circuits capable of
generating pulsed output drive currents of up to 1A peak.
The rise and fall time for the output drive current is in the
rangeof10nsto20ns. Highspeedcircuittechniquesmust
be used to insure proper operation of the device. Do not
attempt to use Proto-boards or wire-wrap techniques to
breadboard high speed switching regulator circuits.
They will not work properly.
The output is actively pulled low during undervoltage
lockout by a Darlington PNP. This PNP is designed to sink
severalmilliampsandwillpulltheoutputdowntoapproxi-
mately1V.Thisactivepull-downeliminatestheneedforan
external resistor which was required in older designs. The
output pin of the device connects directly to the emitter of
the upper NPN drive transistor and the collector of the
lower NPN drive transistor in the totem pole. The collector
of the lower transistor, which is n-type silicon, forms a
p-n junction with the substrate of the device. This junction
is reverse biased during normal operation.
Printed circuit layouts should include separate ground
paths for the voltage feedback network, oscillator capaci-
tor, and switch drive current. These ground paths should
be connected together directly at the ground pin (Pin 5) of
the LT124X. This will minimize noise problems due to
pulsed ground pin currents. VCC should be bypassed, with
a minimum of 0.1µF, as close to the device as possible.
High current paths should be kept short and they should
be separated from the feedback voltage network with
shield traces if possible.
In some applications the parasitic LC of the external
MOSFET gate can ring and pull the OUTPUT pin below
10
LT1241 Series
U
O
TYPICAL APPLICATI S
Soft Start
External Clock Synchronization
V
REF
8
V
REF
8
5V REF
5V REF
R
R
T
COMP
1
R /C
T
5.6V
1V
T
4
OSCILLATOR
1mA
FB
2
C
EXTERNAL
SYNC
INPUT
–
C
T
0.01µF
2R
–
+
+
+
R
D1
47Ω
+
2.5V
1.5V
I
D1 IS REQUIRED IF THE SYNC AMPLITUDE IS LARGE
SENSE
3
–
ENOUGH TO PULL THE BOTTOM OF C MORE THAN
T
LT1241 • TA01
300mV BELOW GROUND.
LT1241 • TA02
Adjustable Clamp Level with Soft Start
REFERENCE ENABLE
UV
LOCKOUT
5V REF
MAIN BIAS
V
REF
V
IN
REFERENCE PULL-DOWN
V
CC
7
8
OUTPUT
PULL-DOWN
R /C
T
T
4
OSCILLATOR
T
OUTPUT
6
COMP
1
S
R
R2 100k
5.6V
1V
1mA
FB
2
18V
GND
5
–
2R
–
+
BLANKING
C
R1
+
+
R
1.5V
2.5V
–
R
S
I
SENSE
3
V
V
C
R1 R2
1.67
R2
CLAMP
V
≈
I
≈
WHERE: 0V ≤ V
≤ 1.0V
t = –ln 1 –
SOFT START
C
CLAMP
PK (MAX)
CLAMP
R
S
3 • V
R1 + R2
LT1241 • TA03
CLAMP
+ 1
(
(
R1
11
LT1241Series
U
O
TYPICAL APPLICATI S
300kHz Off-Line Power Supply
HOT
1
3
D5
C2
C3
C4
90VAC
TO
240VAC
R5
+
–
0.1µF
250V
MP3-X2
0.1µF
250V
MP3-X2
4700pF
250V
T1
BALEN
1M
1/2W
Y-CAP
2KBPO8M
2
4
NEU
1212-R6103
COILTRONICS
C6
C5
4700pF
4700pF
250V
Y-CAP
250V
Y-CAP
AC GND
L1
R
D3
MUR420
T1
5 1/2 TURN
AIRCORE
MCID404
2KBPOO5M
20V
1.5A
T2
4
12T
5
8
30T
2
C15
3.3µF
50V
C16
3.3µF
50V
R15
750Ω
1W
R2
660k
1/10W
R1
200k
1/2W
R5
27k
2W
C14
+
C1
470pF
100µF
400V
RTN
7
30T
1
C13
CTX210433-1
4700pF
R4
660k
1/10W
R3
200k
1/2W
D6
1N5245B
15V
1kV
Y-CAP
D1
MUR160
3
13T
6
LT1241 • TA06
LP = 100µH
R7
510
1/10W
D7
BAV21
D2
BAV21
C7
R14
39
C8
100pF
R8
152k
0.22µF
MKS-2
C12
7
22µF
2
25V
V
CC
FB
C9
0.01µF, 100V
LT1241
COMP OUTPUT
R11
12
R9
MKS-2
200k
6
3
Q1
MPT2N60
1
8
4
D4
BAT 85
V
REF
R /C
I
SENSE
T
T
R12
1k
1/10W
C10
0.1µF
MKS-2
R10
20k
R13
12k
GND
5
R18
2Ω
1/4W
R16
R17
2Ω
1/4W
2Ω
1/4W
C11
220pF
NOTES: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTANCES ARE IN OHMS, 1/4W, 5%.
2. ALL CAPACITANCES ARE IN MICROFARADS, 50V, 10%.
12
LT1241 Series
U
O
TYPICAL APPLICATI S
Slope Compensation at ISENSE Pin
REFERENCE ENABLE
REFERENCE PULL-DOWN
5V REF
MAIN BIAS
UV
V
LOCKOUT
REF
V
IN
V
CC
7
8
OUTPUT
R
T
R /C
T
PULL-DOWN
T
4
OSCILLATOR
T
OUTPUT
6
C
T
COMP
1
S
R
5.6V
1V
1mA
FB
2
18V
GND
5
–
2R
–
+
BLANKING
+
+
R
1.5V
2.5V
R
–
S
I
SENSE
3
LT1241 • TA04
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
0.405
(10.287)
MAX
CORNER LEADS OPTION
(4 PLCS)
0.005
(0.127)
MIN
6
5
4
8
7
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.025
0.220 – 0.310
(5.588 – 7.874)
0.045 – 0.068
(0.635)
RAD TYP
(1.143 – 1.727)
FULL LEAD
OPTION
1
2
3
0.200
(5.080)
MAX
0.300 BSC
(0.762 BSC)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
0.045 – 0.068
(1.143 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
MIN
0.100 ± 0.010
0.014 – 0.026
(2.540 ± 0.254)
(0.360 – 0.660)
J8 0694
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
13
LT1241Series
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
4
0.255 ± 0.015*
(6.477 ± 0.381)
1
2
3
0.130 ± 0.005
0.300 – 0.325
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
0.125
(3.175)
MIN
0.005
(0.127)
MIN
0.015
+0.025
–0.015
(0.380)
MIN
0.325
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
N8 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
14
LT1241 Series
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
SO8 0695
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1241Series
U
TYPICAL APPLICATION
Slope Compensation at Error Amp
UV
LOCKOUT
REFERENCE ENABLE
5V REF
MAIN BIAS
V
REF
REFERENCE PULL-DOWN
V
CC
7
8
OUTPUT
R
PULL-DOWN
R /C
T T
T
4
OSCILLATOR
TO
OUT
OUTPUT
6
T
C
T
V
COMP
1
S
R
5.6V
1V
R
SLOPE
1mA
R
f
18V
GND
5
2
FB
–
2R
–
+
BLANKING
1.5V
+
–
+
R
2.5V
I
SENSE
3
LT1241 • TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1246
1MHz Current Mode PWM
16V Start-Up Threshold, 10V Minimum Operating Voltage
Minimal Parts Count
LT1248/LT1249
LT1372
Power Factor Controllers
High Efficiency Switching Regulator
500kHz 1.5A Boost Regulator
LT1376
1.5A 500kHz Step-Down Switching Regulator
Power Factor and PWM Controller
Steps Down from Up to 25V Using 4.7µH Inductors
Complete Solution for Universal Off-Line Switching Power Supplies
LT1509
1241fa LT/TP 0297 5K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1992
Linear Technology Corporation
●
1630McCarthyBlvd.,Milpitas, CA95035-7417 (408)432-1900
16
●
●
FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com
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