LT1248IS [Linear]
Power Factor Controller; 功率因数控制器型号: | LT1248IS |
厂家: | Linear |
描述: | Power Factor Controller |
文件: | 总12页 (文件大小:158K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1248
Power Factor Controller
U
FEATURES
DESCRIPTIO
The LT®1248 provides active power factor correction for
universal off-line power systems. By using fixed high
frequency PWM current averaging, without the need for
slope compensation, the LT1248 achieves far lower line
current distortion with a smaller magnetic element than
systems that use either peak-current detection or zero
current switching approaches in both continuous and
discontinuous modes of operation.
■
High Power Factor Over Wide Load Range
with Line Current Averaging
■
International Operation Without Switches
■
Instantaneous Overvoltage Protection
■
Minimal Line Current Dead Zone
■
Typical 250µA Start-Up Supply Current
■
Rejects Line Switching Noise
■
Synchronization Capability
■
Low Quiescent Current: 9mA
The LT1248 uses a multiplier containing a square gain
function from the voltage amplifier to reduce the AC gain
at light output load and thus maintains low line current
distortion and high system stability. The LT1248 also
provides filtering capability to reject line switching noise
which can cause instability when fed into the multiplier.
Line current dead zone is minimized with low bias voltage
at the current input to the multiplier.
■
Fast 1.5A Peak Current Gate Driver
U
APPLICATIO S
■
Universal Power Factor Corrected Power Supplies
Preregulators Up To 1500W
■
The LT1248 provides many protection features including
peak current limiting and overvoltage protection, and can
be operated at frequencies as high as 300kHz.
, LTC and LT are registered trademarks of Linear Technology Corporation.
W
BLOCK DIAGRA
CA
M
I
GND
1
V
CC
15
V
PK
LIM
VA
OUT
3
OUT SENSE
REF
9
OUT
4
5
2
7
–
+
7.5V
REF
+
–
V
V
CC
16V TO 10V
RUN
2.6V/
–
+
2.2V
7.5V
EN/SYNC
10
7µA
2.2V
+
M1
–
V
SENSE
11
–
I
I
A
–
+
EA
I
M
I
2 I
B
CA
+
A
I
AC
I
M
=
32k
200µA2
B
R
R
–
+
6
Q
+
–
7.9V
OVP
8
S
+
–
RUN
16
0.7V
SYNC
GTDR
–
+
ONE SHOT
200ns
OSC
12µA
5V
SS
13
1 6V
14
12
1248 BD
C
SET
R
SET
1
LT1248
W
U
W W W
U
/O
PACKAGE RDER I FOR ATIO
ABSOLUTE AXI U RATI GS
(Note 1)
Supply Voltage ....................................................... 27V
GTDR Current Continuous ..................................... 0.5A
GTDR Output Energy(Per Cycle) .............................. 5µJ
IAC, RSET, PKLIM Input Current............................. 20mA
ORDER PART
TOP VIEW
NUMBER
1
2
3
4
5
6
7
8
GTDR
16
15
14
13
12
11
10
9
GND
V
CC
PK
LIM
C
CA
I
SET
OUT
LT1248CN
LT1248IN
LT1248CS
LT1248IS
V
SENSE, EN/SYNC, OVP Input Voltage................... VMAX
SS
SENSE
ISENSE, MOUT Input Current.................................. ±5mA
Operating Junction Temperature Range
LT1248C................................................ 0°C to 100°C
LT1248I ........................................... –40°C to 125°C
Thermal Resistance (Junction-to-Ambient)
N Package .................................................. 100°C/W
S Package................................................... 120°C/W
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
R
M
OUT
SET
V
I
SENSE
AC
EN/SYNC
VA
OUT
V
OVP
REF
N PACKAGE
16-LEAD PDIP
S PACKAGE
16-LEAD NARROW PLASTIC SO
TJMAX = 125°C, θJA = 100°C/W (N)
TJMAX = 125°C, θJA = 120°C/W (S)
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS The
●
denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND,
CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted.
PARAMETER
Overall
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current (V in Undervoltage Lockout)
V
= Lockout Voltage – 0.2V
●
●
●
●
●
●
0.25
0.5
0.45
1.5
mA
mA
mA
V
CC
CC
Supply Current (Inactive)
Supply Current, On
EN/SYNC = 0V, V ≤ V
CC MAX
11.5V ≤ V ≤ V
, CA = 1V
OUT
8.5
12.0
17.5
11.5
2.85
CC
MAX
V
V
Turn-On Threshold (Undervoltage Lockout)
Turn-Off Threshold
15.5
9.5
16.5
10.5
2.6
CC
CC
V
EN/SYNC Threshold, Rising
EN/SYNC Threshold Hysteresis
EN/SYNC Input Current
2.2
V
0.40
V
EN/SYNC = 0V
3V ≤ EN/SYNC ≤ 7V
●
–5
–50
– 1
– 25
5
50
µA
µA
Voltage Amplifier
Voltage Amp Offset Voltage
Input Bias Current
VA
= 3.5V
●
●
–8
70
8
mV
nA
dB
MHz
V
OUT
V
= 0V to 7V
–25
100
3
–250
SENSE
Voltage Gain
Voltage Amp Unity-Gain Bandwidth
Voltage Amp Output High (Internally Clamped)
Voltage Amp Output Low
Voltage Amp Short-Circuit Current
SS Current
●
●
●
●
11.3
13.3
1.1
14
2
V
VA
OUT
= 0V
5
5
30
30
mA
µA
SS = 2.5V
12
Current Amplifier
Current Amp Offset Voltage
●
●
±1
–25
110
3
±4
mV
nA
dB
MHz
V
I
Bias Current
–250
SENSE
Current Amp Voltage Gain
Current Amp Unity-Gain Bandwidth
Current Amp Output High
Current Amp Output Low
80
●
●
7.2
8.5
1.1
2
V
2
LT1248
ELECTRICAL CHARACTERISTICS The
C
●
denotes specifications which apply over the full operating tempera-
ture range, otherwise specifications are at TA = 25°C. Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND,
SET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = 7.5V, no load on any outputs, unless otherwise noted.
PARAMETER
CONDITIONS
CA = 0V
MIN
TYP
MAX
UNITS
Current Amplifier
Current Amp Short-Circuit Current
●
●
5
14
30
1
mA
V
OUT
Input Range, I
, M
(Linear Operation)
–0.3
SENSE
OUT
Reference
Reference Output Voltage
I
= 0mA, T = 25°C
7.39
7.50
5
7.60
V
mV
mV
mA
V
REF
A
V
V
V
V
Load Regulation
Line Regulation
Short-Circuit Current
Worst Case
–5mA < I < 0mA
REF
REF
REF
REF
REF
11.5V < V < V
●
●
●
–20
12
5
20
50
CC
MAX
V
= 0V
28
7.5
REF
Load, Line, Temperature
7.32
7.68
Current Limit
PK Offset Voltage
●
●
–15
15
mV
µA
ns
LIM
PK Input Current
LIM
PK = –0.1V
–50
400
–100
LIM
PK to GTDR Propagation Delay
LIM
PK Falling from 50mV to –50mV
LIM
Multiplier
Multiplier Output Current
Multiplier Output Current Offset
Multiplier Maximum Output Current
Multiplier Gain Constant (Note 2)
I
= 100µA, R
= 15k
SET
35
µA
µA
µA
AC
R
= 1M from I to GND
●
●
–0.05
–260
0.035
32
–0.5
AC
AC
I
I
= 450µA, R
= 15k, VA
= 7V, M = 0V
OUT
–286
15
–235
AC
SET
OUT
–2
V
I
Input Resistance
from 50µA to 1mA
50
kΩ
AC
AC
Oscillator
Oscillator Frequency
R
R
= 15k, C = 1000pF
●
●
85
58
100
68
115
78
kHz
kHz
SET
SET
SET
= 15k, C = 1500pF
SET
C
C
Ramp Peak-to-Peak Amplitude
Ramp Valley Voltage
4.35
1.25
4.5
4.7
1.4
5.6
5.0
1.55
6.5
V
V
V
SET
SET
Synchronization Pulse Threshold on EN/SYNC Pin
Synchronization Frequency Range
Overvoltage Comparator
Pulse Low = 3.5V, High = 7V, Width > 200ns
= 15k, C = 1000pF
R
SET
SET
●
●
●
1.2
1.6
f
NOM
Comparator Trip Voltage Ratio (V
Hysteresis
/V
)
1.04
1.05
0.35
–50
100
1.06
TRIP REF
V
nA
ns
OVP Bias Current
OVP = 7.5V
–250
OVP Propagation Delay
Gate Driver
Max GTDR Output Voltage
GTDR Output High
0mA Load, 18V < V
●
●
●
12
15
17.5
1.5
V
V
V
CC
–200mA Load, 11.5V ≤ V ≤ 15V
V
– 3.0
CC
CC
GTDR Output Low (Device Unpowered)
GTDR Output Low (Device Active)
V
= 0V, 50mA Load (Sinking)
0.9
CC
200mA Load (Sinking)
10mA Load
●
●
0.5
0.2
1
0.4
V
V
Peak GTDR Current
10nF from GTDR to GND
1nF from GTDR to GND
2
A
ns
%
GTDR Rise and Fall Time
GTDR Max Duty Cycle
25
96
90
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired
I
M
Note 2: Multiplier Gain Constant: K =
I
(VA
– 2)2
AC
OUT
3
LT1248
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Current Amplifier Open-Loop
Gain and Phase
Voltage Amplifier Open-Loop
Gain and Phase
100
80
60
40
20
0
0
100
80
60
40
20
0
0
–20
–40
–60
–80
–100
–120
–20
–40
–60
–80
–100
–120
GAIN
GAIN
PHASE
PHASE
–20
–20
10
1k
10k 100k
1M
10M
10
1k
10k 100k
1M
10M
100
100
FREQUENCY (Hz)
FREQUENCY (Hz)
1148 G01
1148 G02
Reference Voltage vs
Temperature
Multiplier Current
7.536
7.524
7.512
7.500
7.488
7.476
7.464
7.452
7.440
7.428
300
150
0
VA
= 5.5V
VA
= 7V
OUT
OUT
VA
= 6.5V
OUT
VA
= 6V
VA
VA
= 5V
OUT
OUT
OUT
= 4.5V
VA
VA
= 4V
OUT
= 3.5V
OUT
VA
VA
= 3V
= 2.5V
OUT
OUT
0
250
(µA)
500
125
150
–75 –50
0
25 50
100
75
–25
JUNCTION TEMPERATURE (°C)
I
AC
1248 G04
1248 G03
Supply Current vs Supply Voltage
GTDR Source Current
GTDR Sink Current
18.5
18.0
17.5
17.0
16.5
16.0
15.5
15.0
14.5
14.0
13.5
13.0
11
10
9
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
CC
= 18V
T
= –55°C
= 125°C
J
J
8
7
T
T
= 25°C
J
6
5
T = 125°C
J
T
= –55°C
A
4
T = 25°C
J
3
T = –55°C
J
2
T
= 25°C
A
1
T
= 125°C
A
0
0
–120
–180
–240
–300
–60
10
21
SUPPLY VOLTAGE (V)
32
0
120
180
240
300
60
SOURCE CURRENT (mA)
SINK CURRENT (mA)
1248 G06
1248 G05
1248 G07
4
LT1248
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Start-Up Supply Current vs
Supply Voltage
GTDR Rise and Fall Time
Frequency vs RSET and CSET
400
300
200
100
0
550
500
450
400
350
300
250
200
150
100
50
500
450
400
350
300
250
200
150
100
50
R
= 10k
= 15k
= 20k
= 30k
SET
R
R
R
SET
SET
SET
FALL TIME
RISE TIME
–55°C
25°C
125°C
NOTE: GTDR SLEWS
BETWEEN 1V AND 16V
0
0
0
20
30
40
50
10
0
8
12 14 16 18 20
200
600
1000
1800
2200
2
4
6
10
1400
LOAD CAPACITANCE (nF)
SUPPLY VOLTAGE (V)
C
CAPACITANCE (pF)
SET
1248 G08
1248 G09
1248 G10
GTDR Maximum Duty Cycle vs
RSET and CSET
Shutdown Mode Supply Current
and Reference Voltage
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
EN/SYNC ≤ 1.8V
SUPPLY CURRENT
–55°C ≤ T ≤ 25°C
J
T
= 125°C
J
R
R
R
R
= 10k
= 15k
= 20k
= 30k
SET
SET
SET
SET
REFERENCE VOLTAGE
T ≤ 125°C
J
0
600
1000
1800
32
200
1400
2200
0
16
SUPPLY VOLTAGE (V)
C
CAPACITANCE (pF)
SET
1248 G11
1248 G12
Synchronization and Shutdown
Thresholds at EN/SYNC Pin
SS Pin Characteristics
MOUT Pin Characteristics
–44
–40
–36
–32
–28
–24
–20
–16
–12
–8
–22
1.5
1.0
T
J
T
J
T
J
= 125°C
= 25°C
–20
–18
–16
–14
–12
–10
–8
SHUTDOWN
THRESHOLD
0.5
= –55°C
0
T
= –55°C
J
SYNCHRONIZATION
THRESHOLD
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
T
= 25°C
J
T
= –55°C
= 25°C
J
J
T
= 125°C
J
T
T
= 125°C
J
–6
–4
–4
–2
0
0
0
4
10
0
4
8
–1.2
1.2
0
VOLTAGE (V)
1
2
3
5
6
7
8
9
–2.4
2.4
EN/SYNC VOLTAGE (V)
SS VOLTAGE (V)
M
OUT
1248 G13
1248 G14
1248 G15
5
LT1248
U W
TYPICAL PERFOR A CE CHARACTERISTICS
RSET Voltage vs Current
PKLIM Pin Characteristics
120
–360
–300
–240
–180
–120
–60
0
T = 125°C
T
T
T
= 125°C
= 25°C
= –55°C
J
J
J
J
100
80
T = 25°C
J
T = –55°C
J
60
40
20
0
–20
–40
–60
–80
–100
60
120
180
240
300
0
–0.4
–0.8
–0.4
PK
0.4
–0.2
–0.6
–1.0
–0.8
0
0.8
R
CURRENT (mA)
VOLTAGE (V)
LIM
SET
1248 G16
1248 G17
U
U
U
PI FU CTIO S
Pin 1 (GND).
Pin 7 (VAOUT): This is the output of the voltage error
amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.
Pin 2 (PKLIM): The threshold of the peak current limit
comparator is GND. To set current limit, a resistor divider
can be connected from VREF to current sense resistor.
Pin 8 (OVP): This is the input to the overvoltage compara-
tor. The threshold is 1.05 times the reference voltage.
When the comparator trips, the multiplier is quickly inhib-
ited and outputs no current. Figure 4 in the Applications
Information section shows how to set overvoltage thresh-
old with only one additional resistor.
Pin 3 (CAOUT): This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CAOUT is low,
the modulator has zero duty cycle.
Pin 4 (ISENSE): This is the inverting input of the current
amplifier. This pin is clamped at –0.6V by an ESD protec-
tion diode.
Pin 9 (VREF): This is the 7.5V reference. When either VCC
or EN/SYNC goes low, VREF will stay at 0V. VREF biases
most of the internal circuity and can source up to 5mA
externally.
Pin 5 (MOUT): This is the multiplier high impedance
current output and the noninverting input of the current
amplifier. This pin is clamped at –0.6V and 2V.
Pin 10 (EN/SYNC): This pin has two functions. When it
goes below 2.6V, the chip goes into shutdown mode and
draws little current. Pulses at this pin that go below the 5V
threshold will synchronize the chip. The synchronizing
pulses should have an on-time of at least 200ns for the
LT1248 resetting circuit to work.
Pin 6 (IAC): This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 32k resistor is in series with the
currentinput, sothatalowpassRCcanbeusedtofilterout
the switching noise from the high impedance lines.
Pin 11 (VSENSE): This is the inverting input to the voltage
amplifier.
6
LT1248
U
U
U
PI FU CTIO S
Pin 12 (RSET): A resistor from RSET to GND sets the
oscillator charging current and the maximum multiplier
output current which is used to limit the maximum line
current.
Pin 15 (VCC): This is the supply for the chip. The LT1248
has a very fast gate driver required to fast charge high
power MOSFET gate capacitance. High current spikes
occur during charging. For good supply bypass, a 0.1µF
ceramic capacitor in parallel with a low ESR electrolytic
capacitor, 56µF or higher is required in close proximity to
IC GND.
IM(MAX) = 3.75V/RSET
Pin13(SS):Soft-Start. WheneitherVCC orEN/SYNCgoes
low, the SS pin will stay at 0V. With a capacitor from the
pintoGND,the12µAchargingcurrentslowlybringsupthe
SS to 8V; below 7.5V SS is the reference input to the
voltage amplifier. At supply dropout or EN/SYNC low, the
soft start capacitor will be quickly discharged.
Pin 16 (GTDR): The MOSFET gate driver is a 1.5A fast
totem pole output. It is clamped at 15V, but capacitive
loads like MOSFET gates may cause overshoot. A gate
series resistor of at least 5Ω will prevent the overshoot.
Pin 14 (CSET): The capacitor from this pin to GND, and
RSET, determine oscillator frequency. The oscillator ramp
is 5V, and the frequency = 1.5/(RSET • CSET).
O U
W
U
PPLICATI
A
S I FOR ATIO
Error Amplifier
Multiplier
The error amplifier has a 100dB DC gain and 3MHz unity-
gain frequency. The output is internally clamped at 13.5V.
The noninverting input is tied to the 7.5V VREF through a
diode and can be pulled down from the SS (soft-start) pin.
The multiplier is a current multiplier with high noise
immunity in a high power switching environment. The
current gain is: IM=(IAC• IEA2)/(200µA)2,with IEA=(VAOUT
– 2V)/25k. With a square function, because of the lower
gainatlightpowerload, systemstabilityismaintainedand
line current distortion caused by the line frequency AC
Current Amplifier
The current amplifier has a 110dB DC gain, 3MHz unity-
gain frequency, and a 2V/µs slew rate. It is internally
clamped at 8.5V. Note that in the current averaging opera-
tion, high gain at twice the line frequency is necessary to
minimizelinecurrentdistortion. BecauseCAOUT mayneed
to swing 5V over one line cycle at high line condition,
14mV AC will be needed at the inputs of the current
amplifier for a gain of 350 at 120Hz. Especially at light load
when the current loop reference signal is small, lower gain
will distort the reference signal and line current. If signal
gain at switching frequency is too high, the system be-
haves more like a current mode system and can cause
subharmonic oscillation. Therefore, the current amplifier
should be compensated to have a gain of less than 15 at
the switching frequency, but more than 250 at twice the
line frequency.
300
VA
= 5.5V
VA
= 7V
OUT
OUT
VA
= 6.5V
OUT
VA
= 6V
VA
VA
= 5V
OUT
OUT
OUT
150
= 4.5V
VA
VA
= 4V
OUT
= 3.5V
OUT
VA
VA
500
= 3V
= 2.5V
OUT
OUT
0
0
250
(µA)
I
AC
1248 G04
Figure 1. Multiplier Current IM vs IAC and VAOUT
7
LT1248
PPLICATI
O U
W
U
A
S I FOR ATIO
ripple fed back to the error amplifier is minimized. Note
thatswitchingrippleonthehighimpedancelinescouldget
into the multiplier from the IAC pin and cause instability.
TheLT1248providesaninternal25kresistorinserieswith
the low impedance multiplier current input so that only a
capacitor from the IAC pin to GND is needed to filter out the
noise. The maximum multiplier output current, which
limits the system line current, is set by the RSET according
With ILINE and RS chosen, let R1 = 10k, then R2 =
(ILINE • RS)/0.8mA.
Always use RSET to set the primary line current limit. The
PKLIM comparator is only for secondary protection. The
secondary limit should be higher than the primary limit;
6.5A is good (5A for primary limit) for a 300W regulator.
Whenlinecurrentreachestheprimarylimit, VOUT dropsto
keep the line current constant, and system stability is still
maintained by the current loop which is controlled by the
current amplifier. When line current reaches the second-
ary limit, the comparator controls the system and loop
hysteresis may occur and can cause audible noise.
to the formula: IM(MAX) = 3.75V/RSET
.
Oscillator Frequency and Maximum Line
Current Settling
Oscillator frequency is set by RSET and CSET. Ramp ampli-
tude is 5V and CSET charging current is set by VREF/RSET
.
Synchronization
Typical discharging time for CSET = 1nF is 250ns. RSET
should always be determined first to set the maximum
multiplier output current for system line current limit. For
a300Wpreregulator,withRSET =15k,IM(MAX)=3.75V/15k
= 250µA. With a 4k resistor RREF from MOUT to the 0.2Ω
line current sense resistor RS, the line current limit is: (IM
• 4k)/RS. As a general rule, RS is chosen according to:
The LT1248 can be synchronized to a frequency that is up
to 1.6 times the natural frequency. With a 200ns one-shot
timer on-chip, the LT1248 provides flexibility on the
synchronizing pulse width. Because the EN/SYNC pin also
serves the chip shutdown function, the pulses at the pin
should not go below 3V and must go below 5V with widths
greater than 200ns. The Figure 3 circuit will synchronize
the LT1248.
RS = IM(MAX) • RREF • VLINE(MIN)
K(1.414)POUT(MAX)
V
REF
where POUT(MAX) is the maximum power output and K is
usually between 1.1 and 1.3 depending on efficiency and
resistor tolerance. With RSET selected, CSET can then be
determinedby:CSET =1.5/(Frequency•RSET).For100kHz,
CSET = 1.5/(100kHz • 15k) = 1nF. For optional double
protection, the LT1248 provides a current limit compara-
tor.Whenthecomparatortripsat0V,theGTDRpinquickly
goes low to shut off the MOS switch. A resistor divider
from VREF to RS (Figure 2) senses the voltage across the
line current sense resistor and the current limit is set by:
30k
1N4148
200k
V
CC
EN/SYNC
1N4685
3.6V
SYNC PULSE
AT LEAST 200ns
VN2222
1248 F03
Figure 3
ILINE = [(7.5V/R1) + 50µA](R2/RS), where 50µA is IPKLIM
.
Overvoltage Protection
R2
1.6k
R1
10k
Because of the slow loop response necessary for power
factorcorrection,outputovershootcanoccurwithsudden
load removal or reduction. To protect the power compo-
nents and output load, the LT1248 provides an overvolt-
age comparator which senses the output voltage and
quickly shuts off the current switch. In Figure 4, because
thereisnoDCcurrentgoingthroughR3, R1andR2setthe
regulatoroutputDClevel:VOUT =VREF[(R1+R2)/R2],with
R1 = 1M, R2 = 20k, VOUT is 382V.
7.5V
V
REF
+
I
PKLIM
R
S
–
+
PK
LIM
0.2
Ω
C1
1nF
–
I
LINE
C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2µs.
1248 F02
Figure 2
8
LT1248
O U
W
U
PPLICATI
A
S I FOR ATIO
Note that VSENSE is the summing node and it stays at 7.5V.
When overshoot occurs on VOUT, the overcurrent from R1
will go through R2 as well as R3. Amplifier feedback will
keep VSENSE locked at 7.5V. The equivalent AC resistance,
seen by the comparator input pin OVP, is R2 in parallel
with R3, which is 10k. Therefore, with the comparator trip
levelof1.05VREF andR3of20k,thecomparatortripswhen
VOUT overshoot exceeds 10%. Overvoltage trip level:
Undervoltage Lockout
The LT1248 turns on when VCC is higher than 16V and
remains on until VCC falls below 10V, whereupon the chip
enters the lockout state. In the lockout state, the LT1248
only draws 250µA, the oscillator is off, and the VREF and
the GTDR pins remain low to keep the power MOSFET off.
Start-Up and Supply Voltage
The LT1248 draws only 250µA before the chip starts at
16V on VCC. To trickle start, a 90k resistor from the power
linetoVCC suppliesthetricklecurrentandC4holdstheVCC
up while switching starts. Then the auxiliary winding takes
over and supplies the operating current. Note that D3 and
the large value C3, in both Figures 5 and 6, are only
necessary for systems that have sudden large load varia-
tion down to minimum load and/or very light load condi-
tions. Undertheseconditions, theloopmayexhibitastart/
restart mode because switching remains off long enough
for C4 to discharge below 10V. The C3 will hold VCC up
until switching resumes. For less severe load variations,
D3 is replaced with a short and C3 is omitted. The turns
ratio between the primary winding and the auxiliary wind-
ing determines VCC according to:
R2 +R3
%VOUT = 5%
R3
MOUT is a high impedance current output. In the current
loop, offset line current is determined by multiplier offset
current and input offset voltage of the current amplifier.
A – 4mV current amplifier VOS translates into 20mA line
current and 5W input power for 250V line if 0.2Ω sense
resistor is used. Under no load or when the load power is
less than this offset input power, VOUT would slowly
charge up to an overvoltage state because the overvoltage
comparator can only reduce multiplier output current to
zero. This does not guarantee zero output current if the
current amplifier has offset. To regulate VOUT under this
condition,theamplifierM1(seeBlockDiagram),becomes
active in the current loop when VAOUT goes down to 2.2V.
The M1 can put out up to 7µA to the resistor at the ISENSE
pin to cancel any current amplifier negative VOS and keep
VOUT error to within 2V.
LINE
MAIN INDUCTOR
N
P
N
S
R1
90k, 1W
D1
D3
V
CC
+
+
C1
0.047µF
2µF
+
+
C3
390µF
C4
56µF
D2
C1
0.47µF
C2
2µF
REGULATOR OUTPUT
330k
VA
V
= 382V
OUT
1248 F05
R3
20k
V
SENSE
R1
–
+
Figure 5
OUT
1M
C2
MAIN INDUCTOR
ERROR AMP
LINE
1000pF
V
= 7.5V
REF
LT1248
OVP
R1
90k
1W
R2
20k
–
+
D2
D1
D3
V
CC
OVERVOLTAGE
COMPARATOR
+
+
C3
390µF
1.05V
C4
56µF
REF
18V
1248 F04
1248 F06
Figure 4
Figure 6
9
LT1248
PPLICATI
O U
W
U
A
S I FOR ATIO
The third component is the switching ripple from the load,
if the load is a switching regulator.
VOUT/(VCC – 2V) = NP/NS.
For 382V VOUT and 18V VCC, Np/Ns ≈ 19.
I
3RMS ≈ ILOAD(DC)
In Figure 6, a new technique for supply voltage eliminates
the need for an extra inductor winding. It uses capacitor
charge transfer to generate a constant current source
which feeds a Zener diode. Current to the Zener is equal
to (VOUT – VZ)(C)(f), where VZ is Zener voltage and f is
switching frequency. For VOUT = 382V, VZ = 18V, C =
1000pF, and f = 100kHz, Zener current will be 36mA. This
is enough to operate the LT1248, including the FET gate
drive. Normally soft-start is not needed because the
LT1248 has overcurrent limit and overvoltage protection.
If soft-start is used with a 0.01µF capacitor on SS pin,
VOUT ramps up slower during start-up. Then C4 has to
hold VCC longer, and the circuit may not start. Increasing
C4 to 100µF ensures start-up, but start-up time will be
extended if the same 90k trickle charge resistor is used.
For the United Chemicon KMH 400V capacitor series,
ripplecurrentmultiplierforcurrentsat100kHzis1.43.The
equivalent 120Hz ripple current can be then found:
IRMS
=
(I1RMS)2 + (I2RMS/1.43)2 + (I3RMS/1.43)2
√
For a typical system that runs at an average load of 200W
and 385V output:
ILOAD(DC) = 0.52A
I1RMS ≈ 0.71 • 0.52A = 0.37A
I2RMS ≈ 0.82A at 120VAC
I3RMS ≈ ILOAD(DC) = 0.52A
IRMS
=
(0.37A)2+(0.82A/1.43)2+(0.52A/1.43)2 = 0.77A
√
The 120Hz ripple current rating at 105°C ambient is 0.95A
forthe180µFKMH400Vcapacitor.Theexpectedlifeofthe
output capacitor may be calculated from the thermal
Output Capacitor
The peak-to-peak 120Hz output ripple is determined by:
VP-P = (2) (ILOAD(DC))(Z)
stress analysis:
(105°C+∆T ) – (T +∆T )
K
A
O
L = LO • 2
where:
L: expected life time
10
where ILOAD(DC): DC load current.
Z: capacitor impedance at 120Hz.
For 180µF at 300W load, ILOAD(DC) = 300W/385V = 0.78A,
VP-P = 2 •0.78A • 7.4Ω = 11.5V. If less ripple is desired,
higher capacitance should be used. The selection of the
output capacitor should also be based on the operating
ripple current through the capacitor. The ripple current
can be divided into three major components. The first is at
120Hz; it’s RMS value is related to the DC load current as
follows:
L : hours of load life at rated ripple current and rated
O
ambient temperature.
∆T : Capacitor internal temperature rise at rated condi-
K
2
tion. ∆T = (I R)/(KA). Where I is the rated current,
K
R is capacitor ESR, and KA is a volume constant.
T : Operating ambient temperature.
A
∆T : Capacitor internal temperature rise at operating
O
condition.
I
1RMS ≈ 0.71 • ILOAD(DC)
In our example LO = 2000 hours and ∆TK = 10°C at rated
0.95A. ∆TO can then be calculated from:
The second component contains the PF switching fre-
quency ripple current and its harmonics. Analysis of the
ripple is complicated because it is modulated with a 120Hz
signal. However computer numerical integration and Fou-
rier analysis approximate the RMS value reasonably close
to the bench measurements. The RMS value is about 0.82A
at a typical condition of 120VAC, 200W load. This ripple is
line-voltage dependent, and the worst case is at low line.
∆TK = (IRMS/0.95A)2 ∆TK = (0.77A/0.95A)2
• •10°C = 6.6°C
Assuming the operating ambient temperature is 60°C, the
approximate life time is:
(105°C+10°C) – (60°+ 6.6°C)
10
≈ 57,000 hours
LO ≈ 2000 • 2
For longer life, a capacitor with a higher ripple current
rating or parallel capacitors should be used.
I2RMS = 0.82A at 120VAC, 200W
10
LT1248
U
O
TYPICAL APPLICATI
300W, 382V Preregulator
MURH860
750µH*
T
+
V
OUT
90V
TO
270V
EMI
FILTER
6A
–
+
1M
1%
180µF
IRF840
20k
1%
R
0.047µF
0.47µF
S
0.2Ω
R
REF
4k
4k
100pF
20k
20k
330k
V
CC
= 18V**
+
1nF
I
56µF
35V
0.1µF
PK
LIM
VA
V
CC
V
REF
M
GND
OUT
SENSE
OUT
9
4
1
5
2
7
3
15
CA
OUT
–
+
7.5V
REF
+
–
V
V
CC
16V TO 10V
2.6V/2.2V
EN/SYNC
RUN
–
+
7µA
2.2V
+
10
M1
–
V
SENSE
–
11
6
I
1M
A
–
I
EA
I
2 I
B
M
CA
A
+
I
=
+
M
R
R
200µA2
I
B
I
AC
7.5V
7.9V
–
+
Q
GTDR
16
32k
+
–
S
+
0.7V
RUN
OVP
8
10Ω
–
†
4.7nF
–
+
1N5819
OSC
ONE SHOT
200ns
16V
12µA
SS
SYNC
5V
50k
13
0.01µF
C
R
SET
SET
14
12
1. COILTRONICS CTX02-12236-1 (TYPE 52 CORE)
*
15k
1248 TA01
1000pF
AIR MOVEMENT NEEDED AT POWER LEVEL GREATER THAN 250W.
2. COILTRONICS CTX02-12295 (MAGNETICS Kool Mµ® 77930 CORE)
**
†
SEE START-UP AND SUPPLY VOLTAGE SECTION FOR V GENERATOR.
CC
THIS SCHOTTKY DIODE IS TO CLAMP GTDR WHEN MOS SWITCH
TURNS OFF. PARASITIC INDUCTANCE AND GATE CAPACITANCE MAY
TURN ON CHIP SUBSTRATE DIODE AND CAUSE ERRATIC OPERATIONS
IF GTDR IS NOT CLAMPED.
Kool Mµ is a registered trademark of Magnetics, Inc.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LT1248
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTIO
N Package
16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
0.300 – 0.325
0.130 ± 0.005
0.045 – 0.065
(7.620 – 8.255)
(3.302 ± 0.127)
(1.143 – 1.651)
14
12
10
9
15
13
11
16
0.020
(0.508)
MIN
0.255 ± 0.015*
(6.477 ± 0.381)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.035
2
1
3
4
6
8
5
7
0.325
–0.015
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
N16 1098
+0.889
8.255
(
)
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
0.010 – 0.020
(0.254 – 0.508)
16
15
14
13
12
11
10
9
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0° – 8° TYP
0.150 – 0.157**
0.228 – 0.244
(3.810 – 3.988)
(5.791 – 6.197)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
0.016 – 0.050
(0.406 – 1.270)
S16 1098
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
5
6
7
8
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1103
Off-Line Switching Regulator
PFC in SO-8
Universal Off-Line Inputs with Outputs to 100W
Simplified PFC Design with Minimal Part Count
Voltage Mode PWM, Simplified PFC Design
LT1249
LT1508
Power Factor and PWM Controller
Power Factor and PWM Controller
LT1509
Complete Solution for Universal Off-Line Switching Power Supplies
1248fd LT/GP 0799 2K REV D • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1993
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
相关型号:
LT1249CS8#PBF
LT1249 - Power Factor Controller; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT1249CS8#TRPBF
LT1249 - Power Factor Controller; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LT1249IN8#PBF
LT1249 - Power Factor Controller; Package: PDIP; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LT1249IS8#TR
LT1249 - Power Factor Controller; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明