LT1468AIDD-PBF [Linear]
90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er; 90MHz的， 22V /μs的16位精度运算功率放大器儿
| 型号： | LT1468AIDD-PBF |
| 厂家： | 
Linear |
| 描述： | 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er |
| 文件： | 总16页 (文件大小：216K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1468
90MHz, 22V/µs
16-Bit Accurate
Operational Amplifier
DESCRIPTION
FEATURES
TheLT®1468isaprecisionhighspeedoperationalamplifier
with 16-bit accuracy and 900ns settling to 150μV for 10V
signals.ThisuniqueblendofprecisionandACperformance
makes the LT1468 the optimum choice for high accuracy
applications such as DAC current-to-voltage conversion
and ADC buffers. The initial accuracy and drift character-
istics of the input offset voltage and inverting input bias
current are tailored for inverting applications.
n
90MHz Gain Bandwidth, f = 100kHz
n
22V/μs Slew Rate
n
Settling Time: 900ns (A = –1, 150μV, 10V Step)
V
n
Low Distortion, –96.5dB for 100kHz, 10V
P-P
n
Maximum Input Offset Voltage: 75μV
n
Maximum Input Offset Voltage Drift: 2μV/°C
n
Maximum (–) Input Bias Current: 10nA
n
Minimum DC Gain: 1000V/mV
n
Minimum Output Swing into 2k: 12.8V
The 90MHz gain bandwidth ensures high open-loop gain
at frequency for reducing distortion. In noninverting ap-
plications such as an ADC buffer, the low distortion and
DC accuracy allow full 16-bit AC and DC performance.
n
Unity Gain Stable
n
Input Noise Voltage: 5nV/√Hz
n
Input Noise Current: 0.6pA/√Hz
n
Total Input Noise Optimized for 1k < R < 20k
S
n
The 22V/μs slew rate of the LT1468 improves large-signal
performance in applications such as active filters and
instrumentation amplifiers compared to other precision
op amps.
Specified at 5V and 15V
APPLICATIONS
n
16-Bit DAC Current-to-Voltage Converter
The LT1468 is manufactured on a complementary bipolar
process. Itisavailableinaspacesaving3mm×3mmlead-
less package, as well as small outline and DIP packages.
n
Precision Instrumentation
n
ADC Buffer
Low Distortion Active Filters
High Accuracy Data Acquisition Systems
Photodiode Amplifiers
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
n
TYPICAL APPLICATION
Total Harmonic Distortion vs Frequency
–80
16-Bit DAC I-to-V Converter
V
A
=
15V
S
V
L
= 2
R
= 2k
OUT
–90
–100
–110
–120
–130
V
= 10V
P-P
20pF
16
6k
DAC
INPUTS
–
+
2k
V
LT1468
OUT
LTC®1597
50pF
OPTIONAL NOISE FILTER
OFFSET: V + I (6kΩ) < 1LSB
SETTLING TIME TO 150μV = 1.7μs
SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE
OS
B
1468 TA01
100
1k
10k
100k
FREQUENCY (Hz)
1468 TA02
1468fa
1
LT1468
(Note 1)
ABSOLUTE MAXIMUM RATINGS
+
–
Total Supply Voltage (V to V ).................................36V
Maximum Input Current (Note 2)...........................10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range ................. –40°C to 85°C
Specified Temperature Range (Note 4) .... –40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
NULL
–IN
1
2
3
4
8
7
6
5
DNC*
NULL
–IN
1
2
3
4
8
7
6
5
DNC*
+
V
+
–
+
+
–
V
+IN
OUT
+IN
OUT
–
V
NULL
–
V
NULL
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
*DO NOT CONNECT
T
= 150°C, θ = 43°C/W
T
= 150°C, θ = 130°C/W (N8)
JMAX
JA
JMAX
JA
–
EXPOSED PAD IS INTERNALLY CONNECTED TO V
T
= 150°C, θ = 190°C/W (S8)
JMAX
JA
ORDER INFORMATION
LEAD FREE FINISH
LT1468CN8#PBF
LT1468IN8#PBF
LT1468CS8#PBF
LT1468IS8#PBF
LT1468ACDD#PBF
LT1468AIDD#PBF
LT1468CDD#PBF
LT1468IDD#PBF
LEAD BASED FINISH
LT1468CN8
TAPE AND REEL
PART MARKING PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
NA
LT1468CN8
LT1468IN8
1468
8-Lead PDIP
8-Lead PDIP
0°C to 70°C
NA
–40°C to 85°C
0°C to 70°C
LT1468CS8#TRPBF
LT1468IS8#TRPBF
LT1468ACDD#TRPBF
LT1468AIDD#TRPBF
LT1468CDD#TRPBF
LT1468IDD#TRPBF
TAPE AND REEL
NA
8-Lead Plastic Small Outline
1468I
8-Lead Plastic Small Outline
–40°C to 85°C
0°C to 70°C
LDJX
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
8-Lead (3mm × 3mm) Plastic DFN
LDJX
–40°C to 85°C
0°C to 70°C
LDJX
LDJX
–40°C to 85°C
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
PART MARKING PACKAGE DESCRIPTION
LT1468CN8
LT1468IN8
1468
8-Lead PDIP
LT1468IN8
NA
8-Lead PDIP
–40°C to 85°C
0°C to 70°C
LT1468CS8
LT1468CS8#TR
LT1468IS8#TR
8-Lead Plastic Small Outline
8-Lead Plastic Small Outline
LT1468IS8
1468I
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
1468fa
2
LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
Input Offset Voltage
N8, S8
15V
5V
30
50
75
175
μV
μV
OS
LT1468A, DD Package
LT1468, DD Package
15V
5V
30
50
75
μV
μV
175
15V
5V
100
150
200
300
μV
μV
I
I
I
Input Offset Current
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
13
3
50
10
40
nA
nA
nA
OS
–
Inverting Input Bias Current
Noninverting Input Bias Current
Input Noise Voltage
B
B
+
–10
0.3
5
0.1Hz to 10Hz
f = 10kHz
μV
P-P
e
Input Noise Voltage
nV/√Hz
pA/√Hz
n
i
n
Input Noise Voltage
f = 10kHz
0.6
R
IN
Input Resistance
V
=
12.5V
15V
15V
100
50
240
150
Mꢀ
kꢀ
CM
Differential
C
Input Capacitance
15V
4
pF
IN
Input Voltage Range +
15V
5V
12.5
2.5
13.5
3.5
V
V
Input Voltage Range –
15V
5V
–14.3
–4.3
–12.5
–2.5
V
V
CMRR
PSRR
Common Mode Rejection Ratio
V
V
=
=
12.5V
2.5V
15V
5V
96
96
110
112
dB
dB
CM
CM
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V = 4.5V to 15V
S
100
112
dB
A
VOL
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12.5V, R = 10k
15V
15V
5V
1000
500
1000
500
9000
5000
6000
3000
V/mV
V/mV
V/mV
V/mV
L
L
12.5V, R = 2k
2.5V, R = 10k
L
L
2.5V, R = 2k
5V
V
Output Swing
Output Current
R = 10k
15V
15V
5V
13.0
12.8
3.0
13.6
13.5
3.6
V
V
V
V
OUT
L
R = 2k
L
R = 10k
L
R = 2k
5V
2.8
3.5
L
I
I
V
OUT
V
OUT
=
=
12.5V
2.5V
15V
5V
15
15
22
22
mA
mA
OUT
Short-Circuit Current
Slew Rate
V
OUT
= 0V, V
=
IN
0.2V
15V
25
40
mA
SC
SR
A = –1, R = 2k (Note 5)
V
15V
5V
15
11
22
17
V/μs
V/μs
L
Full-Power Bandwidth
Gain Bandwidth
10V Peak, (Note 6)
3V Peak, (Note 6)
15V
5V
350
900
kHz
kHz
GBW
THD
f = 100kHz, R = 2k
15V
5V
60
55
90
88
MHz
MHz
L
Total Harmonic Distortion
Rise Time, Fall Time
Overshoot
A = 2, V = 10V , f = 1kHz
15V
15V
0.00007
0.0015
%
%
V
O
P-P
A = 2, V = 10V , f = 100kHz
V
O
P-P
t, t
A = 1, 10% to 90%, 0.1V
V
15V
5V
11
12
ns
ns
r
f
A = 1, 0.1V
V
15V
5V
30
35
%
%
Propagation Delay
A = 1, 50% V to 50% V
,
15V
5V
9
10
ns
ns
V
IN
OUT
0.1V
1468fa
3
LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
10V Step, 0.01%, A = –1
V
MIN
TYP
MAX
UNITS
SUPPLY
t
Settling Time
15V
15V
5V
760
900
770
ns
ns
ns
s
V
10V Step, 150μV, A = –1
V
5V Step, 0.01%, A = –1
V
R
Output Resistance
Supply Current
A = 1, f = 100kHz
V
15V
0.02
ꢀ
O
I
15V
5V
3.9
3.6
5.2
5.0
mA
mA
S
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
OS
Input Offset Voltage
N8, S8
15V
5V
●
●
150
250
μV
μV
LT1468A, DD Package
LT1468, DD Package
(Note 7)
15V
5V
●
●
150
250
μV
μV
15V
5V
●
●
300
400
μV
μV
Input V Drift
●
●
0.7
60
40
2.0
65
μV/°C
nA
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
OS
I
I
Input Offset Current
OS
Input Offset Current Drift
Inverting Input Bias Current
Negative Input Current Drift
Noninverting Input Bias Current
Common Mode Rejection Ratio
pA/°C
nA
–
●
●
15
50
B
pA/°C
nA
+
I
B
CMRR
V
CM
V
CM
=
=
12.5V
2.5V
15V
5V
●
●
94
94
dB
dB
PSRR
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V = 4.5V to 15V
●
98
dB
S
A
VOL
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12.5V, R = 10k
15V
15V
5V
●
●
●
●
500
250
500
250
V/mV
V/mV
V/mV
V/mV
L
12.5V, R = 2k
L
2.5V, R = 10k
L
2.5V, R = 2k
5V
L
V
Output Swing
Output Current
R = 10k
15V
15V
5V
●
●
●
●
12.9
12.7
2.9
V
V
V
V
OUT
L
R = 2k
L
R = 10k
L
R = 2k
5V
2.7
L
I
I
V
OUT
V
OUT
=
=
12.5V
2.5V
15V
5V
●
●
12.5
12.5
mA
mA
OUT
SC
Short-Circuit Current
Slew Rate
V
OUT
= 0V, V
=
IN
0.2V
15V
●
17
mA
SR
A = –1, R = 2k (Note 5)
V
15V
5V
●
●
13
9
V/μs
V/μs
L
GBW
Gain Bandwidth
Supply Current
f = 100kHz, R = 2k
15V
5V
●
●
55
50
MHz
MHz
L
I
15V
5V
●
●
6.5
6.3
mA
mA
S
1468fa
4
LT1468
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. –40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
V
MIN
TYP
MAX
UNITS
SUPPLY
V
Input Offset Voltage
N8, S8
15V
5V
●
●
230
330
μV
μV
OS
LT1468A, DD Package
LT1468, DD Package
(Note 7)
15V
5V
●
●
230
330
μV
μV
15V
5V
●
●
400
500
μV
μV
Input V Drift
●
●
0.7
120
80
2.5
80
μV/°C
nA
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
5V to 15V
OS
I
I
Input Offset Current
OS
Input Offset Current Drift
Inverting Input Bias Current
Negative Input Current Drift
Noninverting Input Bias Current
Common Mode Rejection Ratio
pA/°C
nA
–
●
30
60
B
pA/°C
nA
+
I
●
B
CMRR
V
CM
V
CM
=
=
12.5V
2.5V
15V
5V
●
●
92
92
dB
dB
PSRR
Power Supply Rejection Ratio
Large-Signal Voltage Gain
V = 4.5V to 15V
●
96
dB
S
A
VOL
V
OUT
V
OUT
V
OUT
V
OUT
=
=
=
=
12V, R = 10k
15V
15V
5V
●
●
●
●
300
150
300
150
V/mV
V/mV
V/mV
V/mV
L
10V, R = 2k
L
2.5V, R = 10k
L
2.5V, R = 2k
5V
L
V
Output Swing
Output Current
R = 10k
15V
15V
5V
●
●
●
●
12.8
12.6
2.8
V
V
V
V
OUT
L
R = 2k
L
R = 10k
L
R = 2k
5V
2.6
L
I
I
V
V
=
=
12.5V
2.5V
15V
5V
●
●
7
7
mA
mA
OUT
SC
OUT
OUT
Short-Circuit Current
Slew Rate
V
OUT
= 0V, V
=
IN
0.2V
15V
●
12
mA
SR
A = –1, R = 2k (Note 5)
V
15V
5V
●
●
9
6
V/μs
V/μs
L
GBW
Gain Bandwidth
Supply Current
f = 100kHz, R = 2k
15V
5V
●
●
45
40
MHz
MHz
L
I
S
15V
5V
●
●
7.0
6.8
mA
mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The LT1468C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and at 85°C. The
LT1468I is guaranteed to meet the extended temperature limits.
Note 2: The inputs are protected by back-to-back diodes and two 100ꢀ
series resistors. If the differential input voltage exceeds 0.7V, the input
current should be limited to 10mA. Input voltages outside the supplies will
be clamped by ESD protection devices and input currents should also be
limited to 10mA.
Note 5: Slew rate is measured between 8V on the output with 12V input
for 15V supplies and 2V on the output with 3V input for 5V supplies.
Note 6: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πV
P
Note 7: This parameter is not 100% tested.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
1468fa
5
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
and Temperature
Input Common Mode Range
vs Supply Voltage
Input Bias Current
vs Input Common Mode Voltage
+
7
6
80
60
V
T
= 25°C
OS
A
V
T
=
15V
S
A
–0.5
–1.0
–1.5
–2.0
ΔV < 100μV
= 25°C
40
125°C
5
4
20
–
I
B
0
+
25°C
I
B
2.0
1.5
1.0
0.5
–20
–40
–60
–80
3
2
1
–55°C
–
V
0
5
10
15
20
–10
–5
5
–15
10
15
0
3
9
12
15
18
0
6
SUPPLY VOLTAGE ( V)
SUPPLY VOLTAGE ( V)
INPUT COMMON MODE VOLTAGE (V)
1468 G01
1468 G03
1468 G02
Input Bias Current
vs Temperature
Input Noise Spectral Density
0.1Hz to 10Hz Voltage Noise
1000
100
10
30
20
V
= 15V
S
V
= 15V
= 25°C
= 101
V
= 15V
S
A
S
T
A
V
R
= 100k FOR i
S
n
i
n
10
1
–
+
I
I
B
0
–10
–20
–30
–40
e
n
10
1
0.1
B
0.01
1
10
100
1k
10k
100k
TIME (1s/DIV)
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
FREQUENCY (Hz)
1468 G06
1468 G05
1468 G04
Open-Loop Gain
vs Resistive Load
Open-Loop Gain
vs Temperature
Warm-Up Drift vs Time
5
0
140
135
130
125
120
115
110
160
150
T
= 25°C
R
L
= 2k
A
V
S
= 15V
N8 5V
V
=
=
15V
5V
–5
S
V
S
=
5V
140
130
120
110
100
S0-8 5V
–10
–15
–20
–25
–30
–35
–40
V
S
N8 15V
S0-8 15V
90
10
100
1k
10k
0
20
40
60
80 100 120 140
50
100 125
–50 –25
0
25
75
LOAD RESISTANCE (Ω)
TIME AFTER POWER UP (s)
TEMPERATURE (°C)
1468 G08
1468 G07
1468 G09
1468fa
6
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing
vs Supply Voltage
Output Voltage Swing
vs Load Current
Output Short-Circuit Current
vs Temperature
+
+
V
–0.5
–1.0
–1.5
–2.0
–2.5
60
55
50
45
40
35
30
25
20
15
10
V
R
L
= 2k
V
= 15V
S
V
V
=
IN
15V
0.2V
85°C
S
25°C
=
–1
–2
–3
–4
4
R
L
= 10k
–40°C
SOURCE
SINK
2.5
2.0
1.5
1.0
40°C
85°C
3
2
R
L
= 2k
25°C
1
R
L
= 10k
T
= 25°C
A
–
–
V
0.5
V
–20
0
10 15
–15 –10 –5
5
20
50
TEMPERATURE (°C)
125
–50
0
25
75 100
–25
0
5
10
15
20
OUTPUT CURRENT (mA)
SUPPLY VOLTAGE ( V)
1468 G11
1468 G12
1468 G10
Settling Time to 0.01%
Settling Time to 0.01%
vs Output Step, VS = 5V
Settling Time to 150μV
vs Output Step
vs Output Step, VS = 15V
10
8
10
8
5
4
V
=
15V
V
A
= 15V
V
=
5V
S
L
S
V
S
L
R
= 1k
= –1
R
= 1k
A
V
= –1
A = 1
V
A
V
= 1
A = –1
V
R
= R = 2k
F
F
G
6
6
3
C
= 8pF
4
4
2
2
2
1
0
0
0
–2
–4
–6
–8
–10
–2
–4
–6
–8
–10
–1
–2
–3
–4
–5
A
V
= –1
A
V
= 1
A
V
= 1
A = –1
V
0
200
400
600
800
1000
0
200
400
600
800
1000
300
400
500
600
700
800
SETTLING TIME (ns)
SETTLING TIME (ns)
SETTLING TIME (ns)
1468 G13
1468 G15
1468 G14
Gain Bandwidth and Phase
Margin vs Supply Voltage
Gain Bandwidth and Phase
Margin vs Temperature
Output Impedance vs Frequency
104
46
44
42
40
38
36
34
32
30
28
26
100
10
98
96
94
92
90
88
86
84
82
44
42
40
38
36
34
32
30
28
V
T
=
15V
T
= 25°C
= –1
S
A
A
V
F
F
L
102
100
98
96
94
92
90
88
86
84
= 25°C
A
PHASE MARGIN
R
= R = 5.1k
G
V = 15V
S
PHASE MARGIN
C
= 5pF
= 2k
A
= 100
V
R
V
S
= 5V
1
A
= 10
V
0.1
V
= 15V
= 5V
S
GAIN BANDWIDTH
GAIN BANDWIDTH
A
V
= 1
0.01
0.001
V
S
10
SUPPLY VOLTAGE ( V)
10k
100k
1M
FREQUENCY (Hz)
10M
100M
0
5
15
20
50
TEMPERATURE (°C)
125
–55
0
25
75 100
–25
1468 G19
1468 G17
1468 G18
1468fa
7
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Power Supply Rejection Ratio
Common Mode Rejection Ratio
vs Frequency
Gain and Phase vs Frequency
vs Frequency
120
100
80
60
40
20
0
70
60
50
40
30
20
10
0
100
80
160
140
120
100
V
T
= 15V
= 25°C
V
T
=
15V
S
A
S
A
= 25°C
PHASE
15V
+PSRR
–PSRR
60
40
5V
20
80
60
GAIN
0
15V
T
= 25°C
= –1
A
V
F
F
L
–20
–40
–60
40
20
0
A
5V
R
= R = 5.1k
G
C
= 5pF
= 2k
R
–10
100
10k
100k 1M
10M 100M
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
100
1k
10k
1M
10M 100M
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
1468 G16
1468 G21
1468 G20
Frequency Response
vs Supply Voltage, AV = 1
Frequency Response
Frequency Response
vs Capacitive Load, AV = 1
vs Supply Voltage, AV = –1
5
4
3
2
5
4
3
2
14
12
10
8
V
T
= 15V
= 25°C
= 1
T
= 25°C
= 1
= 2k
S
A
V
A
V
L
A
R
= R = 2k
G
F
A
R
5V
NO R
L
15V
R
= R = 5.1k
G
F
100pF
50pF
20pF
5V
5V
15V
1
0
1
0
6
4
15V
–1
–2
–3
–4
–5
–1
–2
–3
–4
–5
2
0
10pF
T
= 25°C
= –1
A
V
L
F
–2
–4
–6
A
R
C
= 2k
= 5pF
100k
1M
10M
100M
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
1468 G22
1468 G23
1468 G24
Frequency Response
vs Capacitive Load, AV = –1
Slew Rate vs Supply Voltage
Slew Rate vs Temperature
14
12
10
8
30
28
26
24
22
20
18
16
14
45
T
= 25°C
= –1
= 2k
V
T
= 15V
= 25°C
= –1
A
V
L
V
A
= 15V
= –1
= 2k
S
A
V
F
F
S
V
L
A
40
35
R
A
R
–SR
R
C
NO R
= R = 5.1k
G
300pF
= 5pF
–SR
+SR
L
30
25
20
15
10
6
4
+SR
200pF
2
0
100pF
50pF
–2
–4
–6
5
10
SUPPLY VOLTAGE ( V)
100k
1M
10M
100M
0
5
15
20
–25
0
50
75 100 125
–50
25
FREQUENCY (Hz)
TEMPERATURE (°C)
1468 G25
1468 G26
1468 G27
1468fa
8
LT1468
TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion + Noise
vs Frequency
Total Harmonic Distortion + Noise
vs Amplitude
Undistorted Output Swing
vs Frequency, 15V
0.010
30
25
20
15
10
5
–50
–60
V
= 15V
S
A
L
T
= 25°C
R
= 600Ω
A
V
= 1
V
= 20V
O
P-P
5V
15V
NOISE BW = 80kHz
–70
A
V
= –1
A
= 10
= 1
V
–80
0.001
A
V
–90
MEASUREMENT
LIMIT
T
= 25°C
= 10
A
V
L
A
–100
R
= 600Ω
V
=
15V
S
L
f = 10kHz
R
= 2k
NOISE BW = 80kHz
0
–110
0.0001
1
10
100
1000
0.01
0.1
1
10
20
100
1k
FREQUENCY (Hz)
10k 20k
FREQUENCY (kHz)
OUTPUT SIGNAL (V
)
RMS
1468 G28
1468 G30
1468 G29
Undistorted Output Swing
vs Frequency, 5V
Small-Signal Transient, AV = 1
Small-Signal Transient, AV = –1
10
9
V
=
5V
S
R
= 2k
L
8
A
V
= 1
7
6
5
A
V
= –1
4
3
2
1
0
1468 G32
1468 G31
V
S
= 15V
V
S
= 15V
1
10
100
1000
FREQUENCY (kHz)
1468 G33
Total Noise vs Unmatched
Source Resistance
Large-Signal Transient, AV = 1
Large-Signal Transient, AV = –1
100
10
1
V
=
15V
S
A
T
= 25°C
f = 10kHz
TOTAL
NOISE
RESISTOR
NOISE ONLY
R
S
+
–
1468 G34
1468 G35
V
S
= 15V
V
= 15V
S
0.1
10
100
1k
10k
100k
SOURCE RESISTANCE, R (Ω)
S
1468 G36
1468fa
9
LT1468
APPLICATIONS INFORMATION
TheLT1468maybeinserteddirectlyintomanyoperational
amplifier applications improving both DC and AC perfor-
mance, provided that the nulling circuitry is removed.
The suggested nulling circuit for the LT1468 is shown
below.
contacts to the inputs can exceed the inherent drift of
the amplifier. Air currents over device leads should be
minimized, package leads should be short, and the two
input leads should be as close together as possible and
maintained at the same temperature.
Make no connection to Pin 8. This pin is used for factory
trim of the inverting input current.
Offset Nulling
+
V
The parallel combination of the feedback resistor and gain
settingresistorontheinvertinginputcancombinewiththe
input capacitance to form a pole that can cause peaking
or even oscillations. For feedback resistors greater than
2k, a feedback capacitor of the value:
3
0.1μF
0.1μF
2.2μF
2.2μF
+
–
7
4
6
LT1468
5
2
1
100k
C > (R )(C /R )
–
F
G
IN
F
1468 AI01
V
should be used to cancel the input pole and optimize dy-
namic performance. For applications where the DC noise
Layout and Passive Components
gainisone,andalargefeedbackresistorisused,C should
F
The LT1468 requires attention to detail in board layout
in order to maximize DC and AC performance. For best
AC results (for example fast settling time) use a ground
plane,shortleadlengths,andRF-qualitybypasscapacitors
(0.01μF to 0.1μF) in parallel with low ESR bypass capaci-
tors(1μFto10μFtantalum). ForbestDCperformance, use
“star” grounding techniques, equalize input trace lengths
and minimize leakage (i.e., 1.5Gꢀ of leakage between an
be greater than or equal to C . An example would be a
IN
DAC I-to-V converter as shown on the front page of this
data sheet where the DAC can have many tens of pF of
outputcapacitance.Anotherexamplewouldbeagainof–1
with 5k resistors; a 5pF to 10pF capacitor should be added
across the feedback resistor. The frequency response in a
gainof–1isshownintheTypicalPerformancecurveswith
2k and 5.1k resistors with a 5pF feedback capacitor.
input and a 15V supply will generate 10nA—equal to the
–
maximum I specification.)
B
Nulling Input Capacitance
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close
to that of the inputs. For inverting configurations tie the
ring to ground, in noninverting connections tie the ring
to the inverting input (note the input capacitance will
increase which may require a compensating capacitor as
discussed below.)
R
F
C
F
R
G
–
+
C
LT1468
V
OUT
IN
V
IN
1468 AI02
Microvolt level error voltages can also be generated in
the external circuitry. Thermocouple effects caused by
temperature gradients across dissimilar metals at the
1468fa
10
LT1468
APPLICATIONS INFORMATION
Input Considerations
Total Input Noise
Each input of the LT1468 is protected with a 100ꢀ series
resistor and back-to-back diodes across the bases of the
input devices. If the inputs can be pulled apart, the input
current should be limited to less than 10mA with an ex-
ternal series resistor. Each input also has two ESD clamp
diodes—one to each supply. If an input is driven above
the supply, limit the current with an external resistor to
less than 10mA.
ThecurveofTotalNoisevsUnmatchedSourceResistance
in the Typical Performance Characteristics shows that
with source resistance below 1k, the voltage noise of the
amplifier dominates. In the 1k to 20k region the increase
in noise is due to the source resistance. Above 20k the
input current noise component is larger than the resistor
noise.
Capacitive Loading
TheLT1468employsbiascurrentcancellationattheinputs.
The inverting input current is trimmed at zero common
mode voltage to minimize errors in inverting applications
such as I-to-V converters. The noninverting input current
is not trimmed and has a wider variation and therefore a
larger maximum value. As the input offset current can be
greaterthaneitherinputcurrent,theuseofbalancedsource
resistance is NOT recommended as it actually degrades
DC accuracy and also increases noise.
The LT1468 drives capacitive loads of up to 100pF in unity
gain and 300pF in a gain of –1. When there is a need to
drivealargercapacitiveload,asmallseriesresistorshould
be inserted between the output and the load. In addition,
a capacitor should be added between the output and the
inverting input as shown in Driving Capacitive Loads.
Settling Time
The LT1468 is a single stage amplifier with an optimal
thermal layout that leads to outstanding settling
performance. Measuring settling, even at the 12-bit level
is very challenging, and at the 16-bit level requires a great
deal of subtlety and expertise. Fortunately, there are two
excellent Linear Technology reference sources for settling
measurements, Application Notes 47 and 74. Appendix B
of AN47 is a vital primer on 12-bit settling measurements,
and AN74 extends the state of the art while concentrating
on settling time with a 16-bit current output DAC input.
The input bias currents vary with common mode voltage
as shown in the Typical Performance Characteristics.
The cancellation circuitry was not designed to track this
common mode voltage because the settling time would
have been adversely affected.
The LT1468 inputs can be driven to the negative supply
and to within 0.5V of the positive supply without phase
reversal. As the input moves closer than 0.5V to the posi-
tive supply, the output reverses phase.
Input Stage Protection
Driving Capacitive Loads
R
F
C
F
R
R
C
≥ (1 + R /R )/(2πC 5MHz)
F G L
O
F
F
≥ 10R
O
R1
100Ω
R2
R
= (2R /R )C
L
G
O
F
100Ω
Q1
Q2
–
+
+IN
–IN
R
O
LT1468
V
OUT
1468 AI03
C
V
IN
L
1468 AI04
1468fa
11
LT1468
APPLICATIONS INFORMATION
The 150μV settling curve in the Typical Performance
CharacteristicsismeasuredusingtheDifferentialAmplifier
method of AN74 followed by a clamped, nonsaturating
gain of 100. The total gain of 500 allows a resolution of
100μV/DIV with an oscilloscope setting of 0.05V/DIV
Distortion
The LT1468 has outstanding distortion performance as
shownintheTypicalPerformancecurvesofTotalHarmonic
Distortion + Noise vs Frequency and Amplitude. The high
open-loopgainandinherentlybalancedarchitecturereduce
errors to yield 16-bit accuracy to frequencies as high as
100kHz. An example of this performance is the Typical
Application titled 100kHz Low Distortion Bandpass Filter.
This circuit is useful for cleaning up the output of a high
performance signal generator such as the B & K type
1051 or HP3326A.
The settling of the DAC I-to-V converter on the front page
was measured using the exact methods of AN74. The
optimum nulling of the DAC output capacitance requires
20pF across the 6k feedback resistor. The theoretical limit
for 16-bit settling is 11.1 times this RC time constant or
1.33μs. The actual settling time is 1.7μs at the output of
the LT1468. The LT1468 is the fastest Linear Technology
amplifier in this application.
Another key application for LT1468 is buffering the input
to a 16-bit A/D converter. In a gain of 1 or 2 this straight-
forward circuit provides uncorrupted AC and DC levels
to the converter, while buffering the A/D input sample-
and-hold circuit from high source impedance which can
reduce the maximum sampling rate. The front page graph
shows better than 16-bit distortion for a gain of 2 with a
The optional noise filter adds a slight delay of 100ns, but
reduces the noise bandwidth to 1.6MHz which increases
the output resolution for 16-bit accuracy.
10V output.
P-P
SIMPLIFIED SCHEMATIC
+
V
I1
I2
I5
Q10
Q11
Q8
Q9
OUT
+IN
Q1
Q2
–IN Q5
Q3
Q6
Q7
Q4
C
BIAS
I3
I4
I6
–
V
1468 SS
1468fa
12
LT1468
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(LTC DWG # 05-08-1698)
0.675 ±0.05
3.5 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.38 ± 0.10
TYP
5
8
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(NOTE 6)
(DD) DFN 1203
4
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
1468fa
13
LT1468
PACKAGE DESCRIPTION
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.400*
(10.160)
MAX
8
7
6
5
4
.255 ± .015*
(6.477 ± 0.381)
1
2
3
.130 ± .005
.300 – .325
.045 – .065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.120
(3.048)
MIN
.020
(0.508)
MIN
+.035
–.015
.325
.018 ± .003
(0.457 ± 0.076)
.100
(2.54)
BSC
+0.889
8.255
(
)
N8 1002
–0.381
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
1468fa
14
LT1468
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
.160 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1468fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1468
TYPICAL APPLICATIONS
Instrumentation Amplifier
16-Bit ADC Buffer
10pF
2k
R5
1.1k
R4
50k
R2
5k
C2
2pF
C1
10pF
R1
50k
2k
–
+
16 BITS
200Ω
LT1468
LTC1605
CAP
1000pF
V
R3
5k
IN
–
1468 TA04
33.2k
LT1468
–
+
+
LT1468
–
V
OUT
2.2μF
1468 TA03
V
IN
+
GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 480kHz
100kHz Low Distortion Bandpass Filter
100kHz Distortion
1000pF
22.1k
SIGNAL LEVEL
R
L
2ND HARMONIC 3RD HARMONIC
1V
2V
1M
1M
1M
2k
–106dB
–105dB
–106dB
–103dB
–99dB
–103dB
–105dB
–104dB
–103dB
–103dB
–102dB
RMS
RMS
1000pF
11k
3.5V
RMS
RMS
RMS
V
IN
–
1V
2V
LT1468
V
OUT
2k
121Ω
R
L
+
3.5V
2k
–96.5dB
RMS
1468 TA05
f
= 100kHz
O
Q = 7
= –1
A
V
RELATED PARTS
PART NUMBER
DESCRIPTION
Precision Instrumentation Amplifier
COMMENTS
LT1167
Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain
Nonlinearity
LTC1595/LTC1596 16-Bit Serial Multiplying I
DACs
1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade
1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors
2.5V Input, SINAD = 90dB, THD = –100dB
Low Power, 10V Inputs, Parallel/Byte Interface
Dual Version of LT1468
OUT
LTC1597
LTC1604
LTC1605
LT1469
16-Bit Parallel Multiplying I
DAC
OUT
16-Bit, 333ksps Sampling ADC
Single 5V, 16-Bit, 100ksps Sampling ADC
Dual 90MHz 16-Bit Accurate Op Amp
LT1800
80MHz, 25V/ꢁs Low Power Rail-to-Rail Precision Op Amp V ≤ 5V, I = 1.6mA, V ≤ 350ꢁV
S CC OS
LT6220
60MHz, 20V/ꢁs Low Power Rail-to-Rail Precision Op Amp V ≤ 5V, I = 0.9mA, V ≤ 350ꢁV
S CC OS
LT1722
200MHz, 70V/ꢁs Low Noise Precision Op Amp
Dual 50MHz, Low Noise, Precision CMOS Op Amp
V ≤ 5V, e = 3.8nV/√Hz, –85dBc at 1MHz
S n
LTC6244HV
V ≤ 5V, V ≤ 100ꢁV, I ≤ 75pA
S OS B
1468fa
LT 0808 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 1998
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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