LT1509ISW#TR [Linear]
LT1509 - Power Factor and PWM Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C;
| 型号： | LT1509ISW#TR |
| 厂家： | 
Linear |
| 描述： | LT1509 - Power Factor and PWM Controller; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C 控制器 |
| 文件： | 总16页 (文件大小：351K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1509
Power Factor and
PWM Controller
U
DESCRIPTION
FEATURES
■
PFC and PWM Single Chip Solution
The LT®1509 is a complete solution for universal off-line
switching power supplies utilizing active power factor
correction. The PFC section is identical to the LT1248 PFC
controller except the EN/SYNC pin is removed because
PFC and PWM are synchronized internally.
■
Synchronized Operation up to 300kHz
■
99% Power Factor over 20:1 Load Current Range
■
Current Mode PWM
■
Instantaneous Overvoltage Protection
■
Dedicated Overvoltage Protection (OVP Pin)
The current mode PWM section (the LT1508 is the volt-
age-mode counterpart) contains all the primary side func-
tions to convert the PFC preregulated high voltage output
to an isolated low voltage output. The PWM duty cycle is
internally limited to 47% (maximum 50%) to prevent
transformer saturation. PWM soft start begins when PFC
output reaches the preset voltage. In the event of brief line
loss, thePWMwillbeshutoffwhenthePFCoutputvoltage
drops below 73% of the preset value.
■
Minimal Line Current Dead Zone
■
Typical 250µA Start-Up Supply Current
■
Line Switching Noise Filter
■
Low Quiescent Current: 13mA
■
Fast 2A Peak Current Gate Drivers
■
Separate Soft Start Controls
U
APPLICATIONS
■
Universal Power Factor Corrected Power Supplies
and Preregulators
, LTC and LT are registered trademarks of Linear Technology Corporation.
W
BLOCK DIAGRAM
VA
OUT
V
REF
12
M
I
CA
OUT
6
GND1
3
PK
V
OUT SENSE
LIM CC
7.5V
REF
10
8
7
5
17
V
V
+
–
CC
RUN
7µA
16V TO 10V
2.2V
+
–
–
M1
V
SENSE
14
+
–
+
–
+
I
A
I
M
CA
EA
2
–
I
I
B
R
R
S
A
7.5V
7.9V
I
M
=
25k
I
AC
9
2
200µA
Q
I
B
GTDR1
1
RUN
+
+
–
+
–
0.7V
OVP
11
OSC
16V
GND2
2
14µA
SS1
16
15
4
R
SET
–
+
C
SET
+
–
CL
1V
55%
DELAY
–
+
1.2V
R
S
R
–
+
7V to
4.7V
14µA
+
–
PWM0K
Q
SS2
13
GTDR2
20
50µA
200ns
BLANKING
19
RAMP
18
16V
V
C
NOTE: PWM PULSE IS DELAYED BY 55% DUTY CYCLE AFTER PFC PULSE
1500 • BD01
1
LT1509
U
DESCRIPTION
By using fixed high frequency PWM current averaging
without the need for slope compensation, the LT1509
achieves far lower line current distortion with a smaller
magnetic element than systems that use either peak
current detection, or zero current switching approach, in
both continuous and discontinuous modes of operation.
the multiplier. Line current dead zone is minimized with
low bias voltage at the current input to the multiplier.
The LT1509 provides many protection features including
peak current limiting and overvoltage protection. Imple-
mentedwithaveryhighspeedprocess, theLT1509canbe
operated at frequencies as high as 300kHz.
The LT1509 also provides filtering capability to reject line
switching noise which can cause instability when fed into
W W
U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
Supply Voltage ........................................................ 27V
GTDR Current Continuous ...................................... 0.5A
GTDR Output Energy ................................................ 5µJ
IAC, RSET, PKLIM Input Current.............................. 20mA
VSENSE, OVP Input Voltage .................................... VMAX
RAMP, VC Input Voltage ............................................ 8V
ISENSE, MOUT Input Current................................... ±5mA
Operating Junction Temperature Range
ORDER PART
TOP VIEW
NUMBER
GTDR1
GND2
GND1
1
2
20 GTDR2
19 RAMP
LT1509CN
LT1509CSW
LT1509IN
3
18
17
V
V
C
C
4
SET
CC
PK
LIM
5
16 SS1
LT1509ISW
CA
6
15
14
R
V
OUT
SET
I
7
SENSE
SENSE
M
OUT
8
13 SS2
12
Commercial ........................................... 0°C to 100°C
Industrial .......................................... –40°C to 125°C
Thermal Resistance (Junction-to-Ambient)
I
AC
9
V
REF
VA
10
11 OVP
OUT
N Package ................................................... 100°C/W
SW Package ................................................ 120°C/W
N PACKAGE
SW PACKAGE
20-LEAD PDIP
20-LEAD PLASTIC SO WIDE
TJMAX = 125°C, θJA = 100°C/ W (N)
JMAX = 125°C, θJA = 120°C/ W (SW)
T
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V,
VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted.
PARAMETER
Overall
Supply Current (V in Undervoltage Lockout)
CONDITIONS
= Lockout Voltage –0.2V
MIN
TYP
MAX
UNITS
V
●
●
●
●
0.25
13
16.5
10.5
0.45
19
17.5
11.5
mA
mA
V
CC
CC
Supply Current On
11.5V ≤ V ≤ V
CC MAX
V
CC
V
CC
Turn-On Threshold (Undervoltage Lockout)
Turn-Off Threshold
15.5
9.5
V
Voltage Amplifier (PFC Section)
Voltage Amp Offset
Input Bias Current
VA
= 3.5V
= 0V to 7V
●
●
– 10
70
10
–250
mV
nA
dB
MHz
V
OUT
V
–25
100
3
13.3
1.1
8
SENSE
Voltage Gain
Voltage Amp Unity-Gain Bandwidth
Voltage Amp Output High (Internally Clamped)
Voltage Amp Output Low
●
●
●
11.3
3
2
17
V
mA
Voltage Amp Short-Circuit Current
VA
= 0V
OUT
2
LT1509
ELECTRICAL CHARACTERISTICS
Maximum operating voltage (VMAX) = 25V, VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V,
VAOUT = 5V, OVP = VREF. No load on any outputs unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Amplifier (PFC Section)
Current Amp Offset Voltage
●
●
±1
–25
110
3
8.5
1.1
8
±4
–250
mV
nA
dB
MHz
V
V
mA
V
I
Bias Current
SENSE
Current Amp Voltage Gain
Current Amp Unity-Gain Bandwidth
Current Amp Output High
Current Amp Output Low
Current Amp Short-Circuit Current
80
●
●
●
●
7.2
2
17
1
CA
= 0V
3
–0.3
OUT
Input Range, I
, M
(Linear Operation)
OUT
SENSE
Reference
Reference Output Voltage
I
= 0mA, T = 25°C
7.39
7.50
5
5
28
7.5
7.60
V
mV
mV
mA
V
REF
A
V
V
V
V
Load Regulation
Line Regulation
Short-Circuit Current
Worst Case
–5mA < I < 0mA
REF
REF
REF
REF
REF
11.5V < V < V
V
Load, Line, Temperature
●
●
●
–20
12
7.32
20
50
7.68
CC
MAX
= 0V
REF
Current Limit
PK Offset Voltage
PK Input Current
LIM
●
●
–25
25
–100
mV
µA
ns
LIM
PK = –0.1V
–50
400
LIM
PK to GTDR Propagation Delay
LIM
PK Falling from 50mV to –50mV
LIM
Multiplier
Multiplier Output Current
Multiplier Output Current Offset
Multiplier Maximum Output Current
Multiplier Gain Constant (Note 1)
I
R
I
I
= 100µA, R
= 15k
SET
35
µA
µA
µA
V
kΩ
AC
= 1M from I to GND
●
●
–0.05
–260
0.035
25
–0.5
–235
AC
AC
= 450µA, R
= 15k, VA
= 7V, M = 0V
OUT
–286
15
AC
SET
OUT
–2
I
Input Resistance
from 50µA to 1mA
35
AC
AC
Oscillator
Oscillator Frequency
R
R
= 15k, C = 1000pF
●
●
85
58
100
68
115
78
kHz
kHz
SET
SET
SET
= 15k, C = 1500pF
SET
C
C
Ramp Peak-to-Peak Amplitude
Ramp Valley Voltage
4.35
1.15
4.7
1.3
5.0
1.55
V
V
SET
SET
Overvoltage Comparator (PFC Section)
Comparator Trip Voltage Ratio (V
Hysteresis
OVP Bias Current
/V
)
●
●
1.04
1.05
0.35
0.2
1.06
1
TRIP REF
V
µA
ns
OVP = 7.5V
OVP Propagation Delay
100
Gate Drivers (GTDR1 and GTDR2)
Max Output Voltage
Output High
Output Low (Device Unpowered)
Output Low (Device Active)
0mA Load, 18V < V
–200mA Load, 11.5V ≤ V ≤ 15V
●
●
●
12
– 3.0
CC
15
17.5
1.5
1.0
0.4
V
V
V
V
V
CC
V
CC
V
= 0V, 50mA Load (Sinking)
0.9
0.5
0.2
CC
200mA Load (Sinking)
10mA Load
●
●
Peak Output Current
Rise and Fall Time
Max Duty Cycle (PFC)
Max Duty Cycle (PWM) (Note 2)
10nF from GTDR to GND
1nF from GTDR to GND
2
25
96
A
ns
%
%
90
44
50
3
LT1509
ELECTRICAL CHARACTERISTICS
VCC = 18V, RSET = 15k to GND, CSET = 1nF to GND, IAC = 100µA, ISENSE = 0V, CAOUT = 3.5V, VAOUT = 5V, OVP = VREF. No load on any
outputs, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Soft Start Current
SS1 Current (PFC)
SS2 Current (PWM)
SS1 = 2.5V
SS2 = 1V
●
●
5
5
12
12
30
30
µA
µA
Comparators in PWM Section
RAMP Input Current
Current Limit Comparator (CL) Threshold
RAMP = 0V, V = 1.6V
●
●
●
●
●
●
–0.3
1.1
–2
1.2
µA
V
V
C
V > 2.6V
0.95
1
–20
0.57
2.6
C
GTDR2 Switching Off Threshold at V or at SS2
RAMP = 0V
C
V Input Current
V = 0V
C
–80
0.70
3.8
µA
C
PWMOK Comparator Low Threshold (in Terms of V
V Pin High Voltage (LT1509)
C
)
REF
0.63
3.2
1mA into V Pin
V
C
GTDR2 Turn-On Blanking Time
180
ns
The
●
denotes specifications which apply over the full operating
Note 2: GTDR2 (PWM) pulse is delayed by 53% duty cycle after GTDR1
(PFC) is set. See PFC/PWM Synchronization graph in the Typical
Performance Characteristics section.
temperature range.
Note 1: Multiplier Gain Constant: K =
I
M
I
(VA
– 2)2
AC
OUT
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
PFC Voltage Amplifier Open-Loop
Gain and Phase
PFC Current Amplifier Open-Loop
Gain and Phase
PFC/PWM Synchronization
100
80
60
40
20
0
0
100
80
60
40
20
0
0
–20
–40
–60
–80
–100
–120
–20
–40
–60
–80
–100
–120
GAIN
GAIN
PFC (GTDR1)
53%
PHASE
PHASE
PWM (GTDR2)
TIME
–20
–20
10
1k
10k 100k
1M
10M
10
1k
10k 100k
1M
10M
100
100
FREQUENCY (Hz)
FREQUENCY (Hz)
LT1509 TPC03
LT1509 • TPC01
LT1509 • TPC02
4
LT1509
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage vs
Temperature
Multiplier Current
300
7.536
7.524
7.512
7.500
7.488
7.476
7.464
7.452
7.440
7.428
VA
= 5.5V
OUT
VA
OUT
= 7V
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
VA
= 5V
OUT
OUT
150
= 4.5V
VA
VA
= 4V
OUT
= 3.5V
OUT
VA
VA
= 3V
= 2.5V
OUT
OUT
0
0
250
(µA)
500
125
150
–75 –50
0
25 50
100
75
–25
I
JUNCTION TEMPERATURE (°C)
AC
LT1509 • TPC05
LT1509 • TPC04
Start-Up Supply Current vs
Supply Voltage
Supply Current vs Supply Voltage
GTDR Rise and Fall Time
400
300
200
100
0
16
15
14
13
12
11
10
9
550
500
450
400
350
300
250
200
150
100
50
T = –55°C
J
T = 125°C
J
T = 25°C
J
FALL TIME
RISE TIME
–55°C
25°C
125°C
8
7
NOTE: GTDR SLEWS
BETWEEN 1V AND 16V
6
5
0
0
20
30
40
50
10
21
32
10
0
8
12 14 16 18 20
2
4
6
10
LOAD CAPACITANCE (nF)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LT1509 • TPC06
LT1509 • TPC07
LT1509 • TPC08
GTDR1 Maximum Duty Cycle vs
RSET and CSET
Frequency vs RSET and CSET
MOUT Pin Characteristics
500
450
400
350
300
250
200
150
100
50
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
0.92
0.91
0.90
1.5
1.0
T = 125°C
R
= 10k
= 15k
= 20k
= 30k
J
SET
T = 25°C
R
R
R
J
SET
SET
SET
0.5
T = –55°C
J
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
R
R
R
R
= 10k
= 15k
= 20k
= 30k
SET
SET
SET
SET
0
600
1000
1800
600
1000
1800
200
1400
2200
200
1400
2200
–1.2
M
1.2
0
VOLTAGE (V)
–2.4
2.4
C
CAPACITANCE (pF)
C
SET
CAPACITANCE (pF)
SET
OUT
LT1509 • TPC09
LT1509 • TPC10
LT1509 • TPC11
5
LT1509
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
RSET Voltage vs Current
PKLIM Pin Characteristics
120
100
80
–360
T = 125°C
T = 125°C
J
J
–300
–240
–180
–120
–60
0
T = 25°C
T = 25°C
J
J
T = –55°C
T = –55°C
J
J
60
40
20
0
–20
–40
–60
–80
–100
60
120
180
240
300
0
–0.4
–0.8
–0.4
PK
0.4
–0.2
–0.6
–1.0
–0.8
0
0.8
R
CURRENT (mA)
VOLTAGE (V)
LIM
SET
LT1509 • TPC12
LT1509 • TPC13
U
U
U
PIN FUNCTIONS
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
PFC SECTION
GTDR1 (Pin 1): The PFC MOSFET gate driver is a fast
totem pole output which is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5Ω will prevent the overshoot.
IAC (Pin 9): This is the AC line voltage sensing input to the
multiplier. It is a current input that is biased at 2V to
minimize the crossover dead zone caused by low line
voltage. At the pin, a 25k resistor is in series with the
currentinput, sothatalowpassRCcanbeusedtofilterout
the switching noise coming down from the line with a high
line impedance environment.
GND2 (Pin 2): Power Ground. High current spikes occur
in this line when either GTDR1 or GTDR2 switches low.
GND1 (Pin 3): Analog Ground.
VAOUT (Pin 10): This is the output of the voltage error
amplifier. The output is clamped at 13.5V. When the
output goes below 2.5V, the multiplier output current is
zero.
CSET (Pin 4): The capacitor from this pin to GND and RSET
determines oscillator frequency. The oscillator ramp is 5V
and the frequency = 1.5/(RSET CSET).
PKLIM (Pin 5): The threshold of the peak current limit
comparator is GND. To set current limit, a resistor divider
can be connected from VREF to current sense resistor.
OVP (Pin 11): This is the input to the overvoltage com-
parator. The threshold is 1.05 times the reference voltage.
Whenthecomparatortrips,themultiplier,whichisquickly
inhibited, blanks PFC switching to prevent further over-
shoot.ThispinisalsotheinputtothePWMOKcomparator
thatreleasesthePWMsoftstart(SS2)afterthePFCoutput
gets close to the final voltage and has a hysteresis of
approximately 150V for 382V PFC output.
CAOUT (Pin 6): This is the output of the current amplifier
that senses and forces the line current to follow the
reference signal that comes from the multiplier by com-
manding the pulse width modulator. When CAOUT is low,
the modulator has zero duty cycle.
VREF (Pin 12): This is the 7.5V reference. When VCC goes
low, VREF will stay at 0V. VREF biases most of the internal
circuitry and can source up to 5mA externally.
ISENSE (Pin 7): This is the inverting input of the current
amplifier. This pin is clamped at –0.6V by an ESD protec-
tion diode.
VSENSE (Pin 14): This is the inverting input to the voltage
amplifier.
MOUT (Pin 8): This is the multiplier high impedance
current output and the noninverting input of the current
amplifier. This pin is clamped at –0.6V and 3V.
6
LT1509
U
U
U
(For application help with the PFC portion of this chip, see the LT1248 data sheet)
PIN FUNCTIONS
RSET (Pin 15): A resistor from RSET to GND sets the
oscillator charging current and the maximum multiplier
output current which is used to limit the maximum line
current.
PWM SECTION
SS2 (Pin 13): PWM Soft Start. The comparator PWMOK
monitors the OVP pin and releases the SS2 after the PFC
output gets close to the final voltage.
IM(MAX) = 3.75V/RSET
VC (Pin 18): PWM currentmode control voltage. Normally
connects to the optocoupler amplifier output. A pull-up
current of 50µA flows out of the pin.
SS1 (Pin 16): Soft Start. SS1 is reset to zero for low VCC.
When VCC rises above lockout threshold, SS1 is released
torampupataratesetbytheinternal12µAcurrentsource
and an external capacitor. During this ramp up, PFC
reference voltage is equal to SS1 voltage. After SS1 rises
past 7.5V, reference voltage remains at 7.5V.
RAMP (Pin 19): PWM current mode current sense input
with current limit set to 1V.
GTDR2 (Pin 20): The PWM MOSFET gate driver is a 1.5A
fast totem pole output. It is clamped at 15V. Capacitive
loads like the MOSFET gates may cause overshoot. A gate
series resistor of at least 5Ω will prevent the overshoot.
VCC (Pin 17): This is the supply for the chip. The LT1509
has two fast gate drivers required to fast charge high
power MOSFET gate capacitances. Good supply bypass-
ing is required consisting of a 0.1µF ceramic capacitor in
parallel with a low ESR electrolytic capacitor (56µF or
higher) in close proximity to IC GND.
U
W U U
APPLICATIONS INFORMATION
C2
0.047µF
Voltage Error Amplifier (PFC Section)
Thevoltageerror amplifierhas a100dBDCgain and3MHz
unity-gain frequency. The output is internally clamped at
13.3V with VCC = 18V. Maximum error amp output voltage
decreases to VCC – 1.5V for VCC less than 12V. The
noninverting input is tied to the 7.5VREF through a diode
and can be pulled down with the SS1 pin. Referring to
Figure 1, VOUT = VREF [(R1 + R2)/R2]. With R1 = 1M and
R2=20k, VOUT =382V. R1throughR4, C1andC2formthe
compensation for the voltage loop. Gain of the voltage
error amp with the values shown is given by:
C1
R4
REGULATOR OUTPUT
0.47µF
330k
V
= 382V
OUT
R3
20k
V
SENSE
R1
1M
–
+
VA
OUT
ERROR AMP
V
= 7.5V
REF
LT1509
OVP
R2
20k
–
+
OVERVOLTAGE
COMPARATOR
1.05V
REF
f
LT1509 • F01
1 + j
VA
V
OUT
OUT
1
= –
Figure 1
f
(j)(f)(6.6) 1 + j
)
)
11
With VIN = 120VAC, PIN = 150W, RS = 0.15Ω, RREF = 4k,
RIAC = 1M, VOUT = 382V and COUT = 470µF, VOUT/VAOUT
=
The small-signal gain for the remaining portion of the
voltage loop for frequencies below the current loop band-
width is (see Figure 2):
85/(j)(f). At very low frequencies, the loop has a –40dB/
decadeslope.Additionalzero-polecompensationisadded
at1Hzand11Hz.Theresultingloopgainandphasemargin
is shown in Figure 3. The unity-gain bandwidth is low
compared to 120Hz, which results in low distortion and a
high power factor.
V
V
(R )(P )
OUT
IN
REF IN
=
R (R + 25k)
VA
(5π)(j)(f)(C )(V
)
S
IAC
OUT
OUT OUT
7
LT1509
U
W U U
APPLICATIONS INFORMATION
V
D1
V
OUT
IN
L
Toavoidsubharmonicoscillations,theamplifieddownslope
of the inductor current must be less than the slope of the
oscillator ramp.
+
C
OUT
R
S
V
IN
470µF
I
IN
0.15Ω
–
C4
300pF
R
R5
4k
REF
4k
V
(V )(L)(f
)
SW
CA(OUT)
OSC
≤
V
(V )(R )
RS
OUT
S
C3
0.001µF
R6
20k
(5V)(500µH)(100k)
(382V)(0.15Ω)
=
= 4.4
V
IN
M
I
SENSE
CA
OUT
OUT
–
+
R
IAC
1M
If the current amplifier gain at 100kHz is less than 4.4,
there will be no subharmonic oscillation. The open-loop
gain of the current loop is given by:
CA
I
M
LT1509
I
AC
1509 • F02
V
(V )(R )
OUT S
RS
CA(OUT)
Figure 2
=
V
=
(j)(2πf)(L)(V
)
OSC
80
60
40
20
0
60
45
30
15
0
(382V)(0.15Ω)
3648
=
(j)(2πf)(500µH)(5V) (j)(f)
The current error amp, with R5 = 4k, R6 = 20k, C3 =
0.001µF and C4 = 300pF, provides zero pole compensa-
tion resulting in 16kHz loop crossover frequency. The
current amp gain at 100kHz is 1.7. The resulting current
loop gain and phase margin is shown in Figure 4.
–20
–40
–15
80
60
45
30
15
0
–30
1k
0.1
1
10
100
60
FREQUENCY (Hz)
LT1509 • F03
40
Figure 3
20
Current Amplifier (PFC Section)
0
The current amplifier has a 110dB DC gain, 3MHz unity-
gain frequency and a 2V/µs slew rate. It is internally
clamped at 8.5V. Note that in the current averaging opera-
tion, high gain at twice the line frequency is necessary to
minimizelinecurrentdistortion. BecauseCAOUT mayneed
to swing 5V over one line cycle at high line condition,
20mV AC will be needed at the inputs of the current
amplifier for a gain of 260 at 120Hz. Especially at light load
when the current loop reference signal is small, lower gain
will distort the reference signal and line current. But, if
signal gain at switching frequency is too high, the system
behaves more like a current mode system and can cause
subharmonic oscillation.
–20
–15
–40
–30
100
1k
10k
100k
1M
FREQUENCY (Hz)
LT1509 • F04
Figure 4
Multiplier
The multiplier has high noise immunity and superior
linearity over its full operating range. The current gain is
IM = (IACIEA2)/(200µA2) with IEA = (VAOUT – 2V)/ 25k. The
error amplifier output voltage required at the input to the
multiplier is:
8
LT1509
U
W U U
APPLICATIONS INFORMATION
The multiplier output acts as the command signal to the
currentlooperroramplifier.Duringsteady-stateoperation
the voltage across RREF = (IM)(RREF) = (IIN)(RS). Based on
this the value for RS is determined by:
(P )(R )(25)(R + 25k)
IN
S
IAC
VA
= 2 +
OUT
2
(V )(R
)
IN
REF
See Figure 2 for RREF
.
VAOUT is squared in the multiplier, resulting in excellent
performance over a wide range of output power and input
voltage without the addition of feedforward line frequency
ripple. Care must be taken to avoid feeding switching
frequency noise into the multiplier from the IAC pin. An
internal 25k is provided in series with the low impedance
multiplier input so that only a capacitor from the IAC pin to
GND1 is required to filter noise. The maximum multiplier
output current, which ultimately limits the input line cur-
rent, is set by a resistor from the RSET pin to GND1
according to the formula: IM(MAX) = 3.75V/RSET. Figure 5
shows IM versus IAC for various values of VAOUT. Note that
Figure 5 data was taken with RSET = 15k.
(I
)(R )(V )(eff)
REF IN
M(MAX)
R ≤
S
P
√2
OUT
with RSET = 15k, IM(MAX) = 3.75/15k = 250µA. For a 300W
converterwithanefficiency(eff)of0.8atlowline(90VRMS
and RREF set to 4k, RS should be less than:
)
(250µA)(4k)(90VAC)(0.8)
= 0.169Ω
300W√2
A 0.15Ω resistor will yield a maximum peak input current
of (IM(MAX))(RREF/RS) = (250µA)(4k)/0.15Ω = 6.67A. For
a 100kHz switching frequency with RSET = 15k, CSET = 1.5/
(100kHz)(15k) = 1nF. For added protection the LT1509
provides a second independent current limit comparator.
Whentheinputvoltagetothecomparator(PKLIM pin)dips
below 0V, GTDR1 pin quickly goes low turning off the PFC
power switch. A resistor divider from VREF to RS (Figure 6)
senses the voltage across the line current sense resistor
(RS) and limits the peak input line current to [(7.5V/R1) +
50µA] (R2/RS). The 50µA represents the PKLIM input
current which flows out of the PKLIM pin. With R1 = 10k
and R2 = 1.8k, IIN = 9.6A peak above the 6.67A peak
average plus the input inductor peak ripple current.
300
VA
= 5.5V
VA
OUT
= 7V
OUT
VA
OUT
= 6.5V
VA
OUT
= 6V
VA
VA
= 5V
OUT
OUT
150
= 4.5V
VA
VA
= 4V
OUT
= 3.5V
OUT
VA
VA
500
= 3V
= 2.5V
OUT
OUT
0
0
250
(µA)
I
AC
Always use RSET to set the primary line current limit. The
PKLIM comparator is only for secondary protection. When
the line current reaches the primary limit, VOUT can no
longer be supported with the given input current and
beginstofall. Systemstabilityismaintainedbythecurrent
loopwhichiscontrolledbythecurrentamplifier. Whenthe
LT1509 • F05
Figure 5. Multiplier Current IM vs IAC and VAOUT
Oscillator Frequency and Maximum
Line Current Setting
R2
R1
The oscillator frequency is set by RSET and CSET. RSET is
the resistor from the RSET pin to GND1 and CSET is the
capacitor from the CSET pin to GND1. RSET should be
determined first. The oscillator frequency, which is equal
to the switching frequency for both the PFC and PWM
section, is determined by:
1.8k
10k
7.5V
LT1509
V
REF
+
I
PKLIM
R
0.15
S
–
+
PK
LIM
Ω
C1
1nF
–
I
LINE
C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2µs
LT1509 • F06
1.5
f
=
OSC
(R )(C
)
Figure 6
SET SET
9
LT1509
U
W U U
APPLICATIONS INFORMATION
0.047µF
line current reaches the secondary limit, the comparator
takes over control and hysteresis may occur causing
audible noise.
0.47µF
330k
V
OUT
R1
Overvoltage Protection (PFC Section)
1M
V
–
+
SENSE
R4
VA
OUT
Because of the slow loop response necessary for power
factor correction, output overshoot can occur following a
suddenloadreductionorremoval.Toprotectdownstream
components, the LT1509 provides an overvoltage com-
parator which senses the output voltage and quickly
reduces the line current demand. Referring back to Figure
1, VOUT is 382V and during normal operation, since no
current flows in R3, 7.5V appears at both the VSENSE and
OVP pins. When VOUT overshoots its preset value, the
overcurrent from R1 will flow through R2 as well as R3.
The voltage amplifier feedback will keep VSENSE at 7.5V.
Therefore, the equivalent AC resistance seen by the OVP
pin is R2 in parallel with R3 or 10k. With these values and
the overvoltage comparator trip level internally set at
1.05VREF, the comparator trips when VOUT overshoots
10%. Overvoltage trip level is given by:
1.05M
R2
20k
ERROR
AMP
LT1509
OVP
–
+
R5
20k
OVERVOLTAGE
COMPARATOR
1.05V
REF
1509 • F07
V
= 382V
OUT
OVERVOLTAGE = 420V
Figure 7
this condition, the amplifier M1 (see Block Diagram)
becomes active. When VAOUT reduces to 2.2V, M1 sup-
plies up to 7µA of current to the resistor at the ISENSE pin
in order to cancel a negative VOS and keep VOUT error to
within 2V.
R2 + R3
(%)V
= 5%
OUT
(
)
R3
Undervoltage Lockouts and Soft Start
For additional protection, the OVP pin can be connected
to VOUT through an independent resistor divider (see
Figure 7). This ensures overvoltage protection during
safety agency abnormal testing conditions, such as
opening R1 or shorting R2.
The LT1509 turns on when VCC reaches 16V and remains
onuntilVCC fallsbelow10V,whereuponthechipentersthe
lockout state. In the lockout state, the oscillator is off and
the VREF and gate driver pins remain low. A capacitor from
SS1 to GND1 determines the ramp-up time of the PFC
section. SS1 is released from a zero when VCC rises above
the lockout threshold. Once released, an internal 14µA
current source ramps the voltage error amplifier’s refer-
ence voltage to 7.5V. SS1 voltage then continues beyond
7.5V. A second capacitor from SS2 to GND1 determines
the start-up time from the PWM section. A PWMOK
comparator (see Block Diagram) holds SS2 low until the
OVP pin reaches 7V. This corresponds to the PFC output
voltage reaching approximately 93% of its preset voltage.
SS2 is diode coupled to the PMW comparator which is
connected to the VC pin by a second diode. Holding SS2
low at any time will disable PWM output. Once released,
the 14µA current source ramps the PWM comparator
The output of the multiplier looks like a high impedance
current source. In the current loop, offset line current is
determined by multiplier offset current and input offset
voltage of the current error amplifier. A –4mV current
amplifier VOS translates to 27mA line current and 6.7W
input power for 250VAC line if a 0.15Ω sense resistor is
used. Under a no-load condition or when the load power
is less than the offset output power, the offset line current
could slowly charge the output to an overvoltage level.
This is because the best the overvoltage comparator can
do is to reduce the multiplier output current to zero.
Unfortunately, thisdoesnotguaranteezerooutputcurrent
if the current amplifier has offset. To regulate VOUT under
10
LT1509
U
W U U
APPLICATIONS INFORMATION
Output Capacitor (PFC Section)
input up to VC and then the SS2 voltage continues beyond
VC. The PWMOK comparator contains hysteresis and will
pull SS2 low disabling the PWM section if the PFC output
voltage falls below approximately 62% of its preset value
(240V with nominal 382V output).
GTDR2 (PWM) pulse is synchronized to GTDR1 (PFC) pulse
with53%dutycycledelaytoreduceRMSripplecurrentinthe
output capacitor. See PFC/PWM Synchronization graph in
the Typical Performance Characteristics section.
The peak-to-peak 120Hz PFC output ripple is determined by:
Start Up and Supply Voltage
V
= 2I
(Z)
The LT1509 draws only 250µA before the chip starts at
16V on VCC. To trickle start, a 91k resistor from the power
line to VCC supplies trickle current, and C4 holds VCC up
while switching starts (see Figure 8); then the auxiliary
winding takes over and supplies the operating current.
NotethatD3andthelargervaluesofC3areonlynecessary
for systems that have sudden large load variations down
to minimum load and/or very light load conditions. Under
these conditions the loop may exhibit a start/restart mode
because switching remains off long enough for C4 to
discharge below 10V. Large values for C3 will hold VCC up
until switching resumes. For less severe load variations D3
is replaced with a short and C3 is omitted. The turns ratio
between the primary winding determines VCC
according to :
P-P
LOAD(DC)
where ILOAD(DC) is the DC load current of the PWM stage
and Z is the capacitor impedance at 120Hz.
For 470µF, impedance is 2.8Ω at 120Hz. At 335W load,
LOAD(DC) = 335V/382V = 0.88A, VP-P = (2)(0.88)(2.8Ω) =
I
5V. If less ripple is desired higher capacitance should be
used. The selection of the output capacitor is based on
voltage ripple, hold-up time and ripple current. Assuming
the DC converter (PWM section) is designed to operate
with 240V to 382VIN , the minimum hold-up time is a
function of the energy storage capacity of the capacitor:
(0.5)C
P
OUT
2
2
t
=
(382V – 0.5V ) – 240V
P–P
HOLD
OUT
with COUT = 470µF, VP-P = 11.5V, and POUT = 335W,
tHOLD = 60ms which is 3.6 line cycles at 60Hz. The ripple
current can be divided into two major components. The
first is the 120Hz component which is related to the DC
load current as follows:
V
N
N
OUT
– 2V
P
S
=
V
CC
for 382V VOUT and 18V VCC, Np/Ns ≈ 19.
LINE
MAIN INDUCTOR
I
≈ I
√2
LOAD(DC)
120HZ
N
N
P
S
R1
91k
1W
Thesecondcomponentismadeupofswitchingfrequency
components due to the PFC stage charging the capacitor
and the PWM stage discharging the capacitor. For a 300W
output PFC forward converter running from an input
voltageof100VRMS,thetotalhighfrequencyripplecurrent
D1
D3
V
CC
+
+
C1
2µF
+
+
C3
390µF
C4
D2
100µF
C2
was measured to be 1.79ARMS
.
2µF
For the United Chemicon KMH 450V capacitor series,
ripple current at 100kHz is specified 1.43 times higher
than the 120Hz limit.
LT1509 • F08
Figure 8
11
LT1509
U
W U U
APPLICATIONS INFORMATION
In our example, LO = 2000 hours assuming ∆TK = 5°C at
rated 1.72A. ∆TO can then be calculated from:
The total equivalent 120Hz ripple in the output capacitor
can be calculated by:
2
2
I
1.4A
1.72A
RMS
2
∆T = ∆T
= 5°C
= 3.3°C
O
K
I
(
)
(
)
HF
2
1.72A
I
=
I
+
RMS
120HZ
(
)
1.43
Assuming the operating ambient temperature is 60°C, the
IHF = 100kHz Ripple Current.
approximate lifetime is:
For ILOAD(DC) = 0.88A, 1120Hz = 0.62A and the equivalent
120Hz ripple current is:
(105°C + 5°C) – (60 + 3.3°C)
10
L = (2000)(2)
2
= 50,870 Hours
1.79
1.43
2
I
=
0.62 +
= 1.4A
RMS
RMS
(
)
Forlongerlifeacapacitorwithahigherripplecurrentrating
or parallel capacitors should be used.
Table 1 lists the ripple current components from lab
measurements for various output powers and line volt-
ages. The 120Hz ripple current rating at 105°C ambient is
1.72A for the 470µF KMH 35mm × 50mm capacitor. The
expected life of the output capacitor may be calculated
from thermal stress analysis:
PWM Comparators
TheLT1509includestwocomparatorsinthePWMsection
which implement peak current mode control. The primary
current sense voltage is fed into the RAMP pin. The VC or
Control Voltage pin sets the primary peak current level. An
additional current limit comparator turns GTDR2 off in the
event the RAMP pin voltage exceeds 1V. Referring to the
Block Diagram, there is a 1.2V offset between the RAMP
and VC pin. This feature simplifies the connection to an
optocoupler because the VC pin no longer has to be pulled
allthewaytogroundtoinhibitswitching.On-chipblanking
avoids reset due to leading edge noise.
(105°C + ∆T ) – (T + ∆T )
K
10
A
O
L = (L )2
O
where
L = Expected life time
LO = Hours of load life at rated ripple current and rated
ambient temperature
Typical Application
∆TK = Capacitor internal temperature rise at rated
condition. ∆TK = (I2R)/(KA), where I is the rated cur-
rent, R is capacitor ESR and KA is a volume constant.
Figure 9 shows a 24VDC, 300W power factor corrected,
universal input supply. The 2-transistor forward converter
offers many benefits including low peak currents,
nondissipative snubber, 500VDC switches and automatic
core reset guaranteed by the LT1509’s 50% maximum
duty cycle.
TA = Operating ambient temperature
∆TO = Capacitor internal temperature rise at operating
condition
Table 1. PFC Capacitor RMS Ripple Current
100W
200W
300W
V
I
I
I
I
I
I
HF
INRMS
120HZ
HF
120HZ
HF
120HZ
100
0.2
0.2
0.2
0.6
0.5
0.41
1.18
0.97
0.87
0.62
1.79
1.45
1.26
120
230
0.41
0.41
0.62
0.62
0.53
12
LT1509
U
W U U
APPLICATIONS INFORMATION
13
LT1509
U
W U U
APPLICATIONS INFORMATION
An LT1431 reference/amplifier coupled to a low cost
optoisolator closes the loop from secondary side to pri-
mary side. Unity loop frequency is a conservative 3kHz.
Figure 10 shows the output voltage’s response with a 2A
to almost 10A current step. Output voltage is maintained
to within 0.5V during the load step. Efficiency versus
power and line voltage is shown in Figure 11. The PFC
preregulator alone has efficiency numbers between 90%
and 97% over line and load.
voltage, and changes as necessary, in order to maintain
constant bank voltage. The forward converter sees a
voltage input of 382VDC unless the line voltage drops out,
in which case the 470µF main capacitor discharges to
240VDCbeforethePWMstageisshutdown. Comparedto
a typical off-line converter, the effective input voltage
range of the forward converter is much smaller, simplify-
ing the design. Additionally, the higher bus voltage pro-
vides greater hold-up times for given capacitor size.
A 3-turn secondary added to the 70-turn primary of T1
bootstraps VCC to about 15V supplying the chip’s 13mA
requirement as well as about 39mA to cover the gate
current of the three FETs and high side transformer. A
0.15Ω sense resistor is used to sense input current and
servo to the command created by the outer voltage and
multiplier. Thus the input current follows the input line
Because the high side transformer effectively delays the
turn-on reverse recovery spike past the end of the built-in
blanking time, an external blanking transistor is needed.
Controlling the output current during an output short
circuit depends on the duty cycle reducing to a small
fraction of steady state. An additional transistor disables
blanking during turn-on and output short circuit.
5A/DIV
0.5V/DIV
Figure 10
90
85
80
75
70
200W/300W
100W
30W
180
90
250
132
V
RMS
LT1509 • F11
Figure 11
14
LT1509
U
PACKAGE DESCRIPTION Dimension in inches (millimeters) unless otherwise noted.
N Package
20-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
1.040*
(26.416)
MAX
20
19
18
17
16
15
14
13
12
11
10
0.255 ± 0.015*
(6.477 ± 0.381)
3
4
5
6
7
8
9
1
2
0.300 – 0.325
0.045 – 0.065
0.130 ± 0.005
(7.620 – 8.255)
(1.143 – 1.651)
(3.302 ± 0.127)
0.015
(0.381)
MIN
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.025
0.325
0.005
(0.127)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
–0.015
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
+0.635
8.255
(
)
–0.381
N20 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
SW Package
20-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.496 – 0.512*
(12.598 – 13.005)
19 18
16 14 13 12 11
20
17
15
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
2
3
5
7
8
9
10
1
4
6
0.291 – 0.299**
(7.391 – 7.595)
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
0.010 – 0.029
(0.254 – 0.737)
× 45°
0° – 8° TYP
0.050
(1.270)
TYP
0.004 – 0.012
0.009 – 0.013
(0.102 – 0.305)
NOTE 1
(0.229 – 0.330)
0.014 – 0.019
0.016 – 0.050
(0.406 – 1.270)
SOL20 0695
(0.356 – 0.482)
TYP
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1509
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1084
LT1105
LT1241-5
LT1247
LT1248
LT1249
LT1508
5A Low Dropout Linear Regulator
Good for Post Regulation of Switching Power Supplies
Solution for Universal Off-Line Inputs with Output to 100W
Operates at Oscillator Frequencies up to 500kHz
Operates at Oscillator Frequencies up to 1MHz
Provides All Features in 16-Lead Package
Simplified PFC Design
Simplified Off-Line Controller
High Frequency Current Mode PWM Controller
High Frequency Current Mode PWM Controller
Full-Feature Average Current Mode Power Factor Controller
Minimal Parts Count Power Factor Controller
Power Factor and PWM Controller
Voltage Mode PWM
LT/GP 1295 10K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 1995
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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