LT1576IS8-5#PBF [Linear]
LT1576 - 1.5A, 200kHz Step-Down Switching Regulator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C;型号: | LT1576IS8-5#PBF |
厂家: | Linear |
描述: | LT1576 - 1.5A, 200kHz Step-Down Switching Regulator; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C 稳压器 开关 |
文件: | 总28页 (文件大小:293K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1576/LT1576-5
1.5A, 200kHz Step-Down
Switching Regulator
U
FEATURES
DESCRIPTIO
TheLT®1576isa200kHzmonolithicbuckmodeswitching
regulator. A 1.5A switch is included on the die along with
allthenecessaryoscillator, controlandlogiccircuitry. The
topology is current mode for fast transient response and
goodloopstability.TheLT1576isamodifiedversionofthe
industry standard LT1376 optimized for noise sensitive
applications.
■
Constant 200kHz Switching Frequency
■
1.21V Reference Voltage
■
Fixed 5V Output Option
Easily Synchronizable
Uses All Surface Mount Components
Inductor Size Reduced to 15µH
■
■
■
■
■
■
■
■
Saturating Switch Design: 0.2Ω
Effective Supply Current: 1.16mA
Shutdown Current: 20µA
Cycle-by-Cycle Current Limiting
Fused Lead SO-8 Package
In addition, the reference voltage has been lowered to
allow the device to produce output voltages down to 1.2V.
Quiescent current has been reduced by a factor of two.
Switchonresistancehasbeenreducedby30%.Switchtran-
sition times have been slowed to reduce EMI generation.
The oscillator frequency has been reduced to 200kHz to
maintain high efficiency over a wide output current range.
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APPLICATIO S
■
Portable Computers
The pinout has been changed to improve PC layout by
allowing the high current high frequency switching cir-
cuitrytobeeasilyisolatedfromlowcurrentnoisesensitive
control circuitry. The new SO-8 package includes a fused
ground lead which significantly reduces the thermal resis-
tance of the device to extend the ambient operating tem-
perature range. There is an optional function of shutdown
orsynchronization.Standardsurfacemountexternalparts
can be used including the inductor and capacitors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Battery-Powered Systems
■
Battery Charger
Distributed Power
■
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TYPICAL APPLICATION
Efficiency vs Load Current
100
5V Buck Converter
V
V
= 5V
OUT
IN
INPUT
= 10V
95
90
85
80
75
70
6V TO 25V
C2
+
C3*
L = 33µH
D2
0.33µF
10µF TO
50µF
1N914
L1**
15µH
V
BOOST
IN
OUTPUT**
5V, 1.25A
V
SW
LT1576 BIAS
SHDN
GND
FB
OPEN = ON
V
C
R1
15.8k
D1
1N5818
C1
* RIPPLE CURRENT RATING ≥ I /2
OUT
+
R2
4.99k
C
C
100µF, 10V
SOLID
** INCREASE L1 TO 30µH FOR LOAD
CURRENTS ABOVE 0.6A AND TO
60µH ABOVE 1A
100pF
TANTALUM
SEE APPLICATIONS INFORMATION
0
0.50 0.75 1.00
LOAD CURRENT (A)
1.25 1.50
0.25
1576 TA01
1576 TA02
1
LT1576/LT1576-5
W W U W
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ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
ORDER PART NUMBER
Input Voltage .......................................................... 25V
BOOST Pin Above Input Voltage ............................. 10V
SHDN Pin Voltage..................................................... 7V
BIAS Pin Voltage ...................................................... 7V
FB Pin Voltage (Adjustable Part)............................ 3.5V
FB Pin Current (Adjustable Part)............................ 1mA
SYNC Pin Voltage ..................................................... 7V
Operating Junction Temperature Range
LT1576C............................................... 0°C to 125° C
LT1576I ........................................... –40°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
LT1576CS8
LT1576CS8-SYNC
TOP VIEW
LT1576IS8
SHDN OR
1
2
3
4
8
7
6
5
V
SW
LT1576IS8-SYNC
LT1576CS8-5
SYNC*
FB OR SENSE*
V
IN
V
C
BOOST
GND
LT1576CS8-5 SYNC
LT1576IS8-5
LT1576IS8-5 SYNC
BIAS
S8 PACKAGE
8-LEAD PLASTIC SO
θJA = 80°C/ W WITH FUSED GROUND PIN
CONNECTED TO GROUND PLANE OR
LARGE LANDS
S8 PART MARKING
1576
1576SN 5765SN
1576I 1576I5
576ISN 76I5SN
15765
*Default is the adjustable output voltage device with FB pin and shutdown
function. Option -5 replaces FB with SENSE pin for fixed 5V output
applications. -SYNC replaces SHDN with SYNC pin for applications
requiring synchronization. Consult factory for Military grade parts.
The ● denotes specifications which apply over the full operating temperature
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are TA, TJ = 25°C, VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER
CONDITIONS
All Conditions
All Conditions
MIN
TYP
MAX
UNITS
Feedback Voltage
1.195 1.21
1.18
1.225
1.24
V
V
●
●
Sense Voltage (Fixed 5V)
4.94
4.90
5.0
5.06
5.10
V
V
SENSE Pin Resistance
13
18.5
0.01
0.5
26
0.03
2
kΩ
%/V
µA
Reference Voltage Line Regulation
Feedback Input Bias Current
Error Amplifier Voltage Gain
Error Amplifier Transconductance
5V ≤ V ≤ 25V
IN
●
●
(Notes 2, 8)
200
400
∆I (V ) = ±10µA (Note 8)
800
400
1050
1300
1700
µMho
µMho
C
V Pin to Switch Current Transconductance
1.5
110
130
0.8
2.1
2
A/V
µA
µA
V
C
Error Amplifier Source Current
Error Amplifier Sink Current
V
V
= 1.1V
= 1.4V
●
●
40
50
190
200
FB
FB
V Pin Switching Threshold
C
Duty Cycle = 0
V Pin High Clamp
C
V
Switch Current Limit
V Open, V = 1.1V, DC ≤ 50%
C
●
1.5
3.50
A
FB
Slope Compensation (Note 9)
Switch On Resistance (Note 7)
DC = 80%
0.3
0.2
A
I
= 1.5A
0.35
0.45
Ω
Ω
SW
●
●
Maximum Switch Duty Cycle
V
FB
= 1.1V
90
86
94
94
%
%
2
LT1576/LT1576-5
The ● denotes specifications which apply over the full operating temperature
ELECTRICAL CHARACTERISTICS
range, otherwise specifications are TA, TJ = 25°C, VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER
CONDITIONS
V Set to Give 50% Duty Cycle
MIN
TYP
8
MAX
UNITS
Minimum Switch Duty Cycle (Note 10)
Switch Frequency
%
180
160
200
220
240
kHz
kHz
C
●
●
●
●
●
Switch Frequency Line Regulation
Frequency Shifting Threshold on FB Pin
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4)
Boost Current (Note 5)
5V ≤ V ≤ 25V
0
0.15
1.0
5.5
3.0
%/V
V
IN
∆f = 10kHz
0.4
0.74
5.0
2.3
V
I
≤ 1.5A
V
SW
I
I
= 0.5A
= 1.5A
●
●
9
27
18
50
mA
mA
SW
SW
V
Supply Current (Note 6)
V
V
V
= 5V
= 5V
●
●
0.55
1.6
20
0.8
2.2
mA
mA
IN
BIAS
BIAS
SHDN
BIAS Supply Current (Note 6)
Shutdown Supply Current
= 0V, V ≤ 25V, V = 0V, V Open
50
75
µA
µA
IN
SW
C
●
●
Lockout Threshold
V Open
C
2.34
2.42
2.50
V
Shutdown Thresholds
V Open Device Shutting Down
Device Starting Up
●
●
0.13
0.25
0.37
0.45
0.60
0.7
V
V
C
Synchronization Threshold
Synchronizing Range
1.5
2.2
V
kHz
kΩ
250
400
SYNC Pin Input Resistance
40
Note 1: Absolute Maximum Ratings are those values beyond which the life
Note 7: Switch on resistance is calculated by dividing V to V voltage
IN SW
by the forced current (1.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
of a device may be impaired.
Note 2: Gain is measured with a V swing equal to 200mV above the
C
switching threshold level to 200mV below the upper clamp level.
Note 8: Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance,
refer to the SENSE pin on the fixed voltage parts. Divide values shown by
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
the ratio V /1.21.
OUT
Note 9: Slope compensation is the current subtracted from the switch
current limit at 80% duty cycle. See Maximum Output Load Current in the
Applications Information section for further details.
Note 10: Minimum on-time is 400ns typical. For a 200kHz operating
frequency this means the minimum duty cycle is 8%. In frequency
foldback mode, the effective duty cycle will be less than 8%.
Note 5: Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 6: V supply current is the current drawn when the BIAS pin is held
IN
at 5V and switching is disabled. Total input referred supply current is
calculated by summing input supply current (I ) with a fraction of BIAS
SI
supply current (I
)
SB
I
= I + (I )(V
/V )(1.15)
BIAS IN
TOT
SI
SB
with V = 15V, V
= 5V, I = 0.55mA, I = 1.6mA and I
= 1.16mA.
IN
BIAS
SI
SB
TOT
If the BIAS pin is unavailable or open circuit, the sum of V and BIAS
IN
supply currents will be drawn by the V pin.
IN
3
LT1576/LT1576-5
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TYPICAL PERFORMANCE CHARACTERISTICS
Switch Drop
Switch Peak Current Limit
Feedback Pin Voltage
0.5
0.4
0.3
0.2
0.1
0
1.23
1.22
1.21
1.20
1.19
2.5
2.0
1.5
1.0
0.5
0
TYPICAL
125°C
25°C
MINIMUM
–20°C
0
20
40
60
80
100
0
0.50 0.75 1.00
1.25 1.50
0.25
–25
0
25
50
75
125
–50
100
SWITCH CURRENT (A)
DUTY CYCLE (%)
JUNCTION TEMPERATURE (°C)
1576 G02
1576 G01
1576 G03
Shutdown Pin Bias Current
Shutdown Pin Bias Current
Shutdown Thresholds
4
3
2
1
0
180
160
140
120
100
80
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
AT 2.44V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
START-UP
SHUTDOWN
60
CURRENT REQUIRED TO FORCE
40
SHUTDOWN (FLOWS OUT OF PIN).
AFTER SHUTDOWN, CURRENT
DROPS TO A FEW µA
20
0
–25
0
25
50
75
125
–25
0
25
50
75
125
–25
0
25
50
75
125
–50
100
–50
100
–50
100
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
1576 G04
1576 G05
1576 G06
Shutdown Supply Current
Standby Thresholds
Error Amplifier Transconductance
2000
1500
1000
500
200
150
100
50
25
20
15
10
5
2.46
2.45
2.44
2.43
2.42
2.41
2.40
V
= 0V
SHDN
PHASE
GAIN
ON
V
C
STANDBY
C
OUT
2.4pF
R
OUT
570k
V
1 × 10–3
(
)
FB
0
ERROR AMPLIFIER EQUIVALENT CIRCUIT
= 50Ω
0
R
LOAD
–500
0
–50
0
5
10
15
20
25
10
100
1k
10k
100k
1M
50
100 125
–50 –25
0
25
75
INPUT VOLTAGE (V)
FREQUENCY (Hz)
JUNCTION TEMPERATURE (°C)
1576 G09
1576 G08
1576 G07
4
LT1576/LT1576-5
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TYPICAL PERFORMANCE CHARACTERISTICS
Shutdown Supply Current
Error Amplifier Transconductance
Frequency Foldback
100
75
50
25
0
1600
1400
1200
1000
800
600
400
200
0
250
200
150
100
50
SWITCHING FREQUENCY
V
IN
= 25V
V
IN
= 10V
FEEDBACK PIN CURRENT
0
0.2
0.3
0
0.4
–25
0
25
50
75
100
125
0.1
–50
0
0.5
1.0
FEEDBACK VOLTAGE (V)
1.5
2.0
SHUTDOWN VOLTAGE (V)
JUNCTION TEMPERATURE (°C)
1576 G10
1576 G11
1576 G12
Minimum Input Voltage
at VOUT = 5V
Maximum Load Current
at VOUT = 10V
Switching Frequency
1.50
1.25
1.00
0.75
0.50
0.25
0
7
6
5
240
220
200
180
160
V
= 5V
OUT
V
OUT
= 10V
L = 60µH
L = 30µH
MINIMUM
STARTING VOLTAGE
L = 15µH
MINIMUM
RUNNING VOLTAGE
–25
0
25
50
75
125
0
5
10
15
20
25
–50
100
1
10
100
1000
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
JUNCTION TEMPERATURE (°C)
1576 G13
1576 G15
1576 G14
Maximum Load Current
at VOUT = 5V
Maximum Load Current
at VOUT = 3.3V
Inductor Core Loss
1.50
1.25
1.00
0.75
0.50
0.25
0
1.50
1.25
1.00
0.75
0.50
0.25
0
1.0
0.1
20
12
8
V
= 5V, V = 10V, I
= 1A
OUT
IN
OUT
L = 60µH
L = 60µH
L = 30µH
L = 15µH
L = 30µH
L = 15µH
4
2
1.2
0.8
TYPE 52
POWDERED IRON
Kool Mµ®
0.4
PERMALLOY
µ = 125
0.2
0.01
0.001
CORE LOSS IS
INDEPENDENT OF LOAD
CURRENT UNTIL LOAD CURRENT FALLS
LOW ENOUGH FOR CIRCUIT TO GO INTO
DISCONTINUOUS MODE
0.12
0.08
0.04
0.02
V
OUT
= 5V
5
V
OUT
= 3.3V
5
0
10
15
20
25
0
10
15
20
25
0
5
10
15
20
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INDUCTANCE (µH)
1576 G16
1576 G17
1576 G18
Kool Mµ is a registered trademark of Magnetics, Inc.
5
LT1576/LT1576-5
TYPICAL PERFORMANCE CHARACTERISTICS
U W
BOOST Pin Current
VC Pin Shutdown Threshold
30
25
20
15
10
5
1.0
0.8
0.6
0.4
0.2
0
0
–25
0
25
50
75
125
–50
100
0
0.50 0.75 1.00
1.25 1.50
0.25
SWITCH CURRENT (A)
JUNCTION TEMPERATURE (°C)
1576 G20
1576 G19
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PIN FUNCTIONS
VSW (Pin 1): The switch pin is the emitter of the on-chip
power NPN switch. This pin is driven up to the input pin
voltage during switch on time. Inductor current drives the
switch pin negative during switch off time. Negative volt-
age is clamped with the external catch diode. Maximum
negative switch voltage allowed is –0.8V.
GND pin of the IC. This condition will occur when load
current or other currents flow through metal paths be-
tween the GND pin and the load ground point. Keep the
ground path short between the GND pin and the load and
use a ground plane when possible. The second consider-
ation is EMI caused by GND pin current spikes. Internal
capacitance between the VSW pin and the GND pin creates
very narrow (<10ns) current spikes in the GND pin. If the
GND pin is connected to system ground with a long metal
trace, this trace may radiate excess EMI. Keep the path
between the input bypass and the GND pin short.
VIN (Pin 2): This is the collector of the on-chip power NPN
switch. This pin powers the internal circuitry and internal
regulator when the BIAS pin is not present. At NPN switch
on and off, high dI/dt edges occur on this pin. Keep the
external bypass and catch diode close to this pin. All trace
inductanceonthispathwillcreateavoltagespikeatswitch
off, adding to the VCE voltage across the internal NPN.
BIAS (Pin 5): The BIAS pin is used to improve efficiency
when operating at higher input voltages and light load
current. Connecting this pin to the regulated output volt-
age forces most of the internal circuitry to draw its
operating current from the output voltage rather than the
input supply. This is a much more efficient way of doing
business if the input voltage is much higher than the
output. Minimum output voltage setting for this mode of
operation is 3.3V. Efficiency improvement at VIN = 20V,
VOUT = 5V, and IOUT = 25mA is over 10%.
BOOST (Pin 3): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal
bipolarNPNpowerswitch. Withoutthisaddedvoltage, the
typical switch voltage loss would be about 1.5V. The
additional boost voltage allows the switch to saturate and
voltage loss approximates that of a 0.2Ω FET structure.
Efficiency improves from 75% for conventional bipolar
designs to > 88% for these new parts.
VC (Pin 6): The VC pin is the output of the error amplifier
and the input of the peak switch current comparator. It is
normally used for frequency compensation, but can do
double duty as a current clamp or control loop override.
GND(Pin4):TheGNDpinconnectionneedsconsideration
for two reasons. First, it acts as the reference for the
regulated output, so load regulation will suffer if the
“ground” end of the load is not at the same voltage as the
6
LT1576/LT1576-5
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PIN FUNCTIONS
This pin sits at about 1V for very light loads and 2V at
maximum load. It can be driven to ground to shut off the
regulator, but if driven high, current must be limited to
4mA.
SYNC (Pin 8): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
10% and 90% duty cycle. The synchronizing range is
equal to initial operating frequency, up to 400kHz. This pin
replacesSHDNon-SYNCoptionparts. SeeSynchronizing
section in Applications Information for details.
FB/SENSE (Pin 7): The feedback pin is the input to the
error amplifier which is referenced to an internal 1.21V
source. An external resistive divider is used to set the
output voltage. Three additional functions are performed
by the FB pin. The fixed voltage (-5) parts have the divider
resistors included on-chip and the FB pin is used as a
SENSE pin, connected directly to the 5V output. When the
pin voltage drops below 0.7V, the switch current limit and
theswitchingfrequencyarereducedand theexternalsync
function is disabled. See Feedback Pin Function section in
Applications Information for details.
SHDN (Pin 8): The shutdown pin is used to turn off the
regulator and to reduce input drain current to a few
microamperes. Actually, this pin has two separate thresh-
olds, one at 2.44V to disable switching, and a second at
0.4V to force complete micropower shutdown. The 2.44V
threshold functions as an accurate undervoltage lockout
(UVLO). This can be used to prevent the regulator from
operating until the input voltage has reached a predeter-
mined level.
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BLOCK DIAGRAM
The LT1576 is a constant frequency, current mode buck
converter. This means that there is an internal clock and
twofeedbackloopsthatcontrolthedutycycleofthepower
switch. In addition to the normal error amplifier, there is a
current sense amplifier that monitors switch current on a
cycle-by-cycle basis. A switch cycle starts with an oscilla-
tor pulse which sets the RS flip-flop to turn the switch on.
When switch current reaches a level set by the inverting
input of the comparator, the flip-flop is reset and the
switch turns off. Output voltage control is obtained by
using the output of the error amplifier to set the switch
current trip point. This technique means that the error
amplifier commands current to be delivered to the output
rather than voltage. A voltage fed system will have low
phase shift up to the resonant frequency of the inductor
and output capacitor, then an abrupt 180° shift will occur.
The current fed system will have 90° phase shift at a much
lower frequency, but will not have the additional 90° shift
until well beyond the LC resonant frequency. This makes
itmucheasiertofrequencycompensatethefeedbackloop
and also gives much quicker transient response.
Most of the circuitry of the LT1576 operates from an
internal 2.9V bias line. The bias regulator normally draws
power from the regulator input pin, but if the BIAS pin is
connected to an external voltage higher than 3V, bias
powerwillbedrawnfromtheexternalsource(typicallythe
regulated output voltage). This will improve efficiency if
the BIAS pin voltage is lower than regulator input voltage.
High switch efficiency is attained by using the BOOST pin
to provide a voltage to the switch driver which is higher
thantheinputvoltage,allowingtheswitchtosaturate.This
boosted voltage is generated with an external capacitor
and diode. Two comparators are connected to the shut-
down pin. One has a 2.44V threshold for undervoltage
lockout and the second has a 0.4V threshold for complete
shutdown.
7
LT1576/LT1576-5
W
BLOCK DIAGRAM
0.025Ω
INPUT
+
–
CURRENT
SENSE
2.9V BIAS
REGULATOR
INTERNAL
CC
BIAS
AMPLIFIER
VOLTAGE GAIN = 35
V
SLOPE COMP
BOOST
Σ
0.8V
200kHz
OSCILLATOR
S
R
SYNC
Q1
POWER
SWITCH
R
DRIVER
CIRCUITRY
CURRENT
COMPARATOR
S
FLIP-FLOP
+
–
SHUTDOWN
COMPARATOR
–
+
V
SW
0.4V
FREQUENCY
SHDN
SHIFT CIRCUIT
3.5µA
FOLDBACK
CURRENT
LIMIT
Q2
+
–
CLAMP
–
FB
LOCKOUT
COMPARATOR
+
ERROR
V
C
AMPLIFIER
2.44V
1.21V
g
= 1000µMho
m
GND
1576 BD
Figure 1. Block Diagram
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APPLICATIONS INFORMATION
FEEDBACK PIN FUNCTIONS
The suggested value for the output divider resistor (see
Figure 2) from FB to ground (R2) is 5k or less, and a
formula for R1 is shown below. The output voltage error
caused by ignoring the input bias current on the FB pin is
less than 0.25% with R2 = 5k. A table of standard 1%
values is shown in Table 1 for common output voltages.
Please read the following if divider resistors are increased
above the suggested values.
The feedback (FB) pin on the LT1576 is used to set output
voltage and provide several overload protection features.
The first part of this section deals with selecting resistors
to set output voltage and the remaining part talks about
foldback frequency and current limiting created by the FB
pin. Please read both parts before committing to a final
design. The fixed 5V LT1576-5 has internal divider resis-
tors and the FB pin is renamed SENSE, connected directly
to the output.
R2 VOUT −1.21
(
)
R1=
1.21
8
LT1576/LT1576-5
U
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APPLICATIONS INFORMATION
sufficiently low duty cycle if switching frequency were
maintained at 200kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 0.7V (see
FrequencyFoldbackgraph). Thisdoesnotaffectoperation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
Table 1
OUTPUT
VOLTAGE
(V)
R1
% ERROR AT OUTPUT
R2
(NEAREST 1%) DUE TO DISCREET 1%
(kΩ
)
(k
Ω
)
RESISTOR STEPS
–0.50
3
3.3
5
4.99
4.99
4.99
4.99
4.99
4.99
4.99
4.99
7.32
8.66
15.8
19.6
28.0
36.5
44.2
56.2
+0.30
+0.83
6
–0.62
In addition to lower switching frequency, the LT1576 also
operates at lower switch current limit when the feedback
pin voltage drops below 0.7V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This foldback current limit
greatly reduces power dissipation in the IC, diode and
inductorduringshort-circuitconditions.Externalsynchro-
nization is also disabled to prevent interference with
foldback operation. Again, it is nearly transparent to the
userundernormalloadconditions.Theonlyloadsthatmay
be affected are current source loads which maintain full
loadcurrentwithoutputvoltagelessthan50%offinalvalue.
In these rare situations the feedback pin can be clamped
above0.7Vtodefeatfoldbackcurrentlimit.Caution:clamp-
ingthefeedbackpinmeansthatfrequencyshiftingwillalso
be defeated, so a combination of high input voltage and
deadshortedoutputmaycausetheLT1576tolosecontrol
of current limit.
8
–0.01
10
12
15
+0.61
–0.60
– 1.08
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
ThisisdonetocontrolpowerdissipationinboththeICand
the external diode and inductor during short-circuit con-
ditions. A shorted output requires the switching regulator
to operate at very low duty cycles, and the average current
throughthediodeandinductorisequaltotheshort-circuit
current limit of the switch (typically 2A for the LT1576,
folding back to less than 0.77A). Minimum switch on time
limitations would prevent the switcher from attaining a
LT1576
V
SW
TO FREQUENCY
OUTPUT
5V
SHIFTING
1.4V
Q1
ERROR
AMPLIFIER
R1
1.21V
+
–
R3
1k
R4
1k
FB
+
R5
5k
Q2
R2
5k
TO SYNC CIRCUIT
V
C
GND
1576 F02
Figure 2. Frequency and Current Limit Foldback
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finite inductor size, maximum load current is reduced by
one-half peak-to-peak inductor current. The following
formula assumes continuous mode operation, implying
that the term on the right is less than one-half of IP.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 0.7V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 1kHz/µA. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
VOUT V − VOUT
(
)( IN
)
IOUT(MAX)
=
IP −
Continuous Mode
2 L f V
( )( )( IN
)
to pull 35µA out of the FB pin with 0.5V on the pin (RDIV
≤
For the conditions above and L = 15µH,
14.3k). The net result is that reductions in frequency and
current limit are affected by output voltage divider imped-
ance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage. High frequency pickup will
increase and the protection accorded by frequency and
current foldback will decrease.
5 8 − 5
( )(
)
IOUT MAX) = 1.43 −
(
2 15 •10−6 200•103
8
( )
(
)(
)
=1.43 − 0.31= 1.12A
AtVIN =15V, dutycycleis33%, soIP isjustequaltoafixed
1.5A, and IOUT(MAX) is equal to:
MAXIMUM OUTPUT LOAD CURRENT
5 15 − 5
( )(
)
Maximum load current for a buck converter is limited by
the maximum switch current rating (IP) of the LT1576.
This current rating is 1.5A up to 50% duty cycle (DC),
decreasing to 1.3A at 80% duty cycle. This is shown
graphically in Typical Performance Characteristics and as
shown in the formula below:
1.5 −
2 15 •10−6 200•103 15
( )
(
)(
)
= 1.5 − 0.56 = 0.94A
Note that there is less load current available at the higher
input voltage because inductor ripple current increases.
This is not always the case. Certain combinations of
inductor value and input voltage range may yield lower
available load current at the lowest input voltage due to
reduced peak switch current at high duty cycles. If load
current is close to the maximum available, please check
maximum available current at both input voltage
extremes. To calculate actual peak switch current with a
given set of conditions, use:
IP = 1.5A for DC ≤ 50%
IP = 1.67 – 0.18 (DC) – 0.32(DC)2 for 50% < DC < 90%
DC = Duty cycle = VOUT/VIN
Example: with VOUT = 5V, VIN = 8V; DC = 5/8 = 0.625, and;
ISW(MAX) = 1.67 – 0.18 (0.625) – 0.32(0.625)2 = 1.43A
Current rating decreases with duty cycle because the
LT1576 has internal slope compensation to prevent cur-
rent mode subharmonic switching. For more details, read
Application Note 19. The LT1576 is a little unusual in this
regardbecauseithasnonlinearslopecompensationwhich
gives better compensation with less reduction in current
limit.
VOUT V − VOUT
(
IN
)
ISW PEAK =IOUT
+
(
)
2 L f V
( )( )( IN
)
For lighter loads where discontinuous operation can be
used, maximum load current is equal to:
Maximum load current would be equal to maximum
switch current for an infinitely large inductor, but with
10
LT1576/LT1576-5
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2
Assume that the average inductor current is equal to
load current and decide whether or not the inductor
must withstand continuous fault conditions. If maxi-
mum load current is 0.5A, for instance, a 0.5A inductor
may not survive a continuous 1.5A overload condition.
Dead shorts will actually be more gentle on the induc-
tor because the LT1576 has foldback current limiting.
IOUT(MAX)
=
I
f L V
IN
( ) ( )( )(
)
P
Discontinuous mode
2 V
V − V
(
)(
)
OUT
IN
OUT
Example: with L = 5µH, VOUT = 5V, and VIN(MAX) = 15V,
2
3
−6
1.5 200• 10 5• 10
15
( )
(
)
I
=
= 0.34A
OUT MAX
(
)
2 5 15 − 5
( )(
2. Calculate peak inductor current at full load current to
ensure that the inductor will not saturate. Peak current
can be significantly higher than output current, espe-
cially with smaller inductors and lighter loads, so don’t
omit this step. Powdered iron cores are forgiving
because they saturate softly, whereas ferrite cores
saturate abruptly. Other core materials fall somewhere
in between. The following formula assumes continu-
ous mode of operation, but it errs only slightly on the
high side for discontinuous mode, so it can be used for
all conditions.
)
The main reason for using such a tiny inductor is that it is
physically very small, but keep in mind that peak-to-peak
inductorcurrentwillbeveryhigh. Thiswillincreaseoutput
ripplevoltage.Iftheoutputcapacitorhastobemadelarger
to reduce ripple voltage, the overall circuit could actually
wind up larger.
CHOOSING THE INDUCTOR AND OUTPUT CAPACITOR
For most applications the output inductor will fall in the
rangeof15µHto60µH. Lowervaluesarechosentoreduce
physical size of the inductor. Higher values allow more
output current because they reduce peak current seen by
the LT1576 switch, which has a 1.5A limit. Higher values
also reduce output ripple voltage, and reduce core loss.
GraphsintheTypicalPerformanceCharacteristicssection
show maximum output load current versus inductor size
andinputvoltage. Asecondgraphshowscorelossversus
inductor size for various core materials.
VOUT V − V
(
)
IN
OUT
IPEAK =IOUT +
2 f L V
( )( )(
)
IN
VIN = Maximum input voltage
f = Switching frequency, 200kHz
3. Decide if the design can tolerate an “open” core geom-
etry like a rod or barrel, with high magnetic field
radiation, orwhetheritneedsaclosedcorelikeatoroid
to prevent EMI problems. One would not want an open
core next to a magnetic storage media, for instance!
Thisisatoughdecisionbecausetherodsorbarrelsare
temptingly cheap and small and there are no helpful
guidelines to calculate when the magnetic field radia-
tion will be a problem.
When choosing an inductor you might have to consider
maximum load current, core and copper losses, allowable
component height, output voltage ripple, EMI, fault cur-
rent in the inductor, saturation, and of course, cost. The
following procedure is suggested as a way of handling
thesesomewhatcomplicatedandconflictingrequirements.
4. Start shopping for an inductor (see representative
surfacemountunitsinTable2)whichmeetstherequire-
mentsofcoreshape,peakcurrent(toavoidsaturation),
average current (to limit heating), and fault current (if
the inductor gets too hot, wire insulation will melt and
cause turn-to-turn shorts). Keep in mind that all good
thingslikehighefficiency,lowprofile,andhightempera-
ture operation will increase cost, sometimes dramati-
cally. Get a quote on the cheapest unit first to calibrate
yourself on price, then ask for what you really want.
1. Choose a value in microhenries from the graphs of
maximumloadcurrentandcoreloss.Choosingasmall
inductor may result in discontinuous mode operation
at lighter loads, but the LT1576 is designed to work
well in either mode. Keep in mind that lower core loss
means higher cost, at least for closed core geometries
like toroids. The core loss graphs show both absolute
lossandpercentlossfora5Woutput,soactualpercent
losses must be calculated for each situation.
11
LT1576/LT1576-5
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Output Capacitor
5. After making an initial choice, consider the secondary
things like output voltage ripple, second sourcing, etc.
Use the experts in the Linear Technology’s applica-
tions department if you feel uncertain about the final
choice. They have experience with a wide range of
inductor types and can tell you about the latest devel-
opments in low profile, surface mounting, etc.
The output capacitor is normally chosen by its Effective
Series Resistance (ESR), because this is what determines
output ripple voltage. To get low ESR takes volume, so
physically smaller capacitors have high ESR. The ESR
range for typical LT1576 applications is 0.05Ω to 0.2Ω. A
typical output capacitor is an AVX type TPS, 100µF at 10V,
with a guaranteed ESR less than 0.1Ω. This is a “D” size
surface mount solid tantalum capacitor. TPS capacitors
are specially constructed and tested for low ESR, so they
give the lowest ESR for a given volume. The value in
microfarads is not particularly critical, and values from
22µF to greater than 500µF work well, but you cannot
cheat mother nature on ESR. If you find a tiny 22µF solid
tantalumcapacitor, itwillhavehighESR, andoutputripple
voltage will be terrible. Table 3 shows some typical solid
tantalum surface mount capacitors.
Table 2
SERIES
CORE
VENDOR/
PART NO.
VALUE
DC
CORE RESIS- MATER- HEIGHT
(µ
H) (Amps) TYPE TANCE(
Ω
)
IAL
(mm)
Coiltronics
CTX15-2
15
33
68
15
33
68
1.7
1.4
1.2
1.4
1.3
1.1
Tor
Tor
Tor
Tor
Tor
Tor
0.059
KMµ
KMµ
KMµ
52
6.0
6.0
6.4
4.2
6.0
6.4
CTX33-2
0.106
0.158
0.087
0.126
0.238
CTX68-4
CTX15-1P
CTX33-2P
52
Table 3. Surface Mount Solid Tantalum Capacitor ESR
and Ripple Current
E Case Size
CTX68-4P
52
Sumida
ESR (Max.,
Ω
)
Ripple Current (A)
0.7 to 1.1
0.4
CDRH74-150
CDH115-330
CDRH125-680
CDH74-330
Coilcraft
15
33
68
33
1.47
1.68
1.5
SC
SC
SC
SC
0.081
0.082
0.12
Fer
Fer
Fer
Fer
4.5
5.2
6
AVX TPS, Sprague 593D
AVX TAJ
0.1 to 0.3
0.7 to 0.9
D Case Size
1.45
0.17
5.2
AVX TPS, Sprague 593D
C Case Size
0.1 to 0.3
0.2 (typ)
0.7 to 1.1
0.5 (typ)
DO3308P-153
DO3316P-333
DO3316P-683
Pulse
15
33
68
2
2
SC
SC
SC
0.12
0.1
Fer
Fer
Fer
3
AVX TPS
5.21
5.21
1.4
0.18
Many engineers have heard that solid tantalum capacitors
are prone to failure if they undergo high surge currents.
This is historically true, and type TPS capacitors are
speciallytestedforsurgecapability,butsurgeruggedness
is not a critical issue with the output capacitor. Solid
tantalum capacitors fail during very high turn-on surges,
which do not occur at the output of regulators. High
discharge surges, such as when the regulator output is
dead shorted, do not harm the capacitors.
PE-53602
35
73
22
40
1.4
1.3
2.7
2.7
Tor
Tor
Tor
Tor
0.166
0.290
0.063
0.085
Fer
Fer
Fer
Fer
9.1
9.1
9.1
10
PE-53604
PE-53632
PE-53633
Gowanda
SMP3316-152K
SMP3316-332K
SMP3316-682K
Tor = Toroid
15
33
68
3.5
2.3
1.7
SC
SC
SC
0.041
0.092
0.178
Fer
Fer
Fer
6
6
6
Unlike the input capacitor, RMS ripple current in the
output capacitor is normally low enough that ripple cur-
rent rating is not an issue. The current waveform is
triangular with a typical value of 200mARMS. The formula
to calculate this is:
SC = Semi-closed geometry
Fer = Ferrite core material
52 = Type 52 powdered iron core material
KMµ = Kool Mµ
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LT1576/LT1576-5
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Output Capacitor Ripple Current (RMS):
dI
dt
VRIPPLE = I
ESR + ESL Σ
(
P-P)(
) (
)
0.29 V
V − V
IN OUT
(
OUT)(
)
Example: withVIN =10V,VOUT =5V,L=30µH,ESR=0.1Ω,
IRIPPLE RMS
=
(
)
L f V
ESL = 10nH:
( )( )( )
IN
5 10 − 5
Ceramic Capacitors
( )(
)
I
=
= 0.42A
P-P
−6
3
Higher value, lower cost ceramic capacitors are now
becomingavailableinsmallercasesizes.Thesearetempt-
ing for switching regulator use because of their very low
ESR. Unfortunately, the ESR is so low that it can cause
loop stability problems. Solid tantalum capacitor’s ESR
generatesaloop“zero”at5kHzto50kHzthatisinstrumen-
tal in giving acceptable loop phase margin. Ceramic
capacitors remain capacitive to beyond 300kHz and usu-
allyresonatewiththeirESLbeforeESRbecomeseffective.
They are appropriate for input bypassing because of their
highripplecurrentratingsandtoleranceofturn-onsurges.
10 30• 10
200• 10
( )
dI
dt
10
6
Σ
=
= 0.33• 10
−6
30• 10
−9
6
V
= 0.42A 0.1 + 10• 10
0.33• 10
(
)( )
RIPPLE
= 0.042 + 0.003 = 45mV
P-P
20mV/DIV
VOUT AT
OUT = 1A
I
INDUCTOR
CURRENT
AT IOUT = 1A
200mA/DIV
OUTPUT RIPPLE VOLTAGE
Figure 3 shows a typical output ripple voltage waveform
for the LT1576. Ripple voltage is determined by the high
frequency impedance of the output capacitor, and ripple
current through the inductor. Peak-to-peak ripple current
through the inductor into the output capacitor is:
20mV/DIV
VOUT AT
IOUT = 50mA
INDUCTOR
200mA/DIV
CURRENT
AT IOUT = 50mA
2µs/DIV
1576 F03
Figure 3. LT1576 Ripple Voltage Waveform
V
V − V
IN OUT
(
OUT)(
)
IP-P
=
V
L f
IN)( )( )
(
CATCH DIODE
For high frequency switchers, the sum of ripple current
slew rates may also be relevant and can be calculated
from:
The suggested catch diode (D1) is a 1N5818 Schottky, or
its Motorola equivalent, MBR130. It is rated at 1A average
forward current and 30V reverse voltage. Typical forward
voltage is 0.42V at 1A. The diode conducts current only
during switch off time. Peak reverse voltage is equal to
regulatorinputvoltage.Averageforwardcurrentinnormal
operation can be calculated from:
dI
dt
V
IN
L
Σ
=
Peak-to-peak output ripple voltage is the sum of a triwave
created by peak-to-peak ripple current times ESR, and a
square wave created by parasitic inductance (ESL) and
ripple current slew rate. Capacitive reactance is assumed
to be small compared to ESR or ESL.
IOUT V − V
(
)
IN
OUT
IDAVG
=
V
IN
13
LT1576/LT1576-5
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This formula will not yield values higher than 1A with
maximumloadcurrentof1.25Aunlesstheratioofinputto
output voltage exceeds 5:1. The only reason to consider a
larger diode is the worst-case condition of a high input
voltageandoverloaded(notshorted)output. Undershort-
circuit conditions, foldback current limit will reduce diode
current to less than 1A, but if the output is overloaded and
does not fall to less than 1/3 of nominal output voltage,
foldback will not take effect. With the overloaded condi-
tion, output current will increase to a typical value of 1.8A,
determined by peak switch current limit of 2A. With
VIN = 15V, VOUT = 4V (5V overloaded) and IOUT = 1.8A:
For nearly all applications, a 0.33µF boost capacitor works
just fine, but for the curious, more details are provided
here. The size of the boost capacitor is determined by
switch drive current requirements. During switch on time,
draincurrentonthecapacitorisapproximatelyIOUT/50.At
peakloadcurrentof1.25A,thisgivesatotaldrainof25mA.
Capacitor ripple voltage is equal to the product of on time
and drain current divided by capacitor value;
∆V = (tON)(25mA/C). To keep capacitor ripple voltage to
less than 0.5V (a slightly arbitrary number) at the worst-
case condition of tON = 4.7µs, the capacitor needs to be
0.24µF. Boost capacitor ripple voltage is not a critical
parameter, but if the minimum voltage across the capaci-
tor drops to less than 3V, the power switch may not
saturate fully and efficiency will drop. An approximate
formula for absolute minimum capacitor value is:
1.8 15 − 4
(
)
I
=
= 1.32A
D AVG
(
)
15
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continu-
ous operation under these conditions must be tolerated.
I
(
/50 VOUT / V
)(
)
OUT
IN
CMIN
=
f V −3V
( )(
)
OUT
f = Switching frequency
VOUT = Regulated output voltage
VIN = Minimum input voltage
BOOST PIN CONSIDERATIONS
Formostapplications, theboostcomponentsarea0.33µF
capacitor and a 1N914 or 1N4148 diode. The anode is
connected to the regulated output voltage and this gener-
ates a voltage across the boost capacitor nearly identical
to the regulated output. In certain applications, the anode
may instead be connected to the unregulated input volt-
age. This could be necessary if the regulated output
voltage is very low (< 3V) or if the input voltage is less than
6V. Efficiencyisnotaffectedbythecapacitorvalue, butthe
capacitor should have an ESR of less than 1Ω to ensure
that it can be recharged fully under the worst-case condi-
tion of minimum input voltage. Almost any type of film or
ceramic capacitor will work fine.
This formula can yield capacitor values substantially less
than 0.24µF, but it should be used with caution since it
does not take into account secondary factors such as
capacitor series resistance, capacitance shift with tem-
perature and output overload.
SHUTDOWN FUNCTION AND
UNDERVOLTAGE LOCKOUT
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1576. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
loadtothesourceandcancausethesourcetocurrentlimit
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
WARNING! Peak voltage on the BOOST pin is the sum of
unregulated input voltage plus the voltage across the
boost capacitor. This normally means that peak BOOST
pin voltage is equal to input voltage plus output voltage,
but when the boost diode is connected to the regulator
input, peak BOOST pin voltage is equal to twice the input
voltage. Be sure that BOOST pin voltage does not exceed
its maximum rating.
14
LT1576/LT1576-5
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R
FB
LT1576
OUTPUT
V
SW
IN
INPUT
2.44V
–
+
STANDBY
R
HI
3.5µA
+
SHDN
+
–
TOTAL
SHUTDOWN
R
C1
0.4V
LO
GND
1576 F04
Figure 4. Undervoltage Lockout
Threshold voltage for lockout is about 2.44V. A 3.5µA bias
current flows out of the pin at threshold. This internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making RLO 10k or less. If shutdown
currentisanissue, RLO canberaisedto100k, buttheerror
due to initial bias current and changes with temperature
should be considered.
R
V − 2. ∆V/V
+1 + ∆V
44
(
)
LO IN
OUT
[
]
R =
HI
R
2.44 −
3.5µA
(
LO
)
R = R
V
/
∆V
(
)(
)
FB
HI OUT
25k suggested for RLO
VIN = Input voltage at which switching stops as input
voltage descends to trip level
∆V = Hysteresis in input voltage level
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. ∆V is therefore 1.5V and
VIN = 12V. Let RLO = 25k.
R
= 10k to 100k 25k suggested
(
)
LO
R
V − 2.44V
(
)
LO IN
R =
HI
2.44V −R 3.5µA
(
LO
)
VIN = Minimum input voltage
25k 12 − 2. 1.5/5 +1 + 1.5
44
(
)
[
]
R =
HI
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tor values are used, the shutdown pin should be bypassed
with a 1000pF capacitor to prevent coupling problems
from the switch node. If hysteresis is desired in the
undervoltage lockout point, a resistor RFB can be added to
the output node. Resistor values can be calculated from:
2.44 − 25k 3.5µA
(
)
25k10.33
(
)
=
=110k
2.35
R = 110k 5/1.5 = 366k
(
)
FB
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LT1576/LT1576-5
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SWITCH NODE CONSIDERATIONS
under the switcher circuitry to prevent interplane cou-
pling. A suggested layout for the critical components is
shown in Figure 5. Note that the feedback resistors and
compensation components are kept as far as possible
from the switch node. Also note that the high current
groundpathofthecatchdiodeandinputcapacitorarekept
very short and separate from the analog ground line.
For maximum efficiency, switch rise and fall times are
made as short as possible. To prevent radiation and high
frequency resonance problems, proper layout of the com-
ponents connected to the switch node is essential. B field
(magnetic) radiation is minimized by keeping catch diode,
switch pin, and input bypass capacitor leads as short as
possible. E field radiation is kept low by minimizing the
length and area of all traces connected to the switch pin
and BOOST pin. A ground plane should always be used
Thehighspeedswitchingcurrentpathisshownschemati-
cally in Figure 6. Minimum lead length in this path is
essential to ensure clean switching and low EMI. The path
TAKE OUTPUT DIRECTLY FROM END
CONNECT OUTPUT
CAPACITOR DIRECTLY
TO HEAVY GROUND
OF OUTPUT CAPACITOR TO AVOID
PARASITIC RESISTANCE AND
INDUCTANCE (KELVIN CONNECTION)
C1
V
OUT
MINIMUM SIZE
OF FEEDBACK PIN
CONNECTIONS
MINIMIZE AREA
OF CONNECTIONS
TO SWITCH NODE
AND BOOST NODE
L1
D2
TO AVOID PICKUP
SHDN/SYNC
C2
SW
IN
KEEP INPUT
CAPACITOR
AND CATCH
R2
D1
C3
TERMINATE
V
FB
DIODE CLOSE
TO REGULATOR
AND TERMINATE
THEM TO THE
SAME POINT
FEEDBACK
RESISTORS AND
COMPENSATION
COMPONENTS
DIRECTLY TO
SWITCHER
C
BOOST
V
C
C
R1
GND
R
GROUND PIN
C
GND
GROUND RING NEED NOT BE AS SHOWN
(NORMALLY EXISTS AS INTERNAL PLANE)
1576 F05
Figure 5. Suggested Layout for LT1576
SWITCH NODE
L1
5V
HIGH
FREQUENCY
CIRCULATING
PATH
V
IN
LOAD
1576 F06
Figure 6. High Speed Switching Path
16
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including the switch, catch diode, and input capacitor is
the only one containing nanosecond rise and fall times. If
you follow this path on the PC layout, you will see that it is
irreducibly short. If you move the diode or input capacitor
away from the LT1576, get your resumé in order. The
other paths contain only some combination of DC and
200kHz triwave, so are much less critical.
higher with a poor layout, potentially exceeding the abso-
lute max switch voltage. The path around switch, catch
diode and input capacitor must be kept as short as
possibletoensurereliableoperation.Whenlookingatthis,
a >100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT1576 has special circuitry inside which
mitigates this problem, but negative voltages over 1V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
PARASITIC RESONANCE
Resonance or “ringing” may sometimes be seen on the
switch node (see Figure 7). Very high frequency ringing
following switch rise time is caused by switch/diode/input
capacitor lead inductance and diode capacitance. Schot-
tky diodes have very high “Q” junction capacitance that
can ring for many cycles when excited at high frequency.
Iftotalleadlengthfortheinputcapacitor, diodeandswitch
path is 1 inch, the inductance will be approximately 25nH.
At switch off, this will produce a spike across the NPN
output device in addition to the input voltage. At higher
currents this spike can be in the order of 10V to 20V or
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance reso-
nate with the inductor to form damped ringing at 1MHz to
10 MHz. This ringing is not harmful to the regulator and it
hasnotbeenshowntocontributesignificantlytoEMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
INPUT BYPASSING AND VOLTAGE RANGE
Input Bypass Capacitor
RISE AND FALL
WAVEFORMS ARE
SUPERIMPOSED
(PULSE WIDTH IS
NOT 350ns)
5V/DIV
Step-down converters draw current from the input supply
in pulses. The average height of these pulses is equal to
load current, and the duty cycle is equal to VOUT/VIN. Rise
and fall time of the current is very fast. A local bypass
capacitor across the input supply is necessary to ensure
proper operation of the regulator and minimize the ripple
current fed back into the input supply. The capacitor also
forces switching current to flow in a tight local loop,
minimizing EMI.
50ns/DIV
1374 F07
Figure 7. Switch Node Response
5V/DIV
Do not cheat on the ripple current rating of the Input
bypass capacitor, but also don’t get hung up on the value
in microfarads. The input capacitor is intended to absorb
all the switching current ripple, which can have an RMS
value as high as one half of load current. Ripple current
ratings on the capacitor must be observed to ensure
reliable operation. In many cases it is necessary to parallel
two capacitors to obtain the required ripple rating. Both
capacitors must be of the same value and manufacturer to
SWITCH NODE
VOLTAGE
50mA/DIV
INDUCTOR
CURRENT
1µs/DIV
1374 F08
Figure 8. Discontinuous Mode Ringing
17
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guaranteepowersharing. Theactualvalueofthecapacitor
in microfarads is not particularly important because at
200kHz, any value above 15µF is essentially resistive.
RMS ripple current rating is the critical parameter. Actual
RMS current can be calculated from:
(AVX TPS series for instance, see Table 3), but even these
units may fail if the input voltage surge approaches the
maximum voltage rating of the capacitor. AVX recom-
mends derating capacitor voltage by 2:1 for high surge
applications. The highest voltage rating is 50V, so 25V
may be a practical upper limit when using solid tantalum
capacitors for input bypassing.
2
I
=I
V
V − V
/V
IN
(
)
RIPPLE RMS
OUT OUT IN
OUT
(
)
Larger capacitors may be necessary when the input volt-
age is very close to the minimum specified on the data
sheet. Small voltage dips during switch on time are not
normallyaproblem, butatverylowinputvoltagetheymay
cause erratic operation because the input voltage drops
below the minimum specification. Problems can also
occur if the input-to-output voltage differential is near
minimum. The amplitude of these dips is normally a
function of capacitor ESR and ESL because the capacitive
reactance is small compared to these terms. ESR tends to
be the dominate term and is inversely related to physical
capacitor size within a given capacitor type.
The term inside the radical has a maximum value of 0.5
when input voltage is twice output, and stays near 0.5 for
a relatively wide range of input voltages. It is common
practice therefore to simply use the worst-case value and
assumethatRMSripplecurrentisonehalfofloadcurrent.
At maximum output current of 1.5A for the LT1576, the
input bypass capacitor should be rated at 0.75A ripple
current. Note however, that there are many secondary
considerations in choosing the final ripple current rating.
These include ambient temperature, average versus peak
load current, equipment operating schedule, and required
product lifetime. For more details, see Application Notes
19 and 46, and Design Note 95.
SYNCHRONIZING (Available as -SYNC Option)
The LT1576-SYNC has the SHDN pin replaced with a
SYNC pin, which is used to synchronize the internal
oscillator to an external signal. The SYNC input must pass
from a logic level low, through the maximum synchroni-
zation threshold with a duty cycle between 10% and 90%.
The input can be driven directly from a logic level output.
The synchronizing range is equal to initial operating fre-
quency up to 400kHz. This means that minimum practical
sync frequency is equal to the worst-case high self-
oscillating frequency (250kHz), not the typical operating
frequency of 200kHz. Caution should be used when syn-
chronizing above 280kHz because at higher sync frequen-
cies the amplitude of the internal slope compensation
used to prevent subharmonic switching is reduced. This
type of subharmonic switching only occurs at input volt-
ages less than twice output voltage. Higher inductor
values will tend to eliminate this problem. See Frequency
Compensation section for a discussion of an entirely
different cause of subharmonic switching before assum-
ing that the cause is insufficient slope compensation.
ApplicationNote19hasmoredetailsonthetheoryofslope
compensation.
Input Capacitor Type
Some caution must be used when selecting the type of
capacitor used at the input to regulators. Aluminum
electrolytics are lowest cost, but are physically large to
achieve adequate ripple current rating, and size con-
straints (especially height), may preclude their use.
Ceramic capacitors are now available in larger values, and
their high ripple current and voltage rating make them
ideal for input bypassing. Cost is fairly high and footprint
may also be somewhat large. Solid tantalum capacitors
would be a good choice, except that they have a history of
occasionalspectacularfailureswhentheyaresubjectedto
large current surges during power-up. The capacitors can
short and then burn with a brilliant white light and lots of
nasty smoke. This phenomenon occurs in only a small
percentage of units, but it has led some OEM companies
to forbid their use in high surge applications. The input
bypass capacitor of regulators can see these high surges
when a battery or high capacitance source is connected.
Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
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At power-up, when VC is being clamped by the FB pin (see
Figure2,Q2),thesyncfunctionisdisabled.Thisallowsthe
frequency foldback to operate in the shorted output con-
dition. During normal operation, switching frequency is
controlledbytheinternaloscillatoruntiltheFBpinreaches
0.7V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
2
0.2 1 5
(
)( ) ( )
−9
3
P
=
+ 60• 10
1 10 200• 10
( )( )
SW
10
= 0.1 + 0.12 = 0.22W
2
5 1/50
( ) (
)
P
=
= 0.05W
BOOST
10
2
5 0.004
( ) (
)
−3
−3
P =10 0.55• 10
+5 1.6• 10
+
Q
THERMAL CALCULATIONS
10
= 0.02W
Power dissipation in the LT1576 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current,andinputquiescentcurrent.Thefollowingformu-
las show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Total power dissipation is 0.22 + 0.05 + 0.02 = 0.29W.
Thermal resistance for LT1576 package is influenced by
the presence of internal or backside planes. With a full
plane under the SO package, thermal resistance will be
about 80°C/W. No plane will increase resistance to about
120°C/W. To calculate die temperature, add in worst-case
ambient temperature:
Switch loss:
2
R
I
V
OUT
(
) (
)
SW OUT
TJ = TA + θJA (PTOT
)
P
=
+ 60ns I
V
f
(
)( )( )
SW
OUT IN
V
IN
With the SO-8 package (θJA = 80°C/W), at an ambient
temperature of 50°C,
Boost current loss:
TJ = 50 + 80 (0.29) = 73.2°C
2
V
I
/50
(
)
OUT OUT
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
P
=
BOOST
V
IN
Quiescent current loss:
FREQUENCY COMPENSATION
−3
−3
P = V 0.55• 10
+ V
1.6• 10
Q
IN
OUT
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also intro-
duce multiple poles into the feedback loop. The inductor
and output capacitor on a conventional step-down con-
verter actually form a resonant tank circuit that can exhibit
peaking and a rapid 180° phase shift at the resonant
frequency. Bycontrast, theLT1576usesa“currentmode”
architecture to help alleviate phase shift created by the
inductor. The basic connections are shown in Figure 9.
Figure 10 shows a Bode plot of the phase and gain of the
power section of the LT1576, measured from the VC pin to
2
V
0.004
(
)
OUT
+
V
IN
RSW = Switch resistance (≈0.2Ω)
60ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with VIN = 10V, VOUT = 5V and IOUT = 1A:
19
LT1576/LT1576-5
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the output. Gain is set by the 1.5A/V transconductance of
the LT1576 power section and the effective complex
impedance from output to ground. Gain rolls off smoothly
above the 160Hz pole frequency set by the 100µF output
capacitor. Phase drop is limited to about 85°. Phase
recoversandgainlevelsoffatthezerofrequency(≈16kHz)
set by capacitor ESR (0.1Ω).
This means that the error amplifier characteristics them-
selvesdonotcontributeexcessphaseshifttotheloop,and
the phase/gain characteristics of the error amplifier sec-
tion are completely controlled by the external compensa-
tion network.
In Figure 12, full loop phase/gain characteristics are
shownwithacompensationcapacitorof100pF, givingthe
error amplifier a pole at 2.8kHz, with phase rolling off to
90° and staying there. The overall loop has a gain of 66dB
at low frequency, rolling off to unity-gain at 58kHz. Phase
showsatwo-polecharacteristicuntiltheESRoftheoutput
capacitor brings it back above 16kHz. Phase margin is
about 77° at unity-gain.
Erroramplifiertransconductancephaseandgainareshown
in Figure 11. The error amplifier can be modeled as a
transconductance of 1000µMho, with an output imped-
ance of 570kΩ in parallel with 2.4pF. In all practical
applications, the compensation network from VC pin to
ground has a much lower impedance than the output
impedance of the amplifier at frequencies above 200Hz.
2000
1500
1000
500
200
150
100
50
LT1576
CURRENT MODE
POWER STAGE
V
SW
FB
PHASE
GAIN
OUTPUT
ERROR
g
= 1.5A/V
m
AMPLIFIER
R1
R2
–
V
C
ESR
C1
+
1.21V
C
R
OUT
2.4pF
–3
OUT
570k
V
1 × 10
(
)
+
FB
V
C
GND
0
ERROR AMPLIFIER EQUIVALENT CIRCUIT
= 50Ω
0
R
C
R
LOAD
C
F
–500
–50
C
10
100
1k
10k
100k
1M
C
FREQUENCY (Hz)
1576 F11
1576 F09
Figure 9. Model for Loop Response
Figure 11. Error Amplifier Gain and Phase
40
20
0
40
80
60
180
135
90
V
V
= 10V
IN
= 5V
OUT
OUT
I
= 500mA
0
GAIN
PHASE
GAIN
40
PHASE
–40
–80
–120
V
V
= 10V
IN
20
45
= 5V
OUT
OUT
OUT
I
= 500mA
= 100µF
–20
–40
C
0
0
10V, AVX TPS
C
= 100pF
C
L = 30µH
–20
–45
1M
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
1576 F12
1576 F07
Figure 10. Response from VC Pin to Output
Figure 12. Overall Loop Characteristics
20
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Analog experts will note that around 7kHz, phase dips
close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR will cause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(≥ ±3:1).
subharmonic switching occurs, as evidenced by alternat-
ing pulse widths seen at the switch node. In more severe
cases,theregulatorsquealsorhissesaudiblyeventhough
the output voltage is still roughly correct. None of this will
show on a theoretical Bode plot because Bode is an
amplitude insensitive analysis. Tests have shown that if
ripple voltage on the VC is held to less than 100mVP-P, the
LT1576 will be well behaved. The formula below will give
an estimate of VC ripple voltage when RC is added to the
loop, assuming that RC is large compared to the reactance
of CC at 200kHz.
What About a Resistor in the Compensation Network?
R G
V − V
ESR 1.21
( )(
)(
)(
)(
)
C
MA IN
OUT
V
=
C RIPPLE
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (RC) in series with the
compensation capacitor. Increasing the size of this resis-
tor generally creates better and better loop stability, but
there are two limitations on its value. First, the combina-
tion of output capacitor ESR and a large value for RC may
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for RC
where gain margin falls to zero is:
(
)
V
L f
(
)( )( )
IN
GMA = Error amplifier transconductance (1000µMho)
If a computer simulation of the LT1576 showed that a
seriescompensationresistorof15kgavebestoverallloop
response, with adequate gain margin, the resulting VC pin
ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1Ω,
L = 30µH, would be:
15k 1•10−3 10 − 5 0.1 1.21
(
)
(
)( )(
)
(
)
VC(RIPPLE
=
= 0.151V
)
10 30•10−6 200•103
( )
(
)(
)
V
OUT
R Loop Gain = 1 =
(
)
C
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (<10k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phaseresponse, andsomemeansmustbeusedtocontrol
ripple voltage at the VC pin. The suggested way to do this
istoaddacapacitor(CF)inparallelwiththeRC/CC network
on the VC pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
addunacceptablephaseshiftatloopunity-gainfrequency.
With RC = 15k,
G
(
G
ESR 1.21
)(
)(
)(
)
MP MA
GMP = Transconductance of power stage = 1.5A/V
GMA = Error amplifier transconductance = 1(10–3)
ESR = Output capacitor ESR
1.21 = Reference voltage
With VOUT = 5V and ESR = 0.1Ω, a value of 27.5k for RC
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics. This
resistor sets high frequency gain of the error amplifier,
including the gain at the switching frequency. If switching
frequency gain is high enough, output ripple voltage will
appear at the VC pin with enough amplitude to muck up
proper operation of the regulator. In the marginal case,
5
)( )(
5
CF =
=
= 265pF
2π 200•103 15k
2π f R
(
)
C
(
)
(
)
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How Do I Test Loop Stability?
I check switching regulator loop stability by pulse loading
the regulator output while observing transient response at
the output, using the circuit shown in Figure 13. The
regulator loop is “hit” with a small transient AC load
current at a relatively low frequency, 50Hz to 1kHz. This
causes the output to jump a few millivolts, then settle back
totheoriginalvalue,asshowninFigure14. Awellbehaved
loop will settle back cleanly, whereas a loop with poor
phase or gain margin will “ring” as it settles. The number
ofringsindicatesthedegreeofstability, andthefrequency
of the ringing shows the approximate unity-gain fre-
quency of the loop. Amplitude of the signal is not particu-
larlyimportant, aslongastheamplitudeisnotsohighthat
the loop behaves nonlinearly.
The “standard” compensation for LT1576 is a 100pF
capacitor for CC, with RC = 0Ω. While this compensation
will work for most applications, the “optimum” value for
loop compensation components depends, to various ex-
tent, on parameters which are not well controlled. These
include inductor value (±30% due to production toler-
ance, load current and ripple current variations), output
capacitance (±20%to±50%duetoproductiontolerance,
temperature, aging and changes at the load), output
capacitor ESR (±200% due to production tolerance, tem-
perature and aging), and finally, DC input voltage and
output load current. This makes it important for the
designer to check out the final design to ensure that it is
“robust” and tolerant of all these variations.
RIPPLE FILTER
TO X1
OSCILLOSCOPE
PROBE
470Ω
4.7k
SWITCHING
REGULATOR
+
100µF TO
1000µF
3300pF
330pF
50Ω
ADJUSTABLE
INPUT SUPPLY
ADJUSTABLE
DC LOAD
TO
OSCILLOSCOPE
SYNC
100Hz TO 1kHz
100mV TO 1V
P-P
1576 F13
Figure 13. Loop Stability Test Circuit
V
OUT AT
IOUT = 500mA
BEFORE FILTER
V
OUT AT
IOUT = 500mA
AFTER FILTER
VOUT AT
IOUT = 50mA
AFTER FILTER
LOAD PULSE
THROUGH 50Ω
f ≈ 780Hz
10mV/DIV
5A/DIV
0.2ms/DIV
1576 F14
Figure 14. Loop Stability Check
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The output of the regulator contains both the desired low
frequency transient information and a reasonable amount
of high frequency (200kHz) ripple. The ripple makes it
difficult to observe the small transient, so a two-pole,
100kHz filter has been added. This filter is not particularly
critical; even if it attenuated the transient signal slightly,
this wouldn’t matter because amplitude is not critical.
probably not be a problem in production. Note that fre-
quency of the light load ringing may vary with component
tolerance but phase margin generally hangs in there.
POSITIVE-TO-NEGATIVE CONVERTER
The circuit in Figure 15 is a classic positive-to-negative
topology using a grounded inductor. It differs from the
standard approach in the way the IC chip derives its
feedback signal, however, because the LT1576 accepts
onlypositivefeedbacksignals,thegroundpinmustbetied
to the regulated negative output. A resistor divider to
ground or, in this case, the sense pin, then provides the
proper feedback voltage for the chip.
After verifying that the setup is working correctly, I start
varying load current and input voltage to see if I can find
any combination that makes the transient response look
suspiciously “ringy.” This procedure may lead to an ad-
justment for best loop stability or faster loop transient
response. Nearly always you will find that loop response
looks better if you add in several kΩ for RC. Do this only
if necessary, because as explained before, RC above 1k
may require the addition of CF to control VC pin ripple.
If everything looks OK, I use a heat gun and cold spray on
the circuit (especially the output capacitor) to bring out
any temperature-dependent characteristics.
D1
1N4148
C2
0.33µF
L1*
15µH
INPUT
5.5V TO
20V
BOOST
LT576
V
V
IN
SW
R1
15.8k
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
cleanresponseunderallloadandlineconditionstoensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
likely to be changed in production is the output capacitor,
because that is the component most likely to have manu-
facturer variations (in ESR) large enough to cause prob-
lems. It would be a wise move to lock down the sources of
the output capacitor in production.
FB
+
C3
10µF TO
50µF
GND
V
C
C1
+
R2
100µF
10V TANT
×2
4.99k
C
C
D2
1N5818
R
C
OUTPUT**
–5V, 0.5A
* INCREASE L1 TO 30µH OR 60µH FOR HIGHER CURRENT APPLICATIONS.
SEE APPLICATIONS INFORMATION
** MAXIMUM LOAD CURRENT DEPENDS ON MINIMUM INPUT VOLTAGE
AND INDUCTOR SIZE. SEE APPLICATIONS INFORMATION
1576 F15
Figure 15. Positive-to-Negative Converter
A possible exception to the “clean response” rule is at very
light loads, as evidenced in Figure 14 with ILOAD = 50mA.
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
currentbecomesdiscontinuous.Onecommonresultisvery
slow but stable characteristics. A second possibility is low
phase margin, as evidenced by ringing at the output with
transients. The good news is that the low phase margin at
lightloadsisnotparticularlysensitivetocomponentvaria-
tion, so if it looks reasonable under a transient test, it will
Inverting regulators differ from buck regulators in the
basicswitchingnetwork. Currentisdeliveredtotheoutput
as square waves with a peak-to-peak amplitude much
greater than load current. This means that maximum load
current will be significantly less than the LT1576’s 1.5A
maximumswitchcurrent, evenwithlargeinductorvalues.
The buck converter in comparison, delivers current to the
output as a triangular wave superimposed on a DC level
equal to load current, and load current can approach 1.5A
23
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withlargeinductors.Outputripplevoltageforthepositive-
to-negative converter will be much higher than a buck
converter. Ripple current in the output capacitor will also
be much higher. The following equations can be used to
calculateoperatingconditionsforthepositive-to-negative
converter.
This duty cycle is close enough to 50% that IP can be
assumed to be 1.5A.
OUTPUT DIVIDER
If the adjustable part is used, the resistor connected to
VOUT (R2) should be set to approximately 5k. R1 is
calculated from:
Maximum load current:
V
V
(
)(
)
IN OUT
R2 V
− 1.21
(
)
OUT
I −
V
V −
0.35
(
)(
)
P
OUT IN
R1=
2 V
+ V f L
(
)( )( )
OUT
IN
1.21
I
=
MAX
V
+V − 0.35 V
+ V
F
(
)(
)
OUT
IN
OUT
INDUCTOR VALUE
IP = Maximum rated switch current
VIN = Minimum input voltage
VOUT = Output voltage
VF = Catch diode forward voltage
0.35 = Switch voltage drop at 1.5A
Unlike buck converters, positive-to-negative converters
cannot use large inductor values to reduce output ripple
voltage. At 200kHz, values larger than 75µH make almost
no change in output ripple. The graph in Figure 16 shows
peak-to-peak output ripple voltage for a 5V to –5V con-
verter versus inductor value. The criteria for choosing the
Example: with VIN(MIN) = 5.5V, VOUT = 5V, L = 30µH,
VF = 0.5V, IP = 1.5A: IMAX = 0.6A. Note that this equation
does not take into account that maximum rated switch
current (IP) on the LT1576 is reduced slightly for duty
cyclesabove50%. Ifdutycycleisexpectedtoexceed50%
(input voltage less than output voltage), use the actual IP
value from the Electrical Characteristics table.
150
5V TO –5V CONVERTER
OUTPUT CAPACITOR’S
ESR = 0.1Ω
120
DISCONTINUOUS
I
= 0.1A
90
60
30
0
LOAD
DISCONTINUOUS
= 0.25A
I
Operating duty cycle:
LOAD
V
OUT + VF
V − 0.3 + VOUT + VF
DC =
CONTINUOUS
IN
I
> 0.38A
LOAD
(This formula uses an average value for switch loss, so it
may be several percent in error.)
0
15
30
45
60
75
INDUCTOR SIZE (µH)
1576 F16
With the conditions above:
Figure 16. Ripple Voltage on Positive-to-Negative Converter
5 + 0.5
5.5 − 0.3 + 5 + 0.5
DC =
= 51%
24
LT1576/LT1576-5
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inductor is therefore typically based on ensuring that peak
switch current rating is not exceeded. This gives the
lowest value of inductance that can be used, but in some
cases (lower output load currents) it may give a value that
creates unnecessarily high output ripple voltage. A com-
promise value is often chosen that reduces output ripple.
As you can see from the graph, large inductors will not
give arbitrarily low ripple, but small inductors can give
high ripple.
2
2
)
5.5 1.5
(
) (
I
=
= 0.38A
CONT
4 5.5 + 5 5.5 +5 +0.5
(
)(
)
This says that discontinuous mode can be used and the
minimum inductor needed is found from:
2 5 0.25
( )(
)
L
=
= 5.6µH
MIN
The difficulty in calculating the minimum inductor size
needed is that you must first know whether the switcher
will be in continuous or discontinuous mode at the critical
point where switch current is 1.5A. The first step is to use
the following formula to calculate the load current where
the switcher must use continuous mode. If your load
current is less than this, use the discontinuous mode
formula to calculate minimum inductor needed. If load
current is higher, use the continuous mode formula.
2
)
3
200• 10 1.5
(
Inpractice,theinductorshouldbeincreasedbyabout30%
over the calculated minimum to handle losses and varia-
tionsinvalue. Thissuggestsaminimuminductorof7.3µH
for this application, but looking at the ripple voltage chart
showsthatoutputripplevoltagecouldbereducedbyafac-
toroftwobyusinga30µHinductor.Thereisnoruleofthumb
heretomakeafinaldecision.Ifmodestrippleisneededand
the larger inductor does the trick, go for it. If ripple is non-
critical use the smaller inductor. If ripple is extremely criti-
cal, a second filter may have to be added in any case, and
the lower value of inductance can be used. Keep in mind
thattheoutputcapacitoristheothercriticalfactorindeter-
mining output ripple voltage. Ripple shown on the graph
(Figure 16) is with a capacitor’s ESR of 0.1Ω. This is rea-
sonableforAVXtypeTPS“D”or“E”sizesurfacemountsolid
tantalumcapacitors,butthefinalcapacitorchosenmustbe
looked at carefully for ESR characteristics.
Output current where continuous mode is needed:
2
V
2 I
(
IN) ( P)
ICONT
=
4 V + V
V + V + V
IN OUT F
(
OUT)(
)
IN
Minimum inductor discontinuous mode:
2 V
I
(
OUT)( OUT
f I
)
LMIN
=
2
( )( P)
Minimum inductor continuous mode:
V
V
OUT
( )(
)
IN
LMIN
=
V
+ VF
(
)
OUT
2 f V + V
I −I
1+
( )(
)
IN
OUT
P
OUT
V
IN
For the example above, with maximum load current of
0.25A:
25
LT1576/LT1576-5
U
W U U
APPLICATIONS INFORMATION
Ripple Current in the Input and Output Capacitors
Diode Current
Positive-to-negativeconvertershavehighripplecurrentin
both the input and output capacitors. For long capacitor
lifetime, the RMS value of this current must be less than
the high frequency ripple current rating of the capacitor.
The following formula will give an approximate value for
RMS ripple current. This formula assumes continuous
mode and large inductor value. Small inductors will give
somewhat higher ripple current, especially in discontinu-
ous mode. The exact formulas are very complex and
appear in Application Note 44, pages 30 and 31. For our
purposes here I have simply added a fudge factor (ff). The
value for ff is about 1.2 for higher load currents and
L ≥10µH. It increases to about 2.0 for smaller inductors at
lower load currents.
Average diodecurrentisequaltoloadcurrent. Peak diode
current will be considerably higher.
Peak diode current:
Continuous Mode =
V + V
V
V
(
)
(
)(
)
IN
OUT
IN OUT
I
+
OUT
V
2 L f V + V
( )( )(
IN
)
IN
OUT
2 I
(
V
OUT
)(
)
OUT
Discontinuous Mode =
L f
( )( )
Keep in mind that during start-up and output overloads,
average diode current may be much higher than with
normalloads.Careshouldbeusedifdiodesratedlessthan
1A are used, especially if continuous overload conditions
must be tolerated.
VOUT
Capacitor IRMS = ff I
( )( OUT
)
V
IN
ff = Fudge factor (1.2 to 2.0)
26
LT1576/LT1576-5
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 1298
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
27
LT1576/LT1576-5
U
TYPICAL APPLICATION
Dual Output SEPIC Converter
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flybackconverter,duringswitchontime,alltheconverter’s
energyisstoredinL1Aonly, sincenocurrentflowsinL1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the –5V rail. C4 pulls L1B positive
duringswitchontime, causingcurrenttoflow, andenergy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the –5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit see Design
Note 100.
The circuit in Figure 17 generates both positive and
negative 5V outputs with a single piece of magnetics. L1
is a 33µH surface mount inductor from Coiltronics. It is
manufactured with two identical windings that can be
connected in series or parallel. The topology for the 5V
output is a standard buck converter. The –5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates the SEPIC
(Single-Ended Primary Inductance Converter) topology
which improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
C2
0.33µF
D2
1N914
L1A*
33µH
BOOST
INPUT
OUTPUT
5V
V
IN
V
SW
6V TO 25V
LT1576
BIAS
FB
R1
15.8k
+
R2
4.99k
SHDN
GND
V
C
C1**
100µF
D1
1N5818
10V TANT
+
C3
C
C
22µF
100pF
35V TANT
GND
+
+
C5**
C4**
100µF
* L1 IS A SINGLE CORE WITH TWO WINDINGS
COILTRONICS CTX33-2
100µF
L1B*
D3
1N5818
10V TANT
** AVX TSPD107M010
†
OUTPUT
IF LOAD CAN GO TO ZERO, AN OPTIONAL
†
–5V
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
1576 F17
Figure 17. Dual Output SEPIC Converter
RELATED PARTS
PART NUMBER
LT1074/LT1076
LTC®1148
DESCRIPTION
COMMENTS
Step-Down Switching Regulators
40V Input, 100kHz, 5A and 2A
External FET Switches
High Efficiency Synchronous Step-Down Switching Regulator
High Efficiency Synchronous Step-Down Switching Regulator
High Efficiency Step-Down and Inverting DC/DC Converter
High Efficiency DC/DC Converter
LTC1149
External FET Switches
LTC1174
0.5A, 150kHz Burst ModeTM Operation
42V, 6A, 500kHz Switch
35V, 3A, 500kHz Switch
Boost Topology
LT1370
LT1371
High Efficiency DC/DC Converter
LT1372/LT1377
LT1374
500kHz and 1MHz High Efficiency 1.5A Switching Regulators
4.5A, 500kHz Step-Down Switching Regulator
1.5A, 500kHz Step-Down Switching Regulator
High Efficiency Step-Down Converter
LT1376
LT1435/LT1436
LT1676/LT1776
LT1777
External Switches, Low Noise
High Efficiency Step-Down Switching Regulators
Low Noise Step-Down Switching Regulator
7.4V to 60V Input, 100kHz/200kHz
48V Input, Internally Limited dv/dt
Burst Mode is a trademark of Linear Technology Corporation.
1576f LT/TP 0999 4K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1999
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