LT1633IS#TR [Linear]
LT1633 - 45MHz, 45V/us, Quad Rail-to-Rail Input and Output Precision Op Amps; Package: SO; Pins: 14; Temperature Range: -40°C to 85°C;
| 型号： | LT1633IS#TR |
| 厂家： | 
Linear |
| 描述： | LT1633 - 45MHz, 45V/us, Quad Rail-to-Rail Input and Output Precision Op Amps; Package: SO; Pins: 14; Temperature Range: -40°C to 85°C 运算放大器 |
| 文件： | 总28页 (文件大小：315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1806/LT1807
325MHz, Single/Dual,
Rail-to-Rail Input and Output, Low Distortion,
Low Noise Precision Op Amps
DESCRIPTION
FEATURES
The LT®1806/LT1807 are single/dual low noise rail-to-rail
input and output unity-gain stable op amps that feature a
325MHzgain-bandwidthproduct, a140V/μsslewrateand
a85mAoutputcurrent.Theyareoptimizedforlowvoltage,
high performance signal conditioning systems.
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Gain-Bandwidth Product: 325MHz
n
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n
n
n
n
n
n
n
n
n
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Slew Rate: 140V/μs
Wide Supply Range: 2.5V to 12.6V
Large Output Current: 85mA
Low Distortion, 5MHz: –80dBc
Low Voltage Noise: 3.5nV/√Hz
Input Common Mode Range Includes Both Rails
Output Swings Rail-to-Rail
The LT1806/LT1807 have a very low distortion of –80dBc
at 5MHz, a low input referred noise voltage of 3.5nV/√Hz
andamaximumoffsetvoltageof550μVthatallowsthemto
be used in high performance data acquisition systems.
Input Offset Voltage (Rail-to-Rail): 550μV Max
Common Mode Rejection: 106dB Typ
Power Supply Rejection: 105dB Typ
Unity-Gain Stable
The LT1806/LT1807 have an input range that includes
both supply rails and an output that swings within 20mV
of either supply rail to maximize the signal dynamic range
in low supply applications.
Power Down Pin (LT1806)
Operating Temperature Range: –40°C to 85°C
Single in SO-8 and 6-Pin Low Profile (1mm)
ThinSOT™ Packages
TheLT1806/LT1807maintaintheirperformanceforsupplies
from 2.5V to 12.6V and are specified at 3V, 5V and 5V
supplies. The inputs can be driven beyond the supplies
without damage or phase reversal of the output.
n
Dual in SO-8 and 8-Pin MSOP Packages
APPLICATIONS
The LT1806 is available in an 8-pin SO package with the
standardopamppinoutanda6-pinTSOT-23package.The
LT1807 features the standard dual op amp pinout and is
available in 8-pin SO and MSOP packages.These devices
can be used as plug-in replacements for many op amps
to improve input/output range and performance.
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Low Voltage, High Frequency Signal Processing
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Driving A/D Converters
Rail-to-Rail Buffer Amplifiers
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Active Filters
Video Line Driver
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L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
Gain of 20 Differential A/D Driver
4096 Point FFT Response
0
+
V
A
= p5V
S
V
= 20
1/2 LT1807
–20
f
f
= 10Msps
= 1.4086MHz
SAMPLE
IN
–
R2
SFDR = 83dB
5V
909Ω
–40
–60
NONAVERAGED
V
= 200mV
IN
P-P
R5
R1
49.9Ω
100Ω
+AV
–AV
LTC®1420
V
IN
IN
C1 5.6pF
C2 5.6pF
C3
470pF
12 BITS
10Msps
PGA GAIN = 1
–80
–100
–120
V
= 4.096V
REF
IN
R6
49.9Ω
18067 TA01
R3
100Ω
R4
1k
–5V
–
0
1
2
3
4
5
1/2 LT1807
FREQUENCY (MHz)
18067 TA02
+
18067fc
1
LT1806/LT1807
(Note 1)
ABSOLUTE MAXIMUM RATINGS
+
–
Total Supply Voltage (V to V ) .............................12.6V
Input Voltage (Note 2).............................................. VS
Input Current (Note 2).......................................... 10mA
Output Short-Circuit Duration (Note 3)............ Indefinite
Operating Temperature Range (Note 4) ...–40°C to 85°C
Specified Temperature Range (Note 5) ....–40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
+
SHDN
–IN
1
2
3
4
8
7
6
5
NC
OUT 1
–
6 V
+
–
+
V
V
2
5 SHDN
4 –IN
+IN
OUT
NC
+IN 3
–
V
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, θ = 160°C/W (Note 9)
JMAX
JA
T
JMAX
= 150°C, θ = 100°C/W (Note 9)
JA
TOP VIEW
TOP VIEW
+
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
OUT A
–IN A
+IN A
1
2
3
4
8 V
–
+
OUT B
–IN B
+IN B
7 OUT B
6 –IN B
5 +IN B
–
+
–
V
–
V
MS8 PACKAGE
8-LEAD PLASTIC MSOP
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, θ = 135°C/W (Note 9)
JA
JMAX
T
JMAX
= 150°C, θ = 100°C/W (Note 9)
JA
ORDER INFORMATION
LEAD FREE FINISH
LT1806CS6#PBF
LT1806IS6#PBF
LT1806CS8#PBF
TAPE AND REEL
PART MARKING
LTNK
PACKAGE DESCRIPTION
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
8-Lead Plastic SO
SPECIFIED TEMPERATURE RANGE
LT1806CS6#TRPBF
LT1806IS6#TRPBF
LT1806CS8#TRPBF
0°C to 70°C
–40°C to 85°C
0°C to 70°C
LTNL
1806
LT1806IS8#PBF
LT1807CMS8#PBF
LT1807IMS8#PBF
LT1807CS8#PBF
LT1807IS8#PBF
LT1806IS8#TRPBF
LT1807CMS8#TRPBF
LT1807IMS8#TRPBF
LT1807CS8#TRPBF
LT1807IS8#TRPBF
1806I
LTTT
8-Lead Plastic SO
8-Lead Plastic MSOP
8-Lead Plastic MSOP
8-Lead Plastic SO
8-Lead Plastic SO
–40°C to 85°C
0°C to 70°C
LTTV
–40°C to 85°C
0°C to 70°C
1807
1807I
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
18067fc
2
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
V
Input Offset Voltage
V
V
V
V
= V
= V
100
100
100
100
550
550
700
700
μV
μV
μV
μV
OS
CM
CM
CM
CM
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
–
–
+
+
Input Offset Voltage Shift
V
V
= V to V
50
100
550
700
μV
μV
ΔV
CM
CM
OS
= V to V (LT1806 SOT-23)
–
+
Input Offset Voltage Match (Channel-to-Channel) V = V to V
200
1000
μV
CM
(Note 10)
+
I
B
Input Bias Current
V
V
= V
1
–5
4
μA
μA
CM
CM
–
= V + 0.2V
–13
–
+
Input Bias Current Shift
V
= V to V
6
17
μA
ΔI
CM
B
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V
0.03
0.05
1.2
3.0
μA
μA
CM
CM
–
= V + 0.2V
+
I
Input Offset Current
V
V
= V
0.03
0.05
0.6
1.5
μA
μA
OS
CM
CM
–
= V + 0.2V
–
+
Input Offset Current Shift
Input Noise Voltage
V
= V + 0.2V to V
0.08
800
3.5
1.5
2
2.1
μA
ΔI
CM
OS
0.1Hz to 10Hz
f = 10kHz
nV
P-P
e
n
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
nV/√Hz
pA/√Hz
pF
i
n
f = 10kHz
C
IN
A
VOL
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
75
9
60
220
22
150
V/mV
V/mV
V/mV
S
O
L
S
V = 5V, V = 1V to 4V, R = 100 to V /2
S
O
L
S
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
S
O
L
S
–
–
+
+
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
79
74
100
95
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
73
68
100
95
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
+
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
90
84
105
105
2.3
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.5
V
V
No Load
8
50
130
375
mV
mV
mV
OL
I
I
= 5mA
= 25mA
50
SINK
SINK
170
Output Voltage Swing High (Note 7)
No Load
15
85
350
65
180
650
mV
mV
mV
OH
I
I
= 5mA
SOURCE
SOURCE
= 25mA
18067fc
3
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Short-Circuit Current
V = 5V
S
mA
mA
35
30
85
65
SC
S
S
V = 3V
I
Supply Current per Amplifier
Disable Supply Current
9
13
mA
V = 5V, V
= 0.3V
= 0.3V
0.40
0.22
0.9
0.7
mA
mA
S
SHDN
SHDN
V = 3V, V
S
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
150
100
350
300
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
Shutdown Output Leakage Current
SHDN Pin Input Voltage LOW
SHDN Pin Input Voltage HIGH
Turn-On Time
V
= 0.3V
0.1
75
μA
V
SHDN
V
V
0.3
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100Ω
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100Ω
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
325
125
10
MHz
V/μs
MHz
dBc
ns
V = 5V, A = –1, R = 1k, V = 4V
S
V
L
O
FPBW
HD
Full-Power Bandwidth
Harmonic Distortion
Settling Time
V = 5V, V
S
= 4V
OUT P-P
V = 5V, A = 1, R = 1k, V = 2V , f = 5MHz
–78
60
S
V
L
O
P-P
C
t
S
0.01%, V = 5V, V
= 2V, A = 1, R = 1k
STEP V L
S
Differential Gain (NTSC)
Differential Phase (NTSC)
V = 5V, A = 2, R = 150
0.015
0.05
%
ΔG
S
V
L
V = 5V, A = 2, R = 150
Deg
Δθ
S
V
L
The l denotes the specifications which apply over the 0°C < TA < 70°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open;
VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
l
l
l
l
V
Input Offset Voltage
V
V
V
V
= V
= V
200
200
200
200
700
700
850
850
μV
μV
μV
μV
OS
CM
CM
CM
CM
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
1.5
1.5
5
5
μV/°C
μV/°C
OS
CM
CM
= V
–
+
+
l
l
V
V
= V to V
100
100
700
850
μV
μV
ΔV
CM
CM
OS
–
= V to V (LT1806 SOT-23)
–
+
l
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
300
1200
μV
CM
CM
(Note 10)
+
l
l
I
B
Input Bias Current
V
V
= V – 0.2V
1
–5
5
μA
μA
CM
CM
–
= V + 0.4V
–15
–
+
l
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
6
20
μA
ΔI
B
CM
18067fc
4
LT1806/LT1807
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the 0°C < TA < 70°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.03
0.05
1.5
3.5
μA
μA
CM
CM
–
= V + 0.4V
+
l
l
I
Input Offset Current
V
V
= V – 0.2V
0.03
0.05
0.75
1.80
μA
μA
OS
CM
CM
–
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.08
2.55
μA
ΔI
CM
OS
l
l
l
A
VOL
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
60
7.5
45
175
20
140
V/mV
V/mV
V/mV
S
S
S
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100Ω to V /2
O
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
O
L
–
–
+
+
l
l
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
77
72
94
89
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
l
l
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
71
66
94
89
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
+
l
l
l
l
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
88
82
105
105
2.3
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
V
= V = 0.5V
2.5
CM
O
l
l
l
V
V
I
No Load
12
60
180
60
140
425
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
l
l
l
Output Voltage Swing High (Note 7)
Short-Circuit Current
No Load
30
120
220
700
mV
mV
mV
OH
I
I
= 5mA
110
360
SOURCE
SOURCE
= 25mA
l
l
V = 5V
mA
mA
30
25
65
55
SC
S
V = 3V
S
l
I
S
Supply Current per Amplifier
Disable Supply Current
10
14
mA
l
l
V = 5V, V
S
= 0.3V
= 0.3V
0.40
0.22
1.1
0.9
mA
mA
S
SHDN
SHDN
V = 3V, V
l
l
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
160
110
400
350
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
l
l
l
l
l
l
l
l
Shutdown Output Leakage Current
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
1
μA
V
SHDN
V
V
0.3
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100Ω
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100Ω
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
V = 5V, A = –1, R = 1k, V = 4V
300
100
8
MHz
V/μs
MHz
S
V
L
O
FPBW
Full-Power Bandwidth
V = 5V, V = 4V
S O P-P
18067fc
5
LT1806/LT1807
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
l
l
l
l
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
200
200
200
200
800
800
950
950
μV
μV
μV
μV
OS
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
1.5
1.5
5
5
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
V
= V to V
100
100
800
950
μV
μV
ΔV
CM
CM
OS
–
= V to V (LT1806 SOT-23)
–
+
l
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
200
1400
μV
CM
CM
(Note 10)
+
l
l
I
Input Bias Current
V
V
= V – 0.2V
1
–5
6
μA
μA
B
CM
CM
–
= V + 0.4V
–16
–
+
l
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
6
22
μA
ΔI
B
CM
+
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.02
0.05
1.8
4
μA
μA
CM
CM
–
= V + 0.4V
+
l
l
I
OS
Input Offset Current
V
V
= V – 0.2V
0.02
0.05
0.9
2.1
μA
μA
CM
CM
–
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.07
3
μA
ΔI
CM
OS
l
l
l
A
VOL
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
50
6
35
140
16
100
V/mV
V/mV
V/mV
S
S
S
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100Ω to V /2
O
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
O
L
–
–
+
+
l
l
CMRR
Common Mode Rejection Ratio
V = 5V, V = V to V
75
71
94
89
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
–
+
+
l
l
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
69
65
94
89
dB
dB
S
CM
V = 3V, V = V to V
S
CM
–
+
l
l
l
l
Input Common Mode Range
V
V
V
dB
dB
V
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
86
80
105
105
2.3
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
V
CM
= V = 0.5V
2.5
O
l
l
l
V
V
I
No Load
15
65
170
70
150
400
mV
mV
mV
OL
I
I
= 5mA
= 20mA
SINK
SINK
l
l
l
Output Voltage Swing High (Note 7)
Short-Circuit Current
No Load
30
130
240
700
mV
mV
mV
OH
I
I
= 5mA
110
350
SOURCE
SOURCE
= 20mA
l
l
V = 5V
mA
mA
22
20
45
40
SC
S
V = 3V
S
l
I
Supply Current per Amplifier
Disable Supply Current
11
16
mA
S
l
l
V = 5V, V
S
= 0.3V
= 0.3V
0.4
0.3
1.2
1
mA
mA
S
SHDN
SHDN
V = 3V, V
18067fc
6
LT1806/LT1807
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C < TA < 85°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
I
SHDN Pin Current
V = 5V, V
S
= 0.3V
= 0.3V
170
120
450
400
μA
μA
SHDN
S
SHDN
SHDN
V = 3V, V
l
l
l
l
l
l
l
l
Shutdown Output Leakage Current
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
1.2
μA
V
SHDN
V
V
0.3
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100Ω
80
50
250
80
6
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100Ω
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
V = 5V, A = –1, R = 1k, V = 4V
MHz
V/μs
MHz
S
V
L
O
FPBW
Full-Power Bandwidth
V = 5V, V = 4V
S O P-P
TA = 25°C. VS = 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
V
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V
= V
100
100
100
100
700
700
750
750
μV
μV
μV
μV
OS
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
–
–
+
+
Input Offset Voltage Shift
V
CM
V
CM
= V to V
50
50
700
750
μV
μV
ΔV
OS
= V to V (LT1806 SOT-23)
–
+
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
200
1200
μV
CM
CM
(Note 10)
+
–
I
Input Bias Current
V
CM
V
CM
= V
1
–5
5
μA
μA
B
= V + 0.2V
–14
–
+
Input Bias Current Shift
V
CM
= V + 0.2V to V
6
19
μA
ΔI
B
+
–
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V
0.03
0.05
1.4
3.2
μA
μA
CM
CM
= V + 0.2V
+
I
Input Offset Current
V
V
= V
0.03
0.04
0.7
1.6
μA
μA
OS
CM
CM
–
= V + 0.2V
–
+
Input Offset Current Shift
Input Noise Voltage
V
= V + 0.2V to V
0.07
800
3.5
1.5
2
2.3
μA
nVp-p
nV/√Hz
pA/√Hz
pF
ΔI
CM
OS
0.1Hz to 10Hz
f = 10kHz
e
n
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
i
n
f = 10kHz
C
IN
f = 10kHz
A
VOL
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
100
10
300
27
V/mV
V/mV
O
L
V = –2.5V to 2.5V, R = 100Ω
O
L
18067fc
7
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
83
TYP
106
106
MAX
UNITS
dB
–
+
+
CMRR
Common Mode Rejection Ratio
V
V
= V to V
CM
CM
–
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
77
dB
–
+
V
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
90
84
105
105
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
dB
V
V
I
No Load
SINK
SINK
14
55
180
60
mV
mV
mV
OL
I
I
= 5mA
= 25mA
140
450
Output Voltage Swing High (Note 7)
No Load
SOURCE
SOURCE
20
90
360
70
200
700
mV
mV
mV
OH
I
I
= 5mA
= 25mA
Short-Circuit Current
Supply Current per Amplifier
Disable Supply Current
SHDN Pin Current
mA
mA
mA
μA
40
85
11
SC
I
16
1.2
350
75
S
V
V
V
= 0.3V
= 0.3V
= 0.3V
0.4
150
0.3
SHDN
SHDN
SHDN
I
SHDN
Shutdown Output Leakage Current
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
μA
V
V
0.3
V
L
+
V –0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100Ω
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100Ω
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
A = –1, R = 1k, V = 4V, Measured at V = 3V
170
70
325
140
5.5
MHz
V/μs
MHz
dBc
ns
V
L
O
O
FPBW
HD
Full-Power Bandwidth
Harmonic Distortion
Settling Time
V = 8V
O P-P
A = 1, R = 1k, V = 2V , f = 5MHz
–80
120
0.01
0.01
V
L
O
P-P
C
t
0.01%, V
= 8V, A = 1, R = 1k
STEP V L
S
Differential Gain (NTSC)
Differential Phase (NTSC)
A = 2, R = 150
%
ΔG
V
L
A = 2, R = 150
Deg
Δθ
V
L
18067fc
8
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the 0°C < TA < 70°C
temperature range. VS = 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
l
l
l
l
V
Input Offset Voltage
V
V
V
V
= V
= V
200
200
200
200
800
800
900
900
μV
μV
μV
μV
OS
CM
CM
CM
CM
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
1.5
1.5
5
5
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
V
= V to V
100
100
800
900
μV
μV
ΔV
CM
CM
OS
–
= V to V (LT1806 SOT-23)
–
+
l
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
300
1400
μV
CM
CM
(Note 10)
+
l
l
I
B
Input Bias Current
V
V
= V – 0.2V
1
–6
6
μA
μA
CM
CM
–
= V + 0.4V
–15
–
+
l
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
7
21
μA
ΔI
CM
B
+
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.03
0.04
1.8
3.8
μA
μA
CM
CM
–
= V + 0.4V
+
l
l
I
Input Offset Current
V
V
= V – 0.2V
0.03
0.04
0.9
1.9
μA
μA
OS
CM
CM
–
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.07
2.8
μA
ΔI
CM
OS
l
l
A
VOL
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100Ω
80
8
250
25
V/mV
V/mV
O
O
L
L
–
+
l
l
l
l
l
CMRR
Common Mode Rejection Ratio
V
V
= V to V
81
75
100
100
dB
dB
V
CM
CM
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
88
82
105
106
dB
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing Low (Note 7)
V = 2.5V to 10V, V = 0V
l
l
l
V
V
I
No Load
18
60
185
80
160
500
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
l
l
l
Output Voltage Swing High (Note 7)
No Load
40
110
360
140
240
750
mV
mV
mV
OH
I
I
= 5mA
= 25mA
SOURCE
SOURCE
l
l
l
l
l
l
l
l
l
l
l
Short-Circuit Current
Supply Current per Amplifier
Disable Supply Current
SHDN Pin Current
mA
mA
mA
μA
35
75
14
SC
I
20
1.4
400
S
V
SHDN
V
SHDN
V
SHDN
= 0.3V
= 0.3V
= 0.3V
0.4
160
1
I
SHDN
Shutdown Output Leakage Current
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
μA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100Ω
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100Ω
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
150
60
300
120
MHz
V/μs
A = –1, R = 1k, V = 4V,
Measure at V = 3V
V
L
O
O
l
FPBW
Full-Power Bandwidth
V = 8V
O
4.5
MHz
18067fc
9
P-P
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the −40°C < TA < 85°C
temperature range. VS = 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
+
l
l
l
l
V
Input Offset Voltage
V
V
V
V
= V
= V
200
200
200
200
900
900
975
975
μV
μV
μV
μV
OS
CM
CM
CM
CM
= V (LT1806 SOT-23)
–
= V (LT1806 SOT-23)
+
–
l
l
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
1.5
1.5
5
5
μV/°C
μV/°C
OS
CM
CM
–
+
+
l
l
V
V
= V to V
100
100
900
975
μV
μV
ΔV
CM
CM
OS
–
= V to V (LT1806 SOT-23)
–
+
l
Input Offset Voltage Match (Channel-to-Channel) V = V , V = V
300
1600
μV
CM
CM
(Note 10)
+
l
l
I
B
Input Bias Current
V
V
= V – 0.2V
1.2
–5
7
μA
μA
CM
CM
–
= V + 0.4V
–16
–
+
l
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
6
23
μA
ΔI
CM
B
+
l
l
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
0.03
0.04
2
4.5
μA
μA
CM
CM
–
= V + 0.4V
+
l
l
I
Input Offset Current
V
V
= V – 0.2V
0.03
0.04
1.0
2.2
μA
μA
OS
CM
CM
–
= V + 0.4V
–
+
l
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
0.07
3.2
μA
ΔI
CM
OS
l
l
A
VOL
V = –4V to 4V, R = 1k
V = –2V to 2V, R =100Ω
60
7
175
17
V/mV
V/mV
O
O
L
L
–
+
l
l
l
l
l
CMRR
Common Mode Rejection Ratio
V
V
= V to V
80
74
100
100
dB
dB
V
CM
CM
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
86
80
105
105
dB
dB
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing Low (Note 7)
l
l
l
V
V
I
No Load
20
65
200
100
170
500
mV
mV
mV
OL
I
I
= 5mA
= 20mA
SINK
SINK
l
l
l
Output Voltage Swing High (Note 7)
No Load
50
115
360
160
260
700
mV
mV
mV
OH
I
I
= 5mA
= 20mA
SOURCE
SOURCE
l
l
l
l
l
l
l
l
Short-Circuit Current
mA
mA
mA
μA
μA
V
25
55
15
SC
I
Supply Current per Amplifier
Disable Supply Current
SHDN Pin Current
22
1.5
400
S
V
SHDN
V
SHDN
V
SHDN
= 0.3V
= 0.3V
= 0.3V
0.45
170
1.2
I
SHDN
Shutdown Output Leakage Current
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
V
0.3
L
+
V – 0.5
V
H
t
ON
V
= 0.3V to 4.5V, R = 100Ω
80
ns
SHDN
L
18067fc
10
LT1806/LT1807
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the −40°C < TA < 85°C
temperature range. VS = 5V, VSHDN = open; VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
= 4.5V to 0.3V, R = 100Ω
MIN
TYP
50
MAX
UNITS
ns
l
l
l
t
Turn-Off Time
V
SHDN
OFF
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 6MHz
125
50
290
100
MHz
V/μs
A = –1, R = 1k, V = 4V,
V
L
O
Measure at V = 3V
O
l
FPBW
Full-Power Bandwidth
V = 8V
O
4
MHz
P-P
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
characterized and expected to meet specified performance from –40°C to
85°C but are not tested or QA sampled at these temperatures. The LT1806I/
LT1807I are guaranteed to meet specified performance from –40°C to 85°C.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 1.4V, the input current should be limited to less
than 10mA. This parameter is guaranteed to meet specified performance
through design and/or characterization. It is not 100% tested.
Note 3: A heat sink may be required to keep the junction temperature below
the absolute maximum rating when the output is shorted indefinitely.
ratio test.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 8: This parameter is not 100% tested.
Note 9: Thermal resistance varies depending upon the amount of PC board
metal attached to the V pin of the device. θ is specified for a certain
amount of 2oz copper metal trace connecting to the V pin as described in
the thermal resistance tables in the Applications Information section.
–
JA
–
Note 4: The LT1806C/LT1806I and LT1807C/LT1807I are guaranteed
functional over the temperature range of –40°C and 85°C.
Note 5: The LT1806C/LT1807C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1806C/LT1807C are designed,
Note 10: Matching parameters are the difference between the two
amplifiers of the LT1807.
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Distribution, VCM = 0V
(PNP Stage)
VOS Distribution, VCM = 5V
(NPN Stage)
ΔVOS Shift for VCM = 0V to 5V
50
40
30
50
40
30
50
40
30
V
V
= 5V, 0V
CM
V
V
= 5V, 0V
CM
V = 5V, 0V
S
S
S
= 0V
= 5V
20
10
0
20
10
0
20
10
0
–500
–300
–100
100
300
500
–500
–300
–100
100
300
500
–500
–300
–100
100
300
500
INPUT OFFSET VOLTAGE (μV)
INPUT OFFSET VOLTAGE (μV)
INPUT OFFSET VOLTAGE (μV)
18067 G01
18067 G02
18067 G03
18067fc
11
LT1806/LT1807
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current per Amp
vs Supply Voltage
Offset Voltage
Input Bias Current
vs Input Common Mode
vs Common Mode Voltage
5
0
500
400
20
15
10
5
V
= 5V, 0V
T = 125°C
A
S
T
A
= 25°C
T
= 125°C
= 25°C
A
T
A
= –55°C
300
200
T
A
T
= 125°C
T
A
100
0
= 25°C
–100
–200
–300
–400
–500
A
T
= –55°C
A
–5
T
A
T
= 125°C
= 25°C
T
= –55°C
A
A
T = –55°C
A
V
= 5V, 0V
S
TYPICAL PART
0
–10
6
7
8
0
1
3
4
5
–1
0
1
2
3
4
5
6
0
1
2
3
4
5
9
10 11 12
2
COMMON MODE VOLTAGE (V)
TOTAL SUPPLY VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
18067 G06
18067 G04
18067 G05
Output Saturation Voltage
vs Load Current (Output Low)
Output Saturation Voltage
vs Load Current (Output High)
Input Bias Current vs Temperature
2
1
10
1
10
1
V
= p5V
V
= p5V
S
S
NPN ACTIVE
0
V
= 5V, 0V
S
V
= 5V
CM
–1
–2
–3
–4
–5
–6
–7
–8
0.1
0.1
T
= 125°C
PNP ACTIVE
= 5V, 0V
CM
A
V
T
T
= 125°C
S
A
A
T
= 25°C
A
A
V
= 0V
0.01
0.001
0.01
0.001
T
= –55°C
T
= 25°C
A
= –55°C
–50 –35 –20 –5 10 25 40 55 70 85
TEMPERATURE (°C)
0.01
0.1
1
10
100
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
18067 G08
18067 G09
18067 G07
Output Short-Circuit Current
vs Power Supply Voltage
Supply Current
Minimum Supply Voltage
vs SHDN Pin Voltage
1.0
120
100
80
18
16
14
12
10
8
V
= 5V, 0V
S
T
A
= –55°C
= 125°C
0.8
0.6
T
T
= 25°C
T
= 125°C
= –55°C
A
A
A
60
0.4
“SINKING”
40
0.2
T
= 25°C
A
T
= 125°C
20
A
0
0
–0.2
–0.4
–0.6
–0.8
–1.0
–20
–40
–60
–80
–100
6
“SOURCING”
T
A
T
= 25°C
A
4
T
A
= –55°C
T
= –55°C
A
T
= 125°C
A
2
T
= 25°C
2.0
A
0
1.0
3.0
4.0 4.5
1.5
2.5 3.0 3.5
4.0 4.5 5.0
1.5 2.0 2.5
3.5
5.0
0
4
5
1
2
3
TOTAL SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (pV)
SHDN PIN VOLTAGE (V)
18067 G10
18067 G11
18067 G12
18067fc
12
LT1806/LT1807
TYPICAL PERFORMANCE CHARACTERISTICS
SHDN Pin Current
vs SHDN Pin Voltage
Open-Loop Gain
Open-Loop Gain
20
0
500
400
500
400
V
= 3V, 0V
TO GND
V
= 5V, 0V
R TO GND
L
V
= 5V, 0V
S
L
S
S
R
300
300
–20
200
200
–40
R
L
= 1k
R = 1k
L
T
= 125°C
A
100
100
–60
0
0
–80
T
= 25°C
A
–100
–200
–300
–400
–500
–100
–200
–300
–400
–500
–100
–120
–140
–160
–180
R
= 100Ω
R = 100Ω
L
L
T
= –55°C
A
0
0.5
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT VOLTAGE (V)
0
1
2
3
4
5
1.0
OUTPUT VOLTAGE (V)
SHDN PIN VOLTAGE (V)
18067 G14
18067 G15
18067 G13
Warm-Up Drift
vs Time (LT1806S8)
Open-Loop Gain
Offset Voltage vs Output Current
500
400
2.5
2.0
45
40
35
30
25
20
15
10
5
V
= p5V
V
= p5V
S
S
T
A
= 125°C
A
300
1.5
V
= p5V
S
T
= 25°C
200
1.0
R
= 1k
L
100
0.5
0
0
T
= –55°C
R
= 100Ω
A
L
–100
–200
–300
–400
–500
–0.5
–1.0
–1.5
–2.0
–2.5
V
= p2.5V
= p1.5V
S
S
V
0
–5 –4
–2 –1
0
1
2
3
4
5
–100 –80
–40 –20
0
20 40 60 80 100
40
TIME AFTER POWER-UP (SEC)
–3
–60
0
20
60 80 100 120 140 160
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
18067 G16
18067 G17
18067 G18
0.1Hz to 10Hz
Input Noise Voltage vs Frequency
Input Noise Current vs Frequency
Output Voltage Noise
12
10
8
12
10
8
1000
800
V
= 5V, 0V
V = 5V, 0V
S
S
600
400
NPN ACTIVE
= 4.5V
200
V
CM
6
6
0
PNP ACTIVE
= 2.5V
–200
–400
–600
–800
–1000
V
CM
PNP ACTIVE
= 2.5V
4
4
V
CM
2
2
NPN ACTIVE
= 4.5V
V
CM
0
0
0.1
1
10
100
0.1
1
10
100
0
1
2
3
4
5
6
7
8
9
10
FREQUENCY (kHz)
FREQUENCY (kHz)
TIME (SEC)
18067 G19
18067 G19
18067 G21
18067fc
13
LT1806/LT1807
TYPICAL PERFORMANCE CHARACTERISTICS
Gain Bandwidth and Phase Margin
vs Supply Voltage
Gain Bandwidth and Phase Margin
vs Temperature
Slew Rate vs Temperature
55
50
45
40
35
30
55
50
45
40
35
30
175
150
125
100
A
R
R
= –1
G
= 1k
T
= 25°C
V
F
L
A
= R = 1k
PHASE MARGIN
PHASE MARGIN
V
= p5V
S
PHASE MARGIN
= 3V
V
S
V
= p5V
S
GBW PRODUCT
= p5V
V = p2.5V
S
400
350
300
250
200
400
350
300
250
200
V
S
GAIN BANDWIDTH PRODUCT
GBW PRODUCT
= 3V
V
S
75
–55 –35 –15
5
25 45 65 85 105 125
0
1
2
3
4
5
6
7
8
9
10
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TOTAL SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
18067 G24
18067 G22
18067 G23
Gain vs Frequency (AV = 2)
Gain and Phase vs Frequency
Gain vs Frequency (AV = 1)
21
70
60
225
180
135
90
30
24
C
= 10pF
= 100Ω
C
= 10pF
= 100Ω
L
L
18
15
12
9
R
R
L
L
50
18
PHASE
= p5V
40
12
V
S
45
30
6
V
= p5V
S
PHASE
S
0
6
20
0
V
= 3V
V
= p5V
S
–45
–90
–135
–180
–225
3
10
–6
V
= 3V
S
0
0
–12
–18
–24
–36
GAIN
–3
–6
–9
–10
–20
–30
V
= p5V
S
GAIN
= 3V
V = 3V
S
C
= 5pF
= 100Ω
L
L
V
S
R
0.1
1
10
100
500
0.1
1
10
FREQUENCY (MHz)
100
500
0.1
1
10
FREQUENCY (MHz)
100
500
FREQUENCY (MHz)
18067 G27
18067 G25
18067 G26
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
Output Impedance vs Frequency
600
100
100
90
100
V
= 5V, 0V
= 25°C
V
= 5V, 0V
V
= 5V, 0V
S
S
A
S
90
80
70
T
80
70
10
1
A
V
= 2
V
POSITIVE SUPPLY
60
50
60
50
A
= 10
NEGATIVE SUPPLY
A
= 1
40
30
20
10
0
40
30
20
10
0
V
0.1
0.01
0.001
0.01
0.1
1
10
100 500
0.001
0.01
0.1
1
10
100
100k
1M
10M
FREQUENCY (Hz)
100M 500M
FREQUENCY (MHz)
FREQUENCY (MHz)
18067 G28
18067 G29
18067 G30
18067fc
14
LT1806/LT1807
TYPICAL PERFORMANCE CHARACTERISTICS
Series Output Resistor
vs Capacitive Load
Series Output Resistor
vs Capacitive Load
0.01% Settling Time
50
45
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
V
A
= 5V, 0V
= 1
V
S
A
V
= 5V, 0V
= 2
S
V
INPUT SIGNAL
GENERATION
(2V/DIV)
R
= 10Ω
OS
OUTPUT
SETTLING
RESOLUTION
(2mV/DIV)
R
= 20Ω
R
OS
= 10Ω
OS
R
OS
= 20Ω
18067 G33
V
V
= p5V
OUT
RL = 500Ω
= 120ns (SETTLING TIME)
20ns/DIV
S
R
OS
= R = 50Ω
L
R
= R = 50Ω
OS L
= p4V
0
0
t
S
10
100
CAPACITIVE LOAD (pF)
1000
10
100
1000
CAPACITIVE LOAD (pF)
18067 G31
18067 G32
Distortion vs Frequency
Distortion vs Frequency
Distortion vs Frequency
–40
–50
–40
–50
–40
–50
A
V
V
= 1
OUT
= p5V
A
V
V
= 1
OUT
= 5V, 0V
A
V
V
= 2
V
V
V
= 2V
= 2V
= 2V
OUT P-P
P-P
P-P
= p5V
S
S
S
–60
–60
–60
R
= 100Ω, 3RD
L
R
= 100Ω, 3RD
L
–70
–70
–70
R
L
= 100Ω, 2ND
R
= 1k, 2ND
L
R
L
= 100Ω, 2ND
R
= 100Ω, 2ND
–80
L
–80
–80
R
L
= 100Ω, 3RD
R
= 1k, 3RD
–90
L
R
= 1k, 2ND
L
R
= 1k, 3RD
L
–90
–90
–100
–110
–120
R
= 1k, 2ND
L
R
= 1k, 3RD
L
–100
–100
–110
–110
0.3
1
10
30
0.3
1
10
30
0.3
1
10
30
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
18067 G34
18067 G35
18067 G36
Maximum Undistorted Output
Signal vs Frequency
Distortion vs Frequency
–40
–50
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
A
V
V
= 2
OUT
= 5V, 0V
V
= 5V, 0V
V
S
= 2V
P-P
S
R
= 100Ω, 3RD
A
= –1
L
V
–60
R
= 100Ω, 2ND
L
–70
R
= 1k, 2ND
L
A
= ꢀ2
V
–80
R
= 1k, 3RD
L
–90
–100
–110
–120
0.3
1
10
30
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
18067 G37
18067 G38
18067fc
15
LT1806/LT1807
TYPICAL PERFORMANCE CHARACTERISTICS
5V Large-Signal Response
5V Small-Signal Response
0V
0V
18067 G40
18067 G39
V
= p5V
20ns/DIV
V
= p5V
40ns/DIV
S
S
FREQ = 4.48MHz
FREQ = 1.92MHz
A
= 1
= 1k
A
R
= 1
= 1k
V
V
L
R
L
5V Large-Signal Response
5V Small-Signal Response
0V
0.5V
18067 G42
18067 G41
V
A
= 5V, 0V
= 1
= 1k
10ns/DIV
V
= 5V, 0V
20ns/DIV
S
V
L
S
FREQ = 5.29MHz
R
A
R
= 1
= 1k
V
L
Output Overdriven Recovery
Shutdown Response
V
V
SHDN
2V/DIV
IN
1V/DIV
0V
0V
V
OUT
V
OUT
2V/DIV
0V
2V/DIV
0V
18067 G43
18067 G44
V
A
= 5V, 0V
= 2
= 1k
100ns/DIV
V
A
= 5V, 0V
= 2
= 100Ω
20ns/DIV
S
V
L
S
V
L
R
R
18067fc
16
LT1806/LT1807
APPLICATIONS INFORMATION
Rail-to-Rail Characteristics
ApairofcomplementarycommonemitterstagesQ14/Q15
that enable the output to swing from rail to rail constructs
the output stage. The capacitors C1 and C2 form the
local feedback loops that lower the output impedance at
high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
TheLT1806/LT1807haveinputandoutputsignalrangethat
covers from negative power supply to positive power sup-
ply.Figure1depictsasimplifiedschematicoftheamplifier.
Theinputstageiscomprisedoftwodifferentialamplifiers,
a PNP stage Q1/Q2 and a NPN stage Q3/Q4 that are active
over different ranges of common mode input voltage. The
PNP differential pair is active between the negative supply
to approximately 1.5V below the positive supply. As the
input voltage moves closer toward the positive supply, the
Power Dissipation
The LT1806/LT1807 amplifiers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150°C. The LT1806 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1807 is in an SO-8
transistor Q5 will steer the tail current I to the current
1
mirrorQ6/Q7,activatingtheNPNdifferentialpair.ThePNP
pair becomes inactive for the rest of the input common
mode range up to the positive supply.
+
V
R6
40k
R3
R4
R5
Q16
Q17
+
–
+
V
V
V
Q12
+
ESDD5
D9
D1
ESDD1
+IN
ESDD2
Q11
Q13
Q15
R7
100k
I
1
C2
SHDN
+
D6
D5
D8
D7
Q5
V
BIAS
I
2
D2
ESDD6
C
C
–
V
–
V
OUT
–IN
Q4 Q3
Q1 Q2
D3
BUFFER
AND
ESDD4
ESDD3
OUTPUT BIAS
Q10
–
V
+
V
D4
Q9
R1
Q8
R2
BIAS
GENERATION
C1
Q14
Q7
Q6
–
V
18067 F01
Figure 1. LT1806 Simplified Schematic Diagram
18067fc
17
LT1806/LT1807
APPLICATIONS INFORMATION
–
or 8-lead MSOP package. All packages have the V sup-
ply pin fused to the lead frame to enhance the thermal
conductance when connecting to a ground plane or a
large metal trace. Metal trace and plated through-holes
can be used to spread the heat generated by the device
to the backside of the PC board. For example, on a 3/32"
FR-4 board with 2oz copper, a total of 660 square mil-
limeters connects to Pin 4 of LT1807 in an SO-8 package
(330 square millimeters on each side of the PC board) will
Table 3. LT1807 8-Lead MSOP Package
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE
BACKSIDE
2
2
2
(mm )
(mm )
(mm )
540
100
100
30
540
100
0
2500
2500
2500
2500
2500
110°C/W
120°C/W
130°C/W
135°C/W
140°C/W
0
0
0
bringthethermalresistance,θ ,toabout85°C/W.Without
JA
Device is mounted on topside.
extra metal trace beside the power line connecting to the
–
Junction temperature T is calculated from the ambient
V pintoprovideaheatsink, thethermalresistancewillbe
J
temperature T and power dissipation P as follows:
around 105°C/W. More information on thermal resistance
for all packages with various metal areas connecting to
A
D
T = T + (P • θ )
J
A
D
JA
–
the V pin is provided in Tables 1, 2 and 3.
ThepowerdissipationintheICisthefunctionofthesupply
voltage,outputvoltageandtheloadresistance.Foragiven
Table 1. LT1806 6-Lead SOT-23 Package
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
supply voltage, the worst-case power dissipation P
D(MAX)
2
2
(mm )
(JUNCTION-TO-AMBIENT)
TOPSIDE (mm )
occurs at the maximum quiescent supply current and at
the output voltage which is half of either supply voltage
(or the maximum swing if it is less than 1/2 the supply
270
100
20
2500
2500
2500
2500
135°C/W
145°C/W
160°C/W
200°C/W
voltage). P
is given by:
D(MAX)
0
P
= (V • I
) + (V /2)2/R
S(MAX) S L
D(MAX)
S
Device is mounted on topside.
2
Example: An LT1807 in SO-8 mounted on a 2500mm
Table 2. LT1806/LT1807 SO-8 Package
COPPER AREA
area of PC board without any extra heat spreading plane
–
connected to its V pin has a thermal resistance of
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE
BACKSIDE
105°C/W, θ . Operating on 5V supplies with both ampli-
JA
2
2
2
(mm )
(mm )
(mm )
fiers simultaneously driving 50Ω loads, the worst-case
1100
330
35
1100
330
35
0
2500
2500
2500
2500
2500
65°C/W
85°C/W
95°C/W
100°C/W
105°C/W
power dissipation is given by:
2
P
= 2 • (10 • 14mA) + 2 • (2.5) /50
= 0.28 + 0.25 = 0.53W
D(MAX)
35
0
0
Device is mounted on topside.
18067fc
18
LT1806/LT1807
APPLICATIONS INFORMATION
The maximum ambient temperature that the part is
allowed to operate is:
Output
The LT1806/LT1807 can deliver a large output current, so
theshort-circuitcurrentlimitissetaround85mAtoprevent
damage to the device. Attention must be paid to keep the
junctiontemperatureoftheICbelowtheabsolutemaximum
rating of 150°C (refer to the Power Dissipation section)
whentheoutputiscontinuouslyshortcircuited.Theoutput
of the amplifier has reverse-biased diodes connected to
each supply. If the output is forced beyond either supply,
unlimited current will flow through these diodes. If the
current is transient and limited to one hundred milliamps
or less, no damage to the device will occur.
T = T – (P • 105°C/W)
D(MAX)
A
J
= 150°C – (0.53W • 105°C/W) = 94°C
To operate the device at higher ambient temperature,
–
connectmoremetalareatotheV pintoreducethethermal
resistance of the package as indicated in Table 2.
Input Offset Voltage
The offset voltage will change depending upon which
input stage is active and the maximum offset voltage is
guaranteed to less than 550μV. To maintain the precision
Overdrive Protection
characteristics of the amplifier, the change of V over the
OS
entire input common mode range (CMRR) is limited to be
When the input voltage exceeds the power supplies, two
pairs of crossing diodes D1 to D4 will prevent the output
from reversing polarity. If the input voltage exceeds either
power supply by 700mV, diode D1/D2 or D3/D4 will turn
on to keep the output at the proper polarity. For the phase
reversal protection to perform properly, the input current
mustbelimitedtolessthan5mA.Iftheamplifierisseverely
overdriven, an external resistor should be used to limit
the overdrive current.
less than 550μV on a single 5V and 3V supply.
Input Bias Current
The input bias current polarity depends on a given input
common voltage at which the input stage is operating.
WhenthePNPinputstageisactive, theinputbiascurrents
flow out of the input pins. When the NPN input stage is
activated, the input bias current flows into the input pins.
Because the input offset current is less than the input bias
current, matching the source resistances at the input pins
will reduce total offset error.
18067fc
19
LT1806/LT1807
APPLICATIONS INFORMATION
The LT1806/LT1807’s input stages are also protected
against large differential input voltages of 1.4V or higher
by a pair of back-to-back diodes, D5/D8, that prevent
the emitter-base breakdown of the input transistors. The
currentinthesediodesshouldbelimitedtolessthan10mA
when they are active. The worst-case differential input
voltage usually occurs when the input is driven while the
output is shorted to ground in a unity gain configuration.
In addition, the amplifier is protected against ESD strikes
up to 3kV on all pins by a pair of protection diodes, ESDD1
to ESDD6, on each pin that are connected to the power
supplies as shown in Figure 1.
Feedback Components
Whenfeedbackresistorsareusedtosetupgain,caremust
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
doesnotdegradestability.Forinstance,theLT1806/LT1807
in a noninverting gain of 2, set up with two 1k resistors
andacapacitanceof3pF(partplusPCboard)willprobably
ring in transient response. The pole is formed at 106MHz
that will reduce phase margin by 34 degrees when the
crossover frequency of the amplifier is around 70MHz. A
capacitor of 3pF or higher connected across the feedback
resistor will eliminate any ringing or oscillation.
Capacitive Load
SHDN Pin
The LT1806/LT1807 are optimized for high bandwidth and
low distortion applications. They can drive a capacitive
load of about 20pF in a unity-gain configuration, and more
for higher gain. When driving a larger capacitive load, a
resistor of 10Ω to 50Ω should be connected between the
output and the capacitive load to avoid ringing or oscilla-
tion. The feedback should still be taken from the output so
that the resistor will isolate the capacitive load to ensure
stability. Graphs on capacitive loads indicate the transient
response of the amplifier when driving the capacitive load
with a specified series resistor.
The LT1806 has a SHDN pin to reduce the supply current
to less than 0.9mA. When the SHDN pin is pulled low, it
will generate a signal to power down the device. If the pin
is left unconnected, an internal pull-up resistor of 40k will
keep the part fully operating as shown in Figure 1. The
output will be high impedance during shutdown, and the
turn-on and turn-off time is less than 100ns. Because
the input is protected by a pair of back-to-back diodes,
the input signal will feed through to the output during
shutdown mode if the amplitude of signal between the
inputs is larger than 1.4V.
18067fc
20
LT1806/LT1807
TYPICAL APPLICATIONS
Driving A/D Converter
noiseordistortionproductsthatmightcomefromtheinput
signal. High quality capacitors and resistors, NPO chip
capacitor and metal film surface mount resistors, should
be used since these components can add to distortion.
The voltage glitch of the converter, due to its sampling
nature is buffered by the LT1807, and the ability of the
amplifier to settle it quickly will affect the spurious free
dynamic range of the system. Figure 2 depicts the LT1806
driving LTC1420 at noninverting gain of 2 configuration.
The FFT responses show a better than 92dB of spurious
free dynamic range, SFDR.
The LT1806/LT1807 have 60ns settling time to 0.01% on
a 2V step signal, and 20Ω output impedance at 100MHz,
that makes them ideal for driving high speed A/D convert-
ers. With the rail-to-rail input and output, and low supply
voltage operation, the LT1806/LT1807 are also desirable
for single supply applications. As shown in the application
on the front page of this data sheet, the LT1807 drives a
10Msps, 12-bit, LTC1420 ADC in a gain of 20. Driving the
LTC1420 differentially will optimize the signal-to-noise
ratio, SNR, and the total harmonic distortion, THD, of the
A/D converter. The lowpass filter, R5, R6 and C3 reduce
0
V
A
= p5V
S
V
= 2
–20
f
f
= 10Msps
= 1.4086MHz
SAMPLE
IN
SFDR = 92.5dB
5V
–40
–60
5V
V
P-P
IN
R3
49.9Ω
+
–
1.5V
LTC1420
PGA GAIN = 1
REF = 2.048V
12 BITS
10Msps
•
•
•
LT1806
–5V
+A
IN
–80
–100
–120
C1
470pF
–A
IN
R2
1k
18067 F02
–5V
R1
1k
0
1
2
3
4
5
FREQUENCY (MHz)
18067 F03
Figure 2. Noninverting A/D Driver
Figure 3. 4096 Point FFT Response
18067fc
21
LT1806/LT1807
TYPICAL APPLICATIONS
Single Supply Video Line Driver
R5. The back termination will eliminate any reflection of
the signal that comes from the load. The input termination
TheLT1806/LT1807arewidebandrail-to-railopampswith
largeoutputcurrentthatallowsthemtodrivevideosignals
inlowsupplyapplications. Figure4depictsasinglesupply
video line driver with AC coupling to minimize the quies-
cent power dissipation. Resistors R1 and R2 are used to
level-shifttheinputandoutputtoprovidethelargestsignal
swing. The gain of 2 is set up with R3 and R4 to restore
resistor, R , is optional—it is used only if matching of
T
the incoming line is necessary. The values of C1, C2 and
C3 are selected to minimize the droop of the luminance
signal. In some less stringent requirements, the value of
capacitors could be reduced. The –3dB bandwidth of the
driver is about 90MHz on 5V supply, and the amount of
peaking will vary upon the value of capacitor C4.
the signal at V , which is attenuated by 6dB due to the
OUT
matchingofthe75Ωlinewiththeback-terminatedresistor,
5V
C1
R1
33μF
5k
C3
3
2
7
LT1806
4
75W
R5
V
+
–
1000μF
COAX CABLE
75Ω
IN
6
R
R2
5k
T
V
OUT
75Ω
R
LOAD
75Ω
R4
1k
18067 F04
C4
3pF
R3
1k
+
C2
150μF
Figure 4. 5V Single Supply Video Line Driver
5
V
= 5V, 0V
S
4
3
2
1
0
–1
–2
–3
–4
–5
0.2
1
10
100
FREQUENCY (MHz)
18067 F05
Figure 5. Video Line Driver Frequency Response
18067fc
22
LT1806/LT1807
TYPICAL APPLICATIONS
Single 3V Supply, 4MHz, 4th Order Butterworth Filter
On a 3V supply, the filter built with LT1807 has a passband
of 4MHz with 2.5V signal and stopband that is greater
P-P
Benefiting from a low voltage supply operation, low
distortion and rail-to-rail output of LT1806/LT1807, a low
distortion filter that is suitable for antialiasing can be built
as shown in Figure 6.
than70dBtofrequencyof100MHz.Asanoptiontominimize
theDCoffsetvoltageattheoutput,connectaseriesresistor
of 365Ω and a bypass capacitor at the noninverting inputs
of the amplifiers as shown in Figure 6.
232Ω
47pF
274Ω
22pF
232Ω
665Ω
220pF
V
IN
–
274Ω
562Ω
470pF
–
1/2 LT1807
V
1/2 LT1807
+
OUT
365Ω
(OPTIONAL)
+
V
S
18067 F06
2
4.7μF
(OPTIONAL)
Figure 6. Single 3V Supply, 4MHz, 4th Order Butterworth Filter
10
0
–10
–20
–30
–40
–50
–60
–70
V
V
= 3V, 0V
S
–80
–90
= 2.5V
P-P
IN
10k
100k
1M
10M
100M
FREQUENCY (Hz)
18067 F07
Figure 7. Filter Frequency Response
18067fc
23
LT1806/LT1807
TYPICAL APPLICATIONS
1MHz Series Resonant Crystal Oscillator with Square
and Sinusoid Outputs
edgeandthecrystalcapacitance(middletraceofFigure 9).
Sinusoid amplitude stability is maintained by the fact that
the sine wave is basically a filtered version of the square
wave; the usual amplitude control loops associated with
Figure 8 shows a classic 1MHz series resonant crystal
oscillator. At series resonance, the crystal is a low imped-
ance and the positive feedback connection is what brings
about oscillation at the series resonance frequency. The
RC feedback around the other path ensures that the circuit
does not find a stable DC operating point and refuse to
oscillate. The comparator output is a 1MHz square wave
1
sinusoidal oscillators are not immediately necessary.
One can make use of this sine wave by buffering and
filtering it, and this is the combined task of the LT1806. It
is configured as a bandpass filter with a Q of 5 and does
a good job of cleaning up and buffering the sine wave.
Distortion was measured at –70dBc and –60dBc on the
second and third harmonics.
with a measured jitter of 28ps
with a 5V supply and
RMS
40ps
with a 3V supply. On the other side of the crystal,
RMS
1
Amplitude will be a linear function of comparator output swing, which is supply dependent and
however, is an excellent looking sine wave except for the
fact of the small high frequency glitch caused by the fast
therefore controllable. The important difference here is that any added amplitude stabilization loop
will not be faced with the classical task of avoiding regions of nonoscillation versus clipping.
C4
100pF
R5
6.49k
1k
R7
R6
1MHZ
100pF
15.8k
R4
210Ω
162Ω
AT-CUT
C3
V
S
100pF
V
S
2
3
7
V
S
–
+
R1
1k
6
R9
2k
LT1806
4
SINE WAVE
1
2
3
7
+
1 (NC)
V
S
R2
1k
LT1713
8
C2
0.1μF
SQUARE WAVE
R8
2k
LE
5
4
–
18067 F08
6
R3
1k
V
= 2.7V TO 6V
S
C1
0.1μF
Figure 8. LT1713 Comparator is Configured as a Series Resonant Crystal Oscillator.
The LT1806 Op Amp is Configured in a Q = 5 Bandpass Filter with fC = 1MHz
3V/DIV
1V/DIV
1V/DIV
18067 F09
200ns/DIV
Figure 9. Oscillator Waveforms with VS = 3V. Top Trace is Comparator Output.
Middle Trace is Crystal Feedback to Pin 2 at LT1713. Bottom Trace is Buffered,
Inverted and Bandpass Filtered with a Q of 5 by the LT1806
18067fc
24
LT1806/LT1807
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC
(NOTE 4)
0.62
MAX
0.95
REF
1.22 REF
1.4 MIN
1.50 – 1.75
2.80 BSC
3.85 MAX 2.62 REF
(NOTE 4)
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302 REV B
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
18067fc
25
LT1806/LT1807
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 p 0.038
(.0165 p .0015)
TYP
8
7 6
5
RECOMMENDED SOLDER PAD LAYOUT
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
GAUGE PLANE
1
2
3
4
0.53 p 0.152
(.021 p .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
0.1016 p 0.0508
(.009 – .015)
(.004 p .002)
0.65
(.0256)
BSC
TYP
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
18067fc
26
LT1806/LT1807
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 p .005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 p .005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 p .005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
s 45o
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0o– 8o TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
18067fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT1806/LT1807
TYPICAL APPLICATION
FET Input, Fast, High Gain Photodiode Amplifier
total output noise was below 1mV
measured over a
RMS
10MHz bandwidth. Table 4 shows results achieved with
Figure 10 shows a fast, high gain transimpedance
amplifier applied to a photodiode. A JFET buffer is used
for its extremely low input bias current and high speed.
various values of R and Figure 11 shows the time domain
F
response with R = 499k.
F
The LT1097 and 2N3904 keep the JFET biased at I
Table 4. Results Achieved for Various RF, 1.2V Output Step
DSS
10% to 90%
RISE TIME
–3dB
BANDWIDTH
6.8MHz
4.6MHz
3MHz
for zero offset and lowest voltage noise. The JFET then
R
F
drives the LT1806, with R closing the high speed loop
F
100k
200k
499k
1M
64ns
94ns
back to the JFET input and setting the transimpedance
gain. C4 helps improve the phase margin of the fast loop.
Output voltage noise density was measured as 9nV/√Hz
154ns
263ns
1.8MHz
with R short circuited. With R varied from 100k to 1M,
F
F
+
V
S
R
F
C4
3pF
2N5486
*
SIEMENS/
INFINEON
+
R1
V
S
R2
10M
SFH213FA
1M
PHOTODIODE
7
2
–
–
+
V
S
49.9Ω
C1
6
+
LT1806
V
OUT
100mV/DIV
V
100pF
S
3
50W
7
3
2
4
–
+
–
6
18067 F10
V
S
LT1097
R3
10k
4
–
C2
2200pF
18067 F11
20ns/DIV
2N3904
*ADJUST PARASITIC CAPACITANCE AT
FOR DESIRED RESPONSE
V
S
R
F
R4
2.4k
C3
0.1μF
R5
33Ω
CHARACTERISTICS
= p5V
Figure 11. Step Response
with RF = 499k
V
S
–
V
S
Figure 10. Fast, High Gain Photodiode Amplifier
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1395
LT1399
400MHz Current Feedback Amplifier
Triple 300MHz Current Feedback Amplifier
800V/μs Slew Rate, Shutdown
0.1dB Gain Flatness to 150MHz, Shutdown
High DC Accuracy 1.35mV V , 70mA Output Current,
LT1632/LT1633 Dual/Quad 45MHz, 45V/μs Rail-to-Rail Input and Output Amplifiers
OS(MAX)
Max Supply Current 5.2mA/Amp
LT1809/LT1810 Single/Dual 180MHz Input and Output Rail-to-Rail Amplifiers
LT1812/LT1813 3mA, 100MHz, 750V/μs Op Amp
350V/μs Slew Rate, Shutdown, Low Distortion –90dBc at 5MHz
High Slew Rate
Ultrahigh Slew Rate
Lowest Noise
LT1818/LT1819 9mA, 400MHz, 2500V/μs Op Amp
LT6200/LT6201 165MHz Rail-to-Rail Input and Output, 0.95nV/√Hz Low Noise
Op Amp
LT6202/LT6203 100MHz Rail-to-Rail Input and Output, 1.9nV/√Hz Op Amp
I
= 2.5mA
CC
18067fc
LT 0809 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
© LINEAR TECHNOLOGY CORPORATION 2000
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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