LT1764AEQ-25 [Linear]
3A, Fast Transient Response, Low Noise, LDO Regulators; 3A ，快速瞬态响应，低噪声， LDO稳压器
| 型号： | LT1764AEQ-25 |
| 厂家： | 
Linear |
| 描述： | 3A, Fast Transient Response, Low Noise, LDO Regulators |
| 文件： | 总20页 (文件大小：638K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1764A Series
3A, Fast Transient
Response, Low Noise,
LDO Regulators
U
FEATURES
DESCRIPTIO
The LT®1764A is a low dropout regulator optimized for
fasttransientresponse. Thedeviceiscapableofsupplying
3A of output current with a dropout voltage of 340mV.
Operating quiescent current is 1mA, dropping to <1µA in
shutdown. Quiescentcurrentiswellcontrolled;itdoesnot
rise in dropout as it does with many other regulators. In
addition to fast transient response, the LT1764A has very
low output voltage noise which makes the device ideal for
sensitive RF supply applications.
■
Optimized for Fast Transient Response
■
Output Current: 3A
■
Dropout Voltage: 340mV at 3A
■
Low Noise: 40µVRMS (10Hz to 100kHz)
■
■
■
■
■
■
■
■
■
■
■
■
1mA Quiescent Current
Wide Input Voltage Range: 2.7V to 20V
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
<1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor*
Stable with Ceramic Capacitors*
Reverse Battery Protection
Output voltage range is from 1.21V to 20V. The LT1764A
regulatorsarestablewithoutputcapacitorsaslowas10µF.
Internal protection circuitry includes reverse battery pro-
tection, current limiting, thermal limiting and reverse cur-
rent protection. The device is available in fixed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1764A regu-
latorsareavailablein5-leadTO-220andDDpackages,and
16-lead FE packages.
No Reverse Current
Thermal Limiting
U
APPLICATIO S
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
■
3.3V to 2.5V Logic Power Supply
Post Regulator for Switching Supplies
■
*See Applications Information Section.
U
TYPICAL APPLICATIO
Dropout Voltage
400
350
300
250
200
150
100
50
3.3V to 2.5V
Regulator
OUT
IN
2.5V
3A
IN
OUT
+
+
V
IN
> 3V
10µF*
10µF*
LT1764A-2.5
SHDN SENSE
GND
*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC
1764 TA01
0
2.5
0
0.5
1.0
1.5
2.0
3.0
LOAD CURRENT (A)
1764 TA02
1764afb
1
LT1764A Series
W W U W
ABSOLUTE MAXIMUM RATINGS (Note 1)
Output Short-Circuit Duration......................... Indefinite
Operating Junction Temperature Range
E Grade............................................. –40°C to 125°C
MP Grade ......................................... –55°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 12) ....... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
SHDN Pin Voltage................................................. ±20V
U
W U
PACKAGE/ORDER INFORMATION
TOP VIEW
FRONT VIEW
FRONT VIEW
GND
NC
1
2
3
4
5
6
7
8
16 GND
15 NC
14 IN
SENSE/
ADJ*
5
4
3
2
1
SENSE/ADJ*
OUT
5
4
3
2
1
OUT
GND
IN
OUT
TAB IS
GND
GND
*PIN 6 = SENSE FOR LT1764A-1.5/
LT1764A-1.8/LT1764A-2.5/
LT1764A-3.3
OUT
13 IN
17
IN
OUT
12 IN
SHDN
SHDN
SENSE/ADJ*
GND
11 NC
10 SHDN
= ADJ FOR LT1764A
TAB IS
GND
T PACKAGE
5-LEAD PLASTIC TO-220
Q PACKAGE
5-LEAD PLASTIC DD
GND
9
GND
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
*PIN 5 = SENSE FOR LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3
FE PACKAGE
16-LEAD PLASTIC TSSOP
PIN 17 IS GND
= ADJ FOR LT1764A
= ADJ FOR LT1764A
TJMAX = 150°C, θJA = 50°C/ W
TJMAX = 150°C, θJA = 30°C/ W
TJMAX = 150°C, θJA = 38°C/ W
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART NUMBER FE PART MARKING
LT1764AEQ
LT1764AET
LT1764AEFE
LT1764AEFE
LT1764AEQ-1.5
LT1764AEQ-1.8
LT1764AEQ-2.5
LT1764AEQ-3.3
LT1764AMPQ
LT1764AET-1.5
LT1764AET-1.8
LT1764AET-2.5
LT1764AET-3.3
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
LT1764AEFE-1.5
LT1764AEFE-1.8
LT1764AEFE-2.5
LT1764AEFE-3.3
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage
(Notes 3, 11)
I
I
= 0.5A
= 1.5A
1.7
1.9
2.3
2.3
V
V
V
V
LOAD
LOAD
E Grade: I
MP Grade: I
= 3A
= 3A
●
●
2.7
2.8
LOAD
LOAD
Regulated Output Voltage
(Note 4)
LT1764A-1.5 V = 2.21V, I
= 1mA
1.477
1.447
1.500
1.500
1.523
1.545
V
V
IN
LOAD
2.7V < V < 20V, 1mA < I
< 3A
< 3A
●
●
IN
LOAD
LOAD
LT1764A-1.8 V = 2.3V, I
= 1mA
LOAD
1.773
1.737
1.800
1.800
1.827
1.854
V
V
IN
2.8V < V < 20V, 1mA < I
IN
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2
LT1764A Series
ELECTRICAL CHARACTERISTICS
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 2)
A
The
●
PARAMETER
CONDITIONS
LT1764A-2.5 V = 3V, I
MIN
TYP
MAX
UNITS
= 1mA
LOAD
2.462
2.412
2.500
2.500
2.538
2.575
V
V
IN
3.5V < V < 20V, 1mA < I
< 3A
< 3A
●
●
IN
LOAD
LOAD
LT1764A-3.3 V = 3.8V, I
= 1mA
LOAD
3.250
3.183
3.300
3.300
3.350
3.400
V
V
IN
4.3V < V < 20V, 1mA < I
IN
ADJ Pin Voltage
(Notes 3, 4)
LT1764A
V
= 2.21V, I
= 1mA
IN
1.192
1.168
1.168
1.210
1.210
1.210
1.228
1.246
1.246
V
V
V
IN
LOAD
E Grade: 2.7V < V < 20V, 1mA < I
MP Grade: 2.8V < V < 20V, 1mA < I
< 3A
LOAD
●
●
< 3A
IN
LOAD
Line Regulation
LT1764A-1.5
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
∆V = 2.21V to 20V, I
= 1mA
= 1mA
= 1mA
= 1mA
= 1mA
●
●
●
●
●
2.5
3
4
4.5
2
10
10
10
10
10
mV
mV
mV
mV
mV
IN
LOAD
∆V = 2.3V to 20V, I
IN
LOAD
∆V = 3V to 20V, I
IN
IN
LOAD
∆V = 3.8V to 20V, I
LOAD
LT1764A (Note 3) ∆V = 2.21V to 20V, I
IN
LOAD
Load Regulation
LT1764A-1.5
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
V
V
= 2.7V, ∆I
= 2.7V, ∆I
= 1mA to 3A
= 1mA to 3A
3
4
4
4
2
7
23
mV
mV
IN
IN
LOAD
LOAD
●
●
●
●
V
V
= 2.8V, ∆I
= 2.8V, ∆I
= 1mA to 3A
= 1mA to 3A
8
25
mV
mV
IN
IN
LOAD
LOAD
V
V
= 3.5V, ∆I
= 3.5V, ∆I
= 1mA to 3A
= 1mA to 3A
10
30
mV
mV
IN
IN
LOAD
LOAD
V
V
= 4.3V, ∆I
= 4.3V, ∆I
= 1mA to 3A
= 1mA to 3A
12
40
mV
mV
IN
IN
LOAD
LOAD
LT1764A (Note 3) V = 2.7V, ∆I
= 1mA to 3A
5
20
20
mV
mV
mV
IN
LOAD
E Grade: V = 2.7V, ∆I
MP Grade: V = 2.8V, ∆I
= 1mA to 3A
●
●
IN
LOAD
= 1mA to 3A
LOAD
IN
Dropout Voltage
I
I
= 1mA
= 1mA
0.02
0.07
0.14
0.25
0.34
0.05
0.10
V
V
LOAD
LOAD
V
= V
●
●
●
●
●
IN
OUT(NOMINAL)
(Notes 5, 6, 11)
I
I
= 100mA
= 100mA
0.13
0.18
V
V
LOAD
LOAD
I
I
= 500mA
= 500mA
0.20
0.27
V
V
LOAD
LOAD
I
I
= 1.5A
= 1.5A
0.33
0.40
V
V
LOAD
LOAD
I
I
= 3A
= 3A
0.45
0.66
V
V
LOAD
LOAD
GND Pin Current
= V
(Notes 5, 7)
I
I
I
I
I
I
= 0mA
= 1mA
= 100mA
= 500mA
= 1.5A
= 3A
●
●
●
●
●
●
1
1.5
1.6
5
18
75
mA
mA
mA
mA
mA
mA
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
V
+ 1V
OUT(NOMINAL)
1.1
3.5
11
40
120
IN
200
Output Voltage Noise
ADJ Pin Bias Current
Shutdown Threshold
C
= 10µF, I
= 3A, BW = 10Hz to 100kHz
40
3
µV
RMS
OUT
LOAD
(Notes 3, 8)
10
2
µA
V
V
= Off to On
= On to Off
●
●
0.9
0.75
V
V
OUT
OUT
0.25
55
SHDN Pin Current
(Note 9)
V
V
= 0V
= 20V
0.01
7
1
30
µA
µA
SHDN
SHDN
Quiescent Current in Shutdown
Ripple Rejection
V
= 6V, V
= 0V
0.01
63
1
µA
IN
IN
SHDN
V
– V
= 1.5V (Avg), V
= 0.5V ,
P-P
dB
OUT
RIPPLE
f
= 120Hz, I
= 1.5A
RIPPLE
LOAD
1764afb
3
LT1764A Series
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 2)
A
PARAMETER
CONDITIONS
= 7V, V
MIN
TYP
MAX
UNITS
Current Limit
V
= 0V
OUT
4
A
A
IN
E Grade: LT1764A; LT1764A-1.5;
= 2.7V, ∆V = –0.1V
●
●
●
3.1
3.1
V
IN
OUT
MP Grade: LT1764A
A
V
= 2.8V, ∆V
= –0.1V
IN
OUT
Input Reverse Leakage Current
V
= –20V, V
= 0V
1
mA
IN
OUT
Reverse Output Current (Note 10) LT1764A-1.5V
= 1.5V, V < 1.5V
600
600
600
600
300
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
OUT
OUT
OUT
OUT
IN
LT1764A-1.8V
LT1764A-2.5V
LT1764A-3.3V
= 1.8V, V < 1.8V
IN
= 2.5V, V < 2.5V
IN
= 3.3V, V < 3.3V
IN
LT1764A (Note 3) V
= 1.21V, V < 1.21V
OUT
IN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
2.42V. The external resistor divider will add a 300µA DC load on the output.
Note 6: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V – V
.
IN
DROPOUT
Note 2: The LT1764A regulators are tested and specified under pulse load
Note 7: GND pin current is tested with V = V
+ 1V or V =
IN
IN
OUT(NOMINAL)
conditions such that T ≈ T . The LT1764A (E grade) is 100% tested at
J
A
2.7V (E grade) or V = 2.8V (MP grade), whichever is greater, and a current
IN
T = 25°C; performance at –40°C and 125°C is assured by design,
A
source load. The GND pin current will decrease at higher input voltages.
Note 8: ADJ pin bias current flows into the ADJ pin.
Note 9: SHDN pin current flows into the SHDN pin.
characterization and correlation with statistical process controls. The
LT1764A (MP grade) is 100% tested and guaranteed over the –55°C to
125°C temperature range.
Note 10: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 11. For the LT1764A, LT1764A-1.5 and LT1764A-1.8 dropout voltage
will be limited by the minimum input voltage specification under some
output voltage/load conditions.
Note 3: The LT1764A (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 4. Operating conditions are limited by maximum junction temperature.
The regulated output voltage specification will not apply for all possible
combinations of input voltage and output current. When operating at max-
imum input voltage, the output current range must be limited. When operat-
ing at maximum output current, the input voltage range must be limited.
Note 5: To satisfy requirements for minimum input voltage, the LT1764A
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of
Note 12. All combinations of absolute maximum input voltage and
absolute maximum output voltage cannot be achieved. The absolute
maximum differential from input to output is ±20V. For example, with
V
= 20V, V
cannot be pulled below ground.
IN
OUT
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
600
500
400
300
200
100
0
700
600
500
400
300
200
100
0
600
= TEST POINTS
500
400
T
≤ 125°C
J
T
= 125°C
I
= 3A
J
L
300
I
= 1.5A
L
T
≤ 25°C
J
200
100
0
I
= 0.5A
T
= 25°C
L
J
I
= 100mA
L
I
= 1mA
L
2.0
3.0
50
100 125
1764 G03
0
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.5
–50 –25
0
25
75
0.5
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
TEMPERATURE (°C)
1764 G01
1764 G02
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4
LT1764A Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Quiescent Current
LT1764A-1.5 Output Voltage
LT1764A-1.8 Output Voltage
1.4
1.2
1.54
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
I
= 1mA
I
= 1mA
L
L
LT1764A-1.5/1.8/2.5/3.3
1.53
1.52
1.0
0.8
0.6
0.4
0.2
LT1764A
1.51
1.50
1.49
1.48
1.47
V
= 6V
IN
L
R
=
∞
I
= 0
L
V
SHDN
= V
IN
0
1.46
50
100 125
–25
0
50
75 100 125
–25
0
50
75 100 125
–50 –25
0
25
75
–50
25
–50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1764 G04
1764A G40
1756 G05
LT1764A-2.5 Output Voltage
LT1764A-3.3 Output Voltage
LT1764A ADJ Pin Voltage
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
I
= 1mA
I
= 1mA
I = 1mA
L
L
L
–25
0
50
75 100 125
–50
25
–25
0
50
75 100 125
–50
25
–50
–25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1756 G06
1756 G07
1756 G08
LT1764A-1.5 Quiescent Current
LT1764A-1.8 Quiescent Current
LT1764A-2.5 Quiescent Current
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
T
R
V
= 25°C
= ∞
SHDN
T
= 25°C
T
R
V
= 25°C
J
L
J
L
J
L
R
=
∞
=
∞
= V
V
= V
IN
= V
IN
SHDN
SHDN
IN
0
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G41
1764 G10
1764 G09
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5
LT1764A Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1764A-3.3 Quiescent Current
LT1764A Quiescent Current
LT1764A-1.5 GND Pin Current
40
35
30
25
20
15
10
5
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
20.0
17.5
15.0
12.5
10.0
7.5
T
= 25°C
SHDN
T
R
V
= 25°C
T
R
V
= 25°C
= 4.3k
= V
J
J
L
J
L
SHDN
V
= V
=
∞
IN
*FOR V
= 1.5V
= V
OUT
SHDN
IN
IN
R
= 3Ω
L
R
= 5Ω
L
I
= 500mA*
L
I
= 300mA*
L
5.0
R
L
= 15Ω
L
2.5
I
= 100mA*
0
0
0
1
2
3
4
5
6
7
8
9
10
0
2
4
6
8
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G11
1764 G12
1764 G42
LT1764A-1.8 GND Pin Current
LT1764A-2.5 GND Pin Current
LT1764A-3.3 GND Pin Current
20.0
17.5
15.0
12.5
10.0
7.5
40
80
70
60
50
40
30
20
10
0
T
= 25°C
SHDN
T
= 25°C
SHDN
T = 25°C
J
J
J
V
= V
V
= V
IN
V
= V
SHDN IN
IN
= 1.8V
35
30
25
20
15
10
5
*FOR V
*FOR V
= 2.5V
*FOR V
= 3.3V
OUT
OUT
OUT
R
L
= 5Ω
L
R
L
= 3.6Ω
L
R
L
= 6Ω
L
I
= 500mA*
I
I
= 500mA*
R
L
= 6.6Ω
L
I
= 300mA*
I
= 500mA*
R
L
= 11Ω
L
R
L
= 25Ω
R = 8.33Ω
L
I = 300mA*
L
L
I
= 300mA*
I
= 100mA*
R
L
= 33Ω
L
5.0
I
= 100mA*
R
= 18Ω
L
2.5
= 100mA*
L
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G15
1764 G13
1764 G14
LT1764A GND Pin Current
LT1764A-1.5 GND Pin Current
LT1764A-1.8 GND Pin Current
150
120
90
15
12
9
150
120
90
T
= 25°C
SHDN
T
= 25°C
SHDN
T
= 25°C
SHDN
J
J
J
V
= V
V
= V
V
= V
IN
= 1.5V
IN
IN
= 1.8V
*FOR V
*FOR V
= 1.21V
*FOR V
OUT
OUT
OUT
R
L
= 2.42Ω
L
R
= 0.6Ω
= 3A*
I
= 500mA*
L
L
R
= 0.5Ω
= 3A*
L
L
I
I
R
L
= 4.33Ω
L
I
= 300mA*
R = 1Ω
L
= 1.5A*
L
60
30
0
6
3
0
60
30
0
R
I
= 1.2Ω
I
R
L
= 2.14Ω
= 0.7A*
L
L
L
R
L
= 2.57Ω
R
L
= 12.1Ω
L
L
= 1.5A*
I
I
= 0.7A*
I
= 100mA*
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764A G43
1764 G16
1764 G17
1764afb
6
LT1764A Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1764A-2.5 GND Pin Current
LT1764A GND Pin Current
LT1764A-3.3 GND Pin Current
200
160
120
200
160
120
150
120
90
T = 25°C
J
T
= 25°C
SHDN
T
= 25°C
SHDN
J
J
V
= V
V
SHDN
= V
IN
V
= V
IN
IN
= 2.5V
*FOR V
= 3.3V
OUT
*FOR V
= 1.21V
*FOR V
OUT
OUT
R
= 0.4Ω
L
R
= 1.1Ω
= 3A*
I
= 3A*
L
R
= 0.83Ω
L
L
L
L
I
I
= 3A*
R
= 0.81Ω
L
L
60
30
0
80
40
0
80
40
0
I
= 1.5A*
R
L
= 1.73Ω
R
L
= 3.57Ω
L
L
R
L
= 4.71Ω
R
I
= 2.2Ω
R
I
= 1.66Ω
L
L
L
L
L
I
= 0.7A*
I
= 0.7A*
I
= 0.7A*
= 1.5A*
= 1.5A*
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1764 G20
1764 G18
1764 G19
SHDN Pin Threshold
(On-to-Off)
SHDN Pin Threshold
(Off-to-On)
GND Pin Current vs ILOAD
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
160
140
120
100
I
= 1mA
V
= V
+ 1V
OUT(NOM)
L
IN
I
= 3A
L
I
L
= 1mA
80
60
40
20
0
–50
0
25
50
75 100 125
–25
0.5
1.0
2.0
–50
0
25
TEMPERATURE (°C)
50
75 100 125
0
2.5
3.0
1.5
–25
TEMPERATURE (°C)
OUTPUT CURRENT (A)
1764 G22
1764 G21
1764 G23
SHDN Pin Input Current
SHDN Pin Input Current
ADJ Pin Bias Current
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 20V
SHDN
4
6
8
10 12 14 16 18 20
SHDN PIN VOLTAGE (V)
–50
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
0
2
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
1764 G24
1764 G25
1756 G26
1764afb
7
LT1764A Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Current Limit
Current Limit
Reverse Output Current
6
5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
6
5
4
3
V
IN
V
OUT
= 7V
LT1764A-1.5
LT1764A-1.8
LT1764A-2.5
= 0V
T
= –50°C
J
4
3
LT1764A-3.3
LT1764A
T
J
= 125°C
T
J
= 25°C
T
= 25°C
IN
J
V
= 0V
2
1
0
2
1
0
CURRENT FLOWS
INTO OUTPUT PIN
(LT1764A)
OUT
(LT1764A-1.5/1.8/-2.5/-3.3)
V
= V
OUT
ADJ
V
= V
FB
0
2
4
6
8
10 12 14 16 18 20
INPUT/OUTPUT DIFFERENTIAL (V)
50
TEMPERATURE (°C)
100 125
0
1
2
3
4
5
6
7
8
9
10
–50 –25
0
25
75
OUTPUT VOLTAGE (V)
1764 G27
1764 G29
1764 G28
Reverse Output Current
Ripple Rejection
Ripple Rejection
80
70
60
50
40
30
20
10
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
75
70
65
60
55
50
V
V
V
V
V
= 1.21V (LT1764A)
V
= 0V
I = 1.5A
L
OUT
OUT
OUT
OUT
OUT
IN
= 1.5V (LT1764A-1.5)
= 1.8V (LT1764A-1.8)
= 2.5V (LT1764A-2.5)
= 3.3V (LT1764A-3.3)
V
= V
+ 1V
IN
OUT(NOM)
+ 0.5V RIPPLE
P-P
AT f = 120Hz
C
= 100µF
OUT
LT1764A-1.5/1.8/-2.5/-3.3
TANTALUM +
10 × 1µF
CERAMIC
LT1764A
C
= 10µF
OUT
TANTALUM
I
= 1.5A
L
V
= V
+ 1V
RIPPLE
IN
OUT(NOM)
+ 50mV
100
RMS
10
1k
10k
100k
1M
–50
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–25
FREQUENCY (Hz)
TEMPERATURE (°C)
TEMPERATURE (°C)
1764 G31
1764 G30
1764 G32
Load Regulation
Output Noise Spectral Density
LT1764A Minimum Input Voltage
1
10
5
3.0
2.5
2.0
1.5
C
OUT
= 10µF
= 3A
I
LOAD
LT1764A
I
I
= 3A
L
L
0
–5
= 1.5A
LT1764A-1.5
LT1764A-1.8
LT1764A-2.5
LT1764A-3.3
LT1764A
LT1764A-2.5
0.1
–10
–15
–20
–25
–30
I
= 500mA
L
I
= 100mA
L
LT1764A-3.3
1.0
0.5
0
LT1764A-1.8
LT1764A-1.5
∆I = 1mA TO 3A
L
V
V
= 2.7V (LT1764A/LT1764A-1.5)
IN
IN
= V
+ 1V
OUT(NOM)
(LT1764A-1.8/-2.5/-3.3)
0.01
–25
0
50
75 100 125
–50
25
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
10
100
1k
10k
100k
FREQUENCY (Hz)
TEMPERATURE (°C)
1764 G35
1764 G34
1764 G33
1764afb
8
LT1764A Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
RMS Output Noise vs Load Current
(10Hz to 100kHz)
LT1764A-3.3 10Hz to 100kHz
Output Noise
40
C
= 10µF
OUT
LT1764A-3.3
35
30
25
20
15
10
5
LT1764A-2.5
V
OUT
100µV/DIV
LT1764A-1.8
LT1764A-1.5 LT1764A
C
L
= 10µF
1ms/DIV
1764A G37
OUT
= 3A
I
0
0.0001 0.001
0.01
0.1
1
10
LOAD CURRENT (A)
1764 G36
LT1764A-3.3 Transient Response
LT1764A-3.3 Transient Response
0.2
0.1
0.2
0.1
0
0
V
C
C
= 4.3V
–0.1
–0.2
–0.1
–0.2
1.00
0.75
0.50
0.25
0
IN
IN
V
C
C
= 4.3V
IN
IN
= 3.3µF TANTALUM
= 33µF
= 10µF TANTALUM
OUT
= 100µF TANTALUM
+ 10 × 1µF CERAMIC
OUT
3
2
1
0
0
2
4
6
8
10 12 14 16 18 20
0
2
4
6
8
10 12 14
16
18 20
TIME (µs)
TIME (µs)
1764 G38
1764 G39
1764afb
9
LT1764A Series
U
U
U
PI FU CTIO S DD/TO-220/TSSOP
SHDN (Pin 1/1/10): Shutdown. The SHDN pin is used to
put the LT1764A regulators into a low power shutdown
state. The output will be off when the SHDN pin is pulled
low. The SHDN pin can be driven either by 5V logic or
open-collector logic with a pull-up resistor. The pull-up
resistor is required to supply the pull-up current of the
open-collector gate, normally several microamperes, and
the SHDN pin current, typically 7µA. If unused, the SHDN
pin must be connected to VIN. The device will be in
the low power shutdown state if the SHDN pin is not
connected.
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 5/Pin 5/Pin 6): Sense. For fixed voltage
versions of the LT1764A (LT1764A-1.5/LT1764A-1.8/
LT1764A-2.5/LT1764A-3.3), the SENSE pin is the input
to the error amplifier. Optimum regulation will be ob-
tainedatthepointwheretheSENSEpinisconnectedtothe
OUT pin of the regulator. In critical applications, small
voltage drops are caused by the resistance (RP) of PC
traces between the regulator and the load. These may be
eliminated by connecting the SENSE pin to the output at
the load as shown in Figure 1 (Kelvin Sense Connection).
Note that the voltage drop across the external PC traces
willaddtothedropoutvoltageoftheregulator. TheSENSE
pin bias current is 600µA at the nominal rated output
voltage. The SENSE pin can be pulled below ground (as in
a dual supply system where the regulator load is returned
to a negative supply) and still allow the device to start
and operate.
IN (Pin 2/Pin 2/Pins 12, 13, 14): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input filter capacitor. In general, the
output impedance of a battery rises with frequency, so it
is advisable to include a bypass capacitor in battery-
poweredcircuits. Abypasscapacitorintherangeof1µFto
10µFissufficient.TheLT1764Aregulatorsaredesignedto
withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input,
which can happen if a battery is plugged in backwards, the
device will act as if there is a diode in series with its input.
There will be no reverse current flow into the regulator and
no reverse voltage will appear at the load. The device will
protect both itself and the load.
ADJ(Pin5/Pin5/Pin6):Adjust.FortheadjustableLT1764A,
this is the input to the error amplifier. This pin is internally
clamped to ±7V. It has a bias current of 3µA which flows
into the pin. The ADJ pin voltage is 1.21V referenced to
ground and the output voltage range is 1.21V to 20V.
R
P
2
4
IN
OUT
LT1764A
NC (Pins 2, 11, 15) TSSOP Only: No Connect.
+
1
5
+
GND (Pin 3/Pin 3/Pins 1, 7, 8, 9, 16, 17): Ground.
SHDN SENSE
GND
LOAD
V
IN
OUT (Pin 4/Pin 4/Pins 3, 4, 5): Output. The output
supplies power to the load. A minimum output capacitor
of 10µF is required to prevent oscillations. Larger output
capacitors will be required for applications with large
transient loads to limit peak voltage transients. See the
3
R
P
1764 F01
Figure 1. Kelvin Sense Connection
1764afb
10
LT1764A Series
W U U
APPLICATIO S I FOR ATIO
U
The LT1764A series are 3A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 3A at a dropout voltage of 340mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1764A regulators incorporate several protection fea-
tures which make them ideal for use in battery-powered
systems. The devices are protected against both reverse
input and reverse output voltages. In battery backup
applications where the output can be held up by a backup
battery when the input is pulled to ground, the LT1764A-X
actslikeithasadiodeinserieswithitsoutputandprevents
reverse current flow. Additionally, in dual supply applica-
tions where the regulator load is returned to a negative
supply, the output can be pulled below ground by as much
as 20V and still allow the device to start and operate.
IN
OUT
LT1764A
ADJ
V
OUT
+
V
IN
R2
R1
R2
R1
⎛
⎝
⎞
⎟
⎠
VOUT = 1.21V 1+
+ I
R2
(
ADJ)(
)
⎜
GND
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
1764 F02
Figure 2. Adjustable Operation
Output Capacitors and Stability
The LT1764A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to
makeitstable. FortheLT1764A, thefrequencycompensa-
tion is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor,andtheESRoftheparticularoutputcapacitorall
affect the stability.
Adjustable Operation
The adjustable version of the LT1764A has an output
voltage range of 1.21V to 20V. The output voltage is set by
theratiooftwoexternalresistorsasshowninFigure2.The
deviceservostheoutputtomaintainthevoltageatthe ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pinbiascurrent.Notethatinshutdowntheoutputisturned
off and the divider current will be zero.
Inadditiontostability, theoutputcapacitoralsoaffectsthe
high frequency transient response. The regulator loop has
a finite band width. For high frequency transient loads,
recovery from a transient is a combination of the output
capacitor and the bandwidth of the regulator. The
LT1764A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and
optimumfrequencystabilitymayrequiresomeESR,espe-
cially with ceramic capacitors.
Foreaseofuse,lowESRpolytantalumcapacitors(POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element will
sometimes achieve optimum stability and minimize ring-
ing. In all cases, a minimum of 10µF is required while the
maximum ESR allowable is 3Ω.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 3A is –3mV typical at
V
OUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV
The place where ESR is most helpful with ceramics is low
output voltage. At low output voltages, below 2.5V, some
ESR helps the stability when ceramic output capacitors
are used. Also, some ESR allows a smaller capacitor
value to be used. When small signal ringing occurs with
ceramics due to insufficient ESR, adding ESR or increas-
1764afb
11
LT1764A Series
W U U
U
APPLICATIO S I FOR ATIO
ing the capacitor value improves the stability and reduces
the ringing. Table 1 gives some recommended values of
ESR to minimize ringing caused by fast, hard current
transitions.
Capacitor types with inherently higher ESR can be com-
bined with 0mΩ ESR ceramic capacitors to achieve both
good high frequency bypassing and fast settling time.
Figure 9 illustrates the improvement in transient response
that can be seen when a parallel combination of ceramic
and POSCAP capacitors are used. The output voltage is at
the worst case value of 1.2V. Trace A, is with a 10µF
ceramic output capacitor and shows significant ringing
withapeakamplitudeof25mV. ForTraceB, a22µF/45mΩ
POSCAP is added in parallel with the 10µF ceramic. The
output is well damped and settles to within 10mV in less
than 5µs.
Table 1. Capacitor Minimum ESR
V
10µF
22µF
47µF
100µF
OUT
1.2V
1.5V
1.8V
2.5V
3.3V
≥ 5V
10mΩ
7mΩ
5mΩ
0mΩ
0mΩ
0mΩ
5mΩ
5mΩ
5mΩ
0mΩ
0mΩ
0mΩ
3mΩ
3mΩ
3mΩ
0mΩ
0mΩ
0mΩ
0mΩ
0mΩ
0mΩ
0mΩ
0mΩ
0mΩ
For Trace C, a 100µF/35mΩ POSCAP is connected in
parallel with the 10µF ceramic capacitor. In this case the
peak output deviation is less than 20mV and the output
settles in about 5µs. For improved transient response the
value of the bulk capacitor (tantalum or aluminum electro-
lytic) should be greater than twice the value of the ceramic
capacitor.
Figures3through8showtheeffectofESRonthetransient
response of the regulator. These scope photos show the
transient response for the LT1764A at three different
output voltages with various capacitors and various val-
ues of ESR. The output load conditions are the same for all
traces. In all cases there is a DC load of 1A. The load steps
up to 2A at the first transition and steps back to 1A at the
second transition.
Tantalum and Polytantalum Capacitors
There is a variety of tantalum capacitor types available,
with a wide range of ESR specifications. Older types have
ESR specifications in the hundreds of mΩ to several
Ohms. Some newer types of polytantalum with multi-
electrodes have maximum ESR specifications as low as
5mΩ.IngeneralthelowertheESRspecification,thelarger
the size and the higher the price. Polytantalum capacitors
have better surge capability than older types and generally
lower ESR. Some types such as the Sanyo TPE and TPB
series have ESR specifications in the 20mΩ to 50mΩ
range, which provide near optimum transient response.
At the worst case point of 1.2VOUT with 10µF COUT
(Figure 3), a minimum amount of ESR is required. While
5mΩ is enough to eliminate most of the ringing, a value
closer to 20mΩ provides a more optimum response. At
2.5V output with 10µF COUT (Figure 4) the output rings
at the transitions with 0Ω ESR but still settles to within
10mV in 20µs after the 1A load step. Once again a small
value of ESR will provide a more optimum response.
At 5VOUT with 10µF COUT (Figure 5) the response is well
damped with 0Ω ESR.
With a COUT of 100µF at 0Ω ESR and an output of 1.2V
(Figure 6), the output rings although the amplitude is only
10mVp-p. With COUT of 100µF it takes only 5mΩ to 20mΩ
of ESR to provide good damping at 1.2V output. Perfor-
mance at 2.5V and 5V output with 100µF COUT shows sim-
ilar characteristics to the 10µF case (see Figures 7-8). At
2.5VOUT 5mΩ to 20mΩ can improve transient response.
At 5VOUT the response is well damped with 0Ω ESR.
Aluminum Electrolytic Capacitors
Aluminumelectrolyticcapacitorscanalsobeusedwiththe
LT1764. These capacitors can also be used in conjunction
with ceramic capacitors. These tend to be the cheapest
and lowest performance type of capacitors. Care must be
used in selecting these capacitors as some types can have
ESR which can easily exceed the 3Ω maximum value.
1764afb
12
LT1764A Series
V
I
= 1.2V
= 1A WITH
1A PULSE
V
I
= 1.2V
OUT
OUT
OUT
0
5
= 1A WITH
1A PULSE
0
5
OUT
C
OUT
= 10µF CERAMIC
C
= 100µF CERAMIC
OUT
10
20
50
10
20
1764A F06
1764A F03
1764A F04
1764A F05
20µs/DIV
20µs/DIV
Figure 6
Figure 3
V
I
= 2.5V
= 1A WITH
1A PULSE
V
LOAD
= 2.5V
= 1A WITH
1A PULSE
OUT
OUT
OUT
I
0
0
5
C
OUT
= 10µF CERAMIC
C
OUT
= 100µF CERAMIC
5
10
20
10
20
50
1764A F07
20µs/DIV
20µs/DIV
Figure 4
Figure 7
V
I
= 5V
V
I
= 5V
OUT
OUT
OUT
LOAD
= 1A WITH
1A PULSE
= 10µF CERAMIC
= 1A WITH
1A PULSE
= 100µF CERAMIC
0
0
5
C
OUT
C
OUT
5
10
20
10
20
1764A F08
20µs/DIV
20µs/DIV
Figure 8
Figure 5
V
= 1.2V
= 1A WITH 1A PULSE
=
OUT
OUT
I
A
B
C
OUT
A = 10µF CERAMIC
B = 10µF CERAMIC IN PARALLEL WITH 22µF/
45mΩ POLY
C = 10µF CERAMIC IN PARALLEL WITH 100µF/
35mΩ POLY
C
1764A F09
20µs/DIV
Figure 9
1764afb
13
LT1764A Series
U
W U U
APPLICATIONS INFORMATION
Ceramic Capacitors
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem-
perature coefficients as shown in Figures 3 and 4. When
used with a 5V regulator, a 10µF Y5V capacitor can exhibit
an effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
“FREE” Resistance with PC Traces
The resistance values shown in Table 1 can easily be made
using a small section of PC trace in series with the output
capacitor. The wide range of noncritical ESR makes it easy
to use PC trace. The trace width should be sized to handle
the RMS ripple current associated with the load. The
output capacitor only sources or sinks current for a few
microsecondsduringfastoutputcurrenttransitions.There
Table 2. PC Trace Resistors
10mΩ
20mΩ
0.011 (0.28mm)
0.204
0.006
0.220
30mΩ
0.011 (0.28mm)
0.307
0.006
0.330
0.006
0.670
0.5oz C
1.0oz C
2.0oz C
Width
0.011
"
"
(0.28mm)
(2.6mm)
"
"
"
"
U
U
U
Length
0.102
(5.2mm)
(7.8mm)
Width
0.006
"
"
(0.15mm)
(2.8mm)
"
"
(0.15mm)
(5.6mm)
"
"
(0.15mm)
(8.4mm)
Length
0.110
Width
0.006
"
"
(0.15mm)
(5.7mm)
0.006
0.450
"
"
(0.15mm)
(11.4mm)
"
(0.15mm)
Length
0.224
"
(17mm)
40
20
20
0
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
X5R
X5R
0
–20
–40
–60
–80
–100
–20
–40
–60
–80
–100
Y5V
Y5V
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
0
14 16
2
4
6
8
10 12
DC BIAS VOLTAGE (V)
1764 F10
1764 F11
Figure 3. Ceramic Capacitor DC Bias Characteristics
Figure 4. Ceramic Capacitor Temperature Characteristics
1764afb
14
LT1764A Series
U
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APPLICATIONS INFORMATION
is no DC current in the output capacitor. Worst case ripple
current will occur if the output load is a high frequency
(>100kHz) square wave with a high peak value and fast
edges (< 1µs). Measured RMS value for this case is 0.5
times the peak-to-peak current change. Slower edges or
lower frequency will significantly reduce the RMS ripple
current in the capacitor.
intersection, the input power supply may need to be
cycled down to zero and brought up again to make the
output recover.
Output Voltage Noise
The LT1764A regulators have been designed to provide
low output voltage noise over the 10Hz to 100kHz band-
width while operating at full load. Output voltage noise is
typically 50nV√Hz over this frequency bandwidth for the
LT1764A (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 15µVRMS for
the LT1764A increasing to 37µVRMS for the LT1764A-3.3.
This resistor should be made using one of the inner
layers of the PC board which are well defined. The resis-
tivityisdeterminedprimarilybythesheetresistanceofthe
copper laminate with no additional plating steps. Table 2
gives some sizes for 0.75A RMS current for various
copper thicknesses. More detailed information regarding
resistors made from PC traces can be found in Application
Note 69, Appendix A.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1764A-X. Power
supply ripple rejection must also be considered; the
LT1764A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.
Overload Recovery
Like many IC power regulators, the LT1764A-X has safe
operating area protection. The safe area protection de-
creases the current limit as input-to-output voltage in-
creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
Theprotectionisdesignedtoprovidesomeoutputcurrent
at all values of input-to-output voltage up to the device
breakdown.
Thermal Considerations
The power handling capability of the device is limited
by the maximum rated junction temperature (125°C).
The power dissipated by the device is made up of two
components:
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output cur-
rents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1764A series.
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components listed above.
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com-
mon situations are immediately after the removal of a
short circuit or when the SHDN pin is pulled high after the
input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double
The LT1764A series regulators have internal thermal lim-
iting designed to protect the device during overload con-
ditions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
1764afb
15
LT1764A Series
U
W U U
APPLICATIONS INFORMATION
allsourcesofthermalresistancefromjunctiontoambient.
Additional heat sources mounted nearby must also be
considered.
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Surface mount heatsinks and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
TJMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1764A regulators incorporate several protection
featureswhichmakethemidealforuseinbattery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
The following table lists thermal resistance for several dif-
ferent board sizes and copper areas. All measurements were
taken in still air on 1/16" FR-4 board with one ounce copper.
Table 3. Q Package, 5-Lead DD
COPPER AREA
THERMAL RESISTANCE
Current limit protection and thermal overload protection
areintendedtoprotectthedeviceagainstcurrentoverload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm2
1000mm2
125mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
23°C/W
25°C/W
33°C/W
The input of the device will withstand reverse voltages
of 20V. Current flow into the device will be limited to
less than 1mA and no negative voltage will appear at the
output. The device will protect both itself and the load.
This provides protection against batteries which can be
plugged in backward.
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 2.5°C/W
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The output of the LT1764A-X can be pulled below ground
withoutdamagingthedevice.Iftheinputisleftopencircuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)
where,
)
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
So,
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. Iftheinputisleftopencircuitorgrounded, theADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
1.41W(28°C/W) = 39.5°C
1764afb
16
LT1764A Series
U
W U U
APPLICATIONS INFORMATION
will typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
fromthe1.21Vreferencewhentheoutputisforcedto20V.
The top resistor of the resistor divider must be chosen to
limitthecurrentintotheADJpintolessthan5mAwhenthe
ADJpinisat7V. The13VdifferencebetweenOUTandADJ
pinsdividedbythe5mAmaximumcurrentintotheADJpin
yields a minimum top resistor value of 2.6k.
5.0
T
J
= 25°C
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= OV
IN
LT1764A-1.5
LT1764A-1.8
CURRENT FLOWS INTO
OUTPUT PIN
V
V
LT1764A-1.8, LT1764A-2.5,
LT1764A-3.3)
= V
(LT1764A)
OUT
OUT
ADJ
= V (LT1764A-1.5
FB
LT1764A
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
LT1764A-2.5
LT1764A-3.3
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
1764 F12
WhentheINpinoftheLT1764A-XisforcedbelowtheOUT
pin or the OUT pin is pulled above the IN pin, input current
Figure 5. Reverse Output Current
U
TYPICAL APPLICATIO S
SCR Preregulator Provides Efficiency Over Line Variations
L1
500µH
LT1764A-3.3
IN OUT
SHDN FB
GND
NTE5437
V
3.3V
3A
OUT
L2
1N4148
1k
+
+
10V AC
10000µF
22µF
AT 115V
IN
IN
90V AC
TO 140V AC
34k*
10V AC
AT 115V
12.1k*
NTE5437
1N4002
1N4002
1N4002
+
V
“SYNC”
2.4k
TO
+
200k
ALL “V ”
+
1N4148
+
POINTS
C1A
1/2 LT1018
22µF
750Ω
0.1µF
–
+
V
+
V
750Ω
0.033µF
+
C1B
+
1N4148
10k
1/2 LT1018
A1
LT1006
–
10k
10k
+
V
–
L1: COILTRONICS CTX500-2-52
L2: STANCOR P-8560
*1% FILM RESISTOR
1µF
+
V
LT1004
1.2V
1764 TA03
1764afb
17
LT1764A Series
U
TYPICAL APPLICATIO S
Adjustable Current Source
R5
0.01Ω
IN
OUT
R1
LT1764A-1.8
SHDN FB
GND
+
1k
C1
10µF
LT1004-1.2
LOAD
V
> 2.7V
IN
R2
40.2k
R4
2.2k
R6
2.2k
R8
100k
R3
2k
C3
1µF
R7
470Ω
ADJUST R1 FOR 0A TO 3A
CONSTANT CURRENT
–
2
3
8
1
1/2 LT1366
+
4
C2
3.3µF
1764 TA04
U
PACKAGE DESCRIPTION
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.060
(1.524)
0.165 – 0.180
(4.191 – 4.572)
0.256
(6.502)
0.045 – 0.055
(1.143 – 1.397)
15° TYP
+0.008
0.004
–0.004
0.060
(1.524)
0.183
(4.648)
0.059
(1.499)
TYP
0.330 – 0.370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.067
(1.70)
BSC
0.050 ± 0.012
(1.270 ± 0.305)
0.300
(7.620)
0.013 – 0.023
(0.330 – 0.584)
+0.012
0.143
–0.020
0.028 – 0.038
(0.711 – 0.965)
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
3.632
Q(DD5) 1098
(
)
–0.508
1764afb
18
LT1764A Series
U
PACKAGE DESCRIPTION
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
0.147 – 0.155
0.390 – 0.415
(9.906 – 10.541)
0.165 – 0.180
(4.191 – 4.572)
0.045 – 0.055
(1.143 – 1.397)
(3.734 – 3.937)
DIA
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.620
(15.75)
TYP
0.460 – 0.500
(11.684 – 12.700)
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.78 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
SEATING PLANE
0.152 – 0.202
0.260 – 0.320 (3.861 – 5.131)
(6.60 – 8.13)
0.155 – 0.195*
(3.937 – 4.953)
0.013 – 0.023
(0.330 – 0.584)
0.135 – 0.165
(3.429 – 4.191)
0.067
BSC
0.028 – 0.038
(0.711 – 0.965)
(1.70)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 ±0.10
4.50 ±0.10
2.94
(.116)
6.40
2.94
SEE NOTE 4
(.252)
(.116)
0.45 ±0.05
1.05 ±0.10
BSC
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.05 – 0.15
0.09 – 0.20
0.50 – 0.75
0.195 – 0.30
(.0077 – .0118)
TYP
(.002 – .006)
(.0035 – .0079)
(.020 – .030)
FE16 (BB) TSSOP 0204
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1764afb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1764A Series
U
TYPICAL APPLICATIO
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
3.3V
6A
IN
OUT
FB
+
+
LT1764A-3.3
C1
100µF
C2
22µF
V
> 3.7V
IN
SHDN
GND
R2
0.01Ω
IN
OUT
R6
6.65k
LT1764A
SHDN
SHDN
ADJ
R7
4.12k
GND
R3
2.2k
R4
2.2k
3
2
8
R5
1k
+
1
1/2 LT1366
–
C3
0.01µF
4
1764 TA05
RELATED PARTS
PART NUMBER
LT1120
DESCRIPTION
125mA Low Dropout Regulator with 20µA I
COMMENTS
Includes 2.5V Reference and Comparator
Q
LT1121
150mA Micropower Low Dropout Regulator
700mA Micropower Low Dropout Regulator
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LT1129
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LT1175
500mA Negative Low Dropout Micropower Regulator
4.5A, 500kHz Step-Down Converter
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Q
LT1374
4.5A, 0.07Ω Internal Switch, SO-8 Package
LT1521
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500mV Dropout Voltage
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Synchronous Step-Down Converter
Drives External PNP
LT1575
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High Efficiency, OPTI-LOOP® Compensation
LTC1735
LT1761 Series
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LT1962
100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 20µA Quiescent Current, 20µV
Noise, ThinSOTTM Package
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RMS
RMS
RMS
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300mA, Low Noise, LDO Micropower Regulator
1.5A, Low Noise, Fast Transient Response LDO
200mA, Low Noise, Negative LDO Micropower Regulator
25µA Quiescent Current, 20µV
30µA Quiescent Current, 20µV
20µV
40µV
30µV
Noise, MSOP Package
RMS
RMS
RMS
LT1963A
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OPTI-LOOP is a registered trademark of Linear Technology Corporation. UltraFast and ThinSOT are trademarks of Linear Technology Corporation.
1764afb
LT 0706 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
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© LINEAR TECHNOLOGY CORPORATION 2002
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