LT1777C_技术文档

LT1777

Low Noise Step-Down

Switching Regulator

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FEATURES

DESCRIPTIO

TheLT^®1777isaBuck(step-down)regulatordesignedfor

noise sensitive applications. It contains a dI/dt limiting

circuit programmed via a small external inductor in the

switchingpath.Internalcircuitryalsogeneratescontrolled

dV/dt ramp rates.

■

Programmable dI/dt Limit

■

Internally Limited dV/dt

■

High Input Voltage: 48V Max

■

700mA Peak Switch Rating

■

True Current Mode Control

■

100kHz Fixed Operating Frequency

The monolithic die includes all oscillator, control and

protection circuitry. The part can accept operating input

voltages as high as 48V, and contains an output switch

rated at 700mA peak current. Current mode control offers

excellent dynamic input supply rejection and short-circuit

protection. The internal control circuitry is normally pow-

ered via the V_CCpin, thereby minimizing power drawn

directly from the V_INsupply (see Applications Informa-

tion). The fused-lead SO16 package and 100kHz switch-

ing frequency allow for minimal PC board area

■

Synchronizable to 250kHz

■

Low Supply Current in Shutdown: 30µA

■

Low Thermal Resistance 16-Pin SO Package

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APPLICATIO S

■

Automotive Cellular and GPS Receivers

■

Telecom Power Supplies

■

Industrial Instrument Power Supplies

requirements.

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATIO

Low Noise 5V Step-Down Supply

V_SWSwitching Waveforms

V

IN

24V

10

+

39µF

63V

V

IN

3

4

SHDN

LT1777

SYNC

V

CC

100pF

V_SW

VOLTAGE

10V/DIV

1µH*

220µH

V

OUT

12

14

6

V

5V

SW

5

400mA

+

V

D

C

100µF

10V

36.5k

1%

13

MBRS1100

FB

100pF 12k

2200pF

SGND

V_SW

CURRENT

200mA/DIV

7

12.1k

1%

1777 TA01

*PROGRAMS dI/dT

1777 TA02

500ns/DIV

1

LT1777

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ABSOLUTE MAXIMUM RATINGS

PACKAGE RDER I FOR ATIO

(Note 1)

Supply Voltage ....................................................... 48V

Switch Voltage (V_IN– V_SW) (Note 4) ...................... 51V

SHDN, SYNC Pin Voltage.......................................... 7V

V_CCPin Voltage ...................................................... 30V

FB Pin Voltage ........................................................ 3.0V

Operating Junction Temperature Range

LT1777C............................................... 0°C to 125°C

LT1777I ........................................... –40°C to 125°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

ORDER PART

TOP VIEW

NUMBER

GND*

NC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GND*

NC

LT1777CS

LT1777IS

SHDN

V

C

V

CC

FB

V

D

SYNC

NC

V

SW

SGND

GND*

V

IN

*FOUR CORNER PINS ARE

FUSED TO INTERNAL DIE

ATTACH PADDLE FOR HEAT

SINKING. CONNECT THESE

FOUR PINS TO EXPANDED PC

LANDS FOR PROPER HEAT

SINKING.

GND*

S PACKAGE

16-LEAD PLASTIC SO

T_JMAX= 125°C, θ_JA= 50°C/W*

Consult factory for Military grade parts.

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at T_J= 25°C.

V_IN= 24V, V_SWOpen, V_CC= 5V, V_C= 1.4V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Power Supplies

V

Minimum Input Voltage

6.7

620

2.5

7.0

7.4

V

IN(MIN)

●

I

V

Supply Current

Dropout Voltage

V = 0V

800

900

µA

VIN

IN

C

V = 0V

C

3.5

4.5

mA

VCC

CC

●

V

(Note 2)

2.8

30

3.1

V

VCC

CC

Shutdown Mode I

V

= 0V

SHDN

50

75

µA

VIN

●

Feedback Amplifier

V

Reference Voltage

1.225

1.215

1.240

1.255

1.265

V

REF

I

FB Pin Input Bias Current

600

650

1500

nA

IN

g

Feedback Amplifier Transconductance

∆I = ±10µA

400

200

1000

1500

µmho

m

C

●

I

, I

Feedback Amplifier Source or Sink Current

60

45

100

2.0

170

220

µA

SRC SNK

V

Feedback Amplifier Clamp Voltage

Reference Voltage Line Regulation

Voltage Gain

V

%/V

V/V

CL

12V ≤ V ≤ 48V

●

0.01

IN

200

600

2

LT1777

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at T_J= 25°C.

_IN= 24V, V_SWOpen, V_CC= 5V, V_C= 1.4V unless otherwise noted.

V

SYMBOL PARAMETER CONDITIONS

Output Switch

MIN

TYP

MAX

UNITS

R

Output Switch On Voltage

Switch Current Limit

I

= 0.5A

SW

1.0

0.70

1.3

1.5

1.0

V

A

ON

I

(Note 3)

●

0.55

0.6

LIM

Output dl/dt Sense Voltage

V

2.0

Current Amplifier

Control Pin Threshold

Duty Cycle = 0%

0.9

1.1

2

1.25

V

Control Voltage to Switch Transconductance

A/V

Timing

f

Switching Frequency

90

85

100

90

110

115

kHz

●

Maximum Switch Duty Cycle

85

%

Sync Function

Minimum Sync Amplitude

●

1.5

40

2.2

V

kHz

kΩ

Synchronization Range

SYNC Pin Input R

130

250

SHDN Pin Function

V

Shutdown Mode Threshold

0.5

V

SHDN

●

0.2

0.8

Upper Lockout Threshold

Lower Lockout Threshold

Shutdown Pin Current

Switching Action On

Switching Action Off

1.260

1.245

V

I

V

= 0V

= 1.25V

12

2.5

20

10

µA

SHDN

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 4: During normal operation the V pin may fly as much as 3V

below ground. However, the LT1777 may not be used in an inverting

DC/DC configuration.

SW

Note 2: Control circuitry powered from V

.

CC

Note 3: Switch current limit is DC trimmed and tested in production.

Inductor dI/dt rate will cause a somewhat higher current limit in actual

application.

3

LT1777

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TYPICAL PERFOR A CE CHARACTERISTICS

Minimum Input Voltage

vs Temperature

Switch On Voltage

vs Switch Current

7.4

7.2

7.0

6.8

6.6

6.4

6.2

6.0

1.50

1.25

1.00

0.75

0.50

0.25

0

25°C

–55°C

125°C

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

400

SWITCH CURRENT (mA)

600 700

0

100 200 300

500

1777 G01

1777 G02

Switch Current Limit

vs Duty Cycle

SHDN Pin Shutdown Threshold

vs Temperature

1000

800

600

400

200

0

900

800

700

600

500

400

300

200

T

= 25°C

A

0

10 20 30 40 50 60 70 80 90 100

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

DUTY CYCLE (%)

1777 G03

1777 G04

SHDN Pin Lockout Thresholds

vs Temperature

SHDN Pin Current vs Voltage

5

0

1.30

1.28

1.26

1.24

1.22

1.20

UPPER THRESHOLD

LOWER THRESHOLD

–5

–10

–15

–20

25°C

125°C

–55°C

0

1

2

3

4

5

–50 –25

0

25

50

TEMPERATURE (°C)

75

100 125

SHDN PIN VOLTAGE (V)

1777 G05

1777 G06

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LT1777

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TYPICAL PERFOR A CE CHARACTERISTICS

Switching Frequency

vs Temperature

Minimum Synchronization

Voltage vs Temperature

106

104

102

100

98

2.25

2.00

1.75

1.50

1.25

1.00

0.75

96

94

50

TEMPERATURE (°C)

100 125

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

–50 –25

0

25

75

1777 G07

1777 G08

Output dI/dt Sense Voltage

vs Temperature

V_CPin Switching Threshold,

Clamp Voltage vs Temperature

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

CLAMP

VOLTAGE

SWITCHING

THRESHOLD

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

50

75

100 125

–50 –25

0

25

75

TEMPERATURE (°C)

1777 G09

1777 G10

Error Amplifier Transconductance

vs Temperature

Feedback Amplifier Output

Current vs FB Pin Voltage

100

50

750

700

650

600

550

500

450

400

25°C

125°C

–55°C

0

–50

–100

–150

1.1

1.2

1.3

1.4

1.5

–50 –25

0

25

50

TEMPERATURE (°C)

75

100 125

1.0

FB PIN VOLTAGE (V)

1777 G11

1777 G12

5

LT1777

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PIN FUNCTIONS

GND (Pins 1, 8, 9, 16): These corner package pins are

mechanically connected to the die paddle and thus aid in

conducting away internally generated heat. As these are

electrically connected to the die substrate, they must be

held at ground potential. A direct connection to the local

ground plane is recommended.

removed or supplied accordingly to limit dI/dt (see Appli-

cations Information).

V

_SW(Pin 6): This is the emitter node of the output switch

and has large currents flowing through it. Keep the traces

to the switching components as short as possible to

minimize electromagnetic radiation and voltage spikes.

NC (Pins 2, 11, 15): Package Pins 2, 11 and 15 are

unconnected.

SGND (Pin 7): This is the device signal ground pin. The

internal reference and feedback amplifier are referred to it.

Keep the ground path connection to the FB divider and the

V_Ccompensation capacitor free of large ground currents.

SHDN (Pin 3): When pulled below the shutdown mode

threshold, nominally 0.5V, this pin turns off the regulator

and reduces V_INinput current to a few tens of microam-

peres (shutdown mode).

V_IN(Pin 10): This is the high voltage supply pin for the

outputswitch.Italsosuppliespowertotheinternalcontrol

circuitry during start-up conditions or if the V_CCpin is left

open. A high quality bypass capacitor which meets the

input ripple current requirements is needed here (see

Applications Information).

Whenthispinisheldabovetheshutdownmodethreshold,

but below the lockout threshold, the part will be opera-

tional with the exception that output switching action will

be inhibited (lockout mode). A user-adjustable undervolt-

age lockout can be implemented by driving this pin from

an external resistor divider to V_IN. This action is logically

“ANDed” with the internal UVLO, nominally set at 6.7V,

such that minimum V_INcan be increased above 6.7V, but

not decreased (see Applications Information).

SYNC (Pin 12): Pin to synchronize internal oscillator to

external frequency reference. It is directly logic compat-

ible and can be driven with any signal between 10% and

90% duty cycle. The sync function is internally disabled if

the FB pin voltage is low enough to cause oscillator

slowdown. If unused, this pin should be grounded.

If unused, this pin should be left open. However, the high

impedance nature of this pin renders it susceptible to

coupling from the V_SWnode, so a small capacitor to

ground, typically 100pF or so is recommended when the

pin is left open.

FB (Pin 13): This is the inverting input to the feedback

amplifier. The noninverting input of this amplifier is inter-

nally tied to the 1.24V reference. This pin also slows down

the frequency of the internal oscillator when its voltage is

abnormally low, e.g. 2/3 of normal or less. This feature

helps maintain proper short-circuit protection. Coupling

from high speed noise to this pin can cause irregular

operation. (See Switch Node Considerations section.)

V_CC: (Pin 4): Pin to power the internal control circuitry

from the switching supply output. Proper use of this pin

enhances overall power supply efficiency. During start-up

conditions, internal control circuitry is powered directly

from V_IN. If the output capacitor is located more than an

inch from the V_CCpin, a separate 0.1µF bypass capacitor

to ground may be required right at the pin.

V_C(Pin 14): This is the control voltage pin which is the

output of the feedback amplifier and the input of the

currentcomparator.Frequencycompensationoftheover-

all loop is effected by placing a capacitor (or in most cases

a series R/C combination) between this node and ground.

Coupling from high speed noise to this pin can cause

irregular operation. (See Switch Node Considerations

section.)

V_D(Pin 5): This pin is used in conjunction with a small

external sense inductor to limit power path dI/dt. The

senseinductorisplacedbetweentheV_SWoutputnodeand

the cathode of the freewheeling (power) diode, and the V_D

pin is connected to the diode. As the voltage across the

inductor reaches ±2V_BE, drive to the output transistor is

6

LT1777

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BLOCK DIAGRA

V

IN

CC

4

10

R1

R

SENSE

V

B

SHDN

3

BIAS

V

BG

–dV/dt

LIMITER

I

COMP

SWDR

SWON

Q2

SYNC

12

OSC

LOGIC

Q1

SGND

7

V

SW

6

5

V

C

I

1

14

I

FEEDBACK

AMP

FB

13

V

D

±dI/dt

LIMITER

g

m

I

2

I

V

BG

1777 BD

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OUTPUT STAGE SI PLIFIED SCHE ATIC

V

IN

C1

Q2

Q3

R1

Q4

R2

Q6

Q1

L

V

SENSE

SW

L

MAIN

SWITCH ON

SIGNAL

I

V

1

I

OUT

+

R3

Q5

R4

V

D

NOTE: R3 = R4

1777 SS

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LT1777

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OPERATIO

The LT1777 is a current mode step-down switcher regu-

lator IC designed for low noise operation. The Block

Diagram shows an overall view of the system. The indi-

vidual blocks are straightforward and similar to those

foundintraditionaldesigns,including:InternalBiasRegu-

lator, Oscillator, Logic, and Feedback Amplifier. The novel

portion includes a specialized Output Switch section in-

cludingcircuitstolimitthedI/dtanddV/dtswitchingrates.

coupled with small-valued capacitor C1 to the V_INsupply

rail. The product of negative voltage slew rate times this

capacitor value equals current, and when this current

throughemitter/baseresistorR1exceedsadiodedrop,Q3

and then Q4 turn on supplying base drive to output device

Q1 to limit –dV/dt rate.

In addition to voltage rates, the current slew rate also

needs to be controlled for reduced noise behavior. This is

provided by the section in the Block Diagram labeled

“±dI/dt Limiter.” The details of this circuit can be seen in

the Output Stage Simplified Schematic. Note that an extra,

small-valued inductor, termed the “sense inductor” has

been added to the classic buck topology. As this inductor

is external to the LT1777, its value can be chosen by the

user allowing for optimization on a per application basis.

Operation of the current slew limiter is as follows: The

product of the sense inductor times the dI/dt through it

generates a voltage according to the well known formula

V = (L)(dI/dt). The remainder of the circuit is configured

such that when the voltage across the sense inductor

reaches ±2V_BE, drive current will be supplied or removed

as necessary to limit current slew rate. The actual sensing

is performed between the output node labeled V_SWand a

new node labeled V_D.

TheLT1777operatesmuchthesameastraditionalcurrent

mode switchers, the major difference being its specialized

output switch section. Due to space constraints, this

discussion will not reiterate the basics of current mode

switcher/controllers and the “buck” topology. A good

source of information on these topics is Application Note

AN19.

A straightforward output stage is provided by current

source I₁driving the base of PNP transistor Q2. The

collectorofQ2inturndrivesthebaseofNPNoutputdevice

Q1. The considerable base/collector capacitance of PNP

Q2actstolimitdV/dtrateduringswitchturn-on. However,

when the switch is to be turned off, the only natural limit

to voltage slew rate would be the collector/base capaci-

tance of Q1 providing drive for the same device. While

dependent upon output load level and Q1’s β, the turn-off

voltage slew rate would be typically much faster than the

turn-on rate. To limit the voltage slew rate on switch turn-

off, an extra function is supplied. This is denoted by the

block labeled “–dV/dt Limiter.”

In the case of switch turn-on, current drive is provided by

PNP Q2. If the voltage at V_SWreaches 2V_BEabove that at

V_D, transistor Q5 turns on and removes a portion of Q2’s

drive from Q1’s base. Similarly for turn-off, as the V_SW

node goes 2V_BEbelow V_D, transistor Q6 then turns on to

drive Q1’s base as needed. The net effect is that of limiting

the switch node dI/dt in both directions at a rate inversely

proportional to the external sense inductor value.

The details of the –dV/dt Limiter can be seen in the Output

Stage Simplified Schematic. Transistors Q3 and Q4 are

connected in a Darlington configuration whose input is

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LT1777

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APPLICATIONS INFORMATION

external sense inductor to set a maximum allowed dI/dt

rate. Thisattenuatesthehighestfrequencycomponentsof

generated B field RFI. Minimal lead length in the path is

also essential to minimize generated RFI.

Basics of Low Noise Operation

Switching power supply circuits are often preferred over

linear topologies for their improved efficiency (P_OUT/ P_IN).

However, their typically rapid voltage and current slew

rates often cause “radio frequency” interference prob-

lems, commonly referred to as “RFI”. The LT1777 is

designed to provide a less aggressive voltage slew rate

and a user-programmable current slew rate to eliminate

the highest frequency harmonics of RFI emissions. These

highest frequency components are typically the most

troublesome. Optimum behavior is obtained by a combi-

nation of proper circuit design, which includes passive

component selection, and proper printed circuit board

layout technique.

A second potential source of magnetic RFI is the main

(power) inductor. Fortunately, the natural triangular be-

havior of the current waveform in the main inductor tends

to generate magnetic field energy concentrated in the

fundamentalandlowerharmonics. Nevertheless, therela-

tively intense magnetic field present in the main inductor

cancausecouplingproblems,especiallyifthemaininduc-

tor is of an open construction type. So called rod or barrel

inductors may be the physically smallest and most effec-

tive types, but their magnetic field extends far beyond the

device itself. Closed type inductors, toroids for example,

contain the magnetic field nearly completely. These are

generally preferred for low noise behavior.

There are two types of RFI emissions, i.e., conducted and

radiated. Conducted interference travels directly through

“wires”,asopposedtoradiatedinterference,whichtravels

through the air. Conducted RFI can be created by a

switching power supply at its input voltage supply node,

itsoutputnode(s)orboth.Itistypicallycausedbypulsatile

current flow through the residual high frequency imped-

ance (ESR) of bypass capacitors.

The sense inductor sees a much more rapid current slew

rate than does the main inductor. However the sense

inductor is physically smaller and of much lower induc-

tance than the main inductor. These factors tend to reduce

its propensity to generate magnetic interference prob-

lems. Nevertheless, more sensitive applications can opt

for a closed type magnetic construction on the sense

inductor.

Radiated interference can be of two types: electric (E field)

ormagnetic(Bfield).Efieldinterferenceiscausedbystray

capacitance coupling of the node(s) which swing rapidly

over a large voltage excursion. In the LT1777, this in-

cludes the V_SWand V_Dnodes. E field radiation is kept low

by minimizing the length and area of all traces connected

to these nodes. A ground plane should always be used

under the switcher circuitry to prevent interplane cou-

pling. Although these nodes swing over a voltage range

roughly equal to the input voltage, the limited dV/dt rate of

the LT1777 reduces the highest frequency components of

the generated E field RFI.

LT1777

+

L

SENSE

L

V

IN

MAIN

C1

V

OUT

+

D1

C2

1777 F01

Figure 1. High Speed Current Switching Paths

B field RFI is simply coupling of high frequency magnetic

fieldsgeneratedbytheoffendingcircuitry. Highfrequency

magnetic fields are created by relatively rapidly changing

currents, and the high speed current switching path in the

LT1777 is shown schematically in Figure 1. This includes

the input capacitor, output switch, sense inductor and

output diode. Normal switching supply operation requires

a rapid switching of current back and forth between the

output switch and output diode. The LT1777 uses the

Selecting Sense Inductor

The LT1777 uses an external sense inductor to set a

theoretical limit for current ramp rate according to the

formula:

2V_BE

L_SENSE

Max dI/dt =

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LT1777

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APPLICATIONS INFORMATION

Deciding upon a value for the sense inductor involves

Asanexample,amaximuminputvoltageof36V,anoutput

voltage of 5V and a main inductor value of 220µH yields a

maximum suggested sense inductor value of 3.5µH.

evaluating the trade-off between overall efficiency (P_OUT

/

P_IN) and switch current slew rate. Larger sense inductors

yield lower current slew rates which offer reduced high

frequency RFI emissions, but at the expense of poorer

efficiency.

Circuit behavior versus sense inductor value is shown in

the oscilloscope photos in Figure 2. The circuit and oper-

ating conditions are similar to the Typical Application on

the first page of this data sheet with the exception that the

sense inductor is allowed to assume the series of values:

0µH, 0.47µH, 1µH and 2.2µH. Figure 2a shows a close-up

of the leading edge (turn-on) of the current waveform.

Values of 0µH and 0.47µH are found to yield a dI/dt of

about 2.2A/µs, while 1µH yields 1.4A/µs and 2.2µH yields

0.6A/µs. Figure2bshowsthetrailingedge(turn-off)ofthe

The question is “What is the allowed range of values for a

sense inductor in a given application?” There is really no

minimum limit to the sense inductor, i.e., its value is

allowed to be zero. (In other words, the physical sense

inductor ceases to exist and is replaced by a short circuit.)

This will yield the highest efficiency possible in a given

situation. Although an explicit current slew rate no longer

exists, the naturally less aggressive nature of the LT1777

will often yield quieter supply operation than other stan-

dard switching regulators.

As far as the maximum allowable value for the sense

inductor, this is dictated by the current ramp rate in the

main inductor during the conventional part of the switch-

ing cycle. It is generally overconservative to limit the

switch current slew rate to that exhibited by the main

inductor. This would potentially yield a triangular current

waveform. Efficiency would be greatly reduced at little

further gain in noise performance. Stated mathematically,

maximum slew rate in the main inductor occurs at maxi-

mum input voltage as:

1777 F02a

200ns/DIV

(a) Leading Edge

Max V_IN– V_OUT

L_MAIN

dI

dt

=

The sense inductor experiences 2V_BEof applied voltage.

Thisisperhaps1.0Vatamaximumhotcondition.Ifweuse

an additional factor of two to be conservative, this yields

a maximum sense inductor value as follows:

Max V_IN– V_OUT

L_MAIN

0.5V

L_SENSE

1777 F02b

200ns/DIV

=

or,

(b) Trailing Edge

0.5V

Max V_IN– V_OUT

Max L_SENSE= L_MAIN

Figure 2. V_SWNode Current Behavior vs L_SENSEValue.

L_SENSE= 0µH, 0.47µH, 1.0µH and 2.2µH

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LT1777

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APPLICATIONS INFORMATION

current waveform. The four sense inductor values of 0µH,

0.47µH, 1µH and 2.2µH yield dI/dt rates of roughly

4.5A/µs, 2.2A/µs, 1.4A/µs and 0.6A/µs, respectively.

Harmonic Behavior

TheLT1676isahighefficiency“cousin”totheLT1777. An

additional set of oscilloscope photographs in Figure 3

show the leading edge and trailing edge of the current

waveform when this part is substituted for the LT1777.

(No sense inductor is used with the LT1676.) The leading

and trailing edges of the LT1676 current waveform are

much faster than that of the LT1777, even when the

LT1777 uses a sense inductor of 0µH. The 10% to 90%

rise time/fall time is on the order of 10ns to 20ns, too fast

to measure accurately at the horizontal sweep rate of

200ns/DIV.

Thesephotosshowthatthereisaminimumeffectivevalue

for sense inductance, which is 0.47µH for a typical part at

room temperature as shown. This value inductor has a

small effect on the trailing edge rate, but essentially no

effect on the rising edge. Minimum effective sense induc-

tance value means that inductors much smaller than this

valuewillhavesubstantiallythesameperformanceaszero

inductance, such that these inductors serve no useful

purpose.

In summary,

While this time-based analysis demonstrates that the

current waveform of the LT1777 is quieter than standard

high efficiency buck converters, some users may prefer to

see a direct comparison on a frequency domain basis.

Figures 4a, 4b, and 4c show a spectral analysis of the

currentwaveforms.Thehorizontalaxisis2MHz/DIV(0MHz

to 20MHz), and the vertical axis is 10dB/DIV. All photos

were taken with V_IN= 24V and V_OUT= 5V at 400mA. Figure

4a is of the LT1676 and is for comparison purposes.

Figures 4b and 4c are of the LT1777 with a sense inductor

of 0µH and 2.2µH, respectively. A decrease in high fre-

quency energy is seen when going from the LT1676 to the

LT1777 with no sense inductor, and a further improve-

mentwitha2.2µHsenseinductor. Forexample, at10MHz,

the LT1777 shows an improvement of about –10dB with

0µH and perhaps –25dB with 2.2µH.

1. The LT1777 uses an external sense inductor to set a

theoretical limit for current ramp rate according to the

formula:

2V_BE

L_SENSE

Max dI/dt =

2. Allowable range for the sense inductor runs from a

minimum of 0 to a maximum of:

0.5V

Max V_IN– V_OUT

Max L_SENSE= L_MAIN

3. Theminimumeffectiveinductorsizeistypically0.47µH.

1777 F03a

1777 F03b

200ns/DIV

(a) Leading Edge

(b) Trailing Edge

Figure 3. LT1676 Current Behavior for Comparison Purposes Only

11

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APPLICATIONS INFORMATION

voltage of 12V, and then 36V. Once again the circuit is the

Typical Application shown on the first page of this data

sheet, with an output load of 400mA.

Figure 5a, with V_INof 12V, shows a relatively rectangular

voltagewaveform.Thelimitedvoltageslewratestillallows

for nearly vertical switching edges, so little power is

wasted. A positive-going step before the leading edge and

a negative-going step after the trailing edge can be seen.

Theseareevidenceoftheinternalcurrentlimitingcircuitry

at work.

1777 F04a

0MHz to 20MHz (2MHz/DIV)

(a) LT1676 for Comparison

Figure 5b, with V_INof 36V, shows a substantially

nonrectangular waveform. The limited voltage slew rate is

clearly evident as transitions take a few hundred nanosec-

onds. Efficiency (P_OUT/P_IN) is reduced as a result of the

slower transitions. For comparison purposes, the oscillo-

scopephotoinFigure6showstheperformanceofthehigh

efficiency LT1676. Voltage transitions are well under

100ns and the waveform appears quite rectangular.

1777 F04b

0MHz to 20MHz (2MHz/DIV)

(b) LT1777 with L_SENSE= 0µH

GND

1777 F05a

1µs/DIV

(a) V_IN= 12V

1777 F04c

0MHz to 20MHz (2MHz/DIV)

(c) LT1777 with L_SENSE= 2.2µH

Figure 4. Spectral Analysis of Current Waveforms in

Figures 2 and 3. (V_IN= 24V, V_OUT= 5V, I_OUT= 400mA)

Voltage Waveform Behavior

Unlike current behavior, voltage slew rate of the LT1777 is

not adjustable by the user. No component selection or

other action is required. Nevertheless, it is instructive to

examine typical behavior. The oscilloscope photos in

Figure 5 show the V_SWvoltage waveform with an input

GND

1777 F05b

500ns/DIV

(b) V_IN= 36V

Figure 5. V_SWNode Voltage Behavior

12

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APPLICATIONS INFORMATION

through the main inductor has most of its energy concen-

trated in the fundamental and lower harmonics.) Toroidal

style inductors, many available in surface mount configu-

ration, offer a reduced external magnetic field, generally at

an increase in cost and physical size. Although custom

design is always a possibility, most potential LT1777 ap-

plicationscanbehandledbythearrayofstandard, off-the-

shelf inductor products offered by the major suppliers.

GND

1777 F06

Selecting Bypass Capacitors

500ns/DIV

Figure 6. LT1676 V_SWNode Voltage Behavior

for Comparison Purposes Only, V_IN= 36V

The basic topology as shown in the Typical Application on

the first page uses two bypass capacitors, one for the V_IN

input supply and one for the V_OUToutput supply.

Selecting Main Inductor

User selection of an appropriate output capacitor is rela-

tivelyeasy,asthiscapacitorseesonlytheACripplecurrent

in the inductor L1. As the LT1777 is designed for buck or

step-down applications, output voltage will nearly always

be compatible with tantalum type capacitors, which are

generally available in ratings up to 35V or so. These

tantalumtypesoffergoodvolumetricefficiency, andmany

areavailablewithspecifiedESRperformance.Theproduct

ofinductorACripplecurrentandoutputcapacitorESRwill

manifestitselfaspeak-to-peakvoltagerippleontheoutput

node. (Note: If this ripple becomes too large, heavier

control loop compensation, at least at the switching fre-

quency, may be required on the V_Cpin.)

There are several parameters to consider when selecting

a main inductor. These include inductance value, peak

current rating (to avoid core saturation), DC resistance,

construction type, physical size, and of course, cost.

Once the inductance value is decided, inductor peak

current rating and resistance need to be considered. Here,

the inductor peak current rating refers to the onset of

saturation in the core material, although manufacturers

sometimes specify a “peak current rating” which is de-

rived from a worst-case combination of core saturation

andself-heatingeffects.Inductorwindingresistancealone

limits the inductor’s current carrying capability as the I²R

power threatens to overheat the inductor. Remember to

include the condition of output short circuit, if applicable.

Although the peak current rating of the inductor can be

exceeded in short-circuit operation, as core saturation per

se is not destructive to the core, excess resistive self-

heating is still a potential problem.

The input bypass capacitor can present a more difficult

choice. In a typical application e.g., 24V_INto 5V_OUT

,

relatively heavy V_INcurrent is drawn by the power switch

for only a small portion of the oscillator period (low ON

duty cycle). The resulting RMS ripple current, for which

the capacitor must be rated, can be several times the DC

average V_INcurrent. The straightforward choice for a low

volume, surface mountable electrolytic capacitor with

good ESR/ripple current ratings is a tantalum type. How-

ever, worst-case (high) input voltage coupled with stan-

dard capacitor voltage derating may exceed the 35V or so

for which tantalum capacitors are generally available.

Relatively bulky “high frequency” aluminum electrolytic

types, specifically constructed and rated for switching

supply applications, may then be the only choice.

The final inductor selection is generally based on cost,

which usually translates into choosing the smallest physi-

cal size part which meets the desired inductance value,

resistance and current carrying capability. An additional

factor to consider is that of physical construction. Briefly

stated, “open” inductors built on a rod- or barrel-shaped

core generally offer the smallest physical size and lowest

cost. However their open construction does not contain

the resulting magnetic field, and they may not be accept-

able in RFI-sensitive applications. (A mitigating factor is

that, as mentioned previously, the AC current passing

Additionally, it may be advantageous to parallel the input

and output capacitors with 0.1µF ceramic bypass capaci-

13

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APPLICATIONS INFORMATION

tors. Their relatively low ESR in the mid-MHz region can

The solution to this dilemma is to slow down the oscillator

when the FB pin voltage is abnormally low thereby indicat-

ing some sort of short-circuit condition. Figure 7 shows

the typical response of oscillator frequency vs FB pin

voltage. Oscillator frequency is normal until FB voltage

dropstoabouthalfofitsnormalvalue. Belowthispointthe

oscillator frequency decreases linearly down to a limit of

about25kHz.Thisloweroscillatorfrequencyduringshort-

circuit conditions can then maintain control with the

effective minimum on time.

further attenuate high speed glitches.

Maximum Load/Short-Circuit Considerations

The LT1777 is a current mode controller. It uses the V_C

node voltage as an input to a current comparator, which

turns off the output switch on a cycle-by-cycle basis as

this peak current is reached. The internal clamp on the V_C

node, nominally 2.0V, then acts as an output switch peak

current limit. This action becomes the switch current limit

specification. The maximum available output power is

then determined by the switch current limit.

A further potential problem with short-circuit operation

might occur if the user were operating the part with its

oscillator slaved to an external frequency source via the

SYNC pin. However, the LT1777 has circuitry to automati-

cally disable the sync function when the oscillator is

slowed down due to abnormally low FB voltage.

A potential controllability problem could occur under

short-circuit conditions. If the power supply output is

short circuited, the feedback amplifier responds to the low

output voltage by raising the control voltage, V_C, to its

peak current limit value. Ideally, the output switch would

be turned on, and then turned off as its current exceeded

thevalueindicatedbyV_C.However,thereisfiniteresponse

time involved in both the current comparator and turn-off

of the output switch. These result in a minimum on time

t_ON(MIN). When combined with the large ratio of V_INto

(V_F+ I • R), the diode forward voltage plus inductor I • R

voltage drop, the potential exists for a loss of control.

Expressed mathematically the requirement to maintain

control is:

120

100

R

= 22k

TH

80

60

R

= 10k

R

= 4.7k

TH

40

20

0

LT1777

FB

R

TH

0

0.25

0.50

0.75

1.00

1.25

V_F+I•R

FB DIVIDER THEVENIN VOLTAGE (V)

f t

( )(

≤

)

ON

V_IN

1777 F07

Figure 7. Oscillator Frequency vs FB Divider

Thevenin Voltage and Impedance

where:

f = switching frequency

t_ON= switch on time

Feedback Divider Considerations

V_F= diode forward voltage

V_IN= Input voltage

AnLT1777applicationtypicallyincludesaresistivedivider

betweenV_OUTandground, thecenternodeofwhichdrives

the FB pin to the reference voltage V_REF. This establishes

a fixed ratio between the two resistors, but a second

degree of freedom is offered by the overall impedance

level of the resistor pair. The most obvious effect this has

is one of efficiency—a higher resistance feedback divider

will waste less power and offer somewhat higher effi-

ciency, especially at light load.

I • R = inductor I • R voltage drop

If this condition is not observed, the current will not be

limited at I_PK, but will cycle-by-cycle ratchet up to some

higher value. Using the nominal LT1777 clock frequency

of 100kHz, a V_INof 48V and a (V_F+ I • R) of say, 0.7V, the

maximum t_ONto maintain control would be approximately

140ns, an unacceptably short time.

14

LT1777

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APPLICATIONS INFORMATION

However, remember that oscillator slowdown to achieve

short-circuit protection (discussed above) is dependent

on FB pin behavior, and this in turn, is sensitive to FB node

external impedance. The graph in Figure 7 shows the

typical relationship between FB pin voltage, driving im-

pedance and oscillator frequency. This shows that as

feedbacknetworkimpedanceincreasesbeyond10k,com-

plete oscillator slowdown is not achieved, and short-

circuitprotectionmaybecompromised. Andasapractical

matter, the product of FB pin bias current and larger FB

network impedances will cause increasing output voltage

error. (Nominal cancellation for 10k of FB Thevenin im-

pedance is included internally.)

suggested. Operate the proposed power supply over the

applicable input voltage and load current ranges. Measure

the input power and output power, and calculate the

difference as “lost power.” This measured lost power

minus estimated inductor and diode dissipation yields a

figure for internal LT1777 dissipation. Fortunately, as

LT1777 internal dissipation dominates total lost power,

inductor and diode power need not be estimated very

accurately.InductorpowermaybeestimatedasI²Rwhere

I is the load current and R is the DC resistance of the

inductor. (Loss in the sense inductor is usually so small

that only the main inductor must be considered.) Diode

power may be estimated as 1/2 • V_F• I • DC, where V_Fis the

diode forward voltage, I is the load current and DC is the

duty cycle percentage when the diode is conducting.

Thermal Considerations

Care should be taken to ensure that the worst-case input

voltage and load current conditions do not cause exces-

sive die temperatures. The SO16 package is rated at

50°C/W when the four corner package pins are connected

to a good ground plane. (These corner pins are internally

fused to the die paddle for improved thermal perfor-

mance.) Die junction temperature is then a function of

ambient temperature and internal dissipation as follows:

Frequency Compensation

Loop frequency compensation is performed by connect-

ing a capacitor, or in most cases a series R/C, from the

output of the error amplifier (V_Cpin) to ground. Proper

loop compensation may be obtained by empirical meth-

ods as described in detail in Application Note AN19.

Briefly, this involves applying a load transient and observ-

ing the dynamic response over the expected range of V_IN

and I_LOADvalues.

T_J= T_A+ θ_JA• P_INT

Total internally dissipated power is composed of three

parts, quiescent power, DC switch loss and AC switch

loss. The AC switch loss will often dominate the total

dissipation, and this is unfortunately difficult to estimate

accurately.

As a practical matter, a second small capacitor, directly

from the V_Cpin to ground is generally recommended to

attenuate capacitive coupling from the V_SWand V_Dpins. A

typical value for this capacitor is 100pF. (See Switch Node

Considerations).

Two options are suggested to the potential user. The first

is to observe the graphical data presented in the Typical

Applications section. Internal LT1777 dissipation vs load

current is given for output voltages of 5V and 3.3V, with

input voltages of 12V, 24V and 36V, and with sense

inductors of 0µH, 1µH, and 2.2µH (Figures 9 and 11).

While it is true that the user’s ultimate circuit may use

somewhat different passive components than the ex-

amples given, it turns out that internal IC dissipation is not

very sensitive to these changes.

Switch Node Considerations

InspiteofthefactthattheLT1777isalownoiseconverter,

it is still possible for the part to cause problems by

“coupling to itself.” Specifically, this can occur if the V_SW

pin is allowed to capacitively couple in an uncontrolled

manner to the part’s high impedance nodes, i.e., SHDN,

SYNC, V_Cand FB. This can cause erratic operation such as

odd/even cycle behavior, pulse width “nervousness”, im-

proper output voltage and/or premature current limit

action.

In cases where the user’s potential circuit differs signifi-

cantly from the examples given, an empirical method is

15

LT1777

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APPLICATIONS INFORMATION

As an example, assume that the capacitance between the

V_SWnodeandahighimpedancepinnodeis0.1pF,andthat

the high impedance node in question exhibits a capaci-

tance of 1pF to ground. Also assume a “typical” 36V_INto

5V_OUTapplication. Due to the large voltage excursion at

the V_SWnode, this will couple a 3.5V(!) transient to the

high impedance pin, causing abnormal operation. An

explicit 100pF capacitor added to the node will reduce the

amplitude of the disturbance to more like 35mV (although

settling time will increase).

Specific pin recommendations are as follows:

SHDN: If unused, add a 100pF capacitor to ground.

SYNC: Ground if unused.

V_C: Add a capacitor directly to ground in addition to the

explicit compensation network. A value of one-tenth of

the main compensation capacitor is recommended, up

to a maximum of 100pF.

FB: Assuming the V_Cpin is handled properly, this pin

usually requires no explicit capacitor of its own, but

keep this node physically small to minimize stray

capacitance.

16

LT1777

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TYPICAL APPLICATIONS

Basic 5V Output Application

output current should not present a problem, though.) As

shown, the SHDN and SYNC pins are unused, however

either(orboth)canbeoptionallydrivenbyexternalsignals

as desired.

Figure 8 shows a basic application that produces 5V at up

to 500mA I_OUT. Efficiency and Internal Power Dissipation

graphs are shown in Figure 9 for input voltages of 12V,

24V and 36V, and for sense inductor values of 0µH, 1µH

and 2.2µH. Be aware that continuous operation at the

combination of high input voltage, large sense inductor

and high output current may not be possible due to

thermal constraints. (Brief transients in input voltage or

Thedataasshownwereperformedusinganoff-the-shelf

Coilcraft DO3316-224 as the main inductor. This is a

cost-effective inductor using an open style of construc-

tion. For a toroidal style inductor, the Coiltronics

CTX250-4 or similar may be substituted.

V

IN

10

10V TO 40V

+

C1

39µF

63V

C6

0.1µF

V

IN

3

4

L1

SHDN

LT1777

SYNC

V

CC

0µH TO 2.2µH

C5

100pF

L2

(SEE BELOW)

220µH

12

14

6

V

OUT

V

SW

5V

5

+

C2

100µF

10V

R1

36.5k

1%

V

D

C

C7

0.1µF

13

D1

C4

100pF

R3

12k

C3

2200pF

FB

SGND

R2

12.1k

1%

7

C1: PANASONIC HFQ ELECTROLYTIC

C2: AVX D CASE TPSD107M010R0080

C3, C4, C5: NPO OR X7R

L1: SENSE INDUCTOR CAN VARY FROM 0µH TO 2.2µH

AS PER APPLICATION. GRAPHICAL DATA TAKEN WITH:

1µH = D01608C-102, COILCRAFT OR SIMILAR

1777 F08

C6, C7: Z5U

2.2µH = D01608C-222, COILCRAFT OR SIMILAR (SEE TEXT)

D1: MOTOROLA 100V, 1A SMD SCHOTTKY

MBRS1100

L2: COILCRAFT D03316-224 OR SIMILAR (SEE TEXT)

Figure 8. Basic 5V Output Application

17

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TYPICAL APPLICATIONS

Efficiency

Internal Dissipation

90

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

L

=

V

T

= 12V

= 5V

SENSE

0µH

V

T

= 12V

OUT

= 25°C

IN

= 5V

OUT

80

70

60

50

40

30

20

= 25°C

A

1µH

2.2µH

L

=

SENSE

2.2µH

V_IN= 12V

1µH

0µH

1

10

100

1000

10

1000

100

(mA)

I

(mA)

OUT

LOAD

1777 F09a

1777 F09b

90

80

70

60

50

40

30

20

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

L

=

V

= 24V

OUT

= 25°C

V

A

= 24V

OUT

= 25°C

SENSE

IN

L

=

SENSE

0µH

2.2µH

V

= 5V

T

A

T

1µH

0µH

2.2µH

V_IN= 24V

1

10

100

1000

10

1000

100

(mA)

I

(mA)

OUT

LOAD

1777 F09c

1777 F09d

90

80

70

60

50

40

30

20

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

L

=

V

= 36V

OUT

= 25°C

V

= 36V

IN

OUT

SENSE

IN

2.2µH

V

= 5V

V

= 5V

L

=

SENSE

0µH

T

A

T = 25°C

A

1µH

0µH

1µH

V_IN= 36V

2.2µH

1

10

100

1000

10

1000

100

I

(mA)

I

(mA)

OUT

LOAD

1777 F09e

1777 F09f

Figure 9. Efficiency and LT1777 Internal Dissipation for the Basic 5V Output Application

18

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TYPICAL APPLICATIONS

Basic 3.3V Output Application

dissipation is largely determined by input voltage, load

current and sense inductor, and is only a weak function of

output voltage.

Figure 10 shows a circuit similar to the previous example,

but modified for a 3.3V output. Once again, Efficiency and

Internal Power Dissipation graphs are shown in Figure 11

for input voltages of 12V, 24V and 36V, and for sense

inductor values of 0µH, 1µH and 2.2µH. It is interesting to

note that internal LT1777 dissipation is very close to the

5V example. This confirms the fact that internal LT1777

The data as shown were performed using an off-the-shelf

Coilcraft DO3316-154 as the main inductor. This is a cost-

effective inductor using an open style of construction. For

a toroidal style inductor, the Coiltronics CTX150-4 or

similar may be substituted.

V

IN

10

10V TO 40V

+

C1

39µF

63V

C6

0.1µF

V

IN

3

4

L1

SHDN

LT1777

SYNC

V

CC

0µH TO 2.2µH

C5

100pF

L2

(SEE BELOW)

150µH

12

14

6

V

OUT

V

SW

3.3V

5

+

C2

100µF

10V

R1

20k

1%

V

C

V

D

C7

0.1µF

13

D1

C4

100pF

R3

12k

C3

2200pF

FB

SGND

R2

12.1k

1%

7

C1: PANASONIC HFQ ELECTROLYTIC

C2: AVX D CASE TPSD107M010R0080

C3, C4, C5: NPO OR X7R

L1: SENSE INDUCTOR CAN VARY FROM 0µH TO 2.2µH

AS PER APPLICATION. GRAPHICAL DATA TAKEN WITH:

1µH = D01608C-102, COILCRAFT OR SIMILAR

1777 F10

C6, C7: Z5U

2.2µH = D01608C-222, COILCRAFT OR SIMILAR (SEE TEXT)

D1: MOTOROLA 100V, 1A SMD SCHOTTKY

MBRS1100

L2: COILCRAFT D03316-154 OR SIMILAR (SEE TEXT)

Figure 10. Basic 3.3V Output Application

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TYPICAL APPLICATIONS

Efficiency

Internal Dissipation

90

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

V

T

= 12V

= 3.3V

= 25°C

V

T

= 12V

= 3.3V

= 25°C

IN

OUT

A

IN

OUT

A

L

=

SENSE

0µH

80

70

60

50

40

30

20

1µH

2.2µH

L

=

SENSE

2.2µH

V_IN= 12V

1µH

0µH

1

10

100

1000

10

1000

100

(mA)

I

(mA)

I

LOAD

OUT

1777 F11a

1777 F11b

90

80

70

60

50

40

30

20

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

L

=

V

T

= 24V

OUT

= 25°C

V

= 24V

OUT

SENSE

IN

2.2µH

= 3.3V

V

= 3.3V

L

=

SENSE

0µH

T = 25°C

A

1µH

0µH

1µH

V_IN= 24V

2.2µH

1

10

100

1000

10

1000

100

(mA)

I

(mA)

I

LOAD

OUT

1777 F11c

1777 F11d

90

80

70

60

50

40

30

20

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

L

=

V

= 36V

OUT

= 25°C

V

T

= 36V

OUT

= 25°C

SENSE

IN

2.2µH

V

T

= 3.3V

A

1µH

0µH

L

=

SENSE

0µH

V_IN= 36V

1µH

2.2µH

1

10

100

1000

10

1000

100

(mA)

I

(mA)

I

LOAD

OUT

1777 F11e

1777 F11f

Figure 11. Efficiency and LT1777 Internal Dissipation for the Basic 3.3V Output Application

20

LT1777

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TYPICAL APPLICATIONS

Optional Input/Output Filtering

output voltage at 50mV/DIV, and the lower waveform is a

DC-coupled representation of current into the node at

50mA/DIV. Input voltage ripple is seen to decrease from

100mV_P-Ptoperhaps10mV_P-P.Ripplecurrentisalsoseen

to decrease dramatically. (This improvement in AC ripple

current actually affects radiated magnetic noise.)

When minimum conducted noise is required, it is often

advantageous to add an explicit input and/or output filter

to the topology. This can be a cost-effective way to reduce

conducted noise on the input or output node by an order

of magnitude or more. The exact details involved are a bit

lengthy, so the user is referred to the thorough treatments

in Application Notes AN19 and AN44. However, an ex-

ample will be given to illustrate the principles involved.

The next pair of scope photos in Figure 14 show an

AC-coupled version of the output node at 2mV/DIV.

Voltagerippleisseentobeoriginallyabout12mV_P-P, with

most of the energy in the lowest harmonics. After the

addition of a 4.7µH inductor and a second 100µF output

Figure 12 shows the previous “Basic 5V Output Applica-

tion” modified with an additional input inductor and an

output L/C combination. The dramatic improvement in

noise performance is seen in the accompanying oscillo-

scope photos shown in Figures 13 and 14. Operating

conditions are V_IN= 24V, I_OUT= 400mA. The pair of scope

photos in Figure 13 show the response at the input node,

beforeandaftertheadditional33µHinductorisadded.The

upper waveform shows an AC-coupled version of the

capacitor, ripple is about 200µV_P-P

.

Theseinputandoutputinductorrequirementsaretypically

not very difficult to achieve, and inexpensive open style

DO1608C types were used in this example. Once again,

more costly closed-construction style inductors may be

employed, but these are usually not necessary, as the AC

fields generated by these inductors are typically small.

L3

33µH

V

IN

10

+

V

IN

3

4

SHDN

LT1777

SYNC

V

CC

L4

4.7µH

12

14

6

V

OUT

SW

5

+

C8

V

D

C

13

100µF

10V

D1

FB

SGND

7

ADDITIONAL FILTER COMPONENTS

L3: COILCRAFT D01608C-333 OR SIMILAR

L4: COILCRAFT D01608C-472 OR SIMILAR

C8: AVX D CASE TPSD107M010R0080

1777 F12

Figure 12. Basic 5V Application with Optional Input/Output Filters

V_INNODE VOLTAGE

AC COUPLED

50mV/DIV

V_INNODE VOLTAGE

AC COUPLED

50mV/DIV

V_INNODE CURRENT

DC COUPLED

50mA/DIV

V

_INNODE CURRENT

DC COUPLED

50mA/DIV

GND, CH2

1777 F13a

1777 F13b

2µs/DIV

(a) Before Input Inductor

(b) After Input Inductor

Figure 13. Input Node Ripple

21

LT1777

U

TYPICAL APPLICATIONS

V_OUTNODE

AC COUPLED

2mV/DIV

V_OUTNODE

AC COUPLED

2mV/DIV

1777 F13a

1777 F14b

2µs/DIV

(a) Before Output Filter

(b) After Output Filter

Figure 14. Output Node Ripple

User Programmable Undervoltage Lockout

Behaviorisasfollows:Normaloperationisobservedatthe

nominal input voltage of 24V. As the input voltage is

decreasedtoroughly18V, switchingactionwillstop, V_OUT

will drop to zero, and the LT1777 will draw its V_INand V_CC

quiescent currents from the V_INsupply. At a lower input

voltage, typically 10V or so at 25°C, the voltage on the

SHDNpinwilldroptotheshutdownthreshold,andthepart

will draw its shutdown current only from the V_INrail. The

resistive divider of R4 and R5 will continue to draw power

from V_IN. (The user should be aware that while the SHDN

pin lockout threshold is relatively accurate including

temperature effects, the SHDN pin shutdown threshold is

morecoarse, andexhibitsconsiderablymoretemperature

drift. Nevertheless the shutdown threshold will always be

well below the lockout threshold.)

Figure 15 uses a resistor divider between V_INand ground

to drive the SHDN node. This is a simple, cost-effective

way to add a user-programmable undervoltage lockout

(UVLO) function. Resistor R5 is chosen to have approxi-

mately 200µA through it at the nominal SHDN pin lockout

threshold of roughly 1.25V. The somewhat arbitrary value

of 200µA was chosen to be significantly above the SHDN

pin input current to minimize its error contribution, but

significantly below the typical 2.5mA the LT1777 draws in

lockout mode. Resistor R4 is then chosen to yield this

same 200µA, less 2.5µA, with the desired V_INUVLO volt-

age minus 1.25V across it. (The 2.5mA factor is an allow-

ance to minimize error due to SHDN pin input current.)

V

IN

R4

84.5k

1%

LT1777

SHDN

R5

6.19k

1%

C5

100pF

1777 F15

Figure 15. User Programmable UVLO

22

LT1777

U

Dimensions in inches (millimeters) unless otherwise noted.

S Package

PACKAGE DESCRIPTION

16-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

0.386 – 0.394*

(9.804 – 10.008)

16

15

14

13

12

11

10

9

0.150 – 0.157**

0.228 – 0.244

(3.810 – 3.988)

(5.791 – 6.197)

5

7

8

1

2

3

4

6

0.010 – 0.020

(0.254 – 0.508)

× 45°

0.053 – 0.069

(1.346 – 1.752)

0.004 – 0.010

(0.101 – 0.254)

0.008 – 0.010

(0.203 – 0.254)

0° – 8° TYP

0.050

(1.270)

BSC

0.014 – 0.019

(0.355 – 0.483)

TYP

0.016 – 0.050

(0.406 – 1.270)

S16 1098

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

23

LT1777

U

TYPICAL APPLICATION

Minimum PC Board Size Application

circuit is capable of delivering up to 300mA at 5V, from

input voltages as high as 28V. The only disadvantage is

that due to the increased resistance in the inductor, the

circuitisnolongercapableofwithstandingindefiniteshort

circuits to ground. The LT1777 will still current limit at its

nominal I_LIMvalue, but this will overheat the inductor.

Momentary short circuits of a few seconds or less can still

be tolerated.

Thepreviouslydescribedbasicapplicationsemploypower

path parts which are capable of delivering the full rated

input supply voltage and output current capabilities of the

LT1777. A substantial improvement in printed circuit

board area requirements can be achieved with the circuit

shown below. This uses a physically smaller and less

costlypower inductorand atantaluminputcapacitor. This

Minimum PC Board Area Application

V

IN

10V TO 28V

10

+

C1

22µF

35V

C6

0.1µF

V

IN

3

4

L1

SHDN

LT1777

SYNC

V

CC

0µH TO 2.2µH

C5

100pF

L2

(SEE BELOW)

200µH

12

14

6

V

OUT

5V

V

SW

5

+

C2

100µF

10V

R1

36.5k

1%

V

C

V

D

C7

0.1µF

13

D1

C4

100pF

R3

12k

C3

2200pF

FB

SGND

R2

12.1k

1%

7

C1: AVX E CASE TPSE226M035R0300

C2: AVX D CASE TPSD107M010R0080

C3, C4, C5: NPO OR X7R

L1: SENSE INDUCTOR CAN VARY FROM 0µH TO 2.2µH

AS PER APPLICATION. SEE PREVIOUS SCHEMATICS

FOR EXAMPLES

1777 TA03

C6, C7: Z5U

L2: COILCRAFT CTX200-1 OR SIMILAR

D1: MOTOROLA 100V, 1A SMD SCHOTTKY

MBRS1100

RELATED PARTS

PART NUMBER

LT1076

DESCRIPTION

COMMENTS

Integrated 2A Switch, V Up to 46V

IN

Push-Pull Design for Low Noise Isolated Supplies

Ultralow Noise Regulator for Boost Topologies

Output Up to 1.25A, Integrated Switch, SO-8 Package

Fixed Frequency 550kHz Operation, MSOP Package

100kHz, 2A Step-Down Switching Regulator

Ultralow Noise 1A Switching Regulator

Ultralow Noise 2A Switching Regulator

200kHz, 1.5A Step-Down Switching Regulator

LT1533

LT1534

LT1576

LTC1622

LTC1624

Low V Step-Down DC/DC Controller

High Efficiency SO-8 DC/DC Controller

IN

200kHz Operation, V from 3.5V to 36V, SO-8 Package

IN

LT1676/LT1776 Wide Input Range, High Efficiency, Step-Down Voltage Regulator 7.4V to 60V Input, 100/200kHz Operation, 700mA Internal Switch

1777f LT/TP 0899 4K • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

LINEAR TECHNOLOGY CORPORATION 1999

(408)432-1900 FAX:(408)434-0507 www.linear-tech.com


型号：	LT1777C
厂家：	Linear
描述：	Low Noise Step-Down Switching Regulator 低噪声降压型开关稳压器稳压器开关
文件：	总24页 (文件大小：272K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT1777C [Linear]

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