LT1795CFE#TR [Linear]

LT1795 - Dual 500mA/50MHz Current Feedback Line Driver Amplifier; Package: TSSOP; Pins: 20; Temperature Range: 0°C to 70°C;
LT1795CFE#TR
型号: LT1795CFE#TR
厂家: Linear    Linear
描述:

LT1795 - Dual 500mA/50MHz Current Feedback Line Driver Amplifier; Package: TSSOP; Pins: 20; Temperature Range: 0°C to 70°C

放大器 光电二极管
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LT1795  
Dual 500mA/50MHz  
Current Feedback Line Driver  
Amplifier  
U
FEATURES  
DESCRIPTIO  
TheLT®1795isadualcurrentfeedbackamplifierwithhigh  
output current and excellent large signal characteristics.  
The combination of high slew rate, 500mA output drive  
and up to ±15V operation enables the device to deliver  
significant power at frequencies in the 1MHz to 2MHz  
range. Short-circuit protection and thermal shutdown  
insure the device’s ruggedness. The LT1795 is stable with  
large capacitive loads and can easily supply the large  
currents required by the capacitive loading. A shutdown  
feature switches the device into a high impedance, low  
current mode, reducing power dissipation when the de-  
vice is not in use. For lower bandwidth applications, the  
supply current can be reduced with a single external  
resistor.  
500mA Output Drive Current  
50MHz Bandwidth, AV = 2, RL = 25  
900V/µs Slew Rate, AV = 2, RL = 25Ω  
Low Distortion: –75dBc at 1MHz  
High Input Impedance, 10MΩ  
Wide Supply Range, ±5V to ±15V  
Full Rate, Downstream ADSL Supported  
Low Power Shutdown Mode  
Power Saving Adjustable Supply Current  
Stable with CL = 10,000pF  
Power Enhanced Small Footprint Packages  
TSSOP-20, S0-20 Wide  
Available in a 20-Lead TSSOP Package  
U
APPLICATIO S  
The LT1795 comes in the very small, thermally enhanced,  
20-lead TSSOP package for maximum port density in line  
driver applications.  
ADSL HDSL2, G.lite Drivers  
Buffers  
Test Equipment Amplifiers  
Video Amplifiers  
Cable Drivers  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
U
TYPICAL APPLICATION  
Low Loss, High Power Central Office ADSL Line Driver  
+
V
+IN  
+
12.5  
1/2  
LT1795  
1k  
1k  
1:2*  
165Ω  
100Ω  
12.5Ω  
1/2  
LT1795  
–IN  
+
V
1795 TA01  
* MIDCOM 50215 OR EQUIVALENT  
1795fa  
1
LT1795  
W W  
U W  
ABSOLUTE AXI U RATI GS  
(Note 1)  
Specified Temperature Range (Note 3)... 40°C to 85°C  
Junction Temperature........................................... 150°C  
Storage Temperature Range ................. 65°C to 150°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
Supply Voltage ...................................................... ±18V  
Input Current ...................................................... ±15mA  
Output Short-Circuit Duration (Note 2)............ Indefinite  
Operating Temperature Range ................ 40°C to 85°C  
U
W
U
PACKAGE/ORDER I FOR ATIO  
TOP VIEW  
TOP VIEW  
ORDER PART  
NUMBER  
ORDER PART  
V
1
2
20  
V
COMP  
1
2
3
4
5
6
7
8
9
20 COMP  
+
NUMBER  
+
NC  
–IN  
19 NC  
V
19  
V
LT1795CFE  
LT1795IFE  
LT1795CSW  
LT1795ISW  
3
18 OUT  
+
OUT  
18 OUT  
+IN  
4
17  
V
V
17  
16  
15  
14  
V
V
V
V
SHDN  
SHDNREF  
+IN  
5
16 COMP  
V
6
15 COMP  
+
V
7
14  
V
V
–IN  
8
13 OUT  
–IN  
+IN  
13 –IN  
NC  
9
12 NC  
12 +IN  
V
10  
11  
V
SHDN 10  
11 SHDNREF  
FE PACKAGE  
20-LEAD PLASTIC TSSOP  
S PACKAGE  
20-LEAD PLASTIC SW  
TJMAX = 150° C, θJA = 40°C/W (Note 4)  
UNDERSIDE METAL INTERNALLY CONNECTED TO V–  
(PCB CONNECTION OPTIONAL)  
TJMAX = 150° C, θJA 40°C/W (Note 4)  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C.  
VCM = 0V, ±5V VS ≤ ±15V, pulse tested, VSHDN = 2.5V, VSHDNREF = 0V unless otherwise noted. (Note 3)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Input Offset Voltage  
±3  
±4.5  
±13  
±17  
mV  
mV  
OS  
Input Offset Voltage Matching  
±1  
±3.5  
±5.0  
mV  
mV  
±1.5  
Input Offset Voltage Drift  
Noninverting Input Current  
10  
µV/°C  
+
I
I
±2  
±8  
±5  
±20  
µA  
µA  
IN  
Noninverting Input Current Matching  
Inverting Input Current  
±0.5  
±1.5  
±2  
±7  
µA  
µA  
±10  
±20  
±70  
±100  
µA  
µA  
IN  
Inverting Input Current Matching  
±10  
±20  
±30  
±50  
µA  
µA  
e
Input Noise Voltage Density  
Input Noise Current Density  
Input Noise Current Density  
f = 10kHz, R =1k, R = 10, R = 0Ω  
3.6  
2
nV/Hz  
pA/Hz  
pA/Hz  
n
F
G
S
+i  
–i  
f = 10kHz, R =1k, R = 10, R = 10kΩ  
F G S  
n
f = 10kHz, R =1k, R = 10, R = 10kΩ  
30  
n
F
G
S
1795fa  
2
LT1795  
ELECTRICAL CHARACTERISTICS  
The denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C.  
VCM = 0V, ±5V VS ≤ ±15V, pulse tested, VSHDN = 2.5V, VSHDNREF = 0V unless otherwise noted. (Note 3)  
SYMBOL  
PARAMETER  
CONDITIONS  
= ±12V, V = ±15V  
MIN  
TYP  
MAX  
UNITS  
+
R
IN  
Input Resistance  
V
1.5  
0.5  
10  
5
MΩ  
MΩ  
IN  
S
V = ±2V, V = ±5V  
S
+
C
Input Capacitance  
V
= ±15V  
IN  
2
pF  
IN  
Input Voltage Range (Note 5)  
V = ±15V  
S
±12  
±2  
±13.5  
±3.5  
V
V
S
V = ±5V  
CMRR  
PSRR  
Common Mode Rejection Ratio  
V = ±15V, V = ±12V  
55  
50  
62  
60  
dB  
dB  
S
CM  
V = ±5V, V = ±2V  
S
CM  
Inverting Input Current  
Common Mode Rejection  
V = ±15V, V = ±12V  
1
1
10  
10  
µA/V  
µA/V  
S
CM  
V = ±5V, V = ±2V  
S CM  
Power Supply Rejection Ratio  
V = ±5V to ±15V  
S
60  
77  
30  
dB  
Noninverting Input Current  
Power Supply Rejection  
V = ±5V to ±15V  
S
500  
5
nA/V  
Inverting Input Current  
Power Supply Rejection  
V = ±5V to ±15V  
S
1
µA/V  
A
Large-Signal Voltage Gain  
V = ±15V, V  
= ±10V, R = 25Ω  
55  
55  
68  
68  
dB  
dB  
V
S
OUT  
L
V = ±5V, V  
= ±2V, R = 12Ω  
L
S
OUT  
R
Transresistance, V /I  
V = ±15V, V  
= ±10V, R = 25Ω  
75  
75  
200  
200  
kΩ  
kΩ  
OL  
OUT IN  
S
OUT  
L
V = ±5V, V  
= ±2V, R = 12Ω  
S
OUT  
L
V
Maximum Output Voltage Swing  
V = ±15V, R = 25Ω  
±11.5  
±10.0  
±12.5  
±11.5  
V
V
OUT  
S
L
V = ±5V, R = 12Ω  
±2.5  
±2.0  
±3  
±3  
V
V
S
L
I
I
Maximum Output Current  
V = ±15V, R = 1Ω  
0.5  
1
A
OUT  
S
S
L
Supply Current Per Amplifier  
V = ±15V, V  
= 2.5V  
29  
34  
42  
mA  
mA  
S
SHDN  
Supply Current Per Amplifier,  
SHDN  
V = ±15V  
15  
20  
25  
mA  
mA  
S
R
= 51k, (Note 6)  
Positive Supply Current, Shutdown  
Output Leakage Current, Shutdown  
Channel Separation  
V = ±15V, V  
S
= 0.4V  
= 0.4V  
1
200  
200  
µA  
µA  
SHDN  
V = ±15V, V  
S
1
SHDN  
V = ±15V, V  
S
= ±10V, R = 25Ω  
80  
110  
–75  
dB  
OUT  
L
HD , HD  
2nd and 3rd Harmonic Distortion  
Differential Mode  
f = 1MHz, V = 20V , R = 50, A = 2  
dBc  
2
3
O
P-P  
L
V
SR  
Slew Rate (Note 7)  
Slew Rate  
A = 4, R = 400Ω  
400  
900  
900  
65  
V/µs  
V/µs  
MHz  
V
L
A = 4, R = 25Ω  
V
L
BW  
Small-Signal BW  
A = 2, V = ±15V, Peaking 1.5dB  
V S  
R = R = 910, R = 100Ω  
F
G
L
A = 2, V = ±15V, Peaking 1.5dB  
50  
MHz  
V
S
R = R = 820, R = 25Ω  
F
G
L
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired.  
Note 2: Applies to short-circuits to ground only. A short-circuit between  
the output and either supply may permanently damage the part when  
operated on supplies greater than ±10V.  
Note 4: Thermal resistance varies depending upon the amount of PC board  
metal attached to the device. If the maximum dissipation of the package is  
exceeded, the device will go into thermal shutdown and be protected.  
Note 5: Guaranteed by the CMRR tests.  
+
Note 6: R  
is connected between the SHDN pin and V .  
SHDN  
Note 3: The LT1795C is guaranteed to meet specified performance from  
0°C to 70°C and is designed, characterized and expected to meet these  
extended temperature limits, but is not tested at 40°C and 85°C. The  
LT1795I is guaranteed to meet the extended temperature limits.  
Note 7: Slew rate is measured at ±5V on a ±10V output signal while  
operating on ±15V supplies with R = 1k, R = 333(A = +4) and  
R = 400.  
L
F
G
V
1795fa  
3
LT1795  
W
U
U
SMALL-SIGNAL BANDWIDTH  
RSD = 0, IS = 30mA per Amplifer, VS = ±15V,  
Peaking 1dB, RL = 25Ω  
RSD = 51k, IS = 15mA per Amplifer, VS = ±15V,  
Peaking 1dB, RL = 25Ω  
–3dB BW  
(MHz)  
–3dB BW  
(MHz)  
AV  
–1  
1
RF  
976  
RG  
976  
AV  
–1  
1
RF  
976  
RG  
976  
44  
30  
32  
32  
27  
1.15k  
976  
53  
1.15k  
976  
2
976  
72  
48  
2
976  
72  
10  
649  
46  
10  
649  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Supply Current vs Ambient  
Temperature  
Output Saturation Voltage vs  
Junction Temperature  
Output Short-Circuit Current vs  
Junction Temperature  
+
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
V
40  
35  
30  
25  
20  
15  
10  
5
V
S
= ±15V  
V
S
= ±15V  
V
A
= ±15V  
= 1  
= ∞  
S
V
L
R
L
= 2k  
–1  
–2  
–3  
–4  
R
R
L
= 25Ω  
R
SD  
= 0Ω  
SOURCING  
4
3
2
1
SINKING  
R
SD  
= 51kΩ  
R
L
= 25Ω  
R
L
= 2k  
V
0
25  
50  
TEMPERATURE (°C)  
75  
100 125  
–50 –25  
0
50  
TEMPERATURE (°C)  
100 125  
50  
125  
–50 –25  
0
25  
75  
–50  
0
25  
75  
–25  
100  
TEMPERATURE (°C)  
LT1795 G03  
LT1795 G01  
LT1795 G02  
Second Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
SHDN Pin Current vs Voltage  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
V
= ±15V  
SHDNREF  
A
V
V
= 2 DIFFERENTIAL  
= 20V  
S
V
OUT  
S
R
A
V
V
= 2 DIFFERENTIAL  
V
= 0V  
P-P  
= 20V  
OUT  
P-P  
= ±15V  
= ±15V  
S
= 50Ω  
LOAD  
PER AMPLIFIER  
R
I
= 50Ω  
LOAD  
I
Q
PER AMPLIFIER  
I
Q
= 5mA  
Q
I
Q
= 5mA  
I
= 10mA  
Q
I
Q
= 10mA  
I
= 20mA  
Q
I
Q
= 15mA  
I
Q
= 15mA  
I
Q
= 20mA  
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
0
1
2
3
4
5
VOLTAGE APPLIED AT SHDN PIN (V)  
LT1795 G05  
LT1795 G06  
1795 G04  
1795fa  
4
LT1795  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Second Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
Second Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
A
V
V
= 2 DIFFERENTIAL  
A
V
V
= 10 DIFFERENTIAL  
= 20V  
A
V
V
= 10 DIFFERENTIAL  
= 20V  
V
V
OUT  
S
V
OUT  
= ±15V  
S
= 20V  
OUT  
P-P  
P-P  
P-P  
= ±12V  
= ±15V  
S
R
I
= 50Ω  
R
I
= 50Ω  
R
I
= 50Ω  
LOAD  
PER AMPLIFIER  
LOAD  
LOAD  
PER AMPLIFIER  
PER AMPLIFIER  
Q
Q
Q
I
= 20mA  
Q
I
Q
= 5mA  
I
Q
= 5mA  
I
I
= 10mA  
Q
= 10mA  
Q
I
Q
= 10mA  
I
= 15mA  
Q
I
Q
= 20mA  
I
= 15mA  
Q
I
= 5mA  
Q
I
= 15mA  
I
= 20mA  
Q
Q
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
1M  
FREQUENCY (Hz)  
LT1795 G09  
LT1795 G07  
LT1795 G08  
Third Harmonic Distortion vs  
Frequency  
Second Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
A
V
V
= 2 DIFFERENTIAL  
= 20V  
A
V
V
= 10 DIFFERENTIAL  
= 20V  
A
V
V
= 10 DIFFERENTIAL  
= 20V  
V
OUT  
S
V
OUT  
S
V
OUT  
S
P-P  
P-P  
P-P  
= ±12V  
= ±12V  
= ±12V  
R
I
= 50Ω  
R
I
= 50Ω  
LOAD  
PER AMPLIFIER  
R
I
= 50Ω  
LOAD  
LOAD  
PER AMPLIFIER  
PER AMPLIFIER  
Q
Q
Q
I
Q
= 5mA  
I
= 5mA  
Q
I
= 20mA  
Q
I
Q
= 20mA  
I
= 10mA  
Q
I
Q
= 15mA  
I
Q
= 10mA  
I
Q
= 20mA  
I = 5mA  
Q
I
= 15mA  
Q
I
Q
= 10mA  
I
= 15mA  
Q
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
FREQUENCY (Hz)  
LT1795 G10  
LT1795 G12  
LT1795 G11  
Second Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
Second Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
A
V
V
= 2 DIFFERENTIAL  
= 4V  
A
V
V
= 10 DIFFERENTIAL  
= 4V  
A
V
V
= 2 DIFFERENTIAL  
= 4V  
V
OUT  
S
V
OUT  
S
V
OUT  
S
P-P  
P-P  
P-P  
= ±12V  
= ±12V  
= ±12V  
I
Q
= 5mA  
R
I
= 50Ω  
R
I
= 50Ω  
R
I
= 50Ω  
LOAD  
LOAD  
LOAD  
PER AMPLIFIER  
PER AMPLIFIER  
PER AMPLIFIER  
Q
Q
Q
I
= 10mA  
Q
I
= 10mA  
Q
I
Q
= 5mA  
I
= 10mA  
I
Q
= 15mA  
I
= 5mA  
Q
Q
I
= 15mA  
Q
I
Q
= 15mA  
I
= 20mA  
Q
I
Q
= 20mA  
I
= 20mA  
Q
10k  
100k  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
FREQUENCY (Hz)  
LT1795 G13  
LT1795 G14  
LT1795 G15  
1795fa  
5
LT1795  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
Third Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
Second Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
A
V
V
= 2 DIFFERENTIAL  
= 4V  
A
V
V
= 10 DIFFERENTIAL  
= 4V  
V
OUT  
S
V
OUT  
S
A
V
V
= 2 DIFFERENTIAL  
= 4V  
V
OUT  
S
R
P-P  
P-P  
P-P  
I
= 5mA  
Q
= ±5V  
= ±12V  
= ±5V  
I
= 5mA  
Q
R
I
= 50Ω  
R
I
= 50Ω  
LOAD  
LOAD  
= 50Ω  
LOAD  
–60  
PER AMPLIFIER  
PER AMPLIFIER  
Q
Q
I
PER AMPLIFIER  
Q
I
Q
= 10mA  
–70  
I
= 10mA  
Q
I
= 15mA  
Q
I
Q
= 5mA  
–80  
I
Q
= 10mA  
I = 15mA  
Q
–90  
I
Q
= 20mA  
I
Q
= 15mA  
I
= 20mA  
Q
I
Q
= 20mA  
–100  
–110  
10k  
100k  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
FREQUENCY (Hz)  
LT1795 G17  
LT1795 G18  
LT1795 G16  
Second Harmonic Distortion vs  
Frequency  
Third Harmonic Distortion vs  
Frequency  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
A
V
V
= 10 DIFFERENTIAL  
= 4V  
A
V
V
= 10 DIFFERENTIAL  
= 4V  
V
V
OUT  
S
R
I
= 5mA  
OUT  
= ±5V  
S
P-P  
Q
P-P  
= ±5V  
R = 50Ω  
LOAD  
= 50Ω  
LOAD  
I PER AMPLIFIER  
Q
I
Q
PER AMPLIFIER  
I
= 10mA  
Q
I
= 20mA  
Q
I
= 15mA  
Q
I
= 15mA  
Q
I
= 10mA  
Q
I
= 5mA  
Q
I
= 20mA  
Q
10k  
100k  
FREQUENCY (Hz)  
1M  
10k  
100k  
FREQUENCY (Hz)  
1M  
LT1795 G20  
LT1795 G19  
–3dB Bandwidth vs  
Supply Current  
Slew Rate vs Supply Current  
50  
45  
1200  
1000  
800  
600  
400  
200  
0
RISING  
40  
FALLING  
35  
30  
25  
V
= ±15V  
=25°C  
= 4  
S
A
V
= ±15V  
=25°C  
= 4  
S
A
T
T
A
V
A
V
R
= 25Ω  
LOAD  
R
= 25Ω  
LOAD  
R = 1k  
F
R = 1k  
F
7.5 10  
15  
20  
25  
30  
7.5 10  
15  
20  
25  
30  
SUPPLY CURRENT PER AMPLIFIER (mA)  
SUPPLY CURRENT PER AMPLIFIER (mA)  
1795 • G22  
1795 • G21  
1795fa  
6
LT1795  
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APPLICATIO S I FOR ATIO  
The LT1795 is a dual current feedback amplifier with high  
output current drive capability. The amplifier is designed  
to drive low impedance loads such as twisted-pair trans-  
mission lines with excellent linearity.  
When VSHDN = VSHDNREF, the device is shut down. The  
device will interface directly with 3V or 5V CMOS logic  
when SHDNREF is grounded and the control signal is  
applied to the SHDN pin. Switching time between the  
active and shutdown states is about 1.5µs.  
SHUTDOWN/CURRENT SET  
Figures 1 to 4 illustrate how the SHDN and SHDNREF pins  
can be used to reduce the amplifier quiescent current. In  
both cases, an external resistor is used to set the current.  
The two approaches are equivalent, however the required  
resistor values are different. The quiescent current will be  
approximately 115 times the current in the SHDN pin and  
230 times the current in the SHDNREF pin. The voltage  
across the resistor in either condition is V+ – 1.5V. For  
example, a 50k resistor between V+ and SHDN will set the  
If the shutdown/current set feature is not used, connect  
SHDN to V+ and SHDNREF to ground.  
The SHDN and SHDNREF pins control the biasing of the  
two amplifiers. The pins can be used to either turn off the  
amplifiers completely, reducing the quiescent current to  
less then 200µA, or to control the quiescent current in  
normal operation.  
+
V
+
V
10 SHDN  
R
SHDN  
11 SHDNREF  
10 SHDN  
R
SHDNREF  
11 SHDNREF  
1795 F03  
1795 F01  
Figure 1. RSHDN Connected Between V+ and SHDN (Pin 10);  
SHDNREF (Pin 11) = GND. See Figure 2  
Figure 3. RSHDNREF Connected Between SHDNREF (Pin 11)  
and GND; SHDN (Pin 10) = V+. See Figure 4  
80  
80  
T
= 25°C  
= ±15V  
T
= 25°C  
= ±15V  
A
S
A
S
V
V
70  
60  
50  
40  
30  
20  
10  
0
70  
60  
50  
40  
30  
20  
10  
0
0
25 50 75 100 125 150 175 200 225  
(k)  
50 100 150 200 250 300 350 400 450 500  
(k)  
R
R
SHDNREF  
SHDN  
1795 F02  
1795 F04  
Figure 2. LT1795 Amplifier Supply Current vs RSHDN. RSHDN  
Connected Between V+ and SHDN, SHDNREF = GND (See  
Figure 1)  
Figure 4. LT1795 Amplifier Supply Current vs RSHDNREF  
RSHDNREF Connected Between SHDNREF and GND,  
SHDN = V+ (See Figure 3)  
.
1795fa  
7
LT1795  
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APPLICATIO S I FOR ATIO  
Figure 8 illustrates a partial shutdown with direct logic  
control. By keeping the output stage slightly biased on, the  
output impedance remains low, preserving the line termi-  
nation. The design equations are:  
quiescent current to 33mA with VS = ±15V. If ON/OFF  
controlisdesiredinadditiontoreducedquiescentcurrent,  
then the circuits in Figures 5 to 7 can be employed.  
+
V
115VH  
R
B
SHDN  
R1=  
R
10 SHDN  
INTERNAL  
LOGIC THRESHOLD  
~1.4V  
OFF  
IS  
– IS  
( )ON ( )OFF  
10k  
Q1  
11 SHDNREF  
ON  
(0V)  
(3.3V/5V)  
115VCC VSHDN  
(
)
1795 F05  
Q1: 2N3904 OR EQUIVALENT  
R2 =  
V
SHDN /VH • IS  
– IS  
+ IS  
(
) (  
)
( )OFF ( )OFF  
ON  
Figure 5. Setting Amplifier Supply Current  
Level with ON/OFF Control, Version 1  
where  
VH = Logic High Level  
+
V
10 SHDN  
(IS)ON = Supply Current Fully On  
(IS)OFF = Supply Current Partially On  
VSHDN = Shutdown Pin Voltage 1.4V  
VCC = Positive Supply Voltage  
R
PULLUP  
>500k  
11 SHDNREF  
R
R
SHDN1  
SHDN2  
R
B1  
R
B2  
ON  
ON  
10k  
10k  
Q1A  
Q1B  
V
CC  
OFF  
OFF  
(0V)  
(0V)  
R2  
(3.3V/5V)  
(3.3V/5V)  
ON  
1795 F06  
R1  
Q1A, Q1B: ROHM IMX1 or FMG4A (W/INTERNAL R )  
B
10  
INTERNAL  
OFF  
LOGIC THRESHOLD  
~ 1.4V  
(0V)  
SHDN  
I
SY  
(3.3V/5V)  
CONTROL  
Figure 6. Setting Multiple Amplifier Supply  
Current Levels with ON/OFF Control, Version 2  
11  
SHDNREF  
1795 F08  
Figure 8. Partial Shutdown  
ON  
SHDN  
10  
R
EXT  
INTERNAL  
OFF  
(0V)  
LOGIC THRESHOLD  
~ 1.4V  
I
PROG  
I
SY  
THERMAL CONSIDERATIONS  
(3.3V/5V)  
CONTROL  
I
0.5mA  
= 0Ω  
SHDNREF  
11  
PROG  
The LT1795 contains a thermal shutdown feature that  
protectsagainstexcessiveinternal(junction)temperature.  
If the junction temperature of the device exceeds the  
protectionthreshold, thedevicewillbegincyclingbetween  
normal operation and an off state. The cycling is not  
harmful to the part. The thermal cycling occurs at a slow  
rate, typically 10ms to several seconds, which depends on  
thepowerdissipationandthethermaltimeconstantsofthe  
package and heat sinking. Raising the ambient tempera-  
FOR R  
EXT  
(SEE SHDN PIN  
CURRENT vs  
1795 F07  
VOLTAGE  
CHARACTERISTIC)  
Figure 7. Setting Amplifier Supply Current Level  
with ON/OFF Control, Version 3  
1795fa  
8
LT1795  
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APPLICATIO S I FOR ATIO  
ture until the device begins thermal shutdown gives a  
good indication of how much margin there is in the  
thermal design.  
ing 0.5A current peaks into the load, a 1power supply  
impedance will cause a droop of 0.5V, reducing the  
available output swing by that amount. Surface mount  
tantalum and ceramic capacitors make excellent low ESR  
bypass elements when placed close to the chip. For  
frequencies above 100kHz, use 1µF and 100nF ceramic  
capacitors. If significant power must be delivered below  
100kHz, capacitive reactance becomes the limiting factor.  
Larger ceramic or tantalum capacitors, such as 4.7µF, are  
recommended in place of the 1µF unit mentioned above.  
For surface mount devices, heat sinking is accomplished  
by using the heat spreading capabilities of the PC board  
and its copper traces. For the TSSOP package, power is  
dissipated through the exposed heatsink. For the SO  
package, power is dissipated from the package primarily  
through the Vpins (4 to 7 and 14 to 17). These pins  
should have a good thermal connection to a copper plane,  
either by direct contact or by plated through holes. The  
copper plane may be an internal or external layer. The  
thermal resistance, junction-to-ambient will depend on  
thetotalcopperareaconnectedtothedevice.Forexample,  
the thermal resistance of the LT1795 connected to a 2 × 2  
inch, double sided 2 oz copper plane is 40°C/W.  
Inadequate bypassing is evidenced by reduced output  
swing and “distorted” clipping effects when the output is  
driventotherails.Ifthisisobserved,checkthesupplypins  
of the device for ripple directly related to the output  
waveform. Significant supply modulation indicates poor  
bypassing.  
Capacitance on the Inverting Input  
CALCULATING JUNCTION TEMPERATURE  
Current feedback amplifiers require resistive feedback  
from the output to the inverting input for stable operation.  
Take care to minimize the stray capacitance between the  
output and the inverting input. Capacitance on the invert-  
ing input to ground will cause peaking in the frequency  
response (and overshoot in the transient response), but it  
does not degrade the stability of the amplifier.  
The junction temperature can be calculated from the  
equation:  
TJ = (PD)(θJA) + TA  
where  
TJ = Junction Temperature  
TA = Ambient Temperature  
PD = Device Dissipation  
θJA = Thermal Resistance (Junction-to-Ambient)  
Feedback Resistor Selection  
The optimum value for the feedback resistors is a function  
of the operating conditions of the device, the load imped-  
ance and the desired flatness of response. The Typical AC  
Performance tables give the values which result in less  
than 1dB of peaking for various resistive loads and oper-  
ating conditions. If this level of flatness is not required, a  
higher bandwidth can be obtained by use of a lower  
feedback resistor.  
Differential Input Signal Swing  
The differential input swing is limited to about ±5V by an  
ESD protection device connected between the inputs. In  
normal operation, the differential voltage between the  
input pins is small, so this clamp has no effect. However,  
in the shutdown mode, the differential swing can be the  
same as the input swing. The clamp voltage will then set  
the maximum allowable input voltage.  
For resistive loads, the COMP pin should be left open (see  
Capacitive Loads section).  
Capacitive Loads  
POWER SUPPLY BYPASSING  
The LT1795 includes an optional compensation network  
for driving capacitive loads. This network eliminates most  
of the output stage peaking associated with capacitive  
To obtain the maximum output and the minimum distor-  
tion from the LT1795, the power supply rails should be  
well bypassed. For example, with the output stage supply-  
loads, allowing the frequency response to be flattened.  
1795fa  
9
LT1795  
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APPLICATIONS INFORMATION  
and greatly reduces the peaking. A lower value feedback  
resistor can now be used, resulting in a response which is  
flat to ±1dB to 45MHz. The network has the greatest effect  
for CL in the range of 0pF to 1000pF.  
Figure 9 shows the effect of the network on a 200pF load.  
Without the optional compensation, there is a 6dB peak at  
85MHz caused by the effect of the capacitance on the  
output stage. Adding a 0.01µF bypass capacitor between  
theoutputandtheCOMPpinsconnectsthecompensation  
Although the optional compensation works well with  
capacitive loads, it simply reduces the bandwidth when it  
is connected with resistive loads. For instance, with a 25Ω  
load, the bandwidth drops from 48MHz to 32MHz when  
thecompensationisconnected. Hence, thecompensation  
wasmadeoptional.Todisconnecttheoptionalcompensa-  
tion, leave the COMP pin open.  
14  
V
C
= ±15V  
S
L
12  
10  
8
= 200pF  
R = 3.4k  
F
NO  
R = 1k  
F
COMPENSATION  
COMPENSATION  
6
4
2
0
DEMO BOARD  
–2  
–4  
–6  
R = 3.4k  
F
COMPENSATION  
A demo board (DC261A) is available for evaluating the  
performence of the LT1795. The board is configured as a  
differential line driver/receiver suitable for xDSL applica-  
tions. For details, consult your local sales representative.  
1
10  
100  
FREQUENCY (MHz)  
1795 F09  
Figure 9  
U
PACKAGE DESCRIPTIO  
SW Package  
20-Lead Plastic Small Outline (Wide .300 Inch)  
(Reference LTC DWG # 05-08-1620)  
.050 BSC .045 ±.005  
.030 ±.005  
TYP  
.496 – .512  
(12.598 – 13.005)  
NOTE 4  
N
19 18  
16  
14 13 12 11  
20  
N
17  
15  
.325 ±.005  
.420  
MIN  
.394 – .419  
(10.007 – 10.643)  
NOTE 3  
1
2
3
N/2  
N/2  
RECOMMENDED SOLDER PAD LAYOUT  
.291 – .299  
(7.391 – 7.595)  
NOTE 4  
2
3
5
7
8
9
10  
1
4
6
.037 – .045  
.093 – .104  
(2.362 – 2.642)  
.010 – .029  
(0.940 – 1.143)  
× 45°  
(0.254 – 0.737)  
.005  
(0.127)  
RAD MIN  
0° – 8° TYP  
.050  
(1.270)  
BSC  
.004 – .012  
.009 – .013  
(0.102 – 0.305)  
NOTE 3  
(0.229 – 0.330)  
.014 – .019  
.016 – .050  
(0.406 – 1.270)  
INCHES  
(MILLIMETERS)  
S20 (WIDE) 0502  
(0.356 – 0.482)  
TYP  
NOTE:  
1. DIMENSIONS IN  
2. DRAWING NOT TO SCALE  
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.  
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS  
4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.  
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)  
1795fa  
10  
LT1795  
U
PACKAGE DESCRIPTIO  
FE Package  
20-Lead Plastic TSSOP (4.4mm)  
(Reference LTC DWG # 05-08-1663)  
Exposed Pad Variation CA  
6.40 – 6.60*  
(.252 – .260)  
4.95  
(.195)  
4.95  
(.195)  
20 1918 17 16 15 14 1312 11  
6.60 ±0.10  
2.74  
(.108)  
4.50 ±0.10  
2.74  
(.108)  
6.40  
BSC  
SEE NOTE 4  
0.45 ±0.05  
1.05 ±0.10  
0.65 BSC  
5
7
8
1
2
3
4
6
9 10  
RECOMMENDED SOLDER PAD LAYOUT  
1.20  
(.047)  
MAX  
4.30 – 4.50*  
(.169 – .177)  
0° – 8°  
0.65  
(.0256)  
BSC  
0.45 – 0.75  
(.018 – .030)  
0.09 – 0.20  
(.0036 – .0079)  
0.05 – 0.15  
(.002 – .006)  
FE20 (CA) TSSOP 0203  
0.195 – 0.30  
(.0077 – .0118)  
NOTE:  
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE  
FOR EXPOSED PAD ATTACHMENT  
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.150mm (.006") PER SIDE  
MILLIMETERS  
(INCHES)  
2. DIMENSIONS ARE IN  
3. DRAWING NOT TO SCALE  
1795fa  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
11  
LT1795  
W
W
SI PLIFIED SCHEMATIC  
SHDN  
TO ALL  
CURRENT  
SOURCES  
SHDNREF  
+
V
Q5  
Q10  
Q2  
D1  
Q11  
Q6  
Q15  
Q1  
Q9  
V
50Ω  
COMP  
V
C
C
+IN  
–IN  
R
C
OUTPUT  
+
V
+
V
Q12  
Q3  
Q8  
Q16  
Q14  
D2  
Q4  
Q13  
Q7  
V
1795 SS  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LT1497  
Dual 125mA, 50MHz Current Feedback Amplifier  
Dual 250mA, 60MHz Current Feedback Amplifier  
Dual 200mA, 700MHz Voltage Feedback Amplifier  
900V/µs Slew Rate  
LT1207  
Shutdown/Current Set Function  
Low Distortion: –72dBc at 200kHz  
LT1886  
1795fa  
LT/TP 0603 1K REVA • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
12  
LINEAR TECHNOLOGY CORPORATION 1999  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  

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