LT1801CS8_技术文档

LT1801/LT1802

Dual/Quad 80MHz, 25V/µs

Low Power Rail-to-Rail Input and

Output Precision Op Amps

U

FEATURES

DESCRIPTIO

The LT^®1801/LT1802 are dual/quad, low power, high

■

Gain Bandwidth Product: 80MHz

Input Common Mode Range Includes Both Rails

Output Swings Rail-to-Rail

Low Voltage Operation: Single or Split Supplies

2.3V to 12.6V

■

speed rail-to-rail input and output operational amplifiers

with excellent DC performance. The LT1801/LT1802 fea-

ture reduced supply current, lower input offset voltage,

lower input bias current and higher DC gain than other

devices with comparable bandwidth.

■

Low Quiescent Current: 2mA/Amplifier Max

Input Offset Voltage: 350µV Max

Input Bias Current: 250nA Max

3mm × 3mm × 0.8mm DFN Package

Large Output Current: 50mA Typ

Low Voltage Noise: 8.5nV/√Hz Typ

Slew Rate: 25V/µs Typ

Common Mode Rejection: 105dB Typ

Power Supply Rejection: 97dB Typ

Open-Loop Gain: 85V/mV Typ

Typically, the LT1801/LT1802 have an input offset voltage

of less than 100µV, an input bias current of less than 50nA

and an open-loop gain of 85 thousand.

The LT1801/LT1802 have an input range that includes

both supply rails and an output that swings within 20mV

of either supply rail to maximize the signal dynamic range

in low supply applications.

The LT1801/LT1802 maintain their performance for sup-

plies from 2.3V to 12.6V and are specified at 3V, 5V and

±5V supplies. The inputs can be driven beyond the sup-

plies without damage or phase reversal of the output.

Operating Temperature Range: –40°C to 85°C

LT1801 is Available in 8-Lead SO, MS8 and DFN

Packages

■

LT1802 is Available in 14-Lead SO Package

The LT1801 is available in the MS8, SO-8 and the 3mm ×

3mm× 0.8mmdualfinepitchleadlesspackage(DFN)with

the standard dual op amp pinout. The LT1802 features the

standardquadopampconfigurationandisavailableinthe

14-pin plastic SO package. The LT1801/LT1802 can be

used as plug-in replacements for many op amps to im-

prove input/output range and performance.

U

APPLICATIO S

■

Low Voltage, High Frequency Signal Processing

Driving A/D Converters

Rail-to-Rail Buffer Amplifiers

■

Active Filters

■

Video Line Driver

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

For a single version of these amplifiers, see the LT1800

data sheet.

U

1MHz Filter Frequency Response

TYPICAL APPLICATIO

3V, 1MHz, 4th Order Butterworth Filter

0

–20

–40

–60

–80

909Ω

2.67k

220pF

47pF

1.1k

2.21k

470pF

22pF

909Ω

–

3V

V

IN

/2

1.1k

–

1/2 LT1801

+

1/2 LT1801

V

OUT

–100

–120

+

V

S

18012 TA01

1k

10k

100k

1M

10M

100M

FREQUENCY (Hz)

18012 TA02

18012fb

1

LT1801/LT1802

W W U W

ABSOLUTE AXI U RATI GS

(Note 1)

Total Supply Voltage (V_S^–to V_S) ......................... 12.6V

Input Current (Note 2) ........................................ ±10mA

Output Short-Circuit Duration (Note 3)............ Indefinite

Operating Temperature Range (Note 4) .. –40°C to 85°C

Specified Temperature Range (Note 5)... –40°C to 85°C

Junction Temperature.......................................... 150°C

Storage Temperature Range ................. –65°C to 150°C

Maximum Junction Temperature (DD Package) ... 125°C

Storage Temperature (DD Package) ..... –65°C to 125°C

Lead Temperature (Soldering, 10 sec).................. 300°C

+

U W

U

PACKAGE/ORDER I FOR ATIO

TOP VIEW

+

OUT A

–IN A

+IN A

1

2

3

4

8

7

6

5

V

OUT A

–IN A

+IN A

1

2

3

4

8 V

OUT B

–IN B

+IN B

7 OUT B

6 –IN B

5 +IN B

A

–

B

V

–

V

MS8 PACKAGE

8-LEAD PLASTIC MSOP

DD PACKAGE

8-LEAD (3mm × 3mm) PLASTIC DFN

T_JMAX= 150°C, θ_JA= 250°C/ W, (Note 10)

T_JMAX= 125°C, θ_JA= 160°C/ W, (Note 10)

EXPOSED PAD INTERNALLY CONNECTED TO V^–.

(PCB CONNECTION OPTIONAL)

ORDER PART

NUMBER

DD PART

MARKING

ORDER PART

NUMBER

MS8 PART

MARKING

LT1801CDD

LT1801IDD

LAAM*

LT1801CMS8

LT1801IMS8

LTYR

LTYS

TOP VIEW

OUT A

–IN A

+IN A

1

2

3

4

5

6

7

14

13

12

11

10

9

OUT D

TOP VIEW

–IN D

+IN D

+

OUT A

–IN A

+IN A

1

2

3

4

8

7

6

5

V

A

B

D

OUT B

–IN B

+IN B

+

–

+

V

–

+

+IN B

–IN B

+IN C

–IN C

OUT C

C

–

V

S8 PACKAGE

8-LEAD PLASTIC SO

OUT B

8

S PACKAGE

14-LEAD PLASTIC SO

T_JMAX= 150°C, θ_JA= 190°C/ W, (Note 10)

T_JMAX= 150°C, θ_JA= 160°C/ W, (Note 10)

ORDER PART

NUMBER

S8 PART

MARKING

ORDER PART

NUMBER

LT1801CS8

LT1801IS8

1801

1801I

LT1802CS

LT1802IS

Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

18012fb

2

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

T = 25°C, V = 5V, 0V; V = 3V, 0V; V = V

OUT

= half supply, unless otherwise noted.

CONDITIONS

A

S

CM

SYMBOL PARAMETER

MIN

TYP

MAX

UNITS

V

Input Offset Voltage

V

= 0V

75

140

175

0.5

350

500

800

3

µV

OS

CM

= 0V (MS8)

= 0V (DD)

µV

= V

mV

S

∆V

OS

Input Offset Shift

V

= 0V to V – 1.5V

20

185

µV

CM

S

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= 0V

= 0V (MS8)

= 0V (DD)

100

150

280

650

900

1200

µV

CM

I

Input Bias Current

V

= 1V

25

250

nA

B

CM

= V

500

1500

S

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= 1V

25

350

500

nA

CM

= V

S

Input Offset Current

V

= 1V

25

200

nA

OS

CM

= V

S

Input Noise Voltage

0.1Hz to 10Hz

f = 10kHz

1.4

8.5

1

µV

P-P

e

Input Noise Voltage Density

Input Noise Current Density

Input Capacitance

nV/√Hz

pA/√Hz

pF

n

i

f = 10kHz

n

C

A

2

IN

Large-Signal Voltage Gain

V = 5V, V = 0.5V to 4.5V, R = 1k at V /2

35

3.5

30

85

8

85

V/mV

VOL

S

O

L

S

V = 5V, V = 1V to 4V, R = 100Ω at V /2

S

O

L

S

V = 3V, V = 0.5V to 2.5V, R = 1k at V /2

S

O

L

S

CMRR

PSRR

Common Mode Rejection Ratio

V = 5V, V = 0V to 3.5V

85

78

105

97

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

CMRR Match (Channel-to-Channel) (Note 9)

V = 5V, V = 0V to 3.5V

79

72

105

97

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

Input Common Mode Range

0

V

dB

V

S

Power Supply Rejection Ratio

V = 2.5V to 10V, V = 0V

78

72

97

S

CM

PSRR Match (Channel-to-Channel) (Note 9)

Minimum Supply Voltage (Note 6)

Output Voltage Swing Low (Note 7)

V = 2.5V to 10V, V = 0V

S

CM

2.3

2.5

V

No Load

16

85

225

60

200

500

mV

OL

OH

I

= 5mA

= 20mA

SINK

Output Voltage Swing High (Note 7)

Short-Circuit Current

No Load

18

120

450

60

250

800

mV

I

= 5mA

SOURCE

= 20mA

I

V = 5V

20

45

40

mA

SC

S

V = 3V

S

Supply Current per Amplifier

Gain Bandwidth Product

Slew Rate

1.6

80

2

mA

MHz

V/µs

MHz

dBc

ns

S

GBW

SR

Frequency = 2MHz

V = 5V, A = –1, R = 1k, V = 4V

P-P

40

12.5

25

S

V

L

O

FPBW

HD

Full Power Bandwidth

Harmonic Distortion

Settling Time

V = 5V, A = 1, V = 4V

P-P

2

S

V

O

V = 5V, A = 1, R = 1k, V = 2V , f = 500kHz

–75

250

0.35

0.4

S

V

L

O

P-P C

t

0.01%, V = 5V, V

= 2V, A = 1, R = 1k

STEP V L

S

∆G

∆θ

Differential Gain (NTSC)

Differential Phase (NTSC)

V = 5V, A = 2, R = 150Ω

%

S

V

L

V = 5V, A = 2, R = 150Ω

Deg

S

V

L

18012fb

3

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

The

0°C < T < 70°C. V = 5V, 0V; V = 3V, 0V; V = V = half supply, unless otherwise noted.

OUT

●

denotes the specifications which apply over the temperature range of

A

S

CM

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Input Offset Voltage

V

= 0V

●

125

140

290

0.6

500

650

950

3.5

µV

OS

CM

= 0V (MS8)

= 0V (DD)

µV

= V

mV

S

∆V

OS

Input Offset Shift

V

= 0V to V – 1.5V

●

30

275

µV

CM

S

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= 0V

= 0V (MS8)

= 0V (DD)

●

200

275

850

1250

1500

µV

CM

V

TC

Input Offset Voltage Drift (Note 8)

Input Bias Current

●

1.5

5

µV/°C

OS

I

V

= 1V

●

50

550

300

2000

nA

B

CM

= V – 0.2V

S

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= 1V

●

25

400

600

nA

CM

= V – 0.2V

S

I

Input Offset Current

V

= 1V

●

25

300

nA

OS

CM

= V – 0.2V

S

A

Large-Signal Voltage Gain

V = 5V, V = 0.5V to 4.5V, R = 1k at V /2

●

25

2.5

20

75

6

75

V/mV

VOL

S

O

L

S

V = 5V, V = 1V to 4V, R = 100Ω at V /2

S

O

L

S

V = 3V, V = 0.5V to 2.5V, R = 1k at V /2

S

O

L

S

CMRR

Common Mode Rejection Ratio

V = 5V, V = 0V to 3.5V

●

82

74

101

93

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3.5V

●

76

68

101

93

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

Input Common Mode Range

Power Supply Rejection Ratio

●

0

V

dB

V

S

PSRR

V = 2.5V to 10V, V = 0V

74

68

91

S

CM

PSRR Match (Channel-to-Channel) (Note 9) V = 2.5V to 10V, V = 0V

S

CM

Minimum Supply Voltage (Note 6)

Output Voltage Swing Low (Note 7)

2.3

2.5

V

No Load

●

18

100

300

80

225

600

mV

OL

OH

I

= 5mA

= 20mA

SINK

Output Voltage Swing High (Note 7)

Short-Circuit Current

No Load

●

25

150

600

80

300

950

mV

I

= 5mA

SOURCE

= 20mA

SOURCE

I

V = 5V

●

20

15

40

30

mA

SC

S

V = 3V

S

Supply Current per Amplifier

Gain Bandwidth Product

Slew Rate

●

2

2.8

mA

MHz

V/µs

S

GBW

SR

Frequency = 2MHz

V = 5V, A = –1, R = 1k, V = 4V

P-P

35

11

75

22

S

V

L

O

18012fb

4

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

The

●

denotes the specifications which apply over the temperature range of

–40°C < T < 85°C. V = 5V, 0V; V = 3V, 0V; V = V

= half supply, unless otherwise noted. (Note 5)

A

S

CM

OUT

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Input Offset Voltage

V

= 0V

●

175

200

320

0.75

700

850

1150

4

µV

OS

CM

= 0V (MS8)

= 0V (DD)

µV

= V

mV

S

∆V

OS

Input Offset Shift

V

= 0V to V – 1.5V

●

30

300

µV

CM

S

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= 0V

= 0V (MS8)

= 0V (DD)

●

200

280

320

1250

1600

1800

µV

CM

V

TC

Input Offset Voltage Drift (Note 8)

Input Bias Current

●

1.5

5

µV/°C

OS

I

●

50

600

400

2250

nA

B

V

= V – 0.2V

CM

S

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= 1V

●

25

450

700

nA

CM

= V – 0.2V

S

I

Input Offset Current

V

= 1V

●

25

350

nA

OS

CM

= V – 0.2V

S

A

Large-Signal Voltage Gain

V = 5V, V = 0.5V to 4.5V, R = 1k at V /2

●

20

2

17.5

65

6

65

V/mV

VOL

S

O

L

S

V = 5V, V = 1.5V to 3.5V, R = 100Ω at V /2

S

O

L

S

V = 3V, V = 0.5V to 2.5V, R = 1k at V /2

S

O

L

S

CMRR

Common Mode Rejection Ratio

V = 5V, V = 0V to 3.5V

●

81

73

101

93

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

CMRR Match (Channel-to-Channel) (Note 9) V = 5V, V = 0V to 3.5V

●

75

67

101

93

dB

S

CM

V = 3V, V = 0V to 1.5V

S

CM

Input Common Mode Range

Power Supply Rejection Ratio

●

0

V

dB

V

S

PSRR

V = 2.5V to 10V, V = 0V

73

67

90

S

CM

PSRR Match (Channel-to-Channel) (Note 9) V = 2.5V to 10V, V = 0V

S

CM

Minimum Supply Voltage (Note 6)

Output Voltage Swing Low (Note 7)

V

= V = 0.5V

2.3

2.5

CM

O

V

No Load

●

15

105

170

90

250

400

mV

OL

OH

I

= 5mA

= 10mA

SINK

Output Voltage Swing High (Note 7)

Short-Circuit Current

No Load

●

25

150

300

90

350

700

mV

I

= 5mA

SOURCE

= 10mA

SOURCE

I

V = 5V

●

12.5

30

mA

SC

S

V = 3V

S

Supply Current per Amplifier

Gain Bandwidth Product

Slew Rate

●

2.1

70

18

3

mA

MHz

V/µs

S

GBW

SR

Frequency = 2MHz

V = 5V, A = –1, R = 1k, V = 4V

25

9

S

V

L

O

18012fb

5

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

T = 25°C, V = ±5V, V = 0V, V = 0V, unless otherwise noted.

OUT

A

S

CM

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

–

V

Input Offset Voltage

V

= V

S

150

180

260

0.7

600

750

1050

3.5

µV

OS

CM

–

= V (MS8)

S

= V (DD)

µV

S

= V

+

mV

S

–

+

∆V

Input Offset Shift

V

= V to V – 1.5V

30

475

µV

OS

CM

S

–

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= V

150

275

325

1000

1300

1600

µV

CM

S

= V (MS8)

S

–

= V (DD)

–

I

Input Bias Current

V

= V + 1V

25

400

250

1500

nA

B

CM

S

+

= V

S

–

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= V + 1V

20

350

500

nA

CM

S

+

= V

S

–

Input Offset Current

V

= V + 1V

20

250

nA

OS

CM

S

+

= V

S

Input Noise Voltage

0.1Hz to 10Hz

f = 10kHz

1.4

8.5

1

µV

P-P

e

Input Noise Voltage Density

Input Noise Current Density

Input Capacitance

nV/√Hz

pA/√Hz

pF

n

i

f = 10kHz

n

C

A

f = 100kHz

2

IN

Large-Signal Voltage Gain

V = –4V to 4V, R = 1k

25

70

7

V/mV

VOL

O

L

V = –2V to 2V, R = 100Ω

2.5

O

L

–

CMRR

PSRR

Common Mode Rejection Ratio

V

= V to 3.5V

85

109

dB

V

CM

S

–

CMRR Match (Channel-to-Channel) (Note 9)

Input Common Mode Range

= V to 3.5V

79

S

–

+

V

S

V

S

+

–

Power Supply Rejection Ratio

V

= 2.5V to 10V, V = 0V

78

72

97

dB

S

+

–

PSRR Match (Channel-to-Channel) (Note 9)

Output Voltage Swing Low (Note 7)

= 2.5V to 10V, V = 0V

S

V

No Load

15

90

225

70

200

500

mV

OL

OH

I

= 5mA

= 20mA

SINK

Output Voltage Swing High (Note 7)

No Load

20

130

450

80

260

850

mV

I

= 5mA

SOURCE

= 20mA

I

Short-Circuit Current

Supply Current per Amplifier

Gain Bandwidth Product

Full Power Bandwidth

Slew Rate

25

50

1.8

70

mA

SC

3

S

GBW

FPBW

SR

Frequency = 2MHz

V = 8V

MHz

V/µs

dBc

ns

0.9

20

O

P-P

A = –1, R = 1k, V = ±4V, Measured at V = ±2V

V

L

O

HD

Harmonic Distortion

Settling Time

A = 1, R = 1k, V = 2V , f = 500kHz

–75

300

0.35

0.2

V

L

O

P-P C

t

0.01%, V = 5V, A = 1V, R = 1k

STEP V L

S

∆G

Differential Gain (NTSC)

Differential Phase (NTSC)

A = 2, R = 150Ω

%

V

L

∆θ

A = 2, R = 150Ω

Deg

V

L

18012fb

6

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

The

●

denotes the specifications which apply over the temperature range of

0°C < T < 70°C. V = ± 5V, V = 0V, V = 0V, unless otherwise noted.

OUT

A

S

CM

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

–

V

Input Offset Voltage

V

= V

S

●

200

220

290

0.75

800

1000

1300

4

µV

OS

CM

–

= V (MS8)

S

–

= V (DD)

µV

S

+

= V

mV

S

–

+

∆V

OS

Input Offset Shift

V

= V to V – 1.5V

●

45

675

µV

CM

S

–

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= V

●

240

300

340

1500

1700

1950

µV

CM

S

–

= V (MS8)

S

–

= V (DD)

S

V

TC

Input Offset Voltage Drift (Note 8)

Input Bias Current

●

1.5

5

µV/°C

OS

–

I

V

= V + 1V

●

30

450

300

2000

nA

B

CM

S

+

= V – 0.2V

S

–

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= V + 1V

●

25

400

700

nA

CM

S

+

= V – 0.2V

S

–

I

Input Offset Current

V

= V + 1V

●

25

300

nA

OS

CM

S

+

= V – 0.2V

S

A

Large-Signal Voltage Gain

V = –4V to 4V, R = 1k

●

15

2

55

5

V/mV

VOL

O

L

V = –2V to 2V, R = 100Ω

O

L

–

CMRR

Common Mode Rejection Ratio

V

= V to 3.5V

●

82

105

dB

V

CM

S

–

CMRR Match (Channel-to-Channel) (Note 9)

Input Common Mode Range

= V to 3.5V

76

S

–

+

V

S

V

S

+

–

PSRR

Power Supply Rejection Ratio

V

= 2.5V to 10V, V = 0V

74

68

91

93

dB

S

+

–

PSRR Match (Channel-to-Channel) (Note 9)

Output Voltage Swing Low (Note 7)

= 2.5V to 10V, V = 0V

S

V

No Load

●

17

105

250

80

250

575

mV

OL

OH

I

= 5mA

= 20mA

SINK

Output Voltage Swing High (Note 7)

No Load

●

25

150

600

90

310

975

mV

I

= 5mA

= 20mA

SOURCE

I

Short-Circuit Current

Supply Current per Amplifier

Gain Bandwidth Product

Slew Rate

●

22.5

45

2.4

70

20

mA

SC

4

S

GBW

SR

Frequency = 2MHz

A = –1, R = 1k, V = ±4V,

MHz

V/µs

V

L

O

Measured at V = ±2V

O

The

●

denotes the specifications which apply over the temperature range of –40°C < T < 85°C. V = ±5V, V = 0V, V

= 0V, unless

OUT

A

S

CM

otherwise noted. (Note 5)

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

–

V

Input Offset Voltage

V

= V

S

●

350

0.75

1000

1200

1500

5

µV

OS

CM

–

= V (MS8)

S

–

= V (DD)

µV

S

+

= V

mV

S

–

+

∆V

OS

Input Offset Shift

V

= V to V – 1.5V

●

50

750

µV

CM

S

–

Input Offset Voltage Match

(Channel-to-Channel) (Note 9)

V

= V

●

280

380

410

1700

1900

2100

µV

CM

S

–

= V (MS8)

S

–

= V (DD)

S

18012fb

7

LT1801/LT1802

ELECTRICAL CHARACTERISTICS

The

●

denotes the specifications which apply over the temperature range

of –40°C < T < 85°C. V = ±5V, V = 0V, V

= 0V, unless otherwise noted. (Note 5)

A

S

CM

OUT

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

TC

Input Offset Voltage Drift (Note 8)

Input Bias Current

●

1.5

5

µV/°C

OS

–

I

V

= V + 1V

●

50

450

400

2250

nA

B

CM

S

+

= V – 0.2V

S

–

Input Bias Current Match

(Channel-to-Channel) (Note 9)

V

= V + 1V

●

25

450

700

nA

CM

S

+

= V – 0.2V

S

–

I

Input Offset Current

V

= V + 1V

●

25

350

nA

OS

CM

S

+

= V – 0.2V

S

A

Large-Signal Voltage Gain

Common Mode Rejection Ratio

V = –4V to 4V, R = 1k

●

12.5

2

55

5

V/mV

VOL

O

L

V = –1V to 1V, R = 100Ω

O

L

–

CMRR

V

= V to 3.5V

●

81

104

dB

V

CM

S

–

CMRR Match (Channel-to-Channel) (Note 9)

Input Common Mode Range

= V to 3.5V

75

S

–

+

V

S

V

S

+

–

PSRR

Power Supply Rejection Ratio

V

= 2.5V to 10V, V = 0V

73

67

90

dB

S

+

–

PSRR Match (Channel-to-Channel) (Note 9)

Output Voltage Swing Low (Note 7)

= 2.5V to 10V, V = 0V

S

V

No Load

●

20

110

180

100

275

400

mV

OL

OH

I

= 5mA

= 10mA

SINK

Output Voltage Swing High (Note 7)

No Load

●

30

150

300

110

350

700

mV

I

= 5mA

= 10mA

SOURCE

I

Short-Circuit Current

Supply Current per Amplifier

Gain Bandwidth Product

Slew Rate

●

12.5

30

2.6

65

15

mA

SC

4.5

S

GBW

SR

Frequency = 2MHz

A = –1, R = 1k, V = ±4V,

MHz

V/µs

V

L

O

Measured at V = ±2V

O

Note 1: Absolute Maximum Ratings are those values beyond which the life

of the device may be impaired.

Note 6: Minimum supply voltage is guaranteed by power supply rejection

ratio test.

Note 2: The inputs are protected by back-to-back diodes. If the differential

input voltage exceeds 1.4V, the input current should be limited to less than

10mA.

Note 7: Output voltage swings are measured between the output and

power supply rails.

Note 8: This parameter is not 100% tested.

Note 3: A heat sink may be required to keep the junction temperature

below the absolute maximum rating when the output is shorted

indefinitely.

Note 9: Matching parameters are the difference between amplifiers A

and D and between B and C on the LT1802; between the two amplifiers

on the LT1801.

Note 4: The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed

functional over the temperature range of –40°C to 85°C.

Note 10: Thermal resistance (θ ) varies with the amount of PC board

JA

metal connected to the package. The specified values are for short traces

connected to the leads. If desired, the thermal resistance can be

substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of

Note 5: The LT1801C/LT1802C are guaranteed to meet specified

performance from 0°C to 70°C. The LT1801C/LT1802C are designed,

characterized and expected to meet specified performance from

–40°C to 85°C but are not tested or QA sampled at these temperatures.

The LT1801I/LT1802I are guaranteed to meet specified performance from

–40°C to 85°C.

the SO-14 or the underside metal of the DD package to a larger metal area

–

(V trace).

S

18012fb

8

LT1801/LT1802

U W

TYPICAL PERFOR A CE CHARACTERISTICS

V

Distribution, V = 0V

V

Distribution, V = 5V

OS CM

OS

CM

(PNP Stage)

(NPN Stage)

Supply Current vs Supply Voltage

35

30

25

20

15

10

5

45

40

35

30

25

20

15

10

5

4

3

2

1

0

V

= 5V, 0V

CM

V

= 5V, 0V

CM

PER AMPLIFIER

S

= 0V

= 5V

T

= 125°C

A

T

A

= 25°C

A

T

= –55°C

0

–250

–150

–50

250

–2000 –1200

–400

2000

50

150

400

1200

0

1

2

3

4

5

6

7

8

9

10 11 12

INPUT OFFSET VOLTAGE (µV)

TOTAL SUPPLY VOLTAGE (V)

18012 G01

18012 G02

18012 G03

Offset Voltage

vs Input Common Mode Voltage

Input Bias Current

vs Common Mode Voltage

Input Bias Current

vs Temperature

0.8

500

400

1.0

0.8

V

= 5V, 0V

V

= 5V, 0V

S

T

= –55°C

A

TYPICAL PART

T

= 25°C

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

A

= 125°C

= –55°C

NPN ACTIVE

300

0.6

V

= 5V, 0V

S

200

V

= 5V

CM

0.4

T

= 25°C

A

100

0.2

0

–100

–200

–300

–400

–500

–0.2

–0.4

–0.6

–0.8

–1.0

PNP ACTIVE

= 5V, 0V

V

T

= 125°C

S

CM

A

V

= 1V

–0.1

0

1

2

3

4

5

–60 –40 –20

0

20

40

60

80

–1

0

1

2

3

4

5

6

TEMPERATURE (°C)

INPUT COMMON MODE VOLTAGE (V)

18012 G04

18012 G06

18012 G05

Output Saturation Voltage

vs Load Current (Output Low)

Output Saturation Voltage

vs Load Current (Output High)

10

1

10

1

V

= 5V, 0V

V

= 5V, 0V

S

0.1

T

= 125°C

= –55°C

A

T

= 125°C

A

0.01

0.001

0.01

0.001

T

= 25°C

T

= –55°C

T

= 25°C

A

T

A

0.01

0.1

1

10

100

0.01

0.1

1

10

100

LOAD CURRENT (mA)

18012 G07

18012 G08

18012fb

9

LT1801/LT1802

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Output Short-Circuit Current

vs Power Supply Voltage

Minimum Supply Voltage

Open-Loop Gain

70

60

50

40

30

20

10

0

–10

–20

–30

–40

–50

–60

–70

0.6

0.4

2000

1600

1200

800

T

= 25°C

V

= 3V, 0V

TO GND

A

S

L

R

T

= –55°C

A

T

A

= 125°C

0.2

T

= –55°C

SINKING

A

400

R = 1k

L

T

= 25°C

A

0

–400

–800

–1200

–1600

–2000

T

= –55°C

= 125°C

SOURCING

R

L

= 100Ω

–0.2

T

= 125°C

A

T

A

–0.4

–0.6

T

A

= 25°C

1.5

2

2.5

3

3.5

4

4.5

5

0

1.5

2

2.5

3

3.5

4

4.5

TOTAL SUPPLY VOLTAGE (V)

5

5.5

0

0.5

1.5

2

2.5

3

1

POWER SUPPLY VOLTAGE (±V)

OUTPUT VOLTAGE (V)

18012 G09

18012 G10

18012 G11

Open-Loop Gain

Offset Voltage vs Output Current

2000

1600

1200

800

2000

1600

1200

800

2.0

1.5

V

= ±5V

V

= 5V, 0V

TO GND

V = ±5V

S

L

R

R TO GND

L

1.0

T

= –55°C

A

0.5

400

R

L

= 1k

R

L

= 1k

0

–400

–800

–1200

–1600

–2000

–400

–800

–1200

–1600

–2000

–0.5

–1.0

–1.5

–2.0

T

= 25°C

A

T

= 125°C

A

R

= 100Ω

L

R

= 100Ω

L

0

15

0

0.5

1

1.5

OUTPUT VOLTAGE (V)

2

2.5

3

3.5

4

4.5

5

–5 –4 –3 –2 –1

OUTPUT VOLTAGE (V)

0

1

2

3

4

5

–60 –45 –30 –15

30 45 60

OUTPUT CURRENT (mA)

18012 G12

18012 G13

18012 G14

Warm-Up Drift vs Time

Input Noise Voltage vs Frequency

60

120

110

100

90

V

= 5V, 0V

S

V

S

= ±5V

50

40

NPN ACTIVE

= 4.25V

V

= ±2.5V

= ±1.5V

S

80

30

20

V

CM

70

60

V

S

10

0

PNP ACTIVE

= 2.5V

50

V

CM

TYPICAL PART

40

20

40

80 100 120 140

0.01

0.1

1

FREQUENCY (kHz)

10

100

0

60

TIME AFTER POWER-UP (SECONDS)

18012 G16

18012 G15

18012fb

10

LT1801/LT1802

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Gain Bandwidth and Phase

Margin vs Supply Voltage

Input Current Noise vs Frequency

0.1Hz to 10Hz Input Voltage Noise

3.0

2000

1000

0

100

90

V

= 5V, 0V

S

V

= 5V, 0V

T

= 25°C

S

A

2.5

2.0

GAIN BANDWIDTH

PRODUCT

80

70

PNP ACTIVE

= 2.5V

1.5

1.0

60

50

40

30

20

V

CM

PHASE MARGIN

–1000

–2000

NPN ACTIVE

= 4.25V

0.5

0

V

CM

0.01

0.1

1

FREQUENCY (kHz)

10

100

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

TIME (SECONDS)

TOTAL SUPPLY VOLTAGE (V)

18012 G17

18012 G18

18012 G19

Gain Bandwidth and Phase

Margin vs Temperature

Slew Rate vs Temperature

Gain and Phase vs Frequency

70

60

50

40

100

80

100

35

A

= –1

G

= 1k

V

F

L

GBW PRODUCT

= ±2.5V

90

80

70

60

50

R = R = 1k

V

V = ±2.5V

S

PHASE

R

30

25

60

GBW PRODUCT

= ±5V

40

V

S

30

20

0

V

S

= ±5V

GAIN

PHASE MARGIN

= ±2.5V

60

50

40

30

20

10

V

S

10

0

–20

–40

–60

–80

–100

20

15

10

PHASE MARGIN

= ±5V

V

S

–10

–20

–30

V

= ±2.5V

= ±5V

S

–55 –35 –15

5

25 45 65 85 105 125

0.01

0.1

1

10

100 300

–55 –35 –15

5

25 45 65 85 105 125

TEMPERATURE (°C)

FREQUENCY (MHz)

18012 G22

18012 G21

18012 G20

Gain vs Frequency (A = 2)

Gain vs Frequency (A = 1)

V

18

15

12

9

12

9

R

L

C

= 1k

= 10pF

= 2

R

C

V

= 1k

= 10pF

= 1

L

V

A

6

3

V

= ±2.5V

S

6

0

V

= ±2.5V

V

= ±5V

S

3

–3

–6

–9

–12

V

S

= ±5V

0

–3

–6

0.1

1

10

100 300

0.1

1

10

100 300

FREQUENCY (MHz)

18012 G24

18012 G23

18012fb

11

LT1801/LT1802

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Common Mode Rejection Ratio

vs Frequency

Power Supply Rejection Ratio

vs Frequency

Output Impedance vs Frequency

600

100

90

80

70

60

120

V

= 5V, 0V

= 25°C

V

= ±2.5V

V

S

= 5V, 0V

S

A

S

T

100

80

NEGATIVE

SUPPLY

POSITIVE

SUPPLY

A

= 10

V

10

1

50

40

A

= 1

V

60

40

30

20

A

= 2

V

0.1

10

0.01

20

0

0.001

–10

0.001

0.1

1

10

FREQUENCY (MHz)

100

500

0.01

0.1

1

10

100

0.01

0.1

1

10

100

FREQUENCY (MHz)

18012 G25

18012 G26

18012 G27

Series Output Resistor

vs Capacitive Load

Series Output Resistor

vs Capacitive Load

Distortion vs Frequency

60

55

50

45

40

35

30

25

20

15

10

5

60

55

50

45

40

35

30

25

20

15

10

5

–40

–50

V

S

A

V

= 5V, 0V

= 1

V

A

V

= 5V, 0V

= 1

V

S

A

V

= 5V, 0V

= 2

S

V

= 2V

OUT

P-P

R

= 10Ω

–60

OS

R

L

= 150Ω, 2ND

R

= 1k, 2ND

L

–70

R

L

= 150Ω, 3RD

R

= 20Ω

R

= 10Ω

OS

–80

R

= 20Ω

OS

–90

–100

R

= R = 50Ω

L

OS

R

L

= 1k, 3RD

R

= R = 50Ω

L

OS

0

–110

10

100

1000

10000

10

100

1000

10000

0.01

0.1

1

10

CAPACITIVE LOAD (pF)

FREQUENCY (MHz)

18012 G28

18012 G29

18012 G30

Maximum Undistorted Output

Signal vs Frequency

Distortion vs Frequency

–40

–50

4.6

V

A

V

= 5V, 0V

= 2

S

V

4.5

4.4

4.3

4.2

4.1

4.0

3.9

= 2V

OUT

P-P

R

= 1k,

L

–60

2ND

R

= 150Ω, 2ND

A

= 2

L

V

R

3RD

= 150Ω,

–70

L

A

= –1

V

–80

–90

–100

V

= 5V, 0V

= 1k

S

L

R

= 1k, 3RD

L

R

–110

0.01

0.1

1

10

1k

10k

100k

FREQUENCY (Hz)

1M

10M

FREQUENCY (MHz)

18012 G32

18012 G31

18012fb

12

LT1801/LT1802

U W

TYPICAL PERFOR A CE CHARACTERISTICS

5V Small-Signal Response

5V Large-Signal Response

50mV/DIV

0V

1V/DIV

0V

V_S= 5V, 0V

A_V= 1

R_L= 1k

50ns/DIV

18012 G34

V_S= 5V, 0V

A_V= 1

R_L= 1k

100ns/DIV

18012 G33

±5V Small-Signal Response

± 5V Large-Signal Response

50mV/DIV

0V

2V/DIV

0V

V_S= ±5V

A_V= 1

R_L= 1k

50ns/DIV

18012 G36

V_S= ±5V

A_V= 1

R_L= 1k

200ns/DIV

18012 G35

Output Overdriven Recovery

V_IN

1V/DIV

0V

V_OUT

2V/DIV

V

_S= 5V, 0V

A_V= 2

_L= 1k

100ns/DIV

18012 G37

R

18012fb

13

LT1801/LT1802

W U U

U

APPLICATIO S I FOR ATIO

Circuit Description

A pair of complementary common emitter stages Q14/

Q15 that enable the output to swing from rail to rail

constructs the output stage. The capacitors C2 and C3

formthelocalfeedbackloopsthatlowertheoutputimped-

ance at high frequency. These devices are fabricated on

Linear Technology’s proprietary high speed complemen-

tary bipolar process.

TheLT1801/LT1802haveaninputandoutputsignalrange

that covers from the negative power supply to the positive

power supply. Figure 1 depicts a simplified schematic of

the amplifier. The input stage is comprised of two differ-

entialamplifiers, aPNPstageQ1/Q2andanNPNstageQ3/

Q4 that are active over the different ranges of common

mode input voltage. The PNP differential pair is active

between the negative supply to approximately 1.2V below

the positive supply. As the input voltage moves closer

toward the positive supply, the transistor Q5 will steer the

tail current I₁to the current mirror Q6/Q7, activating the

NPN differential pair and the PNP pair becomes inactive

for the rest of the input common mode range up to the

positive supply. Also at the input stage, devices Q17 to

Q19 act to cancel the bias current of the PNP input pair.

When Q1-Q2 are active, the current in Q16 is controlled to

be the same as the current in Q1-Q2, thus the base current

of Q16 is nominally equal to the base current of the input

devices. The base current of Q16 is then mirrored by

devices Q17-Q19 to cancel the base current of the input

devices Q1-Q2.

Power Dissipation

The LT1801 amplifier is offered in a small package, SO-8,

which has a thermal resistance of 190°C/W, θ_JA. So there

is a need to ensure that the die’s junction temperature

should not exceed 150°C. Junction temperature T_Jis

calculated from the ambient temperature T_A, power dissi-

pation P_Dand thermal resistance θ_JA:

T_J= T_A+ (P_D• θ_JA)

ThepowerdissipationintheICisthefunctionofthesupply

voltage,outputvoltageandtheloadresistance.Foragiven

supply voltage, the worst-case power dissipation P_DMAX

occurs at the maximum supply current and the output

+

V

R3

R4

R5

–

+

V

Q12

+

D1

ESDD1

ESDD2

Q11

Q13

Q15

I

1

2

C2

+IN

–IN

+

D6

D5

D8

D7

Q5

V

BIAS

I

3

D2

OUT

C

–

V

Q4 Q3

Q1 Q2

D3

BUFFER

AND

OUTPUT BIAS

ESDD4

ESDD3

Q10

–

+

V

D4

Q9

R1

Q8

R2

Q16

C1

Q17

Q18

Q14

Q7

Q6

Q19

–

V

18012 F01

Figure 1. LT1801/LT1802 Simplified Schematic Diagram

18012fb

14

LT1801/LT1802

W U U

APPLICATIO S I FOR ATIO

U

voltage is at half of either supply voltage (or the maximum

swing is less than 1/2 supply voltage). P_DMAXis given by:

Output

The LT1801/LT1802 can deliver a large output current, so

the short-circuit current limit is set around 50mA to

prevent damage to the device. Attention must be paid to

keep the junction temperature of the IC below the absolute

maximum rating of 150°C (refer to the Power Dissipation

section) when the output is continuously short circuited.

The output of the amplifier has reverse-biased diodes

connected to each supply. If the output is forced beyond

either supply, unlimited current will flow through these

diodes. If the current is transient and limited to several

hundred mA and the total supply voltage is less than

12.6V, the absolute maximum rating, no damage will

occur to the device.

P_DMAX= (V_S• I_SMAX) + (V_S/2)²/R_L

Example:AnLT1801inanSO-8packageoperatingon±5V

supplies and driving a 50Ω load, the worst-case power

dissipation is given by:

P

_DMAX= (10 • 4.5mA) + (2.5)²/50 = 0.045 + 0.125

= 0.17W

If both amplifiers are loaded simultaneously, then the total

power dissipation is 0.34W.

The maximum ambient temperature that the part is al-

lowed to operate is:

T_A= T_J– (P_DMAX• 190°C/W)

Overdrive Protection

= 150°C – (0.34W • 190°C/W) = 85°C

When the input voltage exceeds the power supplies, two

pairs of crossing diodes D1 to D4 will prevent the output

from reversing polarity. If the input voltage exceeds either

power supply by 700mV, diode D1/D2 or D3/D4 will turn

on to keep the output at the proper polarity. For the phase

reversal protection to perform properly, the input current

must be limited to less than 10mA. If the amplifier is

severelyoverdriven, anexternalresistorshouldbeusedto

limit the overdrive current.

Input Offset Voltage

Theoffsetvoltagewillchangedependinguponwhichinput

stage is active. The PNP input stage is active from the

negative supply rail to 1.2V from the positive supply rail,

thentheNPNinputstageisactivatedfortheremaininginput

range up to the positive supply rail during which the PNP

stage remains inactive. The offset voltage is typically less

than 75µV in the range that the PNP input stage is active.

The LT1801/LT1802’s input stages are also protected

against a large differential input voltage of 1.4V or higher

byapairofback-backdiodesD5/D8topreventtheemitter-

basebreakdownoftheinputtransistors.Thecurrentinthese

diodes should be limited to less than 10mA when they are

active. The worst-case differential input voltage usually

occurs when the input is driven while the output is shorted

to ground in a unity gain configuration. In addition, the

amplifier is protected against ESD strikes up to 3kV on all

pins by a pair of protection diodes on each pin that are

connected to the power supplies as shown in Figure 1.

Input Bias Current

The LT1801/LT1802 employ a patent-pending technique

to trim the input bias current to less than 250nA for the

input common mode voltage of 0.2V above negative

supply rail to 1.2V of the positive rail. The low input offset

voltage and low input bias current of the LT1801/LT1802

provide precision performance especially for high source

impedance applications.

18012fb

15

LT1801/LT1802

W U U

U

APPLICATIO S I FOR ATIO

Capacitive Load

Feedback Components

The LT1801/LT1802 are optimized for high bandwidth,

low power and precision applications. They can drive a

capacitiveloadofabout75pFinaunity-gainconfiguration,

and more for higher gain. When driving a larger capacitive

load, a resistor of 10Ω to 50Ω should be connected

betweentheoutputandthecapacitiveloadtoavoidringing

or oscillation. The feedback should still be taken from the

output so that the resistor will isolate the capacitive load

to ensure stability. Graphs on capacitive loads indicate the

transientresponseoftheamplifierwhendrivingcapacitive

load with a specified series resistor.

Whenfeedbackresistorsareusedtosetupgain,caremust

be taken to ensure that the pole formed by the feedback

resistors and the total capacitance at the inverting input

does not degrade stability. For instance, the LT1801/

LT1802 in a noninverting gain of 2, setup with two 5k

resistorsandacapacitanceof5pF(partplusPCboard)will

probably oscillate. The pole is formed at 12.7MHz that will

reduce phase margin by 57 degrees when the crossover

frequency of the amplifier is around 20MHz. A capacitor of

5pF or higher connected across the feedback resistor will

eliminate any ringing or oscillation.

U

TYPICAL APPLICATIO S

Single 3V Supply, 1MHz, 4th Order Butterworth Filter

Fast 1A Current Sense Amplifier

Thecircuitshownonthefirstpageofthisdatasheetmakes

use of the low voltage operation and the wide bandwidth

of the LT1801 to create a DC accurate 1MHz 4th order

lowpass filter powered from a 3V supply. The amplifiers

are configured in the inverting mode for the lowest distor-

tion and the output can swing rail-to-rail for maximum

dynamicrange.Alsoonthefirstpageofthisdatasheet,the

graph displays the frequency response of the filter.

Stopband attenuation is greater than 100dB at 50MHz.

With a 2.25V_P-P, 250kHz input signal, the filter has har-

monic distortion products of less than –85dBc. Worst

case output offset voltage is less than 6mV.

Asimple,fastcurrentsenseamplifierinFigure2issuitable

for quickly responding to out-of-range currents. The cir-

cuit amplifies the voltage across the 0.1Ω sense resistor

by a gain of 20, resulting in a conversion gain of 2V/A. The

–3dBbandwidthofthecircuitis4MHz,andtheuncertainty

due to V_OSand I_Bis less than 4mA. The minimum output

voltageis60mV,correspondingto30mA.Thelarge-signal

response of the circuit is shown in Figure 3.

I

L

3V

0A TO 1A

52.3Ω

+

V

OUT

1/2 LT1801

–

0V TO 2V

0.1Ω

500mV/DIV

0V

1k

52.3Ω

18012 F02

V

= 2 • I

= 4MHz

OUT

L

f

–3dB

UNCERTAINTY DUE TO V

I < 4mA

B

V_S= 3V

50ns/DIV

18012 F03

OS,

Figure 2. Fast 1A Current Sense

Figure 3. Current Sense Amplifier Large-Signal Response

18012fb

16

LT1801/LT1802

U

TYPICAL APPLICATIO S

Single Supply 1A Laser Driver Amplifier

bias current allows it to control the current that flows

throughthelaserdiodeprecisely.Theoverallcircuitisa1A

per volt V-to-I converter. Frequency compensation com-

ponents R2 and C1 are selected for fast but zero-over-

shoot time domain response to avoid overcurrent condi-

tionsinthelaser. Thetimedomainresponseofthiscircuit,

measured at R1 and given a 500mV 230ns input pulse, is

shown in Figure 5. While the circuit is capable of 1A

operation, the laser diode and the transistor are thermally

limitedduetopowerdissipation, sotheymustbeoperated

at low duty cycles.

Figure 4 shows the LT1801 used in a 1A laser driver

application. One of the reasons the LT1801 is well suited

to this control task is that its 2.3V operation ensures that

it will be awaked during power-up and operated before the

circuit can otherwise cause significant current to flow in

the 2.1V threshold laser diode. Driving the noninverting

inputoftheLT1801toavoltageV_INwillcontroltheturning

on of the high current NPN transistor, FMMT619 and the

laser diode. A current equal to V_IN/R1 flows through the

laser diode. The LT1801 low offset voltage and low input

5V

+

V

IN

R3

DO NOT FLOAT

Q1

ZETEX

FMMT619

10

Ω

1/2 LT1801

–

C1

IR LASER

INFINEON

SFH495

39pF

R2

R1

330

Ω

1

Ω

18012 F04

Figure 4. Single Supply 1A Laser Driver Amplifier

100mA/DIV

50ns/DIV

18012 F05

Figure 5. 500mA Pulse Response

18012fb

17

LT1801/LT1802

U

PACKAGE DESCRIPTIO

DD Package

8-Lead Plastic DFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1698)

R = 0.115

0.38 ± 0.10

TYP

5

8

0.675 ±0.05

3.5 ±0.05

2.15 ±0.05 (2 SIDES)

1.65 ±0.05

3.00 ±0.10

(4 SIDES)

1.65 ± 0.10

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PACKAGE

OUTLINE

(DD) DFN 1203

4

1

0.25 ± 0.05

0.75 ±0.05

0.200 REF

0.50 BSC

0.50

BSC

2.38 ±0.05

(2 SIDES)

2.38 ±0.10

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

NOTE:

1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON TOP AND BOTTOM OF PACKAGE

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660)

0.889 ± 0.127

(.035 ± .005)

5.23

(.206)

MIN

3.2 – 3.45

(.126 – .136)

3.00 ± 0.102

(.118 ± .004)

(NOTE 3)

0.52

(.206)

REF

0.65

(.0256)

BSC

0.42 ± 0.04

(.0165 ± .0015)

8

7 6

5

TYP

RECOMMENDED SOLDER PAD LAYOUT

3.00 ± 0.102

(.118 ± .004)

NOTE 4

4.90 ± 0.15

(1.93 ± .006)

DETAIL “A”

0.254

(.010)

0° – 6° TYP

GAUGE PLANE

1

2

3

4

0.53 ± 0.015

(.021 ± .006)

1.10

(.043)

MAX

0.86

(.034)

REF

DETAIL “A”

0.18

(.077)

SEATING

PLANE

0.22 – 0.38

(.009 – .015)

TYP

0.13 ± 0.076

(.005 ± .003)

0.65

(.0256)

BSC

MSOP (MS8) 0802

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

18012fb

18

LT1801/LT1802

U

PACKAGE DESCRIPTIO

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.189 – .197

(4.801 – 5.004)

.045 ±.005

NOTE 3

.050 BSC

7

5

8

6

.245

MIN

.160 ±.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

.030 ±.005

TYP

1

3

4

2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

× 45°

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0°– 8° TYP

.016 – .050

(0.406 – 1.270)

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

NOTE:

INCHES

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

SO8 0303

S Package

14-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.337 – .344

.045 ±.005

(8.560 – 8.738)

.050 BSC

NOTE 3

14

N

13

12

11

10

9

8

N

1

.245

MIN

.160 ±.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

2

3

N/2

7

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

1

2

3

4

5

6

.010 – .020

(0.254 – 0.508)

× 45°

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0° – 8° TYP

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

.016 – .050

(0.406 – 1.270)

S14 0502

NOTE:

INCHES

(MILLIMETERS)

2. DRAWING NOT TO SCALE

1. DIMENSIONS IN

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

18012fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

19

LT1801/LT1802

U

TYPICAL APPLICATIO

Low Power High Voltage Amplifier

precise DC output voltage. When no signal is present, the

op amp output sits at about mid-supply. Transistors Q1

and Q3 create bias voltages for Q2 and Q4, which are

forced into a low quiescent current by degeneration resis-

tors R4 and R5. When a transient signal arrives at V_IN, the

op amp output moves and causes the current in Q2 or Q4

to change depending on the signal polarity. The current,

limited by the clipping of the LT1801 output and the 3kΩ

of total emitter degeneration, is mirrored to the output

devices to drive the capacitive load. The LT1801 output

then returns to near mid-supply, providing the precise DC

outputvoltagetotheload.Theattentiontolimitthecurrent

of the output devices minimizes power dissipation thus

allowing for dense layout, and inherits better reliability.

Figure 7 shows the time domain response of the amplifier

providing a 200V output swing into a 100pF load.

Certainmaterialsusedinopticalapplicationshavecharac-

teristics that change due to the presence and strength of

a DC electric field. The voltage applied across these

materials should be precisely controlled to maintain de-

sired properties, sometimes as high as 100’s of volts. The

materials are not conductive and represent a capacitive

load.

The circuit of Figure 6 shows the LT1801 used in an

amplifier capable of a 250V output swing and providing

130V

5V

10k

4.99k

1k

Q6

Q5

0.1µF

Q2

Q1

5V

R4

2k

R6

2k

+

R2

2k

V

OUT

MATERIAL UNDER

ELECTRIC FIELD

100pF

1/2 LT1801

–

V_IN

2V/DIV

R5

2k

R7

2k

Q3

Q4

V

IN

V_OUT

50V/DIV

R1

2k

A = V /V

130V SUPPLY I = 130µA

OUTPUT SWING = 128.8V

OUTPUT OFFSET ≅ 20mV

OUTPUT SHORT-CIRCUIT CURRENT ≅ 3mA

10% TO 90% RISE TIME ≅ 8µs, 200V OUTPUT STEP

SMALL-SIGNAL BANDWIDTH ≅ 150kHz

Q1, Q2, Q7, Q8: ON SEMI MPSA42

=

–100

C1

39pF

10k

V OUT IN

Q

Q7

Q8

1k

C2

R3

200k

8pF

4.99k

150V

–130V

Q3, Q4, Q5, Q6: ON SEMI MPSA92

10µs/DIV

18012 F07

18012 F06

Figure 7. Large-Signal Time Domain

Response of the Amplifier

Figure 6. Low Power, High Voltage Amplifier

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

0.1dB Gain Flatness to 150MHz, Shutdown

LT1399

Triple 300MHz Current Feedback Amplifier

LT1498/LT1499 Dual/Quad 10MHz, 6V/µs Rail-to-Rail Input and Output C-Load^TMOp Amps High DC Accuracy, 475µV V

, 4µV/°C Max Drift

OS(MAX)

LT1630/LT1631 Dual/Quad 30MHz, 10V/µs Rail-to-Rail Input and Output Op Amps

LT1800 80MHz, 25V/µs Low Power Rail-to-Rail Input/Output Precision Op Amp

High DC Accuracy, 525µV V

, 70mA Output Current,

Max Supply Current 4.4mA per Amplifier

Single Version of LT1801/LT1802

OS(MAX)

LT1806/LT1807 Single/Dual 325MHz, 140V/µs Rail-to-Rail Input and Output Op Amps

LT1809/LT1810 Single/Dual 180MHz Rail-to-Rail Input/Output Op Amps

C-Load is a trademark of Linear Technology Corporation.

High DC Accuracy, 550µV V

, Low Noise 3.5nV/√Hz,

OS(MAX)

Low Distortion –80dB at 5MHz, Power-Down (LT1806)

350V/µs Slew Rate, Low Distortion –90dBc at 5MHz,

Power-Down (LT1809)

18012fb

LT 0607 REV B • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LT1801CS8
厂家：	Linear
描述：	Dual/Quad 80MHz, 25V/μs Low Power Rail-to-Rail Input and Output Precision Op Amps 双/四路为80MHz ， 25V / μs的低功耗轨至轨输入和输出精密运算放大器运算放大器放大器电路光电二极管
文件：	总20页 (文件大小：572K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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