LT1810CS8#TR [Linear]
LT1810 - Dual 180MHz, 350V/µs Rail-to-Rail Input and Output Low Distortion Op Amps; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C;
| 型号： | LT1810CS8#TR |
| 厂家： | 
Linear |
| 描述： | LT1810 - Dual 180MHz, 350V/µs Rail-to-Rail Input and Output Low Distortion Op Amps; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C 运算放大器 放大器电路 光电二极管 |
| 文件： | 总24页 (文件大小：266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1809/LT1810
Single/Dual 180MHz, 350V/µs
Rail-to-Rail Input and Output
Low Distortion Op Amps
U
FEATURES
DESCRIPTIO
■
–3dB Bandwidth: 320MHz, AV = 1
The LT®1809/LT1810 are single/dual low distortion rail-
to-rail input and output op amps with a 350V/µs slew rate.
These amplifiers have a –3dB bandwidth of 320MHz at
unity-gain,again-bandwidthproductof180MHz(AV ≥10)
andan85mAoutputcurrenttofittheneedsoflowvoltage,
high performance signal conditioning systems.
■
Gain-Bandwidth Product: 180MHz, AV ≥ 10
■
Slew Rate: 350V/µs
■
Wide Supply Range: 2.5V to 12.6V
■
Large Output Current: 85mA
■
Low Distortion, 5MHz: –90dBc
■
Input Common Mode Range Includes Both Rails
The LT1809/LT1810 have an input range that includes
both supply rails and an output that swings within 20mV
of either supply rail to maximize the signal dynamic range
in low supply applications.
■
Output Swings Rail-to-Rail
■
Input Offset Voltage, Rail-to-Rail: 2.5mV Max
■
Common Mode Rejection: 89dB Typ
Power Supply Rejection: 87dB Typ
■
■
■
■
■
■
The LT1809/LT1810 have very low distortion (–90dBc) up
to 5MHz that allows them to be used in high performance
data acquisition systems.
Open-Loop Gain: 100V/mV Typ
Shutdown Pin: LT1809
Single in 8-Pin SO and 6-Pin SOT-23 Packages
Dual in 8-Pin SO and MSOP Packages
Operating Temperature Range: –40°C to 85°C
U
The LT1809/LT1810 maintain their performance for sup-
plies from 2.5V to 12.6V and are specified at 3V, 5V and
±5V supplies. The inputs can be driven beyond the sup-
plies without damage or phase reversal of the output.
APPLICATIO S
■
Driving A/D Converters
The LT1809 is available in the 8-pin SO package with the
standard op amp pinout and the 6-pin SOT-23 package.
The LT1810 features the standard dual op amp pinout and
is available in 8-pin SO and MSOP packages. These
devices can be used as a plug-in replacement for many op
amps to improve input/output range and performance.
■
Low Voltage Signal Processing
■
Active Filters
■
Rail-to-Rail Buffer Amplifiers
■
Video Line Driver
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
Distortion vs Frequency
TYPICAL APPLICATIO
–40
A
V
V
= +1
= 2V
V
IN
S
P-P
–50
–60
High Speed ADC Driver
= ±5V
5V
5V
–70
R
L
= 100Ω, 2ND
V
IN
R3
49.9Ω
+
–
LTC®1420
PGA GAIN = 1
REF = 2.048V
–80
1V
P-P
12 BITS
10Msps
•
•
•
LT1809
–5V
+A
IN
–90
C1
470pF
–A
IN
R
L
= 100Ω, 3RD
R
L
= 1k, 3RD
–100
R2
1k
1809 TA01
R
= 1k, 2ND
L
–5V
–110
R1
1k
0.3
1
10
30
FREQUENCY (MHz)
1809 TA02
1
LT1809/LT1810
W W U W
ABSOLUTE AXI U RATI GS
(Note 1)
Total Supply Voltage (V+ to V–) ........................... 12.6V
Input Voltage (Note 2) ..............................................±VS
Input Current (Note 2) ........................................ ±10mA
Output Short-Circuit Duration (Note 3)............ Indefinite
Operating Temperature Range (Note 4) .. –40°C to 85°C
Specified Temperature Range (Note 5)... –40°C to 85°C
Junction Temperature........................................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
U W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
TOP VIEW
TOP VIEW
NUMBER
SHDN
–IN
1
2
3
4
8
7
6
5
NC
+
OUT 1
–
6 V
+
V
LT1809CS6
LT1809IS6
LT1809CS8
LT1809IS8
–
+
V
2
5 SHDN
4 –IN
+IN
OUT
NC
+IN 3
–
V
S6 PACKAGE
6-LEAD PLASTIC SOT-23
S8 PART MARKING
S6 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 145°C/W (Note 9)
1809
1809I
LTKY
LTUF
TJMAX = 150°C, θJA = 100°C/W (Note 9)
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
TOP VIEW
+
+
OUT A
–IN A
+IN A
1
2
3
4
8
7
6
5
V
OUT A
–IN A
+IN A
1
2
3
4
8 V
OUT B
–IN B
+IN B
LT1810CMS8
LT1810IMS8
LT1810CS8
LT1810IS8
7 OUT B
6 –IN B
5 +IN B
A
–
V
B
–
V
MS8 PACKAGE
8-LEAD PLASTIC MSOP
S8 PART MARKING
MS8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/W (Note 9)
1810
1810I
LTRF
LTTQ
TJMAX = 150°C, θJA = 100°C/W (Note 9)
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
–
V
Input Offset Voltage
V
V
V
V
= V LT1809 SO-8
0.6
0.6
0.6
0.6
2.5
2.5
3.0
3.0
mV
mV
mV
mV
OS
CM
CM
CM
CM
= V LT1809 SO-8
+
–
= V
= V
–
+
+
∆V
Input Offset Shift
V
V
= V to V LT1809 SO-8
0.3
0.3
2.0
2.5
mV
mV
OS
CM
CM
–
= V to V
Input Offset Voltage Match (Channel-to-Channel) (Note 10)
Input Bias Current
0.7
6
8
mV
+
–
I
V
V
= V
1.8
–13
µA
µA
B
CM
CM
= V + 0.2V
–27.5
–
+
∆I
Input Bias Current Shift
V
= V + 0.2V to V
14.8
35.5
µA
B
CM
+
–
Input Bias Current Match (Channel-to-Channel) (Note 10)
V
V
= V
0.1
0.2
4
8
µA
µA
CM
CM
= V + 0.2V
2
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
I
Input Offset Current
V
V
= V
0.05
0.2
1.2
4
µA
µA
OS
CM
CM
–
= V + 0.2V
–
+
∆I
Input Offset Current Shift
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
V
= V + 0.2V to V
0.25
16
5
5.2
µA
nV/√Hz
pA/√Hz
pF
OS
CM
e
f = 10kHz
f = 10kHz
n
i
n
C
A
2
IN
VOL
Large-Signal Voltage Gain
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
V = 5V, V = 1V to 4V, R = 100Ω to V /2
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
25
4
15
80
10
42
V/mV
V/mV
V/mV
S
O
L
S
S
O
L
S
S
O
L
S
–
+
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = V to V
66
61
82
78
dB
dB
S
CM
–
+
V = 3V, V = V to V
S
CM
–
+
+
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
60
55
82
78
dB
dB
S
CM
–
V = 3V, V = V to V
S
CM
–
+
Input Common Mode Range
V
V
V
dB
dB
V
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
71
65
87
87
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
V
V
No Load
12
50
180
50
120
375
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
Short-Circuit Current
No Load
20
80
330
80
180
650
mV
mV
mV
I
I
= 5mA
= 25mA
SOURCE
SOURCE
I
I
V = 5V
±45
±35
±85
±70
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Supply Current, Shutdown
12.5
17
mA
S
V = 5V, V
V = 3V, V
S
= 0.3V
= 0.3V
0.55
0.31
1.25
0.90
mA
mA
S
SHDN
SHDN
I
SHDN Pin Current
V = 5V, V
V = 3V, V
S
= 0.3V
= 0.3V
420
220
750
500
µA
µA
SHDN
S
SHDN
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
0.1
75
µA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
160
300
23.5
–86
27
MHz
V/µs
MHz
dB
V = 5V, A = –1, R = 1k, V = 4V
S
V
L
O
P-P
FPBW
THD
Full Power Bandwidth
Total Harmonic Distortion
Settling Time
V = 5V, V
= 4V
OUT P-P
S
V = 5V, A = 1, R = 1k, V = 2V , f = 5MHz
S
V
L
O
P-P C
t
0.1%, V = 5V, V
= 2V, A = –1, R = 500Ω
ns
S
S
STEP
V
L
∆G
Differential Gain (NTSC)
Differential Phase (NTSC)
V = 5V, A = 2, R = 150Ω
0.015
0.05
%
S
V
L
∆θ
V = 5V, A = 2, R = 150Ω
Deg
S
V
L
3
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
V
V
V
= V LT1809 SO-8
●
●
●
●
1
1
1
1
3.0
3.0
3.5
3.5
mV
mV
mV
mV
OS
CM
CM
CM
CM
–
= V LT1809 SO-8
+
= V
= V
–
+
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
●
●
9
9
25
25
µV/°C
µV/°C
OS
CM
CM
–
–
+
∆V
V
V
= V to V LT1809 SO-8
●
●
0.5
0.5
2.5
3.0
mV
mV
OS
CM
CM
–
+
= V to V
–
+
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V , V = V
●
1.2
6.5
10
40
mV
CM
CM
+
I
Input Bias Current
V
V
= V – 0.2V
●
●
2
–14
µA
µA
B
CM
CM
–
= V + 0.4V
–30
–
+
∆I
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
●
16
µA
B
CM
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
●
●
0.1
0.5
5
10
µA
µA
CM
CM
–
= V + 0.4V
+
I
Input Offset Current
V
V
= V – 0.2V
●
●
0.05
0.40
1.5
4.5
µA
µA
OS
CM
CM
–
= V + 0.4V
–
+
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
●
0.45
6
µA
OS
CM
A
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
V = 5V, V = 1V to 4V, R = 100Ω to V /2
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
●
●
●
20
3.5
12
75
8.5
40
V/mV
V/mV
V/mV
VOL
S
O
L
S
S
O
L
S
S
O
L
S
–
+
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = V to V
●
●
64
60
80
75
dB
dB
S
CM
–
+
V = 3V, V = V to V
S
CM
–
+
+
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V , V = V
●
●
58
54
80
75
dB
dB
S
CM
CM
–
V = 3V, V = V , V = V
S
CM
CM
–
+
Input Common Mode Range
●
●
●
●
V
V
V
dB
dB
V
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
70
64
83
83
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
V
V
No Load
●
●
●
12
55
200
60
140
400
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
Short-Circuit Current
No Load
●
●
●
50
110
370
120
220
700
mV
mV
mV
I
I
= 5mA
= 25mA
SOURCE
SOURCE
I
I
V = 5V
●
●
±40
±30
±75
±65
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Supply Current, Shutdown
●
15
20
mA
S
V = 5V, V
V = 3V, V
S
= 0.3V
= 0.3V
●
●
0.58
0.35
1.4
1.1
mA
mA
S
SHDN
SHDN
I
SHDN Pin Current
V = 5V, V
V = 3V, V
S
= 0.3V
= 0.3V
●
●
420
220
850
550
µA
µA
SHDN
S
SHDN
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
V
= 0.3V
●
●
●
2
µA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
4
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open; VCM = VOUT = half supply, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
80
MAX
UNITS
ns
t
t
Turn-On Time
V
V
= 0.3V to 4.5V, R = 100
●
●
●
●
●
ON
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
50
ns
OFF
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
145
250
20
MHz
V/µs
MHz
V = 5V, A = –1, R = 1k, V = 4V
S
V
L
O
P-P
FPBW
Full Power Bandwidth
V = 5V, V
= 4V
S
OUT P-P
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open;
VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
V
V
V
= V LT1809 SO-8
●
●
●
●
1
1
1
1
3.5
3.5
4.0
4.0
mV
mV
mV
mV
OS
CM
CM
CM
CM
–
= V LT1809 SO-8
+
–
= V
= V
+
–
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
●
●
9
9
25
25
µV/°C
µV/°C
OS
CM
CM
–
+
∆V
V
V
= V to V LT1809 SO-8
●
●
0.5
0.5
3.0
3.5
mV
mV
OS
CM
CM
–
= V
+
–
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V , V = V
●
1.2
7
mV
CM
CM
+
I
Input Bias Current
V
V
= V – 0.2V
●
●
2
–17
12
47
µA
µA
B
CM
CM
–
= V + 0.4V
–35
–
+
∆I
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
●
19
µA
B
CM
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
●
●
0.2
0.6
6
12
µA
µA
CM
CM
–
= V + 0.4V
+
I
Input Offset Current
V
V
= V – 0.2V
●
●
0.08
0.5
2
6
µA
µA
OS
CM
CM
–
= V + 0.4V
–
+
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
●
0.58
7.5
µA
OS
CM
A
V = 5V, V = 0.5V to 4.5V, R = 1k to V /2
●
●
●
17
2.5
10
60
7
35
V/mV
V/mV
V/mV
VOL
S
S
S
O
O
L
S
S
S
V = 5V, V = 1V to 4V, R = 100Ω to V /2
L
V = 3V, V = 0.5V to 2.5V, R = 1k to V /2
O
L
–
–
+
+
CMRR
PSRR
Common Mode Rejection Ratio
V = 5V, V = V to V
V = 3V, V = V to V
●
●
63
58
80
75
dB
dB
S
S
CM
CM
–
–
+
+
CMRR Match (Channel-to-Channel) (Note 10)
V = 5V, V = V to V
V = 3V, V = V to V
●
●
57
52
78
72
dB
dB
S
S
CM
CM
–
+
Input Common Mode Range
●
●
●
●
V
V
V
dB
dB
V
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
69
63
83
83
S
CM
PSRR Match (Channel-to-Channel) (Note 10)
Minimum Supply Voltage (Note 6)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
S
CM
2.3
2.5
V
V
No Load
●
●
●
18
60
210
70
150
450
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
Short-Circuit Current
No Load
●
●
●
55
130
240
750
mV
mV
mV
I
I
= 5mA
120
375
SOURCE
SOURCE
= 25mA
I
I
V = 5V
●
●
±30
±25
±70
±60
mA
mA
SC
S
V = 3V
S
Supply Current per Amplifier
Supply Current, Shutdown
●
15
21
mA
S
V = 5V, V
= 0.3V
= 0.3V
●
●
0.58
0.35
1.5
1.2
mA
mA
S
SHDN
SHDN
V = 3V, V
S
5
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = 5V, 0V; VS = 3V, 0V; VSHDN = open;
VCM = VOUT = half supply, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
SHDN Pin Current
V = 5V, V
V = 3V, V
S
= 0.3V
= 0.3V
●
●
420
220
900
600
µA
µA
SHDN
S
SHDN
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
V
= 0.3V
●
●
●
●
●
●
●
●
3
µA
V
SHDN
V
V
0.3
L
V – 0.5
S
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
SHDN
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
140
180
14
MHz
V/µs
MHz
V = 5V, A = -1, R = 1k, V = 4V
S
V
L
O
P-P
FPBW
Full Power Bandwidth
V = 5V, V
S
= 4V
OUT P-P
TA = 25°C. VS = ±5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
OS
Input Offset Voltage
V
CM
V
CM
V
CM
V
CM
= V LT1809 SO-8
0.8
0.8
0.8
0.8
3.0
3.0
3.5
3.5
mV
mV
mV
mV
–
= V LT1809 SO-8
+
–
= V
= V
–
+
+
∆V
OS
Input Offset Voltage Shift
V
CM
V
CM
= V to V LT1809 SO-8
0.35
0.35
2.5
3.0
mV
mV
–
= V to V
+
–
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
CM
= V , V = V
1
6
mV
CM
+
–
I
Input Bias Current
V
V
= V
2
10
40
µA
µA
B
CM
CM
= V + 0.2V
–30
–12.5
–
+
+
∆I
Input Bias Current Shift
V
CM
= V + 0.2V to V
14.5
µA
B
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
CM
V
CM
= V
0.1
0.4
5
10
µA
µA
–
= V + 0.2V
+
I
Input Offset Current
V
CM
V
CM
= V
0.05
0.40
2
5
µA
µA
OS
–
= V + 0.2V
–
∆I
Input Offset Current Shift
Input Noise Voltage Density
Input Noise Current Density
Input Capacitance
V
CM
= V + 0.2V to V
0.45
16
5
7
µA
nV/√Hz
pA/√Hz
pF
OS
e
f = 10kHz
f = 10kHz
f = 100kHz
n
i
n
C
A
2
IN
Large-Signal Voltage Gain
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100Ω
30
4.5
100
12
V/mV
V/mV
VOL
O
O
L
L
–
+
CMRR
Common Mode Rejection Ratio
V
CM
V
CM
= V to V
70
89
89
dB
dB
V
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
64
–
+
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
71
65
87
90
dB
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
No Load
V
V
12
50
180
60
140
425
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
No Load
SOURCE
SOURCE
35
90
310
100
200
700
mV
mV
mV
OH
I
I
= 5mA
= 25mA
6
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
TA = 25°C. VS = ±5V, VSHDN = open, VCM = 0V, VOUT = 0, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
MIN
TYP
±85
15
MAX
UNITS
mA
mA
mA
µA
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
±55
SC
S
20
1.3
750
75
V
V
V
= 0.3V
= 0.3V
= 0.3V
0.6
420
0.1
SHDN
SHDN
SHDN
I
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
µA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
A = –1, R = 1k, V = ±4V,
110
175
180
350
MHz
V/µs
V
L
O
Measured at V = ±3V
O
FPBW
THD
Full Power Bandwidth
Total Harmonic Distortion
Settling Time
V
= 8V
14
–90
34
MHz
dB
OUT
P-P
A = 1, R = 1k, V = 2V , f = 5MHz
V
L
O
P-P C
t
0.1%, V
= 8V, A = –1, R = 500Ω
ns
S
STEP
V
L
∆G
Differential Gain (NTSC)
Differential Phase (NTSC)
A = 2, R = 150Ω
0.01
0.01
%
V
L
∆θ
A = 2, R = 150Ω
Deg
V
L
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = ±5V, VSHDN = open, VCM = 0V,
VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
V
V
V
= V LT1809 SO-8
●
●
●
●
1
1
1
1
3.25
3.25
3.75
3.75
mV
mV
mV
mV
OS
CM
CM
CM
CM
–
= V LT1809 SO-8
+
= V
= V
–
+
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
●
●
10
10
25
25
µV/°C
µV/°C
OS
CM
CM
–
–
+
∆V
V
V
= V to V LT1809 SO-8
●
●
0.5
0.5
2.75
3.25
mV
mV
OS
CM
CM
–
+
= V to V
–
+
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V to V
●
1.2
6.5
12.5
50
mV
CM
+
I
Input Bias Current
V
V
= V – 0.2V
●
●
2.5
–15
µA
µA
B
CM
CM
–
= V + 0.4V
–37.5
–
+
∆I
B
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
●
17.5
µA
CM
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
●
●
0.1
0.5
6
12
µA
µA
CM
CM
–
= V + 0.4V
+
I
Input Offset Current
V
V
= V – 0.2V
●
●
0.06
0.5
2.25
6
µA
µA
OS
CM
CM
–
= V + 0.4V
–
+
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
●
0.56
8.25
µA
OS
CM
A
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100Ω
●
●
27
3.5
80
10
V/mV
V/mV
VOL
O
L
O
L
–
+
CMRR
Common Mode Rejection Ratio
V
V
= V to V
●
●
●
69
63
86
86
dB
dB
V
CM
CM
–
+
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
–
+
V
V
7
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C
temperature range. VS = ±5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted.
SYMBOL PARAMETER
PSRR Power Supply Rejection Ratio
CONDITIONS
MIN
70
TYP
83
MAX
UNITS
dB
+
–
V = 2.5V to 10V, V = 0V
●
●
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
64
83
dB
V
V
No Load
●
●
●
20
50
210
80
160
475
mV
mV
mV
OL
OH
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
No Load
●
●
●
60
120
370
140
240
750
mV
mV
mV
I
= 5mA
= 25mA
SOURCE
SOURCE
I
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
●
●
●
●
●
●
●
●
●
●
●
±45
±75
17.5
0.6
420
3
mA
mA
mA
µA
SC
25
1.5
850
S
V
V
V
= 0.3V
SHDN
SHDN
SHDN
I
= 0.3V
= 0.3V
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
µA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
A = –1, R = 1k, V = ±4V,
85
170
300
MHz
V/µs
140
V
L
O
Measured at V = ±3V
O
FPBW
Full Power Bandwidth
V
= 8V
●
12
MHz
OUT
P-P
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = ±5V, VSHDN = open, VCM = 0V,
VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
+
V
Input Offset Voltage
V
V
V
V
= V LT1809 SO-8
●
●
●
●
1
1
1
1
3.75
3.75
4.25
4.25
mV
mV
mV
mV
OS
CM
CM
CM
CM
–
= V LT1809 SO-8
+
= V
= V
–
+
V
TC
Input Offset Voltage Drift (Note 8)
Input Offset Voltage Shift
V
V
= V
= V
●
●
10
10
25
25
µV/°C
µV/°C
OS
CM
CM
–
–
+
∆V
V
V
= V to V LT1809 SO-8
●
●
0.5
0.5
3.00
3.75
mV
mV
OS
CM
CM
–
+
= V to V
–
+
Input Offset Voltage Match (Channel-to-Channel)
(Note 10)
V
= V to V
●
1.2
7.5
14
59
mV
CM
+
I
Input Bias Current
V
V
= V – 0.2V
●
●
2.8
–17
µA
µA
B
CM
CM
–
= V + 0.4V
–45
–
+
∆I
Input Bias Current Shift
V
= V + 0.4V to V – 0.2V
●
19.8
µA
B
CM
+
Input Bias Current Match (Channel-to-Channel)
(Note 10)
V
V
= V – 0.2V
●
●
0.1
0.6
7
14
µA
µA
CM
CM
–
= V + 0.4V
+
I
Input Offset Current
V
V
= V – 0.2V
●
●
0.08
0.6
2.5
8
µA
µA
OS
CM
CM
–
= V + 0.4V
–
+
∆I
Input Offset Current Shift
Large-Signal Voltage Gain
V
= V + 0.4V to V – 0.2V
●
0.68
10.5
µA
OS
CM
A
V = –4V to 4V, R = 1k
V = –2.5V to 2.5V, R = 100Ω
●
●
22
3
70
10
V/mV
V/mV
VOL
O
L
O
L
8
LT1809/LT1810
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C
temperature range. VS = ±5V, VSHDN = open, VCM = 0V, VOUT = 0V, unless otherwise noted. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
68
TYP
86
MAX
UNITS
dB
–
+
+
CMRR
Common Mode Rejection Ratio
V
CM
V
CM
= V to V
●
●
●
●
●
–
CMRR Match (Channel-to-Channel) (Note 10)
Input Common Mode Range
= V to V
62
86
dB
–
+
V
V
V
+
–
PSRR
Power Supply Rejection Ratio
V = 2.5V to 10V, V = 0V
69
63
83
83
dB
+
–
PSRR Match (Channel-to-Channel) (Note 10)
Output Voltage Swing LOW (Note 7)
V = 2.5V to 10V, V = 0V
dB
V
V
No Load
●
●
●
23
60
220
100
170
525
mV
mV
mV
OL
I
I
= 5mA
= 25mA
SINK
SINK
Output Voltage Swing HIGH (Note 7)
No Load
●
●
●
75
130
375
160
260
775
mV
mV
mV
OH
I
I
= 5mA
= 25mA
SOURCE
SOURCE
I
I
Short-Circuit Current
Supply Current per Amplifier
Supply Current, Shutdown
SHDN Pin Current
●
●
●
●
●
●
●
●
●
●
●
±30
±75
19
mA
mA
mA
µA
SC
25
1.6
900
S
V
V
V
= 0.3V
= 0.3V
= 0.3V
0.65
420
4
SHDN
SHDN
SHDN
I
SHDN
Output Leakage Current, Shutdown
SHDN Pin Input Voltage Low
SHDN Pin Input Voltage High
Turn-On Time
µA
V
V
0.3
V
L
+
V – 0.5
V
H
t
t
V
V
= 0.3V to 4.5V, R = 100
80
50
ns
ON
OFF
SHDN
L
Turn-Off Time
= 4.5V to 0.3V, R = 100
ns
SHDN
L
GBW
SR
Gain-Bandwidth Product
Slew Rate
Frequency = 2MHz
80
160
220
MHz
V/µs
A = –1, R = 1k, V = ±4V,
V
110
L
O
Measured at V = ±3V
O
FPBW
Full Power Bandwidth
V
OUT
= 8V
●
8.5
MHz
P-P
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 1.4V, the input current should be limited to less than
10mA.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 8: This parameter is not 100% tested.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 9: Thermal resistance varies depending upon the amount of PC board
–
metal attached to the V pin of the device. θ is specified for a certain
JA
–
amount of 2oz of copper metal trace connecting to the V pin as described
Note 4: The LT1809C/LT1809I and LT1810C/LT1810I are guaranteed
functional over the operating temperature range of –40°C and 85°C.
in the thermal resistance tables in the Applications Information section.
Note 10: Matching parameters are the difference between the two
Note 5: The LT1809C/LT1810C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1809C/LT1810C are designed,
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LT1809I/LT1810I are guaranteed to meet specified performance from
–40°C to 85°C.
amplifiers of the LT1810.
9
LT1809/LT1810
TYPICAL PERFOR A CE CHARACTERISTICS
U W
VOS Distribution, VCM = 0V
(PNP Stage)
VOS Distribution, VCM = 5V
(NPN Stage)
∆VOS Shift for VCM = 0V to 5V
50
40
30
20
50
40
30
20
25
20
15
10
V
S
= 5V, 0V
V
S
= 5V, 0V
V = 5V, 0V
S
10
0
10
0
5
0
–3
–1
0
1
2
3
–3
–1
0
1
2
3
–1 0
0.25 0.5 0.75
INPUT OFFSET VOLTAGE (mV)
1
–2
–2
–0.75 –0.5 –0.25
INPUT OFFSET VOLTAGE (mV)
INPUT OFFSET VOLTAGE (mV)
1809 G01
1809 G02
1809 G03
Input Bias Current
vs Common Mode Voltage
Offset Voltage
vs Input Common Mode
Supply Current vs Supply Voltage
25
20
15
10
5
2.0
1.5
V
= 5V, 0V
V = 5V, 0V
S
S
TYPICAL PART
T
= 25°C
A
T
= 125°C
= 25°C
A
0
T
= 125°C
T
= 125°C
A
A
1.0
0.5
T
A
= –55°C
–5
T
= 25°C
A
T
A
–10
–15
–20
–25
–30
T
A
= –55°C
A
0
10
5
T
= 25°C
A
T
= –55°C
A
–0.5
–1.0
–1.5
T
= 125°C
T
= –55°C
A
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
–1
0
1
2
3
4
5
6
TOTAL SUPPLY VOLTAGE (V)
INPUT COMMON MODE VOLTAGE (V)
COMMON MODE VOLTAGE (V)
1809 G04
1809 G05
1809 G06
Output Saturation Voltage
vs Load Current (Output Low)
Output Saturation Voltage
vs Load Current (Output High)
Input Bias Current vs Temperature
5
3
10
1
10
1
V
S
= 5V, 0V
V
S
= 5V, 0V
V
S
= 5V, 0V
V
CM
= 5V
1
–1
–3
–5
–7
–9
–11
–13
–15
T
= 125°C
= 25°C
0.1
0.1
A
V
= 0V
CM
T
= 125°C
T
A
A
0.01
0.001
0.01
0.001
T
= 25°C
T
= –55°C
A
A
T
A
= –55°C
–50 –35 –20 –5 10 25 40 55 70 85
0.01
0.1
1
10
100
0.01
0.1
1
10
100
LOAD CURRENT (mA)
TEMPERATURE (°C)
LOAD CURRENT (mA)
1809 G08
1809 G09
1809 G07
10
LT1809/LT1810
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current
vs SHDN Pin Voltage
Output Short-Circuit Current
vs Power Supply Voltage
Minimum Supply Voltage
1.0
0.8
18
16
14
12
10
8
120
100
80
V
CM
= V– + 0.5V
V
S
= 5V, 0V
T
= 25°C
T
= –55°C
= 125°C
A
A
T
= 125°C
A
0.6
T
60
A
0.4
“SINKING”
40
T
A
= 25°C
0.2
T
A
= –55°C
20
0
0
T
A
= 125°C
–0.2
–0.4
–0.6
–0.8
–1.0
–20
–40
–60
–80
–100
6
“SOURCING”
T
A
= 25°C
T
= –55°C
4
A
T
A
= 125°C
T
= –55°C
A
2
T
= 25°C
A
0
1.5
2.5 3.0 3.5
4.0 4.5 5.0
2.0
1.5
2.5 3.0 3.5
4.0 4.5 5.0
2.0
0
4
5
1
2
3
TOTAL SUPPLY VOLTAGE (V)
POWER SUPPLY VOLTAGE (±V)
SHDN PIN VOLTAGE (V)
1809 G10
1809 G11
1809 G12
SHDN Pin Current
vs SHDN Pin Voltage
Open-Loop Gain
Open-Loop Gain
2.5
2.0
2.5
2.0
50
V
S
= 3V, 0V
V = 5V, 0V
S
V
S
= 5V, 0V
0
–50
1.5
1.5
1.0
1.0
–100
–150
–200
–250
–300
–350
–400
–450
T
= 125°C
A
0.5
0.5
T
= –55°C
R
= 1k
R = 1k
L
T
A
= 25°C
A
L
0
0
–0.5
–1.0
–1.5
–2.0
–2.5
–0.5
–1.0
–1.5
–2.0
–2.5
R
= 100Ω
R
= 100Ω
L
L
0
0.5
1.5
2.0
2.5
3.0
0
1
3
4
5
0
1
2
3
4
5
1.0
2
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
SHDN PIN VOLTAGE (V)
1809 G14
1809 G15
1809 G13
Open-Loop Gain
Offset Voltage vs Output Current
Warm-Up Drift vs Time (LT1809S8)
15
10
2.5
2.0
180
160
140
120
100
80
V
= ±5V
T
= 25°C
V
= ±5V
S
A
S
V
S
= ±5V
1.5
T
= 25°C
A
1.0
5
0
T
= 125°C
A
0.5
R
L
= 1k
L
0
T
A
= –55°C
V
= 5V, 0V
= 3V, 0V
–0.5
–1.0
–1.5
–2.0
–2.5
S
–5
–10
–15
60
V
S
R
= 100Ω
40
20
0
–100–80 –60 –40 –20
0
20 40 60 80 100
–5 –4 –3 –2 –1
0
1
2
3
4
5
40
TIME AFTER POWER UP (SEC)
0
20
60 80 100 120 140 160
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
1809 G17
1809 G16
1809 G18
11
LT1809/LT1810
TYPICAL PERFOR A CE CHARACTERISTICS
U W
0.1Hz to 10Hz
Output Voltage Noise
Input Noise Voltage vs Frequency
Input Noise Current vs Frequency
100
90
20
16
12
8
10
8
V
= 5V, 0V
V
= 5V, 0V
S
S
80
6
70
4
60
50
2
0
NPN ACTIVE
= 4.5V
40
30
20
10
0
–2
–4
–6
–8
–10
PNP ACTIVE
= 2.5V
V
CM
V
CM
PNP ACTIVE
4
V
CM
= 2.5V
NPN ACTIVE
V
CM
= 4.5V
0
0.1
1
10
100
0.1
1
10
100
TIME (2 SEC/DIV)
FREQUENCY (kHz)
FREQUENCY (kHz)
1809 G21
1809 G19
1809 G20
Gain Bandwidth and Phase Margin
vs Supply Voltage
Gain Bandwidth and Phase Margin
vs Temperature
Slew Rate vs Temperature
55
50
45
40
35
30
450
400
350
300
250
200
150
100
50
55
50
45
40
35
T
= 25°C
= 1k
A
L
V
= ±5V
R
S
PHASE MARGIN
V
S
= ±5V
PHASE MARGIN
V
= 3V, 0V
S
V
S
= 5V, 0V
190
185
180
175
170
165
160
200
V
= ±5V
S
190
180
170
160
150
GAIN BANDWIDTH
A
R
R
= 1
V
F
L
= R = 1k
G
V
= 3V, 0V
S
= 1k
RISING AND FALLING
SLEW RATE
GAIN BANDWIDTH
–25
0
50
75 100 125
50
75 100 125
–55
25
–55
–25
0
25
0
2
4
6
8
10
TEMPERATURE (°C)
TEMPERATURE (°C)
TOTAL SUPPLY VOLTAGE (V)
1809 G25
1809 G24
1809 G23
Gain and Phase vs Frequency
Closed-Loop Gain vs Frequency
Closed-Loop Gain vs Frequency
15
12
9
15
12
9
60
50
100
80
A
V
= +1
A
V
= +2
PHASE
V
S
= 3V, 0V
V = ±5V
S
40
60
6
6
V
S
= 3V
V
S
= 3V
30
40
3
3
V
S
= ±5V
V
= ±5V
S
0
0
20
20
V
S
= ±5V
V
S
= 3V, 0V
–3
–6
–9
–12
–15
–3
–6
–9
–12
–15
10
0
GAIN
0
–20
–40
–60
–10
–20
C
= 5pF
= 1k
L
L
R
100k
1M
10M
FREQUENCY (Hz)
100M 500M
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M 500M
1809 G22
1809 G26
1809 G27
12
LT1809/LT1810
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
Output Impedance vs Frequency
100
90
600
100
110
100
90
V
T
= 5V, 0V
S
A
V
= 5V, 0V
V
= 5V, 0V
S
S
= 25°C
80
POSITIVE
SUPPLY
70
80
10
1
60
50
70
60
A
= 10
NEGATIVE
SUPPLY
V
A
= 2
V
40
30
20
10
0
50
40
30
20
10
A
= 1
V
0.1
0.01
1k
10k
100k
1M
10M
100M
100k
1M
10M
FREQUENCY (Hz)
100M 500M
10k
100k
1M
10M
100M 500M
FREQUENCY (Hz)
FREQUENCY (Hz)
1809 G31
1809 G28
1809 G30
Series Output Resistor
vs Capacitive Load
Series Output Resistor
vs Capacitive Load
0.01% Settling Time
40
35
30
25
20
15
10
5
50
45
40
35
30
25
20
15
10
5
INPUT SIGNAL
GENERATION
(2V/DIV)
V
A
= 5V, 0V
= +1
V
A
= 5V, 0V
= +2
S
V
S
V
OUTPUT
SETTLING
RESOLUTION
(2mV/DIV)
R
R
= 10Ω
S
L
=
∞
R
R
= 10Ω,
= ∞
S
L
R
R
= 20Ω
S
L
=
∞
R
S
= 20Ω, R = ∞
L
R
= R = 50Ω
S
L
VS = ±5V
VOUT = ±4V
AV = –1
20ns/DIV
1809 G34
R
= R = 50Ω
S
L
0
0
R
L = 500Ω
10
100
1000
10
100
CAPACITIVE LOAD (pF)
1000
tS = 110ns (SETTLING TIME)
CAPACITIVE LOAD (pF)
1809 G33
1809 G32
Distortion vs Frequency
Distortion vs Frequency
Distortion vs Frequency
–40
–50
–40
–50
–40
–50
A
V
V
O
V
S
= +1
= 2V
= 5V
A
V
V
O
V
S
= +1
= 2V
A
V
V
O
V
S
= +2
= 2V
P-P
P-P
P-P
= ±5V
= ±5V
–60
–60
–60
R
L
= 100Ω, 2ND
R
= 1k, 2ND
L
–70
–70
–70
R
L
= 100Ω, 2ND
R
R
= 100Ω, 2ND
= 100Ω, 3RD
1
L
–80
–80
–80
R
L
= 1k, 2ND
–90
–90
–90
R
L
= 100Ω, 3RD
L
R
L
= 1k, 3RD
10
R
= 1k, 3RD
L
R
L
= 1k, 3RD
10
R = 100Ω, 3RD
L
–100
–100
–100
R
L
= 1k, 2ND
–110
–110
–110
0.3
30
0.3
1
10
30
0.3
1
30
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
1809 G36
1809 G35
1809 G37
13
LT1809/LT1810
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Undistorted Output
Signal vs Frequency
Distortion vs Frequency
–40
–50
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
V
= 5V
A
V
V
O
V
S
= +2
= 2V
= 5V
S
P-P
A
= –1
V
–60
R
L
= 100Ω, 2ND
–70
A
= +2
V
R
L
= 100Ω, 3RD
–80
R
L
= 1k, 2ND
R
L
= 1k, 3RD
–90
–100
–110
0.3
1
10
30
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
1809 G38
1809 G39
±5V Large-Signal Response
±5V Small-Signal Response
5V Large-Signal Response
VS = ±5V
AV = +1
RL = 1k
10ns/DIV
1809 G40
VS = ±5V
AV = +1
RL = 1k
10ns/DIV
1809 G41
VS = 5V
AV = +1
RL = 1k
10ns/DIV
1809 G42
5V Small-Signal Response
Output Overdriven Recovery
Shutdown Response
VIN
VSHDN
0V
(1V/DIV)
0V
0V
VOUT
(2V/DIV)
VOUT
0V
VS = 5V
AV = +1
RL = 1k
10ns/DIV
1809 G43
VS = 5V, 0V
AV = +2
100ns/DIV
1809 G44
V
S = 5V, 0V
100ns/DIV
1809 G44
AV = +2
RL = 100Ω
14
LT1809/LT1810
W U U
APPLICATIO S I FOR ATIO
U
Power Dissipation
Rail-to-Rail Characteristics
The LT1809/LT1810 amplifiers combine high speed with
large output current in a small package, so there is a need
to ensure that the die’s junction temperature does not
exceed 150°C. The LT1809 is housed in an SO-8 package
or a 6-lead SOT-23 package and the LT1810 is in an SO-8
or 8-lead MSOP package. All packages have the V– supply
pinfusedtotheleadframetoenhancethethermalconduc-
tance when connecting to a ground plane or a large metal
trace. Metal trace and plated through-holes can be used to
spread the heat generated by the device to the backside of
the PC board. For example, on a 3/32" FR-4 board with 2oz
copper, a total of 660 square millimeters connected to
Pin 4 of LT1810 in an SO-8 package (330 square millime-
ters on each side of the PC board) will bring the thermal
resistance, θJA, to about 85°C/W. Without extra metal
trace connected to the V– pin to provide a heat sink, the
thermal resistance will be around 105°C/W. More infor-
mationonthermalresistanceforallpackageswithvarious
metal areas connecting to the V– pin is provided in Tables
1, 2 and 3 for thermal consideration.
The LT1809/LT1810 have an input and output signal
range that includes both negative and positive power
supply. Figure 1 depicts a simplified schematic of the
amplifier. The input stage is comprised of two differential
amplifiers, a PNP stage Q1/Q2 and a NPN stage Q3/Q4
that are active over different ranges of common mode
input voltage. The PNP differential pair is active for
common mode voltages between the negative supply to
approximately 1.5V below the positive supply. As the
input voltage moves closer toward the positive supply,
the transistor Q5 will steer the tail current I1 to the current
mirror Q6/Q7, activating the NPN differential pair and
causingthePNPpairtobecomeinactivefortherestofthe
input common mode range up to the positive supply.
A pair of complementary common emitter stages
Q14/Q15 form the output stage, enabling the output to
swingfromrail-to-rail.ThecapacitorsC1andC2formthe
local feedback loops that lower the output impedance at
high frequency. These devices are fabricated on Linear
Technology’s proprietary high speed complementary
bipolar process.
+
V
R6
10k
R3
R4
R5
Q16
Q17
+
–
+
V
V
V
Q12
ESDD5
D9
D1
ESDD1
+IN
ESDD2
Q11
Q13
Q15
R7
100k
I
1
C2
SHDN
D6
D5
D8
D7
Q5
V
BIAS
I
2
D2
ESDD6
OUT
C
C
–
V
–
V
–IN
Q4 Q3
Q1 Q2
D3
BUFFER
AND
ESDD4
ESDD3
OUTPUT BIAS
Q10
–
+
V
V
D4
Q9
R1
Q8
R2
BIAS
GENERATION
C1
Q14
Q7
Q6
–
V
1809 F01
Figure 1. LT1809 Simplified Schematic Diagram
15
LT1809/LT1810
W U U
U
APPLICATIO S I FOR ATIO
Table 1. LT1809 6-Lead SOT-23 Package
connected to its V– pin has a thermal resistance of
105°C/W, θJA. Operating on ±5V supplies with both
amplifiers simultaneously driving 50Ω loads, the worst-
case power dissipation is given by:
COPPER AREA
TOPSIDE (mm )
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2
2
(mm )
270
100
20
2500
2500
2500
2500
135°C/W
145°C/W
160°C/W
200°C/W
PD(MAX) = 2 • (10 • 25mA) + 2 • (2.5)2/50
= 0.5 + 0.250 = 0.750W
0
Device is mounted on topside.
The maximum ambient temperature that the part is al-
lowed to operate is:
Table 2. LT1809/LT1810 SO-8 Package
COPPER AREA
TA = TJ – (PD(MAX) • 105°C/W)
TOPSIDE
(mm )
BACKSIDE BOARD AREA
(mm )
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2
2
2
(mm )
= 150°C – (0.750W • 105°C/W) = 71°C
1100
330
35
1100
330
35
2500
2500
2500
2500
2500
65°C/W
85°C/W
95°C/W
100°C/W
105°C/W
To operate the device at higher ambient temperature,
connect more metal area to the V– pin to reduce the
thermal resistance of the package as indicated in Table 2.
35
0
0
0
Input Offset Voltage
Device is mounted on topside.
Theoffsetvoltagewillchangedependinguponwhichinput
stage is active and the maximum offset voltage is guaran-
teedtobelessthan3mV. ThechangeofVOS overtheentire
input common mode range (CMRR) is less than 2.5mV on
a single 5V and 3V supply.
Table 3. LT1810 8-Lead MSOP Package
COPPER AREA
TOPSIDE
(mm )
BACKSIDE
(mm )
BOARD AREA THERMAL RESISTANCE
2
2
2
(mm )
2500
2500
2500
2500
2500
(JUNCTION-TO-AMBIENT)
540
100
100
30
540
100
0
110°C/W
120°C/W
Input Bias Current
130°C/W
0
135°C/W
The input bias current polarity depends upon a given input
common voltage at whichever input stage is operating.
WhenthePNPinputstageisactive, theinputbiascurrents
flow out of the input pins and flow into the input pins when
the NPN input stage is activated. Because the input offset
current is less than the input bias current, matching the
source resistances at the input pin will reduce total offset
error.
0
0
140°C/W
Device is mounted on topside.
Junction temperature TJ is calculated from the ambient
temperature TA and power dissipation PD as follows:
TJ = TA + (PD • θJA)
ThepowerdissipationintheICisthefunctionofthesupply
voltage,outputvoltageandtheloadresistance.Foragiven
supply voltage, the worst-case power dissipation PD(MAX)
occurs at the maximum supply current with the output
voltage at half of either supply voltage (or the maximum
swingislessthan1/2thesupplyvoltage). PD(MAX) isgiven
by:
PD(MAX) = (VS • IS(MAX)) + (VS/2)2/RL
Example: An LT1810 in SO-8 mounted on a 2500mm2
area of PC board without any extra heat spreading plane
Output
The LT1809/LT1810 can deliver a large output current,
so the short-circuit current limit is set around 90mA to
prevent damage to the device. Attention must be paid to
keep the junction temperature of the IC below the abso-
lute maximum rating of 150°C (refer to the Power Dissi-
pation section) when the output is continuously short
circuited. The output of the amplifier has reverse-biased
diodes connected to each supply. If the output is forced
16
LT1809/LT1810
W U U
APPLICATIO S I FOR ATIO
U
beyond either supply, unlimited current will flow through
these diodes. If the current is transient and limited to
several hundred milliamps, no damage to the device will
occur.
output and the capacitive load to avoid ringing or oscilla-
tion. The feedback should still be taken from the output so
that the resistor will isolate the capacitive load to ensure
stability. Graphs on capacitive loads indicate the transient
responseoftheamplifierwhendrivingcapacitiveloadwith
a specified series resistor.
Overdrive Protection
When the input voltage exceeds the power supplies, two
pairs of crossing diodes, D1 to D4, will prevent the output
fromreversingpolarity. Iftheinputvoltageexceedseither
power supply by 700mV, diodes D1/D2 or D3/D4 will turn
on, keeping the output at the proper polarity. For the
phase reversal protection to perform properly, the input
current must be limited to less than 5mA. If the amplifier
isseverelyoverdriven,anexternalresistorshouldbeused
to limit the overdrive current.
Feedback Components
Whenfeedbackresistorsareusedtosetupgain,caremust
be taken to ensure that the pole formed by the feedback
resistors and the total capacitance at the inverting input
does not degrade stability. For instance, the LT1809 in a
noninverting gain of 2, set up with two 1K resistors and a
capacitance of 3pF (device plus PC board), will probably
ring in transient response. The pole that is formed at
106MHzwillreducephasemarginby34degreeswhenthe
crossover frequency of the amplifier is around 70MHz. A
capacitor of 3pF or higher connected across the feedback
resistor will eliminate any ringing or oscillation.
The LT1809/LT1810’s input stages are also protected
against differential input voltages of 1.4V or higher by
back-to-backdiodes,D5/D8,thatpreventtheemitter-base
breakdown of the input transistors. The current in these
diodes should be limited to less than 10mA when they are
active. The worst-case differential input voltage usually
occurs when the input is driven while the output is shorted
to ground in a unity-gain configuration. In addition, the
amplifier is protected against ESD strikes up to 3kV on all
pins by a pair of protection diodes on each pin that are
connected to the power supplies as shown in Figure 1.
SHDN Pin
The LT1809 has a SHDN pin to reduce the supply current
to less than 1.25mA. When the SHDN pin is pulled low, it
will generate a signal to power down the device. If the pin
is left unconnected, an internal pull-up resistor of 10k will
keep the part fully operating as shown in Figure 1. The
output will be high impedance during shutdown, and the
turn-on and turn-off time is less than 100ns. Because the
inputs are protected by a pair of back-to-back diodes, the
input signal will feed through to the output during shut-
down mode if the amplitude of signal between the inputs
is larger than 1.4V.
Capacitive Load
The LT1809/LT1810 is optimized for high bandwidth and
low distortion applications. It can drive a capacitive load
about 20pF in a unity-gain configuration and more with
higher gain. When driving a larger capacitive load, a
resistor of 10Ω to 50Ω should be connected between the
17
LT1809/LT1810
U
TYPICAL APPLICATIO S
Driving A/D Converters
and resistors, an NPO chip capacitor and metal-film sur-
face mount resistors, should be used since these compo-
nents can add to distortion. The voltage glitch of the
converter, due to its sampling nature, is buffered by the
LT1809 and the ability of the amplifier to settle it quickly
will affect the spurious-free dynamic range of the system.
Figure2toFigure7depicttheLT1809drivingtheLTC1420
at different configurations and voltage supplies. The FFT
responses show better than 90dB of SFDR for a ±5V
supply, and 80dB on a 5V single supply for the 1.394MHz
signal.
The LT1809/LT1810 have a 27ns settling time to 0.1% of
a 2V step signal and 20Ω output impedance at 100MHz
makingitidealfordrivinghighspeedA/Dconverters. With
the rail-to-rail input and output and low supply voltage
operation, the LT1809 is also desirable for single supply
applications. As shown in Figure 2, the LT1809 drives a
10Msps, 12-bit ADC, the LTC1420. The lowpass filter, R3
and C1, reduces the noise and distortion products that
might come from the input signal. High quality capacitors
5V
5V
V
P-P
IN
R3
49.9Ω
+
–
1V
LTC1420
12 BITS
•
•
•
LT1809
–5V
+A
PGA GAIN = 1
REF = 2.048V
IN
10Msps
C1
470pF
–A
IN
R2
1k
1809 F02
–5V
R1
1k
Figure 2. Noninverting A/D Driver
0
V
A
= ±5V
S
V
= +2
–20
f
f
= 10Msps
= 1.394MHz
SAMPLE
IN
SFDR = 90dB
–40
–60
–80
–100
–120
0
1
2
3
4
5
FREQUENCY (MHz)
1809 F03
Figure 3. 4096 Point FFT Response
18
LT1809/LT1810
U
TYPICAL APPLICATIO S
0
–20
–40
–60
1k
5V
5V
1k
V
P-P
IN
–
+
–80
–100
–120
2V
49.9Ω
LTC1420
PGA GAIN = 1
REF = 2.048V
12 BITS
10Msps
•
•
•
LT1809
–5V
+A
IN
–A
IN
470pF
1809 F04
0
1
2
3
4
5
–5V
FREQUENCY (MHz)
1809 F05
Figure 4. Inverting A/D Driver
Figure 5. 4096 Point FFT Response
0
–20
5V
–40
–60
5V
V
P-P
ON 2.5V DC
IN
3
2
7
1V
+
–
49.9Ω
LTC1420
PGA GAIN = 2
REF = 4.096V
6
1
12 BITS
10Msps
•
•
•
LT1809
4
+A
IN
–80
–100
–120
1
–A
IN
2
470pF
V
CM
1809 F06
3
1k
1µF
1k
0
1
2
3
4
5
FREQUENCY (MHz)
0.15µF
1809 F07
Figure 7. 4096 Point FFT Response
Figure 6. Single Supply A/D Driver
19
LT1809/LT1810
U
TYPICAL APPLICATIO S
Single Supply Video Line Driver
The LT1809 is a wideband rail-to-rail op amp with a large
output current that allows it to drive video signals in low
supply applications. Figure 8 depicts a single supply video
line driver with AC coupling to minimize the quiescent
power dissipation. Resistors R1 and R2 are used to level-
shift the input and output to provide the largest signal
swing. A gain of 2 is set up with R3 and R4 to restore the
signal at VOUT, which is attenuated by 6dB due to the
matching of the 75Ω line with the back-terminated
resistor, R5. The back termination will eliminate any re-
flection of the signal that comes from the load. The input
termination resistor, RT, is optional—it is used only if
matching of the incoming line is necessary. The values of
C1, C2 and C3 are selected to minimize the droop of the
luminance signal. In some less stringent requirements,
the value of capacitors could be reduced. The –3dB band-
width of the driver is about 95MHz on 5V supply and the
amountofpeakingwillvaryuponthevalueofcapacitorC4.
5V
C1
R1
33µF
5k
C3
3
2
7
LT1809
4
75Ω
R5
V
IN
+
–
1000µF
COAX CABLE
75Ω
6
R
R2
5k
T
V
OUT
75Ω
R
LOAD
75Ω
R4
1k
1809 F08
C4
3pF
R3
1k
+
C2
150µF
Figure 8. 5V Single Supply Video Line Driver
5
V
S
= 5V
4
3
2
1
0
–1
–2
–3
–4
–5
0.2
1
10
100
FREQUENCY (MHz)
1809 F09
Figure 9. Video Line Driver Frequency Response
20
LT1809/LT1810
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1634)
(Reference LTC DWG # 05-08-1636)
2.80 – 3.10
(.110 – .118)
(NOTE 3)
SOT-23
(Original)
SOT-23
(ThinSOT)
.90 – 1.45
1.00 MAX
A
A1
A2
L
(.035 – .057)
(.039 MAX)
.00 – 0.15
(.00 – .006)
.01 – .10
(.0004 – .004)
2.60 – 3.00
1.50 – 1.75
(.102 – .118) (.059 – .069)
(NOTE 3)
.90 – 1.30
(.035 – .051)
.80 – .90
(.031 – .035)
PIN ONE ID
.35 – .55
(.014 – .021)
.30 – .50 REF
(.012 – .019 REF)
.95
(.037)
REF
.25 – .50
(.010 – .020)
(6PLCS, NOTE 2)
.20
(.008)
A2
A
DATUM ‘A’
1.90
(.074)
REF
L
.09 – .20
(.004 – .008)
(NOTE 2)
A1
S6 SOT-23 0401
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
4. DIMENSIONS ARE INCLUSIVE OF PLATING
5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
6. MOLD FLASH SHALL NOT EXCEED .254mm
7. PACKAGE EIAJ REFERENCE IS:
SC-74A (EIAJ) FOR ORIGINAL
JEDEC MO-193 FOR THIN
21
LT1809/LT1810
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7
6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2
3
4
0.043
(1.10)
MAX
0.034
(0.86)
REF
0.007
(0.18)
0° – 6° TYP
SEATING
PLANE
0.009 – 0.015
(0.22 – 0.38)
0.021 ± 0.006
(0.53 ± 0.015)
0.005 ± 0.002
(0.13 ± 0.05)
0.0256
(0.65)
BSC
MSOP (MS8) 1100
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
22
LT1809/LT1810
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 1298
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
23
LT1809/LT1810
U
TYPICAL APPLICATIO
Single 3V Supply, 4MHz, 4th Order Butterworth Filter
shown Figure 10. On a 3V supply, the filter has a pass-
band of 4MHz with 2.5VP-P signal and a stopband that is
greater than 70dB to frequency of 100MHz.
Benefiting from a low voltage supply operation, low
distortion and rail-to-rail output of LT1809, a low distor-
tion filter that is suitable for antialiasing can be built as
232Ω
274Ω
47pF
22pF
232Ω
665Ω
V
IN
–
274Ω
562Ω
220pF
–
1/2 LT1810
470pF
V
OUT
1/2 LT1810
+
+
V
S
1809 F10
2
Figure 10. Single 3V Supply, 4MHz, 4th Order Butterworth Filter
10
0
–10
–20
–30
–40
–50
–60
–70
V
V
= 3V, 0V
S
–80
–90
= 2.5V
P-P
IN
10k
100k
1M
10M
100M
FREQUENCY (Hz)
1809 F11
Figure 11. Filter Frequency Response
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
800V/µs Slew Rate, Shutdown
LT1395
400MHz Current Feedback Amplifier
LT1632/LT1633
Dual/Quad 45MHz, 45V/µs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 1.35mV V
, 70mA Output Current,
OS(MAX)
Max Supply Current 5.2mA per Amplifier
LT1630/LT1631
LT1806/LT1807
Dual/Quad 30MHz, 10V/µs Rail-to-Rail Input and Output Op Amps High DC Accuracy, 525µV V
, 70mA Output Current,
OS(MAX)
Max Supply Current 4.4mA per Amplifier
Single/Dual 325MHz, 140V/µs Rail-to-Rail
Input and Output Op Amps
High DC Accuracy, 550µV V
Low Distortion –80dBc at 5MHz
, Low Noise 3.5nV/√Hz,
OS(MAX)
sn180910 180910fs LT/TP 1100 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2000
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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