LT1910ES8#TRPBF [Linear]
LT1910 - Protected High Side MOSFET Driver; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LT1910ES8#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT1910 - Protected High Side MOSFET Driver; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C 驱动器 MOSFET驱动器 驱动程序和接口 接口集成电路 光电二极管 |
| 文件： | 总12页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1910
Protected High Side
MOSFET Driver
U
FEATURES
DESCRIPTIO
The LT®1910 is a high side gate driver that allows the use
of low cost N-channel power MOSFETs for high side
switching applications. It contains a completely self-con-
tainedchargepumptofullyenhanceanN-channelMOSFET
switch with no external components.
■
8V to 48V Power Supply Range
■
Protected from –15V to 60V Supply Transients
■
Short-Circuit Protected
■
Automatic Restart Timer
■
Open-Collector Fault Flag
■
Fully Enhances N-Channel MOSFET Switches
Whentheinternaldraincomparatorsensesthattheswitch
current has exceeded the preset level, the switch is turned
off and a fault flag is asserted. The switch remains off for
a period of time set by an external timing capacitor and
then automatically attempts to restart. If the fault still
exists, this cycle repeats until the fault is removed, thus
protecting the MOSFET. The fault flag becomes inactive
once the switch restarts successfully.
■
Programmable Current Limit, Delay Time and
Autorestart Period
Voltage Limited Gate Drive
■
■
Defaults to OFF State with Open Input
Available in SO-8 Package
■
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APPLICATIO S
The LT1910 has been specifically designed for harsh
operating environments such as industrial, avionics and
automotive applications where poor supply regulation
and/or transients may be present. The device will not
sustain damage from supply transients of –15V to 60V.
■
Industrial Control
■
Avionics Systems
■
Automotive Switches
■
Stepper Motor and DC Motor Control
■
Electronic Circuit Breaker
The LT1910 is available in the SO-8 package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
Fault Protected High Side Switch
Switch Drop vs Load Current
5V
24V
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
5.1k
LT1910
FAULT
3
4
2
8
6
5
+
0.01Ω
FAULT OUTPUT
OFF ON
V
IN
SENSE
IRFZ34
TIMER GATE
GND
+
1
10µF
50V
0.1µF
LOAD
1910 TA01
0
1
2
3
4
5
LOAD CURRENT (A)
1910 TA02
sn1910 1910fs
1
LT1910
W W
U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
(Note 1)
Supply Voltage (Pin 8)............................... –15V to 60V
Input Voltage (Pin 4) .................... (GND – 0.3V) to 15V
GATE Voltage (Pin 5) .............................................. 75V
SENSE Voltage (Pin 6)....................................... V+ ±5V
FAULT Voltage (Pin 3) ............................................ 36V
Current (Pins 1, 2, 4, 5, 6, 8) ............................... 40mA
Operating Ambient Temperature Range
(Note 2) ...................................................–40°C to 85°C
Junction Temperature Range................ –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
TOP VIEW
NUMBER
+
GND
TIMER
FAULT
IN
1
2
3
4
8
7
6
5
V
LT1910ES8
NC
SENSE
GATE
S8 PART MARKING
1910E
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 150°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications that apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. V+ = 12V to 48V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
1.9
0.8
MAX
2.5
UNITS
mA
mA
V
+
I
Supply Current (OFF State)
Delta Supply Current (ON State)
Input High Voltage
Input Low Voltage
V = 48V, V = 0.8V
1.2
S
IN
∆I
S(ON)
V
= 2V, Measure Increase in I
1.2
IN
S
V
V
●
●
2
INH
0.8
V
INL
I
Input Current
V
V
= 2V
= 5V
●
●
15
55
30
110
50
185
µA
µA
IN
IN
IN
C
V
V
Input Capacitance (Note 3)
Timer Threshold Voltage
Timer Clamp Voltage
5
pF
V
IN
V
V
V
= 2V, Adjust V
= 0.8V
●
2.6
3.2
9
2.9
3.5
14
3.2
3.8
20
T(TH)
T(CL)
IN
IN
IN
T
V
I
Timer Charge Current
= V = 2V
µA
T
T
V
Drain Sense Threshold Voltage
Temperature Coefficient (Note 3)
50
65
80
mV
SENSE
0.33
%/°C
+
I
Drain Sense Input Current
Gate Voltage Above Supply
V = 48V, V
= 65mV
0.5
1.5
µA
SENSE
SENSE
+
+
V
– V
V = 8V
4
7
10
10
4.5
8.5
12
6
V
V
V
V
GATE
+
V = 12V
●
●
●
10
14
14
+
V = 24V
+
V = 48V
12
V
V
FAULT Output High Threshold Voltage
FAULT Output Low Threshold Voltage
V
= 2V, I = 1mA, Adjust V
3.1
3.0
3.4
3.3
3.7
3.6
V
V
F(TH)
FOL
IN
F
T
FAULT Output Low Voltage
Turn-On Time
I = 1mA
F
●
0.07
220
25
0.4
400
100
50
V
µs
µs
µs
+
t
t
t
V = 24V, V
= 32V, C
= 1nF
100
ON
OFF
OFF(CL)
GATE
GATE
+
Turn-Off Time
V = 24V, V
= 2V, C
= 1nF
GATE
+
GATE
+
Current Limit Turn-Off Time
V = 24V, (V – V
)→0.1V, C
SENSE
= 1nF
GATE
20
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1910E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: Guaranteed but not tested.
sn1910 1910fs
2
LT1910
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
Supply Current vs Temperature
Input Voltage vs Temperature
2.0
1.8
1.6
1.4
1.2
1.0
0.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
+
V
= 48V
T
A
= 25°C
V
V
INH
INL
ON STATE
OFF STATE
ON STATE
OFF STATE
–50
0
25
50
75
100
–25
–50 –25
25
50
75
100
0
0
10
20
30
40
50
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
1910 G03
1910 G02
1910 G01
Timer Threshold Voltage
vs Temperature
Timer Clamp Voltage
vs Temperature
Input Current vs Temperature
3.2
3.1
3.0
2.9
2.8
2.7
2.6
3.8
3.7
3.6
3.5
3.4
3.3
3.2
200
180
160
140
120
100
80
V
= 2V
V
≤ 0.8V
IN
IN
V
V
= 5V
= 2V
IN
60
40
IN
20
0
–50 –25
25
50
75
100
–50
0
25
50
75
100
–50
0
25
50
75
100
0
–25
–25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1910 G04
1910 G05
1910 G06
Timer Charge Current
vs Temperature
Drain Sense Threshold Voltage
vs Temperature
MOSFET Gate Voltage Above V+
(VGATE – V+) vs Supply Voltage
16
14
12
10
8
20
18
16
14
12
10
8
90
85
80
75
70
65
60
55
50
45
40
+
V
= 24V
V
= V = 2V
T
IN
T
= 85°C
T
= 25°C
A
A
T
= –40°C
A
6
4
2
0
–50
0
25
50
75
100
–50 –25
25
50
75
100
0
5
10 15 20 25 30 35 40 45 50
SUPPLY VOLTAGE (V)
LTC1266 • F04
–25
0
TEMPERATURE (°C)
TEMPERATURE (°C)
1910 G07
1910 G08
sn1910 1910fs
3
LT1910
U W
TYPICAL PERFOR A CE CHARACTERISTICS
MOSFET Gate Drive Current
vs VGATE – V+
Fault Threshold Voltage
vs Temperature
Fault Output Low Voltage
vs Temperature
100
10
3.7
3.6
3.5
3.4
3.3
3.2
3.1
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
T
= 25°C
I
F
= 1mA
A
V
F
= 2V
IN
= 1mA
I
FAULT HIGH THRESHOLD
+
+
+
V
= 8V
V = 12V V ≥ 24V
1
FAULT LOW THRESHOLD
0.1
0
2
4
6
8
10 12 14 16
–50
0
25
50
75
100
–50 –25
25
50
75
100
–25
0
+
V
– V (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
GATE
1910 G10
1910 G11
1910 G012
Automatic Restart Period
vs Temperature
Turn-On Time vs Temperature
Turn-Off Time vs Temperature
400
350
300
250
200
150
100
1000
100
10
100
90
80
70
60
50
40
30
20
10
0
+
+
+
V
= 24V
V
V
C
= 24V
V
V
C
= 24V
= 2V
= 32V
GATE
GATE
GATE
GATE
C
= 3.3µF
= 1nF
= 1nF
T
C
= 1µF
T
C
= 0.33µF
T
NORMAL
CURRENT LIMIT
C
= 0.1µF
T
–50
0
25
50
75
100
–50 –25
25
50
75
100
–50 –30 –10 10
30
50
90
–25
0
70
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1910 G13
1910 G014
1910 G15
sn1910 1910fs
4
LT1910
U
U
U
PI FU CTIO S
GND (Pin 1): Common ground.
GATE (Pin 5): The GATE pin drives the power MOSFET
gate. When the IN pin is greater than 2V, the GATE pin is
pumped approximately 12V above the supply. It has
relatively high impedance (the equivalence of a few hun-
dred kΩ) when pumped above the rail. Care should be
taken to minimize any loading by parasitic resistance to
ground or supply. The GATE pin pulls LOW when the
TIMER pin falls below 2.9V.
TIMER (Pin 2): A timing capacitor CT from the TIMER pin
to ground sets the restart time following overcurrent
detection. Upon detection of an overcurrent condition, CT
is rapidly discharged to less than 1V and then recharged
by a 14µA nominal current source back to the 2.9V timer
threshold, whereupon the restart is attempted. Whenever
TIMER pulls below 2.9V, the GATE pin pulls low to turn off
the external switch. This cycle repeats until the overcur-
rent condition goes away and the switch restarts success-
fully. During normal operation the pin clamps at 3.5V
nominal.
SENSE (Pin 6): The SENSE pin connects to the input of a
supply-referenced comparator with a 65mV nominal off-
set. When the SENSE pin is taken more than 65mV below
supply, the MOSFET gate is driven LOW and the timing
capacitor is discharged. The SENSE pin threshold has a
0.33%/°C temperature coefficient (TC), which closely
matchestheTCofthedrainsenseresistorformedfromthe
copper trace of the PCB.
FAULT (Pin 3): The FAULT pin monitors the TIMER pin
voltage and indicates the overcurrent condition. When-
ever the TIMER pin is pulled below 3.3V at the onset of a
current limit condition, the FAULT pin pulls active LOW.
The FAULT pin resets HIGH immediately when the TIMER
pin ramps above 3.4V during autorestart. The FAULT pin
is an open-collector output, thus requiring an external
pull-up resistor and is intended for logic interface. The
resistor should be selected with a typical 1mA pull-up at
low status and less than 2mA under worst-case condi-
tions.
Forloadsrequiringhighinrushcurrent,anRCtimingdelay
can be added between the drain sense resistor and the
SENSE pin to ensure that the current-sense comparator
does not false trigger during start-up (see Applications
Information). A maximum of 10kΩ can be inserted be-
tween a drain sense resistor and the SENSE pin. If current
sensing is not required, the SENSE pin is tied to supply.
IN (Pin 4): The IN pin threshold is TTL/CMOS compatible
and has approximately 200mV of hysteresis. When the IN
pin is pulled active HIGH above 2V, an internal charge
pump is activated to pull up the GATE pin. The IN pin can
be pulled as high as 15V regardless of whether the supply
is on or off. If the IN pin is left open, an internal 75k pull-
down resistor pulls the pin below 0.8V to ensure that the
GATE pin is inactive LOW.
V+ (Pin 8): In addition to providing the operating current
for the LT1910, the V+ pin also serves as the Kelvin
connection for the current sense comparator. The V+ pin
must be connected to the positive side of the drain sense
resistor for proper current sensing operation.
sn1910 1910fs
5
LT1910
W
BLOCK DIAGRA
+
V
14µA
FAULT
–
+
3.3V
+
V
TIMER
+
65mV
2.9V
+
–
–
+
–
SENSE
+
–
GATE
1.4V
1.4V
+
–
OSCILLATOR
AND
CHARGE PUMP
75k
IN
75k
250Ω
1910 BD
U
(Refer to the Block Diagram)
OPERATIO
The LT1910 GATE pin has two states, OFF and ON. In the
OFF state it is held LOW, while in the ON state it is pumped
to 12V above the supply by a self-contained 750kHz
chargepump. TheOFFstateisactivatedwheneithertheIN
pin is below 0.8V or the TIMER pin is below 2.9V. Con-
versely, for the ON state to be activated, the IN pin must be
above 2V and the TIMER pin must be above 2.9V.
drain current exceeds the level required to generate a
65mV drop across the drain sense resistor, the sense
comparator activates a pull-down NPN which rapidly pulls
the TIMER pin below 2.9V. This in turn causes the timer
comparator to override the IN pin and set the GATE pin to
the OFF state, thus protecting the power MOSFET. When
the TIMER pin is pulled below 3.3V, the fault comparator
also activates the open-collector NPN to pull the FAULT
pin LOW, indicating an overcurrent condition.
The IN pin has approximately 200mV of hysteresis. If it is
left open, the IN pin is held LOW by a 75k resistor. Under
normal conditions, the TIMER pin is held a diode drop
above 2.9V by a 14µA pull-up current source. Thus the
TIMER pin automatically reverts the GATE pin to the ON
state if the IN pin is above 2V.
When the MOSFET gate voltage is discharged to less than
1.4V, the TIMER pin is released. The 14µA current source
then slowly charges the timing capacitor back to 2.9V
where the charge pump again starts to drive the GATE pin
HIGH. If a fault condition still exists, the sense comparator
threshold will again be exceeded and the timer cycle will
repeat until the fault is removed. The FAULT pin becomes
inactive HIGH if the TIMER pin charges up successfully
above 3.4V (see Figure 1).
TheSENSEpinnormallyconnectstothedrainofthepower
MOSFET, which returns through a low value drain sense
resistor to supply. In order for the sense comparator to
accurately sense the MOSFET drain current, the V+ pin
must be connected directly to the positive side of the drain
sense resistor. When the GATE pin is ON and the MOSFET
sn1910 1910fs
6
LT1910
U
OPERATIO
OFF NORMAL
OVERCURRENT
NORMAL
IN
0V
12V
+
V
GATE
0V
3.5V
2.9V
3.4V
TIMER
FAULT
0V
5V
0V
1910 F01
Figure 1. Timing Diagram
W U U
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APPLICATIO S I FOR ATIO
Input/Supply Sequencing
temperature range. The optoisolator must have less than
20µA of dark current (leakage) at hot in order to maintain
the OFF State (see Figure 2).
There are no input/supply sequencing requirements for
the LT1910. The IN pin may be taken up to 15V with the
supply at 0V. When the supply is turned on with the IN pin
set HIGH, the MOSFET turn-on will be inhibited until the
timing capacitor charges up to 2.9V (i.e., for one restart
cycle).
Drain Sense Configuration
The LT1910 uses supply referenced current sensing. One
input of the current sense comparator is connected to a
drainsensepin,whilethesecondinputisoffset65mVbelow
the supply inside the device. For this reason, Pin 8 of the
LT1910 must be treated not only as a supply pin, but also
as the reference input for the current sense comparator.
Isolating the Inputs
Operation in harsh environments may require isolation to
prevent ground transients from damaging control logic.
The LT1910 easily interfaces to low cost optoisolators.
The network shown in Figure 2 ensures that the input will
be pulled above 2V, but not exceed the absolute maximum
rating for supply voltages of 12V to 48V over the entire
Figure 3 shows the proper drain sense configuration for
the LT1910. Note that the SENSE pin goes to the drain end
of the sense resistor, while the V+ pin is connected to the
24V
12V TO 48V
2k
5V
R1
R
LOGIC
INPUT
LT1910
FAULT
100k
5.1k
S
3
4
2
8
6
5
+
0.02Ω
FAULT OUTPUT
INPUT
V
(PTC)
LT1910
IN
SENSE
Q1
IRFZ34
TIMER GATE
GND
4
IN
1
LOGIC GROUND
24V
2A
SOLENOID
51k
GND
1
+
C1
100µF
50V
C
T
1910 F02
1µF
1910 F03
0V
POWER GROUND
Figure 2. Isolating the Input
Figure 3. Drain Sense Configuration
sn1910 1910fs
7
LT1910
W U U
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APPLICATIO S I FOR ATIO
supply at the same point as the positive end of the sense
resistor.
untiltheINpinhasbeenrecycled. CT isusedtopreventthe
FAULT pin from glitching whenever the IN pin recycles to
turnontheMOSFETunsuccessfullyunderanexistingfault
condition.
The drain sense threshold voltage has a positive tempera-
ture coefficient, allowing PTC sense resistors to be used
(see Printed Circuit Board Shunts). The selection of RS
should be based on the minimum threshold voltage:
Inductive vs Capacitive Loads
Turning on an inductive load produces a relatively benign
ramp in MOSFET current. However, when an inductive
load is turned off, the current stored in the inductor needs
somewhere to decay. A clamp diode connected directly
across each inductive load normally serves this purpose.
Ifadiodeisnotemployed,theLT1910clampstheMOSFET
gate 0.7V below ground. This causes the MOSFET to
resume conduction during the current decay with (V+ +
VGS + 0.7V) across it, resulting in high dissipation peaks.
RS = 50mV/ISET
Thus the 0.02Ω drain sense resistor in Figure 3 will yield
a minimum trip current of 2.5A. This simple configuration
is appropriate for resistive or inductive loads that do not
generate large current transients at turn-on.
Automatic Restart Period
The timing capacitor CT shown in Figure 3 determines the
length of time the power MOSFET is held off following a
current limit trip. Curves are given in the Typical Perfor-
mance Characteristics to show the restart period for
various values of CT. For example, CT = 0.33µF yields a
50ms restart period.
Capacitive loads exhibit the opposite behavior. Any load
that includes a decoupling capacitor will generate a cur-
rent equal to CLOAD • (∂V/∂t) during capacitor in-rush.
With large electrolytic capacitors, the resulting current
spike can play havoc with the power supply and false trip
the current sense comparator.
Defeating Automatic Restart
Turn-on ∂V/∂t is controlled by the addition of the simple
network shown in Figure 5. This network takes advantage
of the fact that the MOSFET acts as a source follower
during turn-on. Thus the ∂V/∂t on the source can be
controlled by controlling the ∂V/∂t on the gate.
Some applications are required to remain off after a fault
occurs. When the LT1910 is being driven from CMOS
logic, this can be easily implemented by connecting resis-
tor R2 between the IN and TIMER pins as shown in
Figure 4. R2suppliesthesustainingcurrentforaninternal
SCR which latches the TIMER pin LOW under a fault
condition. The FAULT pin is set active LOW when the
TIMER pin falls below 3.3V. This keeps the MOSFET gate
from turning ON and the FAULT pin from resetting HIGH
CURRENT LIMIT
DELAY NETWORK
24V
1N4148
R
8
6
S
+
C
D
V
0.01Ω
SENSE
5V
R
(≤10k)
D
R1
5.1k
LT1910
∂V/∂t CONTROL NETWORK
3
1N4148
FAULT OUTPUT
ON = 5V
FAULT
5V
CMOS
LOGIC
4
2
5
IN
Q1
IRFZ34
LT1910
GATE
GND
OFF = 0V
R1
100k
R2
100k
TIMER
15V
R2
2k
GND
1
1N4744
+
C2
50µF
50V
+
1
C1
CT
1µF
C
LOAD
1910 F05
1910 F04
Figure 4. Latch-Off Configuration (Autorestart Defeated)
Figure 5. Control and Current Limit Delay
sn1910 1910fs
8
LT1910
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APPLICATIO S I FOR ATIO
The turn-on current spike into CLOAD is estimated by:
and CD delay the overcurrent trip for drain currents up to
approximately 10 • ISET, above which the diode conducts
and provides immediate turn-off (see Figure 7). To ensure
proper operation of the timer, CD must be ≤CT.
VG – VTH
IPEAK = CLOAD
•
R1•C1
10
where VTH is the MOSFET gate threshold voltage. VG is
obtained by plotting the equation:
VGATE
R1
1
IGATE
=
on the graph of Gate Drive Current (IGATE) vs Gate Voltage
(VGATE) as shown in Figure 6. The value of VGATE at the
intersection of the curves for a given supply is VG. For
example, if V+ = 24V and R1 = 100k, then VG = 18.3V. For
VTH = 2V, C1 = 0.1µF and CLOAD = 1000µF, the estimated
IPEAK = 1.6A. The diode and the second resistor in the
network ensure fast current limit turn-off.
0.1
0.01
1
10
100
MOSFET DRAIN CURRENT (1 = SET CURRENT)
1910 F07
Figure 7. Current Limit Delay Time
When turning off a capacitive load, the source of the
MOSFET can “hang up” if the load resistance does not
discharge CLOAD as fast as the gate is being pulled down.
If this is the case, a 15V zener may be added from gate to
source to prevent VGS(MAX) from being exceeded.
Printed Circuit Board Shunts
The sheet resistance of 1oz copper clad is approximately
5 • 10–4Ω/square with a temperature coefficient of
0.39%/°C. Since the LT1910 drain sense threshold has a
similartemperaturecoefficient(0.33%/°C),thisoffersthe
possibility of nearly zero TC current sensing using the
“free” drain sense resistor made out of PC trace material.
800
700
600
+
+
V
= 24V
+
V = 48V
A conservative approach is to use 0.02" of width for each
1A of current for 1oz copper. Combining the LT1910 drain
sense threshold with the 1oz copper resistance results in
a simple expression for width and length:
500
V
= 12V
I
=
GATE
GATE
400
300
5
V
/10
+
V
= 8V
200
100
0
Width (1oz Cu) = 0.02" • ISET
Length (1oz Cu) = 2"
10
20
40
0
50
60
30
GATE VOLTAGE (V)
The width for 2oz copper would be halved while the length
would remain the same.
1910 F06
Figure 6. Gate Drive Current vs Gate Voltage
Bends may be incorporated into the resistor to reduce
space; each bend is equivalent to approximately 0.6 • the
width of a straight length. Kelvin connection should be
employed by running a separate trace from the ends of the
resistor back to the LT1910’s V+ and SENSE pins. See
Application Note 53 for further information on printed
circuit board shunts.
Adding Current Limit Delay
When capacitive loads are being switched or in very noisy
environments, it is desirable to add delay in the drain
current sense path to prevent false tripping (inductive
loads normally do not need delay). This is accomplished
by the current limit delay network shown in Figure 5. RD
sn1910 1910fs
9
LT1910
W U U
U
APPLICATIO S I FOR ATIO
between the V+ and GND pins is highly recommended. An
RC snubber with a transient suppressor are an absolute
necessity. Note however that resistance should not be
added in series with the V+ pin because it will cause an
error in the current sense threshold.
Low Voltage/Wide Supply Range Operation
When the supply is less than 12V, the LT1910’s charge
pump does not produce sufficient gate voltage to fully
enhancethestandardN-channelMOSFET.Fortheseappli-
cations, a logic-level MOSFET can be used to extend the
operating supply down to 8V. If the MOSFET has a maxi-
mum VGS rating of 15V or greater, then the LT1910 can
also operate up to a supply voltage of 60V (absolute
maximum rating of the V+ pin).
Low Side Driving
Although the LT1910 is primarily targeted at high side
(grounded load) switch applications, it can also be used
for low side (supply connected load) switch applications.
Figures 8a and 8b illustrate the LT1910 driving low side
power MOSFETs. Because the LT1910 charge pump tries
to pump the gate of the N-channel MOSFET above the
supply, a clamp zener is required to prevent the VGS
(absolutemaximum)oftheMOSFETfrombeingexceeded.
Protecting Against Supply Transients
The LT1910 is 100% tested and guaranteed to be safe
from damage with 60V applied between the V+ and GND
pins. However, when this voltage is exceeded, even for a
few microseconds, the result can be catastrophic. For this
reason it is imperative that the LT1910 is not exposed to
supplytransientsabove60V.Atransientsuppressor,such
as Diodes Inc.’s SMAJ48A, should be added between the
V+ and GND pins for such applications.
For proper current sense operation, the V+ pin is required
to be connected to the positive side of the drain sense
resistor (see Drain Sense Configuration). Therefore, the
supply should be adequately decoupled at the node where
the V+ pin and drain sense resistor meet. Several hundred
microfarads may be required when operating with a high
current switch.
12V TO 48V
5V
R1
R
S
5.1k
3
4
8
6
+
0.01Ω
FAULT OUTPUT
INPUT
FAULT
IN
V
(PTC)
SENSE
4A
LOAD
+
C1
100µF
100V
LT1910
2
5
Q1
IRFZ44
TIMER GATE
GND
1
15V
1N4744
C
T
1µF
1910 F08a
0V
When the operating voltage approaches the 60V absolute
maximum rating of the LT1910, local supply decoupling
Figure 8a. Low Side Driver with Load Current Sensing
8V TO 24V
HV
5V
R1
5.1k
LT1910
FAULT
HV
LOAD
3
4
2
8
6
5
+
FAULT OUTPUT
INPUT
V
51Ω
IN
SENSE
Q1
IRF630
TIMER GATE
15V
1N4744
GND
1
+
R
S
2N2222
LT1006
0.02Ω
+
C1
–
C
T
10µF
1µF
50V
51Ω
1910 F08b
Figure 8b. Low Side Driver for Source Current Sensing
sn1910 1910fs
10
LT1910
W U U
APPLICATIO S I FOR ATIO
U
The LT1910 gate drive is current limited for this purpose
so that no resistance is needed between the GATE pin and
zener.
If the load cannot be returned to supply through RS, or the
load supply voltage is higher than the LT1910 supply, the
current sense must be moved to the source of the low side
MOSFET.
Current sensing for protecting low side drivers can be
done in several ways. In the Figure 8a circuit, the supply
voltage for the load is assumed to be within the supply
operating range of the LT1910. This allows the load to be
returned to supply through current sense resistor RS,
providing normal operation of the LT1910 protection
circuitry.
Figure 8b shows an approach to source sensing. An
operational amplifier (must common mode to ground) is
used to level shift the voltage across RS up to the drain
sense pin. This approach allows the use of a small sense
resistor which could be made from PC trace material. The
LT1910restarttimerfunctionsthesameasinthehighside
switch application.
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
sn1910 1910fs
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will notinfringe onexisting patent rights.
11
LT1910
U
TYPICAL APPLICATIO
Protected 1A Automotive Solenoid Driver with Overvoltage Shutdown
8V TO 24V OPERATING
32V TO 60V SHUTDOWN
5V
R1
5.1k
R
LT1910
FAULT
S
3
4
2
8
6
5
+
0.03Ω
FAULT OUTPUT
V
(PTC)
INPUT
30V
1N6011B
IN
SENSE
Q1
TIMER GATE
MTD3055EL
GND
1
1N4148
2N3904
R2
24V
1A
SOLENOID
10k
+
C1
10µF
100V
C
T
1µF
R3
5.1k
POWER
GROUND
1910 TA03
RELATED PARTS
PART NUMBER
LTC®1153
LTC1155
DESCRIPTION
COMMENTS
Autoreset Electronic Circuit Breaker
Programmable Trip Current, Fault Status Output
Dual High Side Micropower MOSFET Driver
Quad Protected High Side MOSFET Driver
Triple 1.8V to 6V High Side MOSFET Driver
Dual 24V High Side MOSFET Driver
Operates from 4.5V to 18V, 85µA ON Current, Short-Circuit Protection
8V to 48V Supply Range, Individual Short-Circuit Protection
0.01µA Standby Current, Triple Driver in SO-8 Package
Operates from 9V to 24V, Short-Circuit Protection
LT1161
LTC1163
LTC1255
LTC1477
Protected Monolithic High Side Switch
SMBus Dual High Side Switch Controller
Low R
0.07Ω Switch, 2A Short-Circuit Protected
DS(ON)
LTC1623
2-Wire SMBus Serial Interface, Built-In Gate Charge Pumps
1.5A Peak Output Current, 4.5V ≤ V ≤ 13.2V, SO-8 Package
LTC1693 Family
High Speed Single/Dual N-Channel/P-Channel
MOSFET Drivers
CC
LTC1710
LTC4412
SMBus Dual Monolithic High Side Switch
Low Loss PowerPathTM Controller
Two Low R
0.4Ω/300mA Switches in 8-Lead MSOP Package
DS(ON)
Implements “Ideal Diode” Function, ThinSOTTM Package
PowerPath and ThinSOT are trademarks of Linear Technology Corporation.
sn1910 1910fs
LT/TP 0403 2K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
LINEAR TECHNOLOGY CORPORATION 2002
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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