LT1949EMS8#TRPBF [Linear]
LT1949 - 600kHz, 1A Switch PWM DC/DC Converter; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LT1949EMS8#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT1949 - 600kHz, 1A Switch PWM DC/DC Converter; Package: MSOP; Pins: 8; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总8页 (文件大小：165K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1949
600kHz, 1A Switch
PWM DC/DC Converter
U
FEATURES
DESCRIPTIO
■
1A, 0.5Ω, 30V Internal Switch
The LT®1949 is a fixed frequency step-up DC/DC con-
verter with a 1A, 0.5Ω internal switch. Capable of gener-
ating 10V at 175mA from a 3.3V input, the LT1949 is ideal
for generating bias voltages for large screen LCD panels.
Constant frequency 600kHz operation results in a low
noise output that is easy to filter and the 30V switch rating
allowsoutputvoltageupto28Vusingasingleinductor.An
external compensation pin gives the user flexibility in
optimizing loop compensation, allowing small low ESR
ceramic capacitors to be used at the output. The 8-lead
MSOP and SO packages ensure a low profile overall
solution.
■
Operates with VIN as Low as 1.5V
■
600kHz Fixed Frequency Operation
■
Low-Battery Detector Stays Active in Shutdown
■
Low VCESAT Switch: 410mV at 800mA
■
Pin-for-Pin Compatible with the LT1317B
■
Small 8-Lead MSOP and SO Packages
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APPLICATIO S
■
LCD Bias Supplies
■
GPS Receivers
■
Battery Backup
Portable Electronic Equipment
Diagnostic Medical Instrumentation
The LT1949 includes a low-battery detector that stays
alive when the device goes into shutdown. Quiescent
■
■
current in shutdown is 25µA, while operating current is
4.5mA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATIO
V
IN
90
3.3V
L1
10µH
V
= 10V
D1
OUT
80
70
60
50
40
30
20
+
V
IN
SW
C1
22µF
3.6V
IN
3V
4.2V
IN
IN
R1
1M
LT1949
V
OUT
10V
FB
GND
SHUTDOWN
SHDN
175mA
V
C
C2
R2
140k
10µF
68k
330pF
CERAMIC
1949 F01
C1: AVX TAJA226M006R
5
10
50
100
300
C2: TAIYO YUDEN LMK325BJ106MN
D1: MBRM120LT3
L1: SUMIDA CDRH62B-100
LOAD CURRENT (mA)
1949 F02
Figure 1. 3.3V to 10V/175mA DC/DC Converter
Figure 2. 3.3V to 10V Converter Efficiency
1
LT1949
ABSOLUTE AXI U RATI GS
W W
U W
(Note 1)
VIN, LBO Voltage..................................................... 12V
SW Voltage ............................................... –0.4V to 30V
FB Voltage .................................................... VIN + 0.3V
VC Voltage ................................................................ 2V
LBI Voltage ............................................ 0V ≤ VLBI ≤ 1V
SHDN Voltage ........................................................... 6V
Junction Temperature.......................................... 125°C
Operating Temperature Range (Note 2)
LT1949EMS8.......................................–40°C to 85°C
LT1949ES8/LT1949IS8 .......................–40°C to 85°C
Storage Temperature ........................... –65°C to 150°C
Lead Temperature (Soldering, 10sec).................. 300°C
U W
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
ORDER PART
TOP VIEW
NUMBER
TOP VIEW
V
1
2
3
4
8
7
6
5
LBO
LBI
C
V
1
8 LBO
7 LBI
C
LT1949ES8
LT1949IS8
FB
SHDN
GND
LT1949EMS8
FB 2
SHDN 3
GND 4
6 V
IN
V
IN
5 SW
SW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
LTJC
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 120°C/W
TJMAX = 125°C, θJA = 120°C/W
1949E
1949I
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2V, VSHDN = 2V unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
= 0V
MIN
TYP
MAX
UNITS
I
Quiescent Current
Feedback Voltage
●
●
4.5
25
7.5
40
mA
µA
Q
V
SHDN
V
1.22
1.20
1.24
1.24
1.26
1.26
V
V
FB
●
●
●
●
I
FB Pin Bias Current (Note 3)
Input Voltage Range
12
80
12
nA
V
B
1.7
70
g
Error Amp Transconductance
Error Amp Voltage Gain
Maximum Duty Cycle
∆I = 5µA
140
700
85
240
µmhos
V/V
m
A
V
●
80
%
Switch Current Limit (Note 4)
V
V
= 2.5V, Duty Cycle = 30%
= 2.5V, Duty Cycle = 30%
1
0.95
1.13
1.5
1.5
A
A
IN
IN
●
●
f
Switching Frequency
Shutdown Pin Current
500
600
750
kHz
OSC
V
V
= V
●
●
0.015
–2.3
0.1
–7
µA
µA
SHDN
SHDN
IN
= 0V
LBI Threshold Voltage
190
180
200
200
210
220
mV
mV
●
●
●
●
LBO Output Low
I
= 10µA
0.15
0.02
5
0.25
0.1
60
V
µA
SINK
LBO Leakage Current
V
V
= 250mV, V
= 5V
LBO
LBI
LBI
LBI Input Bias Current (Note 5)
Low-Battery Detector Gain
Switch Leakage Current
= 150mV
nA
1MΩ Pull-Up
= 5V
2000
0.01
V/V
µA
V
●
3
SW
2
LT1949
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 2V, VSHDN = 2V unless otherwise noted.
SYMBOL PARAMETER
Switch V
CONDITIONS
MIN
TYP
MAX
UNITS
I
I
= 800mA
= 500mA
410
mV
mV
CESAT
SW
SW
●
●
●
●
400
0.15
6
Reference Line Regulation
SHDN Input Voltage High
SHDN Input Voltage Low
1.8V ≤ V ≤ 12V
0.08
%/V
V
IN
1.4
0.4
V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 3: Bias current flows into FB pin.
Note 4: Switch current limit guaranteed by design and/or correlation to
Note 2: The LT1949E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
static tests. Duty cycle affects current limit due to ramp generator.
Note 5: Bias current flows out of LBI pin.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Switch Current Limit,
Duty Cycle = 30%
Switch Current Limit
Oscillator Frequency
1.3
1.2
1.1
1.0
0.9
0.8
1.3
1.2
1.1
1.0
0.9
0.8
700
650
600
550
500
–40°C
25°C
85°C
–50
0
25
50
75
100
–25
0
2
4
6
8
10
12
0
20
40
60
80
100
TEMPERATURE (°C)
INPUT VOLTAGE
DUTY CYCLE (%)
1949 G03
1949 G01
1949 G02
Switch Voltage Drop (VCESAT
)
Feedback Voltage
Quiescent Current, SHDN = 2V
4.6
4.5
4.4
4.3
4.2
4.1
4.0
3.9
3.8
1.0
0.8
0.6
0.4
0.2
0
1.25
1.24
1.23
1.22
1.21
1.20
85°C
25°C
–40°C
0
0.4
0.6
0.8
1.0
1.2
–50
–25
0
25
50
75
100
0.2
–50 –25
0
25
50
75
100
SWITCH CURRENT (A)
TEMPERATURE (°C)
TEMPERATURE (°C)
1949 G04
1949 G06
1949 G05
3
LT1949
TYPICAL PERFOR A CE CHARACTERISTICS
U W
Quiescent Current, SHDN = 0V
FB Pin Bias Current
SHDN Pin Current
26
25
24
23
22
21
20
40
36
32
28
24
20
16
12
8
2
1
0
–1
–2
–3
4
0
–50 –25
0
25
50
75
100
0
1
2
4
5
6
3
–50
–25
0
25
50
75
100
TEMPERATURE (°C)
SHDN PIN VOLTAGE (V)
TEMPERATURE (°C)
1317 TPC10
1317 TPC12
1317 TPC11
Load Regulation
Transient Response
Load Regulation
VOUT
100mV/DIV
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
VOUT
50mV/DIV
DC
COUPLED
OFFSET
ADDED
AC COUPLED
IL
500mA/DIV
200mA
ILOAD
100mA
50µs/DIV
ILOAD 25mA/DIV
ILOAD 50mA/DIV
V
IN = 3.3V
VIN = 3V
OUT = 10V
VIN = 4V
VOUT = 10V
V
VOUT = 10V
CIRCUIT OF FIGURE 1
1949 G12
L1 = 10µH, SUMIDA CD54
COUT = 10µF CERAMIC
L1 = 10µH, SUMIDA CD54
COUT = 10µF CERAMIC
1949 G10
1949 G11
U
U
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PI FU CTIO S
VC (Pin 1): Compensation Pin for Error Amplifier. Con-
nect a series RC network from this pin to ground. Typical
values for compensation are a 68k/330pF combination
when using ceramic output capacitors. Minimize trace
area at VC.
GND (Pin 4): Ground. Connect directly to local ground
plane.
SW (Pin 5): Switch Pin. Connect inductor/diode here.
Minimize trace area at this pin to keep EMI down.
VIN (Pin 6): Supply Pin. Must be bypassed close to the
pin.
FB (Pin 2): Feedback Pin. Reference voltage is 1.24V.
Connect resistor divider tap here. Minimize trace area at
FB. Set VOUT according to: VOUT = 1.24V(1 + R1/R2).
LBI (Pin 7): Low-Battery Detector Input. 200mV refer-
ence. Voltage on LBI must stay between ground and
700mV. Low-battery detector remains active in shutdown
mode.
SHDN (Pin 3): Shutdown. Pull this pin low for shutdown
mode (only the low-battery detector remains active).
Leavethispinfloatingortietoavoltagebetween1.4Vand
6V to enable the device. SHDN pin is logic level and need
only meet the logic specification (1.4V for high, 0.4V for
low).
LBO (Pin 8): Low-Battery Detector Output. Open collec-
tor, can sink 10µA. A 1MΩ pull-up is recommended.
4
LT1949
W
BLOCK DIAGRA
LBI
7
1.24V
+
+
–
V
LBO
8
C
REFERENCE
g
1
m
FB
2
–
A4
200mV
ENABLE
ERROR
AMPLIFIER
+
–
SHDN
3
V
OUT
SHUTDOWN
BIAS
A1
COMPARATOR
R1
(EXTERNAL)
SW
5
FB
R2
–
+
FF
S
(EXTERNAL)
DRIVER
RAMP
GENERATOR
Q3
R
Q
+
Σ
A2
COMPARATOR
+
+
–
A = 2
0.06Ω
600kHz
OSCILLATOR
4
GND 1949 BD
Figure 3. LT1949 Block Diagram
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OPERATIO
The LT1949 is a current mode, fixed frequency step-up
DC/DC converter with an internal 1A NPN power transis-
tor. Operation can best be understood by referring to the
Block Diagram.
Layout Hints
The LT1949 switches current at high speed, mandating
careful attention to layout for proper performance. You
will not get advertised performance with careless layouts.
Figure 4 shows recommended component placement for
a boost (step-up) converter. Follow this closely in your PC
layout. Note the direct path of the switching loops. Input
capacitor C1 must be placed close (<5mm) to the IC
package. As little as 10mm of wire or PC trace from CIN to
VIN will cause problems such as inability to regulate or
oscillation.
At the beginning of each oscillator cycle, the flip-flop is set
and the switch is turned on. Current in the switch ramps
up until the voltage at A2’s positive input reaches the VC
pin voltage, causing A2’s output to change state and the
switch to be turned off. The signal at A2’s positive input is
a summation of a signal representing switch current and
a ramp generator (introduced to avoid subharmonic oscil-
lations at duty factors greater than 50%). If the load
increases, VOUT (and FB) will drop slightly and the error
amplifier will drive VC to a higher voltage, causing current
in the switch to increase. In this way, the error amplifier
drives the VC pin to the voltage necessary to satisfy the
load. Frequency compensation is provided by an external
series RC network connected between the VC pin and
ground.
The ground terminal of output capacitor C2 should tie
closetoPin4oftheLT1949.DoingthisreducesdI/dtinthe
ground copper which keeps high frequency spikes to a
minimum. The DC/DC converter ground should tie to the
PC board ground plane at one place only, to avoid intro-
ducing dI/dt in the ground plane.
5
LT1949
OPERATIO
U
LBI
LBO
GROUND PLANE
C1
+
V
IN
1
2
3
4
8
R1
7
6
5
L1
LT1949
R2
SHUTDOWN
MULTIPLE
VIAs
C2
GND
V
OUT
1949 F04
Figure 4. Recommended Component Placement for Boost
Converter. Note Direct High Current Paths Using Wide PC
Traces. Minimize Trace Area at Pin 1 (VC) and Pin 2 (FB).
Use Multiple Vias to Tie Pin 4 Copper to Ground Plane. Use
Vias at One Location Only to Avoid Introducing Switching
Currents into the Ground Plane
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APPLICATIONS INFORMATION
Low-Battery Detector
Figure 5 details hookup. R1 and R2 need only be low
enough in value so that the bias current of the LBI pin
doesn’t cause large errors. For R2, 100k is adequate. The
200mV reference can also be accessed as shown in
Figure 6. The low-battery detector remains active in
shutdown.
The LT1949’s low-battery detector is a simple PNP input
gain stage with an open collector NPN output. The nega-
tive input of the gain stage is tied internally to a 200mV
±5% reference. The positive input is the LBI pin. Arrange-
ment as a low-battery detector is straightforward.
3.3V
R1
V
IN
LT1949
LBO
1M
LBI
+
–
200k
V
IN
TO PROCESSOR
R2
100k
2N3906
REF
LBO
LBI
LT1949
V
200mV
+
GND
200mV
10k
10µF
V
LB
– 200mV
R1 =
INTERNAL
1949 F06
2µA
REFERENCE
GND
1949 F05
Figure 6. Accessing 200mV Reference
Figure 5. Setting Low-Battery Detector Trip Point
6
LT1949
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TYPICAL APPLICATIO
4 Cell to 5V SEPIC Converter
C2
4.7µF
16V
L1
10µH
D1
V
OUT
V
IN
5V
4V TO 9V
250mA
V
SW
1M
1%
L2
10µH
IN
1M
1M
LT1949
C1
4.7µF
16V
C3
FB
GND
SHDN
10µF
6.3V
V
C
332k
1%
C1, C2: TAIYO YUDEN EMK316BJ475ML
C3: TAIYO YUDEN JMK316BJ106ML
D1: MOTOROLA MBRM120LT3
33k
3.3nF
L1, L2: SUMIDA CR32-100KC
1949 TA02
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PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7
6
5
0.040 ± 0.006
(1.02 ± 0.15)
0.034 ± 0.004
(0.86 ± 0.102)
0.007
(0.18)
0° – 6° TYP
0.118 ± 0.004**
(3.00 ± 0.102)
SEATING
PLANE
0.193 ± 0.006
(4.90 ± 0.15)
0.012
(0.30)
REF
0.021 ± 0.006
(0.53 ± 0.015)
0.006 ± 0.004
(0.15 ± 0.102)
0.0256
(0.65)
BSC
MSOP (MS8) 1098
1
2
3
4
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
SO8 1298
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
3
4
2
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
7
LT1949
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TYPICAL APPLICATIO
Low Profile Triple Output LCD Bias Generator
D1
D2
D3
D4
23V
5mA
C7
0.1µF
C8
0.1µF
C9
0.1µF
L1
10µH
D7
V
8V
200mA
IN
3.3V
R2
40.2k
1%
V
SW
IN
SHDN
SHUTDOWN
LBI LT1949
LB0
+
C2
10µF
C4
4.7µF
FB
GND
C1
22µF
V
C
R3
7.5k
1%
R1
47k
C3
680pF
C6
4.7µF
D5
D6
C1: AVX TAJB226M010
C2: TAIYO YUDEN TMK432BJ106MN X7R 1210
C5
4.7µF
C4, C5, C6: TAIYO YUDEN LMK316BJ475ML X5R1206
C7, C8, C9: 0.1µF CERAMIC, 50V
D1 TO D6: FMMD7000, DUAL DIODE
D7: MBRM120LT3
–8V
10mA
1949 TA01
L1: SUMIDA CDRH62B-100
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1949f LT/TP 0300 4K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
8
●
●
LINEAR TECHNOLOGY CORPORATION 1999
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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