LT1963AEQ#PBF [Linear]
LT1963A Series - 1.5A, Low Noise, Fast Transient Response LDO Regulators; Package: DD PAK; Pins: 5; Temperature Range: -40°C to 85°C;型号: | LT1963AEQ#PBF |
厂家: | Linear |
描述: | LT1963A Series - 1.5A, Low Noise, Fast Transient Response LDO Regulators; Package: DD PAK; Pins: 5; Temperature Range: -40°C to 85°C 稳压器 |
文件: | 总20页 (文件大小:263K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1963 Series
1.5A, Low Noise,
Fast Transient Response
LDO Regulators
U
FEATURES
DESCRIPTIO
The LT®1963 series are low dropout regulators optimized
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
<1µA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other
regulators. In addition to fast transient response, the
LT1963 regulators have very low output noise which
makes them ideal for sensitive RF supply applications.
■
Optimized for Fast Transient Response
■
Output Current: 1.5A
■
Dropout Voltage: 340mV
■
Low Noise: 40µVRMS (10Hz to 100kHz)
■
■
■
■
■
■
■
■
■
■
■
1mA Quiescent Current
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
<1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor
Reverse Battery Protection
Output voltage range is from 1.21V to 20V. The LT1963
regulators are stable with output capacitors as low as
10µF.Internalprotectioncircuitryincludesreversebattery
protection, current limiting, thermal limiting and reverse
current protection. The devices are available in fixed
output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an
adjustable device with a 1.21V reference voltage. The
LT1963 regulators are available in 5-lead TO-220, DD,
3-lead SOT-223, 8-lead SO, and Exposed Pad 16-lead
TSSOP packages.
No Reverse Current
Thermal Limiting
5-Lead TO-220, DD, 3-Lead SOT-223, 8-Lead SO
and 16-Lead TSSOP Packages
U
APPLICATIO S
■
3.3V to 2.5V Logic Power Supplies
Post Regulator for Switching Supplies
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 6118263, 6144250.
■
U
TYPICAL APPLICATION
Dropout Voltage
400
350
300
250
200
150
100
50
3.3V to 2.5V Regulator
2.5V
1.5A
IN
OUT
LT1963-2.5
+
+
V
> 3V
10µF
10µF
IN
SHDN SENSE
GND
1963 TA01
0
0.8 1.0
0
0.2 0.4 0.6
1.2 1.4 1.6
OUTPUT CURRENT (A)
1963 TA02
1963fc
1
LT1963 Series
W W U W
ABSOLUTE AXI U RATI GS (Note 1)
SHDN Pin Voltage................................................. ±20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range –40°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 2) ......... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
U W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
FRONT VIEW
FRONT VIEW
GND
NC
1
2
3
4
5
6
7
8
16 GND
15 NC
14 IN
SENSE/
ADJ*
5
4
3
2
1
SENSE/ADJ*
OUT
5
4
3
2
1
OUT
GND
IN
OUT
TAB IS
GND
GND
OUT
13 IN
*PIN 6 = SENSE FOR LT1963-1.5/
LT1963-1.8/LT1963-2.5/
LT1963-3.3
17
IN
OUT
12 IN
SHDN
SHDN
SENSE/ADJ*
GND
11 NC
10 SHDN
= ADJ FOR LT1963
TAB IS
GND
T PACKAGE
5-LEAD PLASTIC TO-220
Q PACKAGE
5-LEAD PLASTIC DD
GND
9
GND
*PIN 5 = SENSE FOR LT1963-1.5/LT1963-1.8/
LT1963-2.5/LT1963-3.3
*PIN 5 = SENSE FOR LT1963-1.5/LT1963-1.8/
LT1963-2.5/LT1963-3.3
FE PACKAGE
16-LEAD PLASTIC TSSOP
= ADJ FOR LT1963
= ADJ FOR LT1963
EXPOSED PAD (PIN 17) IS GND. MUST BE
SOLDERED TO THE PCB.
TJMAX = 150°C, θJA = 50°C/ W
TJMAX = 150°C, θJA = 30°C/ W
TJMAX = 150°C, θJA = 38°C/ W
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART NUMBER FE PART MARKING
LT1963EQ
LT1963ET
LT1963EFE
1963EFE
LT1963EQ-1.5
LT1963EQ-1.8
LT1963EQ-2.5
LT1963EQ-3.3
LT1963ET-1.5
LT1963ET-1.8
LT1963ET-2.5
LT1963ET-3.3
LT1963EFE-1.5
LT1963EFE-1.8
LT1963EFE-2.5
LT1963EFE-3.3
1963EFE15
1963EFE18
1963EFE25
1963EFE33
TOP VIEW
FRONT VIEW
OUT
SENSE/ADJ*
GND
1
2
3
4
8
7
6
5
IN
3
2
1
OUT
GND
GND
SHDN
TAB IS
GND
GND
IN
NC
S8 PACKAGE
8-LEAD PLASTIC SO
ST PACKAGE
*PIN 2 = SENSE FOR LT1963-1.5/LT1963-1.8/
LT1963-2.5/LT1963-3.3
3-LEAD PLASTIC SOT-223
= ADJ FOR LT1963
TJMAX = 150°C, θJA = 50°C/ W
T
JMAX = 150°C, θJA = 70°C/ W
ORDER PART NUMBER
ST PART MARKING
ORDER PART NUMBER
S8 PART MARKING
LT1963EST-1.5
LT1963EST-1.8
LT1963EST-2.5
LT1963EST-3.3
196315
196318
196325
196333
LT1963ES8
1963
LT1963ES8-1.5
LT1963ES8-1.8
LT1963ES8-2.5
LT1963ES8-3.3
196315
196318
196325
196333
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
1963fc
2
LT1963 Series
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 3)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage (Notes 4,12)
I
I
= 0.5A
= 1.5A
1.9
2.1
V
V
LOAD
LOAD
2.5V < V < 20V, 1mA < I
< 1.5A
< 1.5A
< 1.5A
< 1.5A
< 1.5A
< 1.5A
●
●
●
●
●
●
2.5
IN
LOAD
LOAD
LOAD
LOAD
Regulated Output Voltage (Note 5)
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
LT1963
V
= 2.21V, I
= 1mA
1.477
1.447
1.500
1.500
1.523
1.545
V
V
IN
LOAD
2.5V < V < 20V, 1mA < I
IN
V
= 2.3V, I
= 1mA
LOAD
1.773
1.737
1.800
1.800
1.827
1.854
V
V
IN
2.8V < V < 20V, 1mA < I
IN
V
= 3V, I
= 1mA
2.462
2.412
2.500
2.500
2.538
2.575
V
V
IN
LOAD
3.5V < V < 20V, 1mA < I
IN
V
= 3.8V, I
= 1mA
3.250
3.200
3.300
3.300
3.350
3.400
V
V
IN
LOAD
4.3V < V < 20V, 1mA < I
IN
LOAD
ADJ Pin Voltage
(Notes 4, 5)
V
= 2.21V, I
= 1mA
1.192
1.174
1.210
1.210
1.228
1.246
V
V
IN
LOAD
2.5V < V < 20V, 1mA < I
IN
LOAD
Line Regulation
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
∆V = 2.21V to 20V, I
= 1mA
●
●
●
●
●
2.0
2.5
3.0
3.5
1.5
10
10
10
10
10
mV
mV
mV
mV
mV
IN
LOAD
∆V = 2.3V to 20V, I
= 1mA
IN
IN
LOAD
LOAD
LOAD
∆V = 3V to 20V, I
= 1mA
= 1mA
= 1mA
∆V = 3.8V to 20V, I
IN
LT1963 (Note 4) ∆V = 2.21V to 20V, I
IN
LOAD
Load Regulation
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
V
V
= 2.5V, ∆I
= 2.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
9
mV
mV
IN
IN
LOAD
LOAD
●
●
●
●
●
●
●
●
●
18
V
V
= 2.8V, ∆I
= 2.8V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
10
20
mV
mV
IN
IN
LOAD
LOAD
V
V
= 3.5V, ∆I
= 3.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2.5
3
15
30
mV
mV
IN
IN
LOAD
LOAD
V
V
= 4.3V, ∆I
= 4.3V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
20
35
mV
mV
IN
IN
LOAD
LOAD
LT1963 (Note 4) V = 2.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
8
15
mV
mV
IN
IN
LOAD
LOAD
V
= 2.5V, ∆I
Dropout Voltage
I
I
= 1mA
= 1mA
0.02
0.10
0.19
0.34
0.06
0.10
V
V
LOAD
LOAD
V
= V
IN
OUT(NOMINAL)
(Notes 6, 7, 12)
I
I
= 100mA
= 100mA
0.17
0.22
V
V
LOAD
LOAD
I
I
= 500mA
= 500mA
0.27
0.35
V
V
LOAD
LOAD
I
I
= 1.5A
= 1.5A
0.45
0.55
V
V
LOAD
LOAD
GND Pin Current
IN
(Notes 6, 8)
I
I
I
I
I
= 0mA
●
●
●
●
●
1.0
1.1
3.8
15
1.5
1.6
5.5
25
mA
mA
mA
mA
mA
LOAD
LOAD
LOAD
LOAD
LOAD
V
= V
+ 1V
OUT(NOMINAL)
= 1mA
= 100mA
= 500mA
= 1.5A
80
120
Output Voltage Noise
ADJ Pin Bias Current
Shutdown Threshold
C
= 10µF, I
= 1.5A, BW = 10Hz to 100kHz
40
3
µV
RMS
OUT
LOAD
(Notes 4, 9)
10
2
µA
V
V
V
V
= Off to On
= On to Off
●
●
0.90
0.75
OUT
OUT
0.25
55
SHDN Pin Current
(Note 10)
V
V
= 0V
= 20V
0.01
3
1
30
µA
µA
SHDN
SHDN
Quiescent Current in Shutdown
Ripple Rejection
V
V
= 6V, V
= 0V
0.01
63
1
µA
dB
IN
IN
SHDN
– V
= 1.5V (Avg), V
= 0.5V ,
P-P
OUT
RIPPLE
= 0.75A
f
= 120Hz, I
RIPPLE
LOAD
1963fc
3
LT1963 Series
ELECTRICAL CHARACTERISTICS
The
●
denotes specifications which apply over the full operating temperature range, otherwise specifications are T = 25°C. (Note 3)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Limit
V
V
= 7V, V
= 0V
2
A
A
IN
IN
OUT
OUT(NOMINAL)
= V
+ 1V, ∆V
= –0.1V
●
1.6
OUT
Input Reverse Leakage Current (Note 13) Q, T, S8 Packages V = –20V, V
= 0V
OUT
●
●
1
2
mA
mA
IN
V
OUT
ST Package
= –20V, V
= 0V
IN
Reverse Output Current (Note 11)
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
V
V
V
V
= 1.5V, V < 1.5V
600
600
600
600
300
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
OUT
OUT
OUT
OUT
OUT
IN
= 1.8V, V < 1.8V
IN
= 2.5V, V < 2.5V
IN
= 3.3V, V < 3.3V
IN
LT1963 (Note 4) V
= 1.21V, V < 1.21V
IN
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
external resistor divider (two 4.12k resistors) for an output voltage of
2.4V. The external resistor divider will add a 300µA DC load on the output.
Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ± 20V.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V – V
.
IN
DROPOUT
Note 8: GND pin current is tested with V = V
+ 1V and a
IN
OUT(NOMINAL)
Note 3: The LT1963 regulators are tested and specified under pulse load
current source load. The GND pin current will decrease at higher input
voltages.
conditions such that T ≈ T . The LT1963 is 100% tested at
J
A
T = 25°C. Performance at –40°C and 125°C is assured by design,
A
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.
characterization and correlation with statistical process controls.
Note 4: The LT1963 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1963
(adjustable version) is tested and specified for these conditions with an
1963fc
4
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
500
450
400
350
300
250
200
150
100
50
500
450
400
350
300
250
200
150
100
50
600
500
400
300
200
100
0
TEST POINTS
T
≤ 125°C
J
T
= 125°C
J
I
= 1.5A
L
T
≤ 25°C
J
I
= 0.5A
T
= 25°C
L
J
I
= 100mA
L
I
L
= 1mA
0
0
0
0.8
1.2 1.4
0.2 0.4 0.6
1.0
1.6
0
0.8
1.2 1.4
0.2 0.4 0.6
1.0
1.6
1963 • G01
–50
0
25
50
75 100 125
–25
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
1963 • G02
TEMPERATURE (°C)
1963 G03
Quiescent Current
LT1963-1.5 Output Voltage
LT1963-1.8 Output Voltage
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.54
1.53
1.52
1.51
1.50
1.49
1.48
1.47
1.46
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
I
= 1mA
L
I
= 1mA
L
LT1963-1.5/-1.8/-2.5/-3.3
LT1963
V
= 6V
IN
L
R
= ∞, I = 0
L
V
= V
SHDN
IN
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–25
0
25
50
75
125
–50
100
–25
0
25
50
75
125
–50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
1963 G04i
1963 G04
1963 G05
LT1963-2.5 Output Voltage
LT1963-3.3 Output Voltage
LT1963 ADJ Pin Voltage
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
I
= 1mA
I = 1mA
L
I
= 1mA
L
L
–25
0
25
50
75
125
–25
0
25
50
75
125
–50
100
–50
100
–25
0
25
50
75
125
–50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
1963 G06
1963 G07
1963 G08
1963fc
5
LT1963 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1963-1.8 Quiescent Current
LT1963-2.5 Quiescent Current
LT1963-1.5 Quiescent Current
14
12
10
8
14
12
10
8
14
12
10
8
T
R
V
= 25°C
= ∞
SHDN
T
R
V
= 25°C
J
T
R
V
= 25°C
= ∞
SHDN
J
L
J
L
= ∞
L
= V
= V
IN
= V
IN
SHDN
IN
6
6
6
4
4
4
2
2
2
0
0
0
0
3
4
5
6
7
8
9
10
0
5
6
7
8
9
10
1
2
1
2
3
4
0
3
4
5
6
7
8
9
10
1
2
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G09
1963 G10
1963 G08i
LT1963-3.3 Quiescent Current
LT1963 Quiescent Current
LT1963-1.5 GND Pin Current
25
20
15
10
5
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
14
12
10
8
T
= 25°C
SHDN
J
T
J
= 25°C
= 4.3k
T
R
V
= 25°C
J
L
V
= V
IN
R
= ∞
L
*FOR V
= 1.5V
OUT
V
= V
= V
IN
SHDN
IN
SHDN
6
R
= 5, I = 300mA*
L
L
4
R
= 15, I = 100mA*
L
L
2
R
= 150, I = 10mA*
L
L
0
0
0
1
2
3
4
5
6
7
8
9
10
0
6
8
10 12 14 16 18 20
0
3
4
5
6
7
8
9
10
2
4
1
2
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LT1963 G12i
1963 G12
1963 G11
LT1963-1.8 GND Pin Current
LT1963-2.5 GND Pin Current
LT1963-3.3 GND Pin Current
25
20
15
10
5
25
20
15
10
5
25
20
15
10
5
T
= 25°C
SHDN
T
= 25°C
SHDN
T
= 25°C
SHDN
J
V
J
J
V
= V
V
= V
= V
IN
= 2.5V
IN
= 1.8V
IN
= 3.3V
*FOR V
*FOR V
*FOR V
OUT
OUT
OUT
R
= 8.33, I = 300mA*
L
L
R
= 11, I = 300mA*
L
L
R
= 6, I = 300mA*
L
L
R
= 25, I = 100mA*
L
L
R
= 33, I = 100mA*
L
L
R
L
= 18, I = 100mA*
L
R
2
= 180, I = 10mA*
L
L
R
= 250, I = 10mA*
L
L
R
3
= 330, I = 100mA*
L L
0
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
4
5
6
7
8
9 10
0
1
3
4
5
6
7
8
9 10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G14
1963 G15
1963 G13
1963fc
6
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1963 GND Pin Current
LT1963-1.8 GND Pin Current
LT1963-1.5 GND Pin Current
10
8
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
SHDN
T = 25°C
J
T
= 25°C
J
V
J
= V
V
= V
IN
V
= V
IN
IN
SHDN
*FOR V
SHDN
*FOR V
*FOR V
= 1.5V
OUT
= 1.8V
= 1.21V
OUT
OUT
R
= 1, I = 1.5A*
L
L
R
= 4.33, I = 300mA*
L
L
R
= 1.2, I = 1.5A*
L
6
L
4
R = 1.5, I = 1A*
L L
R
= 12.1, I = 100mA*
L
R
= 1.8, I = 1A*
L
L
L
2
R
4
= 3, I = 500mA*
L
L
R
= 121, I = 10mA*
R = 3.6, I = 500mA*
L L
L
L
0
4
0
1
2
3
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
5
6
7
8
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G17
1963 G16
1963 G16i
LT1963-2.5 GND Pin Current
LT1963-3.3 GND Pin Current
LT1963 GND Pin Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
SHDN
T
= 25°C
SHDN
J
V
T
= 25°C
SHDN
J
J
V
= V
V
= V
IN
= 3.3V
= V
IN
IN
= 2.5V
*FOR V
*FOR V
= 1.21V
OUT
*FOR V
OUT
OUT
R
= 2.2, I = 1.5A*
L
R
= 1.67, I = 1.5A*
L
L
L
R
= 0.81, I = 1.5A*
L
L
R
= 2.5, I = 1A*
L
L
R
= 3.3, I = 1A*
L
L
R
= 1.21, I = 1A*
L
L
R
L
= 5, I = 500mA*
L
R
= 6.6, I = 500mA*
L
R
= 2.42, I = 500mA*
L
L
L
4
4
0
1
2
3
5
6
7
8
9
10
0
1
2
3
4
6
7
8
9
10
0
1
2
3
5
6
7
8
9
10
5
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G19
1963 G18
1963 G20
GND Pin Current vs I
SHDN Pin Threshold (On-to-Off)
SHDN Pin Threshold (Off-to-On)
LOAD
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
100
90
80
70
60
50
40
30
20
10
0
V
= V
+1V
I = 1mA
L
IN
OUT (NOMINAL)
I
= 1.5A
L
I
= 1mA
L
–50
0
25
50
75 100 125
–50
0
25
50
75 100 125
0.8
OUTPUT CURRENT (A)
–25
–25
0
0.2 0.4 0.6
1.0 1.2 1.4 1.6
TEMPERATURE (°C)
TEMPERATURE (°C)
1963 G22
1963 G23
1963 G21
1963fc
7
LT1963 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
SHDN Pin Input Current
SHDN Pin Input Current
ADJ Pin Bias Current
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
7
6
5
4
3
2
1
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 20V
SHDN
–50
0
25
50
75 100 125
–25
8
0
2
4
6
10 12 14 16 18 20
–50 –25
25
50
75
100 125
0
TEMPERATURE (°C)
SHDN PIN VOLTAGE (V)
TEMPERATURE (°C)
1963 G26
1963 G24
1963 G25
Current Limit
Reverse Output Current
Current Limit
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
2.5
2.0
1.5
1.0
0.5
0
5.0
V
V
= 7V
T
= 25°C
IN
IN
OUT
J
= 0V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 0V
LT1963-1.5
LT1963-1.8
T
= 25°C
J
T
= –50°C
J
T
= 125°C
J
LT1963
LT1963-3.3
LT1963-2.5
∆V
= 100mV
OUT
4
–50
0
25
50
75 100 125
4
–25
0
1
2
3
5
6
7
8
9
10
0
2
6
8
10 12 14 16 18 20
TEMPERATURE (°C)
INPUT/OUTPUT DIFFERENTIAL (V)
OUTPUT VOLTAGE (V)
CURRENT FLOWS INTO OUTPUT PIN
1963 G28
1963 G27
V
OUT
V
OUT
= V (LT1963)
ADJ
1963 G29
= V (LT1963-1.5/-1.8/-2.5/-3.3)
FB
Reverse Output Current
Ripple Rejection
Ripple Rejection
76
74
72
70
68
66
64
62
80
70
60
50
40
30
20
10
0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
V
V
V
V
V
= 0V
IN
= 1.21V (LT1963)
OUT
OUT
OUT
OUT
OUT
= 1.5V (LT1963-1.5)
= 1.8V (LT1963-1.8)
= 2.5V (LT1963-2.5)
= 3.3V (LT1963-3.3)
LT1963-1.5/-1.8/-2.5/-3.3
C
= 100µF TANTALUM
+10 × 1µF CERAMIC
OUT
LT1963
C
= 10µF TANTALUM
OUT
I
= 0.75A
= V
L
IN
I
= 0.75A
= V
V
+1V + 0.5V
OUT(NOMINAL) P-P
L
IN
V
+1V + 50mV
10k
RIPPLE
RIPPLE AT f = 120Hz
–50 –25 25
TEMPERATURE (°C)
OUT(NOMINAL)
RMS
50
100 125
0
75
–50
0
25
50
75 100 125
–25
10
100
1k
100k
1M
TEMPERATURE (°C)
FREQUENCY (Hz)
1963 G31
1963 G32
1963 G30
1963fc
8
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1963 Minimum Input Voltage
Output Noise Spectral Density
Load Regulation
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
0.1
10
5
C
L
= 10µF
OUT
=1.5A
I
LT1963-1.5
LT1963-1.8
I
= 1.5A
L
I
= 500mA
L
0
LT1963
LT1963-2.5
LT1963-3.3
I
= 100mA
L
–5
–10
–15
–20
LT1963-2.5
LT1963-3.3
LT1963
LT1963-1.8
V
V
= V
+1V
OUT(NOMINAL)
(LT1963-1.5/-1.8/-2.5/-3.3)
= 2.7V (LT1963)
IN
LT1963-1.5
IN
L
∆I = 1mA TO 1.5A
0.01
10
100
1k
10k
100k
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
FREQUENCY (Hz)
1963 G35
1963 G33
1963 G34
RMS Output Noise vs Load
Current (10Hz to 100kHz)
LT1963-3.3 10Hz to 100kHz Output Noise
50
45
40
35
30
25
20
15
10
5
C
= 10µF
OUT
LT1963-3.3
LT1963-2.5
V
OUT
LT1963-1.8
LT1963-1.5
LT1963
100µV/DIV
0
1963 G37
C
LOAD
= 10µF
= 1.5A
0.0001 0.001
0.01
0.1
1
10
1ms/DIV
OUT
I
LOAD CURRENT (A)
1063 G36
LT1963-3.3 Transient Response
LT1963-3.3 Transient Response
150
100
50
200
150
100
50
V
C
C
= 4.3V
IN
IN
= 3.3µF TANTALUM
= 10µF TANTALUM
OUT
0
–50
–100
–150
1.5
1.0
0.5
0
0
–50
–100
0.6
0.4
0.2
0
V
C
C
= 4.3V
IN
IN
= 33µF TANTALUM
= 100µF TANTALUM
OUT
+10 × 1µF CERAMIC
250
300 350 400 450 500
0
50 100 150 200
8
0
2
4
6
10 12 14 16 18 20
TIME (µs)
TIME (µs)
1963 G39
1963 G38
1963fc
9
LT1963 Series
U
U
U
PI FU CTIO S
OUT: Output. The output supplies power to the load. A
minimum output capacitor of 10µF is required to prevent
oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
ADJ: Adjust. For the adjustable LT1963, this is the input to
the error amplifier. This pin is internally clamped to ±7V.
It has a bias current of 3µA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.
SHDN:Shutdown.TheSHDNpinisusedtoputtheLT1963
regulators into a low power shutdown state. The output
will be off when the SHDN pin is pulled low. The SHDN pin
can be driven either by 5V logic or open-collector logic
with a pull-up resistor. The pull-up resistor is required to
supply the pull-up current of the open-collector gate,
normally several microamperes, and the SHDN pin cur-
rent, typically 3µA. If unused, the SHDN pin must be
connected to VIN. The device will be in the low power
shutdown state if the SHDN pin is not connected.
SENSE: Sense. For fixed voltage versions of the LT1963
(LT1963-1.5/LT1963-1.8/LT1963-2.5/LT1963-3.3), the
SENSE pin is the input to the error amplifier. Optimum
regulation will be obtained at the point where the SENSE
pin is connected to the OUT pin of the regulator. In critical
applications, small voltage drops are caused by the resis-
tance(RP)ofPCtracesbetweentheregulatorandtheload.
These may be eliminated by connecting the SENSE pin to
the output at the load as shown in Figure 1 (Kelvin Sense
Connection). Note that the voltage drop across the exter-
nal PC traces will add to the dropout voltage of the regu-
lator. The SENSE pin bias current is 600µA at the nominal
rated output voltage. The SENSE pin can be pulled below
ground (as in a dual supply system where the regulator
load is returned to a negative supply) and still allow the
device to start and operate.
IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient. The LT1963 regu-
latorsaredesignedtowithstandreversevoltagesontheIN
pin with respect to ground and the OUT pin. In the case of
a reverse input, which can happen if a battery is plugged
in backwards, the device will act as if there is a diode in
series with its input. There will be no reverse current flow
into the regulator and no reverse voltage will appear at the
load. The device will protect both itself and the load.
IN
OUT
R
P
LT1963
+
+
SHDN SENSE
GND
LOAD
V
IN
R
P
1963 F01
Exposed Pad: GND. The Exposed Pad (FE Package) is
ground and must be soldered to the PCB for rated thermal
performance.
Figure 1. Kelvin Sense Connection
1963fc
10
LT1963 Series
W U U
APPLICATIO S I FOR ATIO
U
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 1.5A is –3mV typical at
The LT1963 series are 1.5A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963regulatorsincorporateseveralprotectionfeatures
which make them ideal for use in battery-powered sys-
tems.Thedevicesareprotectedagainstbothreverseinput
and reverse output voltages. In battery backup applica-
tions where the output can be held up by a backup battery
when the input is pulled to ground, the LT1963-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
V
OUT = 1.21V. At VOUT = 5V, load regulation is:
(5V/1.21V)(–3mV) = –12.4mV
Output Capacitance and Transient Response
The LT1963 regulators are designed to be stable with a wide
range of output capacitors. The ESR of the output capacitor
affects stability, most notably with small capacitors. A mini-
mum output capacitor of 10µF with an ESR in the range of
50mΩto3Ωisrecommendedtopreventoscillations.Larger
values of output capacitance can decrease the peak devia-
tions and provide improved transient response for larger
loadcurrentchanges.Bypasscapacitors,usedtodecouple
individual components powered by the LT1963, will in-
crease the effective output capacitor value.
Adjustable Operation
The adjustable version of the LT1963 has an output
voltage range of 1.21V to 20V. The output voltage is set by
theratiooftwoexternalresistorsasshowninFigure2.The
deviceservostheoutputtomaintainthevoltageatthe ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pinbiascurrent.Notethatinshutdowntheoutputisturned
off and the divider current will be zero.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common di-
electrics used are specified with EIA temperature charac-
teristiccodesofZ5U,Y5V,X5RandX7R.TheZ5UandY5V
dielectrics are good for providing high capacitances in a
small package, but they tend to have strong voltage and
temperature coefficients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10µF Y5V capacitor
can exhibit an effective value as low as 1µF to 2µF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is
available in higher values. Care still must be exercised
when using X5R and X7R capacitors; the X5R and X7R
codesonlyspecifyoperatingtemperaturerangeandmaxi-
mum capacitance change over temperature. Capacitance
change due to DC bias with X5R and X7R capacitors is
better than Y5V and Z5U capacitors, but can still be
significant enough to drop capacitor values below appro-
IN
OUT
ADJ
V
OUT
+
V
LT1963
GND
R2
R1
IN
1963 F02
R2
⎞
⎟
⎠
R1
⎛
⎝
VOUT = 1.21V 1+
+ I
R2
(
ADJ)(
)
⎜
VADJ = 1.21V
IADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
priate levels. Capacitor DC bias characteristics tend to
Figure 2. Adjustable Operation
1963fc
11
LT1963 Series
W U U
U
APPLICATIO S I FOR ATIO
20
operating region for all values of input-to-output voltage.
Theprotectionisdesignedtoprovidesomeoutputcurrent
at all values of input-to-output voltage up to the device
breakdown.
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
X5R
–20
–40
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963-X.
–60
Y5V
–80
–100
0
8
12 14
2
4
6
10
16
DC BIAS VOLTAGE (V)
1963 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
20
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com-
mon situations are immediately after the removal of a
short-circuit or when the shutdown pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double inter-
section, the input power supply may need to be cycled down
to zero and brought up again to make the output recover.
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
Output Voltage Noise
1963 F04
The LT1963 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typi-
cally 40nV/√Hz over this frequency bandwidth for the
LT1963 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 14µVRMS for
the LT1963 increasing to 38µVRMS for the LT1963-3.3.
Figure 4. Ceramic Capacitor Temperature Characteristics
improve as component case size increases, but expected
capacitance at operating voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963-X. Power
supplyripplerejectionmustalsobeconsidered;theLT1963
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.
Overload Recovery
Like many IC power regulators, the LT1963-X has safe
operating area protection. The safe area protection de-
creases the current limit as input-to-output voltage in-
creases and keeps the power transistor inside a safe
1963fc
12
LT1963 Series
W U U
APPLICATIO S I FOR ATIO
Thermal Considerations
U
Table 2. SO-8 Package, 8-Lead SO
COPPER AREA
TOPSIDE*
2500mm2
1000mm2
225mm2
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
Thepowerhandlingcapabilityofthedeviceislimitedbythe
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
55°C/W
55°C/W
63°C/W
69°C/W
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
100mm2
*
Device is mounted on topside
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
Table 3. SOT-223 Package, 3-Lead SOT-223
COPPER AREA
TOPSIDE*
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components listed above.
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
1000mm2
0mm2
2500mm2
1000mm2
225mm2
100mm2
1000mm2
1000mm2
2500mm2
2500mm2
2500mm2
2500mm2
1000mm2
1000mm2
42°C/W
42°C/W
50°C/W
56°C/W
49°C/W
52°C/W
The LT1963 series regulators have internal thermal lim-
iting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi-
mum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi-
ent. Additional heat sources mounted nearby must also
be considered.
*
Device is mounted on topside
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
TOPSIDE*
2500mm2
1000mm2
225mm2
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
38°C/W
43°C/W
48°C/W
60°C/W
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
100mm2
*
Device is mounted on topside
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 4°C/W
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
Table 1. Q Package, 5-Lead DD
COPPER AREA
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
TOPSIDE*
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
1000mm2
125mm2
2500mm2
2500mm2
2500mm2
23°C/W
25°C/W
33°C/W
The power dissipated by the device will be equal to:
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)
)
where,
*
Device is mounted on topside
I
OUT(MAX) = 500mA
V
IN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
1963fc
13
LT1963 Series
W U U
U
APPLICATIO S I FOR ATIO
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
device. Iftheinputisleftopencircuitorgrounded, theADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
1.41W(28°C/W) = 39.5°C
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
fromthe1.21Vreferencewhentheoutputisforcedto20V.
The top resistor of the resistor divider must be chosen to
limitthecurrentintotheADJpintolessthan5mAwhenthe
ADJpinisat7V. The13VdifferencebetweenOUTandADJ
pinsdividedbythe5mAmaximumcurrentintotheADJpin
yields a minimum top resistor value of 2.6k.
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1963 regulators incorporate several protection
featureswhichmakethemidealforuseinbattery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
Current limit protection and thermal overload protection
areintendedtoprotectthedeviceagainstcurrentoverload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
WhentheINpinoftheLT1963isforcedbelowtheOUTpin
ortheOUTpinispulledabovetheINpin, inputcurrentwill
typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
The input of the device will withstand reverse voltages of
20V.Currentflowintothedevicewillbelimitedtolessthan
1mA (typically less than 100µA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
that can be plugged in backward.
The output of the LT1963 can be pulled below ground
withoutdamagingthedevice.Iftheinputisleftopencircuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
5.0
LT1963
V
= V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
OUT
ADJ
LT1963-1.5
= V
V
OUT
FB
LT1963-1.8
= V
V
OUT
FB
LT1963-2.5
= V
V
OUT
FB
LT1963-3.3
= V
V
OUT
FB
T
= 25°C
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
J
IN
V
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
1963 F05
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
Figure 5. Reverse Output Current
1963fc
14
LT1963 Series
U
TYPICAL APPLICATIO S
SCR Pre-Regulator Provides Efficiency Over Line Variations
L1
500µH
LT1963-3.3
IN OUT
3.3V
OUT
L2
1.5A
1N4148
1k
+
+
10VAC AT
115V
SHDN
GND
FB
10000µF
22µF
IN
90-140
VAC
34k*
10VAC AT
115V
IN
1N4002
“SYNC”
1N4002
1N4002
12.1k*
+V
2.4k
C1A
TO ALL “+V”
POINTS
200k
+
1N4148
+
1/2
22µF
750Ω
LT1018
–
0.1µF
+V
C1B
+
750Ω
+V
A1
0.033µF
1/2
LT1018
+
–
1N4148
10k
–
LT1006
10k
10k
+V
1µF
+V
L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437
LT1004
1.2V
1963 TA03
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
LT1963-3.3
IN OUT
3.3V
3A
C2
22µF
+
+
C1
100µF
V
IN
> 3.7V
SHDN
GND
FB
R2
0.01Ω
LT1963
IN
OUT
R6
6.65k
SHDN
SHDN
FB
GND
R7
4.12k
R3
2.2k
R4
2.2k
R5
1k
3
2
8
+
–
1
1/2
LT1366
C3
0.01µF
4
1963 TA05
1963fc
15
LT1963 Series
U
PACKAGE DESCRIPTIO
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
.060
(1.524)
TYP
.390 – .415
(9.906 – 10.541)
.060
.256
.165 – .180
(4.191 – 4.572)
(1.524)
(6.502)
.045 – .055
(1.143 – 1.397)
15° TYP
+.008
.004
–.004
.060
.059
(1.499)
TYP
.183
.330 – .370
(8.382 – 9.398)
(1.524)
(4.648)
+0.203
–0.102
0.102
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
.067
(1.702)
BSC
.050 ± .012
(1.270 ± 0.305)
.300
(7.620)
.013 – .023
(0.330 – 0.584)
+.012
.143
–.020
.028 – .038
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
3.632
Q(DD5) 0502
(0.711 – 0.965)
(
)
–0.508
TYP
.420
.276
.080
.420
.350
.325
.205
.565
.565
.320
.090
.042
.090
.042
.067
.067
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
1963fc
16
LT1963 Series
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
1963fc
17
LT1963 Series
U
PACKAGE DESCRIPTIO
ST Package
3-Lead Plastic SOT-223
(Reference LTC DWG # 05-08-1630)
.248 – .264
(6.30 – 6.71)
.129 MAX
.114 – .124
(2.90 – 3.15)
.059 MAX
.264 – .287
(6.70 – 7.30)
.248 BSC
.130 – .146
(3.30 – 3.71)
.039 MAX
.059 MAX
.090
BSC
.181 MAX
RECOMMENDED SOLDER PAD LAYOUT
.033 – .041
(0.84 – 1.04)
.0905
(2.30)
BSC
10° – 16°
.010 – .014
10°
MAX
.071
(1.80)
MAX
(0.25 – 0.36)
10° – 16°
.0008 – .0040
(0.0203 – 0.1016)
.024 – .033
(0.60 – 0.84)
.012
(0.31)
MIN
.181
(4.60)
BSC
ST3 (SOT-233) 0502
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.620
(15.75)
TYP
0.460 – 0.500
(11.684 – 12.700)
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.78 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
SEATING PLANE
0.152 – 0.202
(3.861 – 5.131)
0.155 – 0.195*
(3.937 – 4.953)
0.260 – 0.320
(6.60 – 8.13)
0.013 – 0.023
(0.330 – 0.584)
0.067
BSC
0.135 – 0.165
(3.429 – 4.191)
* MEASURED AT THE
SEATING PLANE
0.028 – 0.038
(0.711 – 0.965)
(1.70)
T5 (TO-220) 0399
1963fc
18
LT1963 Series
U
PACKAGE DESCRIPTIO
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BB
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
9
6.60 ±0.10
4.50 ±0.10
2.94
(.116)
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
0.45 ±0.05
1.05 ±0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
0.195 – 0.30
FE16 (BB) TSSOP 0204
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
1963fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LT1963 Series
TYPICAL APPLICATIO S
U
Adjustable Current Source
R5
0.01Ω
LT1963-1.8
IN OUT
LOAD
R1
1k
+
C1
10µF
SHDN
GND
FB
V
IN
> 2.7V
LT1004-1.2
R4
R6
R8
100k
R2
80.6k
C3
1µF
2.2k 2.2k
R3
2k
R7
2
3
470Ω
8
+
–
1
1/2
LT1366
4
C2
3.3µF
NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT
1963 TA04
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1129
LT1175
LT1185
LT1761
700mA, Micropower, LDO
V : 4.2V to 30V, V
= 3.75V, V = 0.40V, I = 50µA, I = 16µA,
OUT(MIN) DO Q SD
IN
DD, SOT-223, S8, TO220, TSSOP20 Packages
500mA, Micropower Negative LDO
V : –20V to –4.3V, V = –3.8V, V = 0.50V, I = 45µA, I = 10µA,
IN
OUT(MIN)
DO
Q
SD
DD, SOT-223, S8 Packages
3A, Negative LDO
V : –35V to –4.2V, V
= –2.40V, V = 0.80V, I = 2.5mA, I <1µA,
OUT(MIN) DO Q SD
IN
TO220-5 Package
100mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.30V, I = 20µA, I <1µA,
OUT(MIN) DO Q SD
IN
ThinSOT Package
LT1762
LT1763
150mA, Low Noise Micropower, LDO
500mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.30V, I = 25µA, I <1µA, MS8 Package
DO Q SD
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
V : 1.8V to 20V, V
IN
= 1.22V, V = 0.30V, I = 30µA, I <1µA, S8 Package
DO Q SD
LT1764/
LT1764A
3A, Low Noise, Fast Transient Response,
LDO
V : 2.7V to 20V, V
= 1.21V, V = 0.34V, I = 1mA, I <1µA,
DO Q SD
IN
DD, TO220 Packages
LTC1844
150mA, Very Low Drop-Out LDO
V : 6.5V to 1.6V, V
= 1.25V, V = 0.08V, I = 40µA, I <1µA,
OUT(MIN) DO Q SD
IN
ThinSOT Package
LT1962
300mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.27V, I = 30µA, I <1µA, MS8 Package
DO Q SD
IN
OUT(MIN)
= 1.21V, V = 0.34V, I = 1mA, I <1µA,
OUT(MIN) DO Q SD
LT1963/
LT1963A
1.5A, Low Noise, Fast Transient Response,
LDO
V : 2.1V to 20V, V
IN
DD, TO220, SOT Packages
LT1964
LT3020
LT3023
LT3024
LT3150
200mA, Low Noise Micropower, Negative
LDO
V : –0.9V to –20V, V
= –1.21V, V = 0.34V, I = 30µA, I = 3µA,
OUT(MIN) DO Q SD
IN
ThinSOT Package
100mA, Low Voltage V
V : 0.9V to 10V, V
= 0.20, V = 0.15V, I = 120µA, I <3µA,
OUT(MIN) DO Q SD
LDO
IN
DFN, MS8 Packages
Dual, 2x 100mA, Low Noise Micropower,
LDO
V : 1.8V to 20V, V
= 1.22V, V = 0.30V, I = 40µA, I <1µA,
DO Q SD
IN
OUT(MIN)
DFN, MS10 Packages
Dual, 100mA/500mA, Low Noise Micropower, V : 1.8V to 20V, V
LDO
= 1.22V, V = 0.30V, I = 60µA, I <1µA,
DO Q SD
IN
OUT(MIN)
DFN, TSSOP Package
Fast Transient Response, Low Input Voltage
V : –1.4V to 10V, V
= 1.23V, V = 0.13V, I = 12mA, I = 25µA,
OUT(MIN) DO Q SD
IN
GN16 Package
1963fc
LT 1105 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
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© LINEAR TECHNOLOGY CORPORATION 2005
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