LT1964ES5-BYP_技术文档

LT1964

200mA, Low Noise,

Low Dropout Negative

Micropower Regulator in ThinSOT

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DESCRIPTIO

FEATURES

Low Profile (1mm) ThinSOT^TMPackage

The LT^®1964 is a micropower low noise, low dropout

negative regulator. The device is capable of supplying

200mAofoutputcurrentwithadropoutvoltageof340mV.

Low quiescent current (30µA operating and 3µA shut-

down) makes the LT1964 an excellent choice for battery-

poweredapplications. Quiescentcurrentiswellcontrolled

in dropout.

■

Low Noise: 30µV_RMS(10Hz to 100kHz)

■

Low Quiescent Current: 30µA

■

Low Dropout Voltage: 340mV

Output Current: 200mA

Fixed Output Voltage: –5V

■

Adjustable Output from –1.22V to –20V

■

Positive or Negative Shutdown Logic

Other features of the LT1964 include low output noise.

With the addition of an external 0.01µF bypass capacitor,

outputnoiseisreducedto30µV_RMSovera10Hzto100kHz

bandwidth. The LT1964 is capable of operating with small

capacitors and is stable with output capacitors as low as

1µF. Small ceramic capacitors can be used without the

necessary addition of ESR as is common with other

regulators. Internal protection circuitry includes reverse

output protection, current limiting, and thermal limiting.

The device is available with a fixed output voltage of –5V

and as an adjustable device with a –1.22V reference

voltage. The LT1964 regulators are available in a low

profile (1mm) ThinSOT package.

■

3µA Quiescent Current in Shutdown

■

Stable with 1µF Output Capacitor

■

Stable with Aluminum, Tantalum, or Ceramic

Capacitors

Thermal Limiting

■

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APPLICATIO S

■

Battery-Powered Instruments

■

Low Noise Regulator for Noise-Sensitive

Instrumentation

■

Negative Complement to LT1761 Family of

Positive LDOs

, LTC and LT are registered trademarks of Linear Technology Corporation.

ThinSOT is a trademark of Linear Technology Corporation.

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TYPICAL APPLICATIO

10Hz to 100kHz Output Noise

–5V Low Noise Regulator

1µF

10µF

GND

SHDN

LT1964-5

V

OUT

30µV

RMS

BYP

100µV/DIV

V

IN

–5.4V

0.01µF

TO –20V

IN

OUT

–5V AT 200mA

30µV

NOISE

RMS

1964 TA01a

1964 TA01b

1ms/DIV

1964f

1

LT1964

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ABSOLUTE AXI U RATI GS _{(Note 1)}

IN Pin Voltage........................................................ ±20V

OUT Pin Voltage (Note 11) .................................... ±20V

OUT to IN Differential Voltage (Note 11)....... –0.5V, 20V

ADJ Pin Voltage

(with Respect to IN Pin) (Note 11) ........... –0.5V, 20V

BYP Pin Voltage

SHDN Pin Voltage

(with Respect to GND Pin) ........................ –20V, 15V

Output Short-Circuit Duration.......................... Indefinite

Operating Junction Temperature

Range (Note 10) ............................... – 40°C to 125°C

Storage Temperature Range ................. – 65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

(with Respect to IN Pin) ................................... ±20V

SHDN Pin Voltage

(with Respect to IN Pin) (Note 11) ........... –0.5V, 35V

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PACKAGE/ORDER I FOR ATIO

TOP VIEW

ORDER PART

NUMBER

GND 1

IN 2

5 OUT

4 ADJ

LT1964ES5-SD

LT1964ES5-5

SHDN 3

S5 PACKAGE

TOP VIEW

S5 PART MARKING

LTVX

S5 PART MARKING

5-LEAD PLASTIC SOT-23

T_JMAX= 150°C, θ_JA≈125°C/W to 250°C/W

(NOTE 13)

SEE THE APPLICATIONS INFORMATION SECTION

GND 1

IN 2

5 OUT

LTVZ

BYP 3

4 SHDN

TOP VIEW

ORDER PART

NUMBER

S5 PACKAGE

5-LEAD PLASTIC SOT-23

GND 1

IN 2

5 OUT

4 ADJ

T_JMAX= 150°C, θ_JA≈125°C/W to 250°C/W

(NOTE 13)

SEE THE APPLICATIONS INFORMATION SECTION

LT1964ES5-BYP

BYP 3

S5 PACKAGE

S5 PART MARKING

LTVY

5-LEAD PLASTIC SOT-23

T_JMAX= 150°C, θ_JA≈125°C/W to 250°C/W

(NOTE 13)

SEE THE APPLICATIONS INFORMATION SECTION

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Regulated Output Voltage

(Notes 3, 9)

LT1964-5

V

= –5.5V, I

= –1mA

LOAD

–4.925

–4.850

–5

–5.075

–5.150

V

IN

–20V < V < –6V, –200mA < I

< –1mA

LOAD

●

IN

ADJ Pin Voltage

(Notes 2, 3, 9)

LT1964

V

= –2V, I

= – 1mA

LOAD

–1.202

–1.184

–1.22

–1.238

–1.256

V

IN

–20V < V < –2.8V, –200mA < I

< –1mA

LOAD

IN

Line Regulation

LT1964-5

∆V = –5.5V to –20V, I

= – 1mA

●

15

1

50

12

mV

IN

LOAD

LT1964 (Note 2) ∆V = –2.8V to –20V, I

IN

Load Regulation

LT1964-5

V

= –6V, ∆I

= – 1mA to –200mA

15

35

50

mV

IN

LOAD

●

LT1964

V

= –2.8V, ∆I

= – 1mA to –200mA

2

7

15

mV

IN

LOAD

1964f

2

LT1964

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Dropout Voltage

I

= –1mA

0.1

0.15

0.19

V

LOAD

V

= V

●

IN

OUT(NOMINAL)

(Notes 4, 5)

I

= – 10mA

0.15

0.26

0.34

0.20

0.25

V

LOAD

I

= –100mA

0.33

0.39

V

LOAD

I

= –200mA

0.42

0.49

V

LOAD

GND Pin Current

I

= 0mA

●

30

85

300

1.3

2.5

70

180

600

3

µA

LOAD

V

= V

= –1mA

IN

OUT(NOMINAL)

(Notes 4, 6)

= – 10mA

= –100mA

= –200mA

µA

mA

6

Output Voltage Noise

ADJ Pin Bias Current

C

= 10µF, C

= 0.01µF, I

= –200mA, BW = 10Hz to 100kHz

30

µV

RMS

OUT

BYP

LOAD

(Notes 2, 7)

100

nA

Minimum Input Voltage (Note 12) LT1964-BYP

= –200mA LT1964-SD

●

–1.9

–1.6

–2.8

–2.2

V

I

LOAD

Shutdown Threshold

V

= Off to On (Positive)

= Off to On (Negative)

= On to Off (Positive)

= On to Off (Negative)

●

1.6

–1.9

0.8

2.1

–2.8

V

OUT

0.25

–0.25

–0.8

SHDN Pin Current (Note 8)

V

= 0V

= 15V

= –15V

–1

±0.1

6

–3

1

15

–9

µA

SHDN

Quiescent Current in Shutdown

Ripple Rejection

V

= –6V, V

= 0V

●

3

10

µA

IN

SHDN

– V

= –1.5V(Avg), V

= 0.5V ,

P-P

46

54

dB

OUT

= 120Hz, I

RIPPLE

= –200mA

f

RIPPLE

LOAD

Current Limit

V

= –6V, V

= 0V

350

mA

IN

OUT

= V

–1.5V, ∆V

= 0.1V

OUT

●

220

OUT(NOMINAL)

Input Reverse Leakage Current

V

= 20V, V , V , V

= Open Circuit

1

mA

IN

OUT ADJ SHDN

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 7: ADJ pin bias current flows out of the ADJ pin.

Note 8: Positive SHDN pin current flows into the SHDN pin. SHDN pin

current is included in the GND pin current specification.

Note 9: For input-to-output differential voltages greater than 7V, a 50µA

load is needed to maintain regulation.

Note 2: The LT1964 (adjustable version) is tested and specified for these

conditions with the ADJ pin connected to the OUT pin.

Note 3: Operating conditions are limited by maximum junction

temperature. The regulated output voltage specification will not apply for

all possible combinations of input voltage and output current. When

operating at maximum input voltage, the output current range must be

limited. When operating at maximum output current, the input voltage

range must be limited.

Note 4: To satisfy requirements for minimum input voltage, the LT1964

(adjustable version) is tested and specified for these conditions with an

external resistor divider (two 249k resistors) for an output voltage of

–2.44V. The external resistor divider will add a 5µA DC load on the output.

Note 5: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the

Note 10: The LT1964E is guaranteed to meet performance specifications

from 0°C to 125°C. Specifications over the –40°C to 125°C operating

junction temperature range are assured by design, characterization and

correlation with statistical process controls.

Note 11: A parasitic diode exists internally on the LT1964 between the

OUT, ADJ and SHDN pins and the IN pin. The OUT, ADJ and SHDN pins

cannot be pulled more than 0.5V more negative than the IN pin during

fault conditions, and must remain at a voltage more positive than the IN

pin during operation.

Note 12: For the LT1964-BYP, this specification accounts for the operating

threshold of the SHDN pin, which is tied to the IN pin internally. For the

LT1964-SD, the SHDN threshold must be met to ensure device operation.

output voltage will be equal to: (V + V

).

IN

DROPOUT

Note 6: GND pin current is tested with V = V

and a current

Note 13: Actual thermal resistance (θ ) junction to ambient will be a

IN

OUT(NOMINAL)

JA

source load. This means the device is tested while operating in its dropout

region. This is the worst-case GND pin current. The GND pin current will

decrease slightly at higher input voltages.

function of board layout. Junction-to-case thermal resistance (θ

measured at Pin 2 is 60°C/W. See the Thermal Considerations section in

the Applications Information.

)

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1964f

3

LT1964

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TYPICAL PERFOR A CE CHARACTERISTICS

Typical Dropout Voltage

Guaranteed Dropout Voltage

Dropout Voltage

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

500

450

400

350

300

250

200

150

100

50

= TEST POINT

T = 125°C

J

T

≤ 125°C

≤ 25°C

J

I

= –200mA

L

I

= –100mA

= –50mA

L

T = 25°C

J

T

I

= –10mA

= –1mA

L

0

–40

–80

–120

–160

–200

0

–40

–80

–120

–160

–200

–50 –25

0

25

50

75 100 125

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

1964 G01

1964 G02

1964 G03

LT1964-BYP, LT1964-SD

ADJ Pin Voltage

Quiescent Current

LT1964-5 Output Voltage

–50

–45

–40

–35

–30

–25

–20

–15

–10

–5

–5.12

–5.09

–5.06

–5.03

–5.00

–4.97

–4.94

–4.91

–4.88

–1.240

–1.235

–1.230

–1.225

–1.220

–1.215

–1.210

–1.205

–1.200

V

= –6V

I

= –1mA

I = –1mA

L

IN

L

R

= 250k (∞ FOR LT1964-5)

I

= –5µA (0 FOR LT1964-5)

L

V

SHDN

= V

IN

V

SHDN

= 0V

0

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1964 G04

1964 G05

1964 G06

LT1964-5

Quiescent Current

LT1964-BYP, LT1964-SD

Quiescent Current

LT1964-5

GND Pin Current

–40

–35

–30

–25

–20

–15

–10

–5

–40

–35

–30

–25

–20

–15

–10

–5

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

0

R

L

= 25

L

T = 25°C

L

T = 25°C

J

R

J

R

I

= –200mA*

= ∞

= 250k

V

= V

SHDN IN

L

V

= V

IN

V

= V

IN

SHDN

I

= –5µA

*FOR V

= –5V

OUT

R

L

= 50

= –100mA*

L

I

R

L

= 100

= –50mA*

L

I

R

L

= 500

= –10mA*

L

V

SHDN

= 0V

V

SHDN

= 0V

I

–0

0

–1 –2 –3 –4 –5 –6 –7 –8 –9 –10

0

–1 –2 –3 –4 –5 –6 –7 –8 –9 –10

0

–1 –2 –3 –4 –5 –6 –7 –8 –9 –10

INPUT VOLTAGE (V)

1964 G07

1964 G08

1964 G09

1964f

4

LT1964

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TYPICAL PERFOR A CE CHARACTERISTICS

LT1964-BYP, LT1964-SD

GND Pin Current

GND Pin Current vs I_LOAD

SHDN Pin Thresholds

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

0

–4.0

–3.5

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

0

2.5

2.0

T = 25°C; V

= V ; *FOR V

= –1.22V

V

IN

= V – 1V

OUT(NOMINAL)

J

SHDN

IN

OUT

ON

1.5

R

L

= 6.1Ω

= –200mA*

T = –50°C

L

J

I

1.0

R

L

= 12.2Ω

= –100mA*

0.5

L

T = 25°C

J

I

0

OFF

T = 125°C

J

–0.5

–1.0

–1.5

–2.0

–2.5

R

L

= 24.4Ω

= –50mA*

L

I

R

L

= 122Ω

= –10mA*

L

I

ON

0

–1 –2 –3 –4 –5 –6 –7 –8 –9 –10

0

–40

–80

–120

–160

–200

–50 –25

0

25

50

75 100 125

INPUT VOLTAGE (V)

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

1964 G10

1964 G11

1964 G12

SHDN Pin Input Current

ADJ Pin Bias Current

10

8

12

–70

–60

–50

–40

–30

–20

–10

0

V

= –15V

IN

T = 25°C

POSITIVE CURRENT

FLOWS INTO THE PIN

J

POSITIVE CURRENT

FLOWS INTO THE PIN

9

6

4

V

= 15V

SHDN

2

3

0

–2

–4

–6

–8

–10

= –15V

–3

–6

–9

–10 –8 –6 –4 –2

0

2

4

6

8

10

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

SHDN PIN VOLTAGE (V)

TEMPERATURE (°C)

1964 G13

1964 G14

1964 G15

Current Limit

Input Ripple Rejection

–600

–500

–400

–300

–200

–100

0

80

70

60

50

40

30

20

10

0

I

= –200mA

L

∆V

OUT

= 100mV

V

= –7V

OUT

IN

V

= V

– 1V +

IN

OUT(NOMINAL)

= 0V

–500

–400

–300

–200

–100

0

50mV

= 0

RIPPLE

RMS

C

BYP

C

= 10µF

OUT

C

= 1µF

OUT

0

–4

–8

–12

–16

–20

–50 –25

0

25

50

75 100 125

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

INPUT/OUTPUT DIFFERENTIAL (V)

TEMPERATURE (°C)

1964 G18

1964 G16

1964 G17

1964f

5

LT1964

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TYPICAL PERFOR A CE CHARACTERISTICS

LT1964-BYP

Minimum Input Voltage

LT1964-SD

Minimum Input Voltage

Input Ripple Rejection

60

58

56

54

52

50

48

46

44

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

0

–3.0

–2.5

–2.0

–1.5

–1.0

–0.5

0

V

= V

– 1V +

0.5V RIPPLE AT f = 120Hz

IN

OUT(NOMINAL)

P-P

I

= –200mA

L

I

= –200mA

= –1mA

I

= –200mA

= –1mA

L

NOTE: THE MINIMUM INPUT VOLTAGE

ACCOUNTS FOR THE OPERATING

THRESHOLD OF THE SHDN PIN WHICH

IS TIED TO THE IN PIN INTERNALLY

NOTE: THE SHDN PIN THRESHOLD

MUST BE MET TO ENSURE

DEVICE OPERATION

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

1964 G19

1964 G20

1964 G21

RMS Output Noise vs Bypass

Capacitor

Load Regulation

Output Noise Spectral Density

10

1

140

120

100

80

30

25

20

15

10

5

C

L

= 10µF

OUT

= –200mA

I

= –1mA TO –200mA

L

I

f = 10Hz TO 100kHz

C

= 1000pF

C

= 100pF

BYP

LT1964-5

C

= 0

BYP

60

0.1

0.01

40

C

= 0.01µF

= 10µF

BYP

C

LT1964-BYP

100

20

LT1964-5

LT1964-BYP

LT1964-BYP, LT1964-SD

OUT

I

= 200mA

L

0

10

1k

10k

–50 –25

0

25

50

75 100 125

10

100

1k

FREQUENCY (Hz)

10k

100k

C

(pF)

TEMPERATURE (°C)

BYP

1964 G23

1964 G24

1964 G22

RMS Output Noise vs Load

Current

LT1964-5, 10Hz to 100kHz Output

Noise, C_BYP= 0

LT1964-5, 10Hz to 100kHz Output

Noise, C_BYP= 100pF

140

120

100

80

C

OUT

= 10µF

LT1964-5

LT1964-BYP,

LT1964-SD

C

BYP

= 0

60

40

LT1964-5

20

LT1964-BYP

C_OUT= 10µF

I_LOAD= –200mA

1ms/DIV

1964 G26.tif

C_OUT= 10µF

I_LOAD= –200mA

1ms/DIV

1964 G27.tif

C

= 0.01µF

BYP

0

–0.01

–0.1

–1

–10

–100

–1k

LOAD CURRENT (mA)

1964 G25

1964f

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LT1964

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TYPICAL PERFOR A CE CHARACTERISTICS

LT1964-5, 10Hz to 100kHz Output

Noise, C_BYP= 1000pF

LT1964-5, 10Hz to 100kHz Output

Noise, C_BYP= 0.01µF

C_OUT= 10µF

1ms/DIV

1964 G28.tif

C_OUT= 10µF

1ms/DIV

1964 G29.tif

I_LOAD= –200mA

LT1964-5, Transient Response,

C_BYP= 0

LT1964-5, Transient Response,

C_BYP= 0.01µF

V

C

= –6V

V

C

= –6V

IN

0.2

0.1

0.04

0.02

0

= 10µF

OUT

0

–0.1

–0.2

–0.02

–0.04

0

–100

–200

0

–100

–200

0

400

800

1200

1600

2000

0

20 40 60 80 100 120 140 160 180 200

TIME (µs)

1964 G30

1964 G31

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GND (Pin 1): Ground.

output voltage noise. A maximum value of 0.01µF can be

usedforreducingoutputvoltagenoisetoatypical30µV_RMS

over a 10Hz to 100kHz bandwidth. If not used, this pin

must be left unconnected.

IN (Pin 2): Power is Supplied to the Device Through the

Input Pin. A bypass capacitor is required on this pin if the

device is more than six inches away from the main input

filter capacitor. In general, the output impedance of a

battery rises with frequency, so it is advisable to include a

bypass capacitor in battery-powered circuits. A bypass

capacitor in the range of 1µF to 10µF is sufficient.

SHDN (Pin 3/4, –SHDN/Fixed Devices): The SHDN Pin is

used to put the LT1964 into a Low Power Shutdown State.

The SHDN pin is referenced to the GND pin for regulator

control,allowingtheLT1964tobedrivenbyeitherpositive

ornegativelogic.TheoutputoftheLT1964willbeoffwhen

the SHDN pin is pulled within ±0.8V of GND. Pulling the

SHDN pin more than –1.9V or +1.6V will turn the LT1964

on. The SHDN pin can be driven by 5V logic or open

BYP (Pin 3, Fixed/–BYP devices): The BYP Pin is used to

Bypass the Reference of the LT1964 to Achieve Low Noise

Performance from the Regulator. A small capacitor from

the output to this pin will bypass the reference to lower the

1964f

7

LT1964

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collector logic with a pull-up resistor. The pull-up resistor

is required to supply the pull-up current of the open

collector gate, normally several microamperes, and the

SHDNpincurrent, typically3µAoutofthepin(fornegative

logic) or 6µA into the pin (for positive logic). If unused,

the SHDN pin must be connected to V_IN. The device will

be shut down if the SHDN pin is open circuit. For the

LT1964-BYP, the SHDN pin is internally connected to V_IN.

A parasitic diode exists between the SHDN pin and the

input of the LT1964. The SHDN pin cannot be pulled more

negative than the input during normal operation, or more

than 0.5V below the input during a fault condition.

output voltage range is –1.22V to –20V. A parasitic diode

exists between the ADJ pin and the input of the LT1964.

The ADJ pin cannot be pulled more negative than the input

duringnormaloperation,ormorethan0.5Vmorenegative

than the input during a fault condition.

OUT (Pin 5): The Output Supplies Power to the Load. A

minimum output capacitor of 1µF is required to prevent

oscillations. Larger output capacitors will be required for

applicationswithlargetransientloadstolimitpeakvoltage

transients. Aparasiticdiodeexistsbetweentheoutputand

the input. The output cannot be pulled more negative than

the input during normal operation, or more than 0.5V

below the input during a fault condition. See the Applica-

tions Information section for more information on output

capacitance and reverse output characteristics.

ADJ (Pin 4, Adjustable Devices only): For the Adjustable

LT1964,thisistheInputtotheErrorAmplifier.TheADJpin

has a bias current of 30nA that flows out of the pin. The

ADJ pin voltage is –1.22V referenced to ground, and the

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APPLICATIO S I FOR ATIO

The LT1964 is a 200mA negative low dropout regulator pin at –1.22V referenced to ground. The current in R1 is

with micropower quiescent current and shutdown. The then equal to –1.22V/R1 and the current in R2 is the

device is capable of supplying 200mA at a dropout voltage current in R1 plus the ADJ pin bias current. The ADJ pin

of340mV.Outputvoltagenoisecanbeloweredto30µV_RMSbias current, 30nA at 25°C, flows through R2 out of the

over a 10Hz to 100kHz bandwidth with the addition of a ADJ pin. The output voltage can be calculated using the

0.01µF reference bypass capacitor. Additionally, the refer- formula in Figure 1. The value of R1 should be less than

ence bypass capacitor will improve transient response of 250kΩ to minimize errors in the output voltage caused by

the regulator, lowering the settling time for transient load the ADJ pin bias current. Note that in shutdown the output

conditions. The low operating quiescent current (30µA) is turned off and the divider current will be zero. Curves of

drops to 3µA in shutdown. In addition to the low quiescent ADJ Pin Voltage vs Temperature and ADJ Pin Bias Current

current, the LT1964 incorporates several protection vs Temperature appear in the Typical Performance Char-

features which make it ideal for use in battery-powered acteristics section.

systems. In dual supply applications where the regulator

The adjustable device is tested and specified with the ADJ

load is returned to a positive supply, the output can be

pintiedtotheOUTpinanda5µADCload(unlessotherwise

pulled above ground by as much as 20V and still allow the

device to start and operate.

specified) for an output voltage of –1.22V. Specifications

for output voltages greater than –1.22V will be propor-

tional to the ratio of the desired output voltage to –1.22V;

Adjustable Operation

(V_OUT/–1.22V). For example, load regulation for an output

TheadjustableversionoftheLT1964hasanoutputvoltage

range of –1.22V to –20V. The output voltage is set by the

ratio of two external resistors as shown in Figure 1. The

device servos the output to maintain the voltage at the ADJ

current change of 1mA to 200mA is 2mV typical at V_OUT

–1.22V. At V_OUT= –12V, load regulation is:

=

(–12V/–1.22V) • (2mV) = 19.6mV

1964f

8

LT1964

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APPLICATIO S I FOR ATIO

Output Capacitance and Transient Response

R1

+

The LT1964 is designed to be stable with a wide range of

output capacitors. The ESR of the output capacitor affects

stability, most notably with small capacitors. A minimum

output capacitor of 1µF with an ESR of 3Ω or less is

recommended to prevent oscillations. The LT1964 is a

micropower device and output transient response will be

a function of output capacitance. Larger values of output

capacitance decrease the peak deviations and provide

improved transient response for larger load current

changes. Bypass capacitors, used to decouple individual

components powered by the LT1964, will increase the

effective output capacitor value.

GND

V

ADJ

LT1964

IN

R2

IN

V

OUT

1964 F01

OUT

R2

R1

V

I

= –1.22V(1 +

= –1.22V

) – (I )(R2)

ADJ

OUT

ADJ

= 30nA AT 25°C

ADJ

OUTPUT RANGE = –1.22V TO –20V

Figure 1. Adjustable Operation

Bypass Capacitance and Low Noise Performance

Extra consideration must be given to the use of ceramic

capacitors. Ceramic capacitors are manufactured with a

variety of dielectrics, each with different behavior across

temperature and applied voltage. The most common di-

electrics used are Z5U, Y5V, X5R, and X7R. The Z5U and

Y5V dielectrics are good for providing high capacitances

in a small package, but exhibit strong voltage and tem-

perature coefficients as shown in Figures 2 and 3. When

used with a –5V regulator, a 10µF Y5V capacitor can

exhibit an effective value as low as 1µF to 2µF over the

operatingtemperaturerange.TheX5RandX7Rdielectrics

result in more stable characteristics and are more suitable

for use as the output capacitor. The X7R type has better

stability across temperature, while the X5R is less expen-

sive and is available in higher values.

The LT1964 may be used with the addition of a bypass

capacitor from V_OUTto the BYP pin to lower output

voltage noise. A good quality low leakage capacitor is

recommended. This capacitor will bypass the reference of

the LT1964, providing a low frequency noise pole. The

noise pole provided by this bypass capacitor will lower the

output voltage noise to as low as 30µV_RMSwith the

addition of a 0.01µF bypass capacitor. Using a bypass

capacitor has the added benefit of improving transient

response. With no bypass capacitor and a 10µF output

capacitor, a –10mA to –200mA load step will settle to

within 1% of its final value in less than 100µs. With the

addition of a 0.01µF bypass capacitor, the output will stay

within 1% for the same –10mA to –200mA load step (see

LT1964-5 Transient Response in the Typical Characteris-

tics section). However, regulator start-up time is inversely

proportional to the size of the bypass capacitor.

Voltage and temperature coefficients are not the only

sources of problems. Some ceramic capacitors have a

piezoelectric response. A piezoelectric device generates

voltage across its terminals due to mechanical stress,

similar to the way a piezoelectric accelerometer or micro-

phone works. For a ceramic capacitor the stress can be

induced by vibrations in the system or thermal transients.

The resulting voltages produced can cause appreciable

amounts of noise, especially when a ceramic capacitor is

used for noise bypassing. A ceramic capacitor produced

Figure 4’s trace in response to light tapping from a pencil.

Similar vibration induced behavior can masquerade as

increased output voltage noise.

Higher values of output voltage noise may be measured

if care is not exercised with regard to circuit layout

and testing. Crosstalk from nearby traces can induce

unwanted noise onto the output of the LT1964-X.

1964f

9

LT1964

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APPLICATIO S I FOR ATIO

20

Thermal Considerations

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

0

The power handling capability of the device will be limited

by the maximum rated junction temperature (125°C). The

power dissipated by the device will be made up of two

components:

X5R

–20

–40

1. Output current multiplied by the input/output voltage

differential: I_OUT• (V_IN– V_OUT), and

–60

Y5V

–80

2. Ground pin current multiplied by the input voltage:

–100

I_GND• V_IN.

0

8

12 14

2

4

6

10

16

DC BIAS VOLTAGE (V)

The GND pin current can be found by examining the GND

Pin Current curves in the Typical Performance Character-

istics.Powerdissipationwillbeequaltothesumofthetwo

components listed above.

1964 F02

Figure 2. Ceramic Capacitor DC Bias Characteristics

40

20

The LT1964 series regulators have internal thermal limit-

ing designed to protect the device during overload condi-

tions. For continuous normal conditions the maximum

junction temperature rating of 125°C must not be

exceeded. It is important to give careful consideration to

allsourcesofthermalresistancefromjunctiontoambient.

Additional heat sources mounted nearby must also be

considered.

X5R

0

–20

–40

Y5V

–60

–80

BOTH CAPACITORS ARE 16V,

1210 CASE SIZE, 10µF

–100

For surface mount devices, heat sinking is accomplished

by using the heat spreading capabilities of the PC board

and its copper traces. Copper board stiffeners and plated

through-holes can also be used to spread the heat gener-

ated by power devices.

50

TEMPERATURE (°C)

100 125

–50 –25

0

25

75

1964 F03

Figure 3. Ceramic Capacitor Temperature Characteristics

The following table lists thermal resistance for several

different board sizes and copper areas. All measurements

were taken in still air on 3/32" FR-4 board with one ounce

copper.

V

OUT

1mV/DIV

Table 1. Measured Thermal Resistance

COPPER AREA

TOPSIDE* BACKSIDE BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

1964 F04

2

LT1964-5

100ms/DIV

2500mm

1000mm

2500mm

125°C/W

130°C/W

135°C/W

150°C/W

C

= 10µF

OUT

BYP

2

= 0.01µF

= –200mA

I

LOAD

2

225mm

Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor

2

100mm

2

50mm

*Device is mounted on topside.

The thermal resistance junction-to-case (θ_JC), measured

at Pin 2, is 60°C/W.

1964f

10

LT1964

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APPLICATIO S I FOR ATIO

Calculating Junction Temperature

flow to less than 40µA. For adjustable versions, the output

willactlikeanopencircuit, nocurrentwillflowintothepin.

If the input is powered by a voltage source, the output will

sink the short-circuit current of the device and will protect

itselfbythermallimiting.Inthiscase,groundingtheSHDN

pinwillturnoffthedeviceandstoptheoutputfromsinking

the short-circuit current.

Example: Given an output voltage of –5V, an input voltage

range of –6V to –8V, an output current range of 0mA to

–100mA, and a maximum ambient temperature of 50°C,

what will the maximum junction temperature be?

The power dissipated by the device will be equal to:

I

_OUT(MAX)• (V_IN(MAX)– V_OUT) + (I_GND• V_IN(MAX)

where,

I_OUT(MAX)= –100mA

)

Like many IC power regulators, the LT1964 series have

safe operating area protection. The safe area protection

activates at input-to-output differential voltages greater

than –7V. The safe area protection decreases the current

limit as the input-to-output differential voltage increases

and keeps the power transistor inside a safe operating

region for all values of forward input to-output voltage.

Theprotectionisdesignedtoprovidesomeoutputcurrent

at all values of input-to-output voltage up to the device

breakdown. A 50µA load is required at input-to-output

differential voltages greater than –7V.

V_IN(MAX)= –8V

I_GNDat (I_OUT= –100mA, V_IN= –8V) = –2mA

so,

P = –100mA • (–8V + 5V) + (–2mA • –8V) = 0.32W

The thermal resistance (junction to ambient) will be in the

range of 125°C/W to 150°C/W depending on the copper

area. So the junction temperature rise above ambient will

be approximately equal to:

When power is first turned on, as the input voltage rises,

the output follows the input, allowing the regulator to start

up into very heavy loads. During start-up, as the input

voltage is rising, the input-to-output voltage differential is

small, allowing the regulator to supply large output

currents. With a high input voltage, a problem can occur

wherein removal of an output short will not allow the

output voltage to fully recover. Other regulators, such as

the LT1175, also exhibit this phenomenon, so it is not

unique to the LT1964 series.

0.32W • 140°C/W = 44.2°C

The maximum junction temperature will then be equal to

the maximum junction temperature rise above ambient

plus the maximum ambient temperature or:

T_JMAX= 50°C + 44.2°C = 94.2°C

Protection Features

TheLT1964incorporatesseveralprotectionfeatureswhich

make it ideal for use in battery-powered circuits. In addi-

tion to the normal protection features associated with

monolithic regulators, such as current limiting and ther-

mal limiting, the device is protected against reverse input

voltages and reverse output voltages.

The problem occurs with a heavy output load when the

input voltage is high and the output voltage is low.

Common situations are immediately after the removal of

a short-circuit or when the SHDN pin is pulled high after

the input voltage has already been turned on. The load line

for such a load may intersect the output current curve at

two points. If this happens, there are two stable operating

points for the regulator. With this double intersection, the

input supply may need to be cycled down to zero and

brought up again to make the output recover.

Current limit protection and thermal overload protection

areintendedtoprotectthedeviceagainstcurrentoverload

conditions at the output of the device. For normal opera-

tion, the junction temperature should not exceed 125°C.

The output of the LT1964 can be pulled above ground

withoutdamagingthedevice.Iftheinputisleftopencircuit

or grounded, the output can be pulled above ground by

20V. For fixed voltage versions, the output will act like a

large resistor, typically 500kΩ or higher, limiting current

1964f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

11

LT1964

U

PACKAGE DESCRIPTIO

S5 Package

5-Lead Plastic TSOT-23

(Reference LTC DWG # 05-08-1635)

0.62

MAX

0.95

REF

2.90 BSC

(NOTE 4)

1.22 REF

1.50 – 1.75

(NOTE 4)

2.80 BSC

1.4 MIN

3.85 MAX 2.62 REF

PIN ONE

RECOMMENDED SOLDER PAD LAYOUT

PER IPC CALCULATOR

0.30 – 0.45 TYP

5 PLCS (NOTE 3)

0.95 BSC

0.80 – 0.90

0.20 BSC

DATUM ‘A’

0.01 – 0.10

1.00 MAX

0.30 – 0.50 REF

1.90 BSC

0.09 – 0.20

(NOTE 3)

NOTE:

S5 TSOT-23 0302

1. DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS ARE INCLUSIVE OF PLATING

4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR

5. MOLD FLASH SHALL NOT EXCEED 0.254mm

6. JEDEC PACKAGE REFERENCE IS MO-193

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

Includes 2.5V Reference and Comparator, V = 3.5V to 36V,

I = 40µA, N8 Package

Q

LT1120

125mA Micropower Low Dropout Regulator with

Comparator and Shutdown

IN

LT1121

LT1129

LT1175

150mA Micropower Low Dropout Regulator

700mA Micropower Low Dropout Regulator

800mA Negative Low Dropout Micropower Regulator

V

= 4.2V to 30V, I = 30µA; ThinSOT, S8 and MS8 Packages

Q

IN

= 4.5V to 30V, I = 50µA; DD and S8 Packages

Q

= 4.5V to 20V, I = 45µA, 0.26V Dropout Voltage, S8 and

Q

ThinSOT Packages

LT1611

Inverting 1.4MHz Switching Regulator

–5V at 150mA from 5V Input, ThinSOT Package

LT1761 Series

LT1762 Series

LT1763 Series

LT1764A

100mA, Low Noise, Low Dropout Micropower Regulators

150mA, Low Noise, LDO Micropower Regulators

500mA, Low Noise, LDO Micropower Regulators

3A, Low Noise, Fast Transient Response LDO

V

= 1.5V to 20V, I =20µA, 20µV

Noise, ThinSOT Package

Noise, MS8 Package

Noise, S8 Package

IN

Q

RMS

= 1.5V to 20V, I =25µA, 20µV

Q

= 1.5V to 20V, I =30µA, 20µV

Q

= 1.5V to 20V, 40µV

Noise; DD and T5 Packages

RMS

LT1931/LT1931A Inverting 1.2MHz/2.2MHz Switching Regulators

–5V at 350mA from 5V Input, ThinSOT Package

LT1962

300mA, Low Noise, LDO Micropower Regulator

1.5A, Low Noise, Fast Transient Response LDO

V

= 1.5V to 20V, I =30µA, 20µV

Noise, MS8 Package

RMS

IN

Q

LT1963A

= 1.5V to 20V, 40µV

Noise; DD, T5, S8 and ThinSOT

IN

RMS

Packages

1964f

LT/TP 0502 2K • PRINTED IN USA

12 ^{LinearTechnology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com

LINEAR TECHNOLOGY CORPORATION 2001

This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.


型号：	LT1964ES5-BYP
厂家：	Linear
描述：	200mA, Low Noise, Low Dropout Negative Micropower Regulator in ThinSOT 200mA，低噪声，低压差负稳压器微采用ThinSOT封装稳压器调节器光电二极管输出元件 PC
文件：	总13页 (文件大小：206K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LT1964ES5-BYP [Linear]

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LT1964ES5-BYP#PBF

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LT1964ES5-BYPPBF

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