LT3081ER#PBF [Linear]
LT3081 - 1.5A Single Resistor Rugged Linear Regulator with Monitors; Package: DD PAK; Pins: 7; Temperature Range: -40°C to 85°C;
| 型号： | LT3081ER#PBF |
| 厂家： | 
Linear |
| 描述： | LT3081 - 1.5A Single Resistor Rugged Linear Regulator with Monitors; Package: DD PAK; Pins: 7; Temperature Range: -40°C to 85°C 输出元件 调节器 |
| 文件： | 总32页 (文件大小：463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3081
1.5A Single Resistor
Rugged Linear Regulator
with Monitors
FeaTures
DescripTion
n
Extended Safe Operating Area
The LT®3081 is a 1.5A low dropout linear regulator de-
signed for rugged industrial applications. Key features of
the IC are the extended safe operating area (SOA), output
current monitor, temperature monitor and programmable
current limit. The LT3081 can be paralleled for higher
output current or heat spreading. The device withstands
reverseinputandreverseoutput-to-inputvoltageswithout
reverse current flow.
n
Maximum Output Current: 1.5A
n
Stable with or without Input/Output Capacitors
n
Wide Input Voltage Range: 1.2V to 36V
n
Single Resistor Sets Output Voltage
n
Output Current Monitor: I
= I /5000
MON
OUT
n
n
n
n
n
Junction Temperature Monitor: 1µA/°C
Output Adjustable to 0V
50µA SET Pin Current: 1% Initial Accuracy
The LT3081’s precision 50µA reference current source
allows a single resistor to program output voltage to
any level between zero and 34.5V. The current reference
architecture makes load regulation independent of output
voltage. The LT3081 is stable with or without input and
output capacitors.
Output Voltage Noise: 27µV
RMS
Parallel Multiple Devices for Higher Current or
Heat Spreading
Programmable Current Limit
n
n
n
n
n
Reverse-Battery and Reverse-Current Protection
<1mV Load Regulation Typical Independent of V
<0.001%/V Line Regulation Typical
OUT
The output current monitor (I /5000) and die junction
OUT
temperature output (1µA/°C) provide system monitoring
and debug capability. In addition, a single resistor pro-
grams current limit.
Available in Thermally-Enhanced 12-Lead 4mm × 4mm
DFN and 16-Lead TSSOP, 7-Lead DD-Pak and 7-Lead
TO-220
Internal protection circuitry includes reverse-battery and
reverse-current protection, current limiting and thermal
limiting. The LT3081 is offered in the 16-lead TSSOP (with
exposed pad for improved thermal performance), 7-lead
TO-220, 7-leadDD-Pak, andan12-lead4mm× 4mmDFN.
applicaTions
n
All Surface Mount Power Supply
n
Rugged Industrial Power Supply
n
Post Regulator for Switching Supplies
n
Low Output Voltage Supply
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
n
Intrinsic Safety Applications
Typical applicaTion
SET Pin Current
50.5
I
L
= 5mA
Wide Safe Operating Area Supply
50.4
50.3
50.2
50.1
50.0
49.9
49.8
49.7
49.6
49.5
V
IN
IN
LT3081
I /5000
LOAD
1µA/°C
50µA
+
–
I
OUT
OUT
1.5V
1A
I
I
LIM
TEMP
1k
SET
30.1k
MON
300Ω*
10µF*
4.53k
1k
3081 TA01a
–50
50
100 125
150
–25
0
25
75
*OPTIONAL
TEMPERATURE (°C)
3081 TA01b
3081fc
1
For more information www.linear.com/LT3081
LT3081
absoluTe MaxiMuM raTings (Note 1) All Voltages Relative to VOUT
.
IN Pin to OUT Pin Differential Voltage..................... 40V
SET Pin Current (Note 6) ..................................... 25mA
SET Pin Voltage (Relative to OUT, Note 6) .............. 10V
TEMP Pin Voltage (Relative to OUT).................1V, –40V
Operating Junction Temperature Range (Note 2)
E-, I-Grades ....................................... –40°C to 125°C
H-Grade ............................................. –40°C to 150°C
MP-Grade .......................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
I
Pin Voltage (Relative to OUT) ......................... 0.2V
LIM
I
Pin Voltage (Relative to OUT)...................1V, –40V
MON
Output Short-Circuit Duration.......................... Indefinite
FE, R, T7 Packages Only...................................300°C
pin conFiguraTion
TOP VIEW
OUT
OUT
OUT
OUT
OUT
1
2
3
4
5
6
7
8
16
15
14
13
OUT
IN
TOP VIEW
1
2
3
4
5
6
12 IN
OUT
OUT
OUT
OUT
IN
IN
11
10
9
IN
IN
17
OUT
13
OUT
IN
12 IN
TEMP
8
I
LIM
I
11
10
9
TEMP
LIM
7
I
SET
MON
SET
I
MON
DF PACKAGE
12-LEAD (4mm × 4mm) PLASTIC DFN
OUT
OUT
T
= 125°C, θ = 32°C/W, θ = 4°C/W
JA JC
JMAX
FE PACKAGE
16-LEAD PLASTIC TSSOP
EXPOSED PAD (PIN 13) IS OUT, MUST BE SOLDERED TO PCB
T
= 150°C, θ = 29°C/W, θ = 8°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS OUT, MUST BE SOLDERED TO PCB
FRONT VIEW
FRONT VIEW
NC
IN
7
6
5
4
3
2
1
NC
7
6
5
4
3
2
1
IN
TEMP
TEMP
OUT
TAB IS
OUT
TAB IS
OUT
OUT
I
I
MON
MON
SET
SET
I
I
LIM
LIM
R PACKAGE
7-LEAD PLASTIC DD
T7 PACKAGE
7-LEAD PLASTIC TO-220
T
= 125°C, θ = 15°C/W, θ = 3°C/W
T
= 150°C, θ = 40°C/W, θ = 3°C/W
JMAX JA JC
JMAX
JA
JC
3081fc
2
For more information www.linear.com/LT3081
LT3081
orDer inForMaTion
LEAD FREE FINISH
LT3081EDF#PBF
LT3081IDF#PBF
LT3081EFE#PBF
LT3081IFE#PBF
LT3081HFE#PBF
LT3081MPFE#PBF
LT3081ER#PBF
LT3081IR#PBF
TAPE AND REEL
LT3081EDF#TRPBF
LT3081IDF#TRPBF
LT3081EFE#TRPBF
LT3081IFE#TRPBF
LT3081HFE#TRPBF
LT3081MPFE#TRPBF
LT3081ER#TRPBF
LT3081IR#TRPBF
NA
PART MARKING*
3081
PACKAGE DESCRIPTION
12-Lead (4mm × 4mm) Plastic DFN
12-Lead (4mm × 4mm) Plastic DFN
16-Lead Plastic TSSOP
16-Lead Plastic TSSOP
16-Lead Plastic TSSOP
16-Lead Plastic TSSOP
7-Lead Plastic DD-Pak
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
3081
3081FE
3081FE
3081FE
3081FE
LT3081R
LT3081R
LT3081T7
LT3081T7
LT3081T7
LT3081T7
7-Lead Plastic DD-Pak
LT3081ET7#PBF
LT3081IT7#PBF
LT3081HT7#PBF
LT3081MPT7#PBF
7-Lead Plastic TO-220
NA
7-Lead Plastic TO-220
NA
7-Lead Plastic TO-220
NA
7-Lead Plastic TO-220
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. (Note 2)
PARAMETER
CONDITIONS
= 2V, I = 5mA
LOAD
MIN
TYP
MAX
UNITS
SET Pin Current
I
V
49.5
48.75
50
50
50.5
51.25
µA
µA
SET
IN
l
l
2V ≤ V ≤ 36V, 5mA ≤ I
≤ 1.5A
IN
LOAD
Offset Voltage
V
V
IN
V
IN
= 2V, I
= 2V, I
= 5mA
= 5mA
–1.5
–3.5
0
0
1.5
3.5
mV
mV
OS
LOAD
LOAD
(V
OUT
– V )
SET
I
Load Regulation
Load Regulation
∆I
= 5mA to 1.5A
LOAD
–0.1
–0.5
–1.5
nA
mV
mV
SET
l
l
V
∆I
= 5mA to 1.5A DF, FE Packages
R, T7 Packages
–3
–4
OS
LOAD
(Note 7)
Line Regulation
∆I
∆V = 2V to 36V, I
IN
= 5mA
= 5mA
1.5
0.001
nA/V
mV/V
SET
OS
IN
LOAD
LOAD
∆V
∆V = 2V to 36V, I
l
Minimum Load Current (Note 3)
Dropout Voltage (Note 4)
2V ≤ V ≤ 36V
1.1
5
mA
IN
I
I
= 100mA
= 1.5A
1.21
1.23
V
V
LOAD
LOAD
l
l
l
1.5
Internal Current Limit
V
IN
= 5V, V = 0V, V = –0.1V
OUT
1.5
2
A
mA/kΩ
Ω
SET
I
I
I
I
I
Programming Ratio
300
360
450
300
200
500
330
LIM
Minimum Output Current Resistance
LIM
Full-Scale Output Current
Scale Factor
I
= 1.5A
290
µA
MON
MON
MON
LOAD
100mA ≤ I
≤ 1.5A
µA/A
V
LOAD
l
Operating Range
V
– 40V
V
+ 0.4V
OUT
OUT
3081fc
3
For more information www.linear.com/LT3081
LT3081
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. (Note 2)
PARAMETER
CONDITIONS
T > 5°C
MIN
TYP
MAX
UNITS
TEMP Output Current (Note 9)
TEMP Output Current Absolute Error (Note 9)
1
µA/°C
J
0°C <T ≤ 125°C
–10
–15
10
15
µA
µA
J
125°C <T ≤ 150°C
J
Reference Current RMS Output Noise (Note 5)
Error Amplifier RMS Output Noise (Note 5)
10Hz ≤ f ≤ 100kHz
5.7
27
nA
RMS
RMS
I
= 1.5A, 10Hz ≤ f ≤ 100kHz, C
LOAD
= 0.1µF
=10µF,
OUT
µV
C
SET
Ripple Rejection
f = 120Hz
f = 10kHz
f = 1MHz
75
90
75
20
dB
dB
dB
V
C
= 0.5V , I
= 0.1A, C = 0.1µF,
RIPPLE
P-P LOAD SET
=10µF, V = V + 3V
OUT(NOMINAL)
OUT
IN
Thermal Regulation, I
10ms Pulse
0.003
%/W
SET
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: For the LT3081, dropout is specified as the minimum input-to-
output voltage differential required supplying a given output current.
Note 5: Adding a small capacitor across the reference current resistor
lowers output noise. Adding this capacitor bypasses the resistor shot
noise and reference current noise; output noise is then equal to error
amplifier noise (see Applications Information section).
Note 2: Unless otherwise specified, all voltages are with respect to V
.
OUT
The LT3081 is tested and specified under pulse load conditions such
that T ≈ T . The LT3081E is tested at T = 25°C and performance is
guaranteed from 0°C to 125°C. Performance of the LT3081E over the
J
A
A
Note 6: Diodes with series 400Ω resistors clamp the SET pin to the
OUT pin. These diodes and resistors only carry current under transient
overloads.
full –40°C and 125°C operating temperature range is assured by design,
characterization, and correlation with statistical process controls. The
LT3081I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3081MP is 100% tested and guaranteed
over the –55°C to 150°C operating junction temperature range. The
LT3081H is tested at 150°C operating junction temperature. High junction
temperatures degrade operating lifetimes. Operating lifetime is degraded at
junction temperatures greater than 125°C.
Note 3: Minimum load current is equivalent to the quiescent current of
the part. Since all quiescent and drive current is delivered to the output
of the part, the minimum load current is the minimum current required to
maintain regulation.
Note 7: Load regulation is Kelvin sensed at the package.
Note 8: This IC includes overtemperature protection that protects the
device during momentary overload conditions. Junction temperature
exceeds the maximum operating junction temperature when
overtemperature protection is active. Continuous operation above the
specified maximum operating junction temperature may impair device
reliability.
Note 9: The TEMP pin output current represents the average die junction
temperature. Due to power dissipation and thermal gradients across the
die, the TEMP pin output current measurement does not guarantee that
absolute maximum junction temperature is not exceeded.
3081fc
4
For more information www.linear.com/LT3081
LT3081
TJ = 25°C unless otherwise specified.
Typical perForMance characTerisTics
SET Pin Current
SET Pin Current
Offset Voltage (VOUT – VSET
)
50.5
50.4
50.3
50.2
50.1
50.0
49.9
49.8
49.7
49.6
49.5
2.0
1.5
I
= 5mA
N = 3195
LOAD
I
= 5mA
LOAD
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
49
49.5
50
50.5
51
–50
50
100 125
150
–25
0
25
75
50 75
TEMPERATURE (°C)
–50 –25
0
25
100 125 150
SET PIN CURRENT DISTRIBUTION (µA)
TEMPERATURE (°C)
3081 G02
3081 G01
3081 G03
Offset Voltage
Offset Voltage (VOUT – VSET
)
Offset Voltage (VOUT – VSET
)
0.2
0
1.0
0.8
I
= 5mA
N = 3195
LOAD
0.6
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
–1.4
0.4
T = 25°C
J
0.2
0
T = 125°C
J
–0.2
–0.4
–0.6
–0.8
–1.0
0.5
0.75
1
1.25
0
0.25
1.5
–2
–1
V
0
1
2
0
6
18
24
30
36
12
DISTRIBUTION (mV)
LOAD CURRENT (A)
INPUT-TO-OUTPUT DIFFERENTIAL (V)
OS
3081 G06
3081 G04
3081 G05
Load Regulation
Minimum Load Current
Dropout Voltage
1.5
1.4
1.3
1.2
300
250
200
150
100
50
0
3.0
2.5
2.0
1.5
1.0
0.5
0
∆I
LOAD
= 5mA TO 1.5A
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
T = –50°C
J
T = 25°C
J
V
IN
– V
= 36V
OUT
T = 125°C
J
V
– V
= 2V
OUT
IN
1.1
1.0
0
75 100
–50 –25
0
25 50
125 150
0
0.5
0.75
1
1.25
1.5
75 100
0.25
–50 –25
0
25 50
125 150
TEMPERATURE (°C)
LOAD CURRENT (A)
TEMPERATURE (°C)
3081 G07
3081 G09
3081 G08
3081fc
5
For more information www.linear.com/LT3081
LT3081
TJ = 25°C unless otherwise specified.
Typical perForMance characTerisTics
Dropout Voltage
Internal Current Limit
Internal Current Limit
1.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
V
V
= 7V
IN
OUT
= 0V
1.8
1.6
1.4
1.3
TO-220 AND
DD-PAK
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
TSSOP
AND DFN
I
= 1.5A
LOAD
1.2
1.1
1.0
I
= 5mA
LOAD
75 100
50
–50 –25
0
25 50
125 150
–50 –25
0
25
75 100 125 150
0
6
18
24
30
36
12
TEMPERATURE (°C)
INPUT-TO-OUTPUT DIFFERENTIAL VOLTAGE (V)
TEMPERATURE (°C)
3081 G10
3081 G11
3081 G12
TO-220 Package Maximum Power
Dissipation
Programmable Current Limit
Programmable Current Limit
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
30
25
20
15
10
5
2.0
1.5
1.0
0.5
T = 25°C
J
IN
OUT
V
– V
= 20V
OUT
V
V
= 7V
IN
R
= 4.53k
= 3.01k
ILIM
ILIM
LIMITED BY FOLDBACK
CURRENT LIMIT
= 0V
R
V
– V
= 10V
OUT
IN
V
– V
= 5V
OUT
R
ILIM
= 1.50k
IN
V
V
= 7V
OUT
IN
= 0V
θ
= 3°C/W
JC
0
0
50 75
90 100
–50 –25
0
25
100 125 150
50 60 70 80
110 120 130 140 150
0
1
2
3
4
5
6
R
ILIM
(kΩ)
TEMPERATURE (°C)
CASE TEMPERATURE (°C)
3081 G39
3081 G13
3081 G14
Programmable Current Limit
TEMP Pin Current
I
MON Pin Current
1.05
1.00
160
140
120
100
80
350
300
R
SET
= 20k
R
R
R
ILIM
4.53k
ILIM
ILIM
1.5k
3.01k
250
200
150
100
50
0.95
0.6
60
0.4
0.2
0
40
20
0
0
0
0.5
1
1.5
2
50 75
TEMPERATURE (°C)
–50 –25
0
25
100 125 150
0.3
0.6
0.9
1.5
0
1.2
OUTPUT CURRENT (A)
LOAD CURRENT (A)
3081 G15
3081 G16
3081 G17
3081fc
6
For more information www.linear.com/LT3081
LT3081
TJ = 25°C unless otherwise specified.
Typical perForMance characTerisTics
Linear Regulator
Load Transient Response
Linear Regulator
Load Transient Response
IMON Pin Line Regulation
150
100
50
50
45
40
35
30
25
20
15
10
5
300
200
100
0
I
= 200mA
V
V
C
= 3V
C
= 2.2µF
V
V
C
= 3V
IN
C
= 2.2µF
LOAD
IN
OUT
OUT
= 1V
= 1V
OUT
SET
OUT
SET
= 0.1µF
= 0.1µF
0
–50
–100
400
200
0
–100
–200
2.0
∆I
= 100mA TO 500mA
LOAD
∆I
LOAD
= 500mA TO 1.5A
1.0
0
0
80 100
0
20 40 60
120 140 160 180 200
0
6
18
24
30
36
0
20
80 100
160 180 200
12
40 60
120 140
INPUT-TO-OUTPUT DIFFERENTIAL VOLTAGE (V)
TIME (µs)
TIME (µs)
8081 G19
3791 TA02b
3081 G20
Linear Regulator
Line Transient Response
Linear Regulator
Load Transient Response
Linear Regulator
Load Transient Response
400
200
0
7
6
200
100
0
V
V
C
= 3V
R
R
= 20k
LOAD
C
C
= 2.2µF
= 0.1µF
V
V
C
= 3V
C
= 0
C
= 0
IN
SET
OUT
SET
IN
OUT
OUT
= 1V
= 0.67Ω
= 1V
OUT
SET
OUT
SET
= 30pF
= 30pF
5
–200
–400
1.5
1.0
0.5
0
4
–100
–200
600
400
200
0
3
∆I
= 500mA TO 1.5A
LOAD
0.1
0
∆I
= 100mA TO 500mA
LOAD
–0.1
–0.2
t = t = 1µs
t = t = 1µs
r
f
r
f
20 25
0
5
10 15
30 35 40 45 50
20 25
10 15
20 25
0
5
30 35 40 45 50
0
5
10 15
30 35 40 45 50
TIME (µs)
TIME (µs)
TIME (µs)
3081 G22
3081 G23
3081 G21
Current Source
Line Transient Response
Current Source
Line Transient Response
Linear Regulator
Turn-On Response
6
5
4
3
6
5
R
= 6.04k
R
= 6.04k
SET
SET
R
C
= 3.01Ω
= 0
R
C
= 0.3Ω
= 0
OUT
OUT
SET
OUT
OUT
SET
C
= 30pF
C
= 30pF
4
2
4
3
1
3
2
0
2
150
100
50
0
1.0
0.5
0
1.2
1.0
0.8
0.6
R
R
C
= 20k
LOAD
SET
= 0.67Ω
= 2.2µF CERAMIC
= 0
OUT
C
100mA CURRENT SOURCE CONFIGURATION
20 25
SET
1A CURRENT SOURCE CONFIGURATION
20 25
–0.5
20 25
10 15
0
5
10 15
30 35 40 45 50
TIME (µs)
0
5
30 35
40 45 50
0
5
10 15
30 35 40 45 50
TIME (µs)
TIME (µs)
3081 G24
3081 G26
3081 G25
3081fc
7
For more information www.linear.com/LT3081
LT3081
TJ = 25°C unless otherwise specified.
Typical perForMance characTerisTics
Current Source
Turn-On Response
Current Source
Turn-On Response
Linear Regulator
Turn-On Response
4
3
4
3
4
100mA CURRENT SOURCE CONFIGURATION
1A CURRENT SOURCE CONFIGURATION
3
2
2
2
1
1
1
R
R
C
= 6.04k
= 3.01Ω
= 0
R
R
C
= 6.04k
= 0.3Ω
= 0
SET
OUT
OUT
SET
SET
OUT
OUT
SET
0
0
0
C
= 20pF
C
= 20pF
1.0
0.5
0
150
100
50
0
1.5
1.0
0.5
0
R
R
C
= 20k
LOAD
SET
= 0.67Ω
= 2.2µF CERAMIC
= 0.1µF
OUT
C
SET
–0.5
8
10
0
80 100
20 40 60
0
2
4
6
12 14 16 18 20
120 140 160 180 200
80 100
0
20 40 60
120 140 160 180 200
TIME (ms)
TIME (µs)
TIME (µs)
3081 G27
3081 G28
3081 G29
Residual Output Voltage with
Less Than Minimum Load
Ripple Rejection
Ripple Rejection
100
90
100
90
800
700
600
500
400
300
200
100
0
C
C
V
= 2.2µF CERAMIC
C
C
I
= 2.2µF CERAMIC
= 0.1µF
LOAD
OUT
OUT
SET
= 0.1µF
SET
IN
= V
+ 2V
= 100mA
OUT(NOMINAL)
V
= 36V
IN
80
80
70
70
V
= 5V
IN
60
50
60
50
40
30
20
10
0
40
30
20
10
0
SET PIN = 0V
V
V
IN
OUT
I
I
I
= 100mA
= 500mA
= 1.5A
V
V
V
= V
= V
= V
+ 5V
LOAD
LOAD
LOAD
IN
IN
IN
OUT
OUT
OUT
R
TEST
+ 2V
+ 1.5V
1000
10
100
1k
10k 100k
1M
10M
0
500
1500
2000
10
100
1k
10k 100k
1M
10M
FREQUENCY (Hz)
R
TEST
(Ω)
FREQUENCY (Hz)
3081 G31
3081 G32
3081 G30
Output Impedance
Ripple Rejection (120Hz)
90
88
86
84
82
80
78
76
74
72
70
10M
1M
100k
10k
1k
CURRENT SOURCE CONFIGURATION
V
= V
+ 2V
OUT(NOMINAL)
IN
RIPPLE = 500mV
f = 120Hz
P-P
100
10
I
C
C
= 0.1A
= 2.2µF
= 0.1µF
I
I
I
= 10mA
= 100mA
= 1A
LOAD
SOURCE
SOURCE
SOURCE
OUT
SET
1
10
100
1k
10k 100k 1M
10M
125
150
–50
50
100
–25
0
25
75
FREQUENCY (Hz)
TEMPERATURE (°C)
3081 G33
3081 G34
3081fc
8
For more information www.linear.com/LT3081
LT3081
TJ = 25°C unless otherwise specified.
Typical perForMance characTerisTics
Ripple Rejection (1MHz)
Ripple Rejection (10kHz)
65
63
61
59
57
55
53
51
49
47
45
26
24
22
20
18
16
14
12
10
V
= V
+ 2V
OUT(NOMINAL)
IN
RIPPLE = 200mV
f = 1MHz
P-P
I
C
C
= 0.1A
LOAD
= 2.2µF CERAMIC
= 0.1µF
OUT
SET
V
= V
+ 2V
OUT(NOMINAL)
IN
RIPPLE = 500mV
f = 10kHz
P-P
I
C
C
= 0.1A
= 2.2µF
= 0.1µF
LOAD
OUT
SET
50 75
25
TEMPERATURE (°C)
–50 –25
0
100 125 150
–50
50
100 125
150
–25
0
25
75
TEMPERATURE (°C)
3081 G36
3081 G34
10Hz to 100kHz
Noise Spectral Density
Output Voltage Noise
1000
100
10
100
C
C
= 0.1µF
= 4.7µF
= 1.5A
SET
OUT
I
LOAD
V
OUT
10
50µV/DIV
NOISE INDEPENDENT
OF OUTPUT VOLTAGE
1
100k
TIME 1ms/DIV
10
100
1k
10k
3081 G38
FREQUENCY (Hz)
3981 G37
3081fc
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For more information www.linear.com/LT3081
LT3081
pin FuncTions
IN: Input. This pin supplies power to regulate internal
circuitry and supply output load current. For the device
to operate properly and regulate, the voltage on this pin
must be between the dropout voltage and 36V above the
OUT pin (depending on output load current, see Dropout
Voltage Specifications).
I
: Output Current Monitor. The I
pin sources a
MON
MON
current typically equal to I
/5000 or 200µA per amp of
LOAD
output current. Terminating this pin with a resistor to GND
produces a voltage proportional to I . For example,
at I
1k resistor to GND, this produces 300mV. The output
of the I pin is valid for voltages from V + 0.4V to
V
LOAD
= 1.5A, I
typically sources 300µA. With a
LOAD
MON
MON
OUT
OUT: Output. This is the power output of the device. The
LT3081 requires a 5mA minimum load current for proper
output regulation.
– 40V. If unused, connect this pin to OUT.
OUT
SET: Set. This pin is the error amplifier’s noninverting
input and also sets the operating bias point of the circuit.
A fixed 50μA current source flows out of this pin. A single
external resistor programs V . Output voltage range is
0V to 34.5V.
TEMP: Temperature Output. This pin delivers a current
proportional to the internal average junction temperature.
Current output is 1µA/°C for temperatures above 5°C. The
TEMP pin output current typically equals 25µA at 25°C.
OUT
The output of the TEMP pin is valid for voltages from V
Exposed Pad/Tab: Output. The exposed pad of the DF and
FE packages and the tab of the R and T7 packages are tied
internally to OUT. As such, tie them directly to OUT (Pins
1-4/Pins 1-5, 8, 9, 16/Pin 4/Pin 4) at the PCB. The amount
of copper area and planes connected to OUT determine
the effective thermal resistance of the packages.
OUT
+ 0.4V to V
– 40V. If unused, connect this pin to OUT.
OUT
I
: Current Limit Program. A resistor between this pin
LIM
and OUT programs output current limit to a level propor-
tional to resistor value. Connect this resistor directly to
OUT at the pins of the package. The typical ratio of current
limit to resistor value is 360mA/kΩ with a 450Ω offset.
If programmable current limit is not used, leave this pin
open; the internal current limit of the LT3081 is still active,
keeping the device inside safe operating limits. External
NC: No Connection. No connect pins have no connection
to internal circuitry and may be tied to IN, OUT, GND or
floated.
voltage drops between the current limit resistor and V
will affect the current limit. Keep drops below 1mV.
OUT
block DiagraM
IN
50µA
+
CURRENT
MONITOR
TEMPERATURE
DEPENDENT
CURRENT SOURCE
1µA/°C
–
PROGRAMMABLE
CURRENT LIMIT
I
= I
/5000
MON LOAD
I
TEMP
SET
I
OUT 308
MON
LIM
3081fc
10
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
Introduction
The LT3081 has many additional features that facilitate
monitoring and control. Current limit is externally pro-
The LT3081 regulator is easy to use and has all the pro-
tection features expected in high performance regulators.
Includedareshort-circuitprotection,reverse-inputprotec-
tion and safe operating area protection, as well as thermal
shutdown with hysteresis. Safe operating area (SOA) for
the LT3081 is extended, allowing for use in harsh indus-
trial and automotive environments where sudden spikes
in input voltage lead to high power dissipation.
grammable via a single resistor between the I pin and
LIM
OUT. Shorting this resistor out disables all output current
to the load, only bias currents remain.
The I
pin produces a current output proportional to
MON
load current. For every 1A of load current, the I
pin
MON
sources 200µA of current. This can be sensed using an
external resistor to monitor load requirements and detect
potentialfaults.TheI
pincanoperateatvoltagesabove
MON
The LT3081 fits well in applications needing multiple rails.
This new architecture adjusts down to zero with a single
resistor, handling modern low voltage digital ICs as well
as allowing easy parallel operation and thermal manage-
ment without heat sinks. Adjusting to zero output allows
shutting off the powered circuitry.
OUT, so it operates even during a short-circuit condition.
One additional monitoring function is the TEMP pin, a cur-
rentsourcethatisproportionaltoaveragedietemperature.
For die temperatures above 0°C, the TEMP pin sources a
currentequalto1µA/°C.Thispinoperatesnormallyduring
output short-circuit conditions.
Aprecision“0”TC50μAreferencecurrentsourceconnects
to the noninverting input of a power operational amplifier.
Thepoweroperationalamplifierprovidesalowimpedance
buffered output to the voltage on the noninverting input.
A single resistor from the noninverting input to ground
sets the output voltage. If this resistor is set to 0Ω, zero
output voltage results. Therefore, any output voltage can
be obtained between zero and the maximum defined by
the input power supply is obtainable.
Programming Linear Regulator Output Voltage
The LT3081 generates a 50μA reference current that flows
out of the SET pin. Connecting a resistor from SET to
ground generates a voltage that becomes the reference
point for the error amplifier (see Figure 1). The reference
voltage equals 50µA multiplied by the value of the SET
pin resistor. Any voltage can be generated and there is
no minimum output voltage for the regulator.
The benefit of using a true internal current source as the
reference,asopposedtoabootstrappedreferenceinolder
regulators, is not so obvious in this architecture. A true
reference current source allows the regulator to have gain
and frequency response independent of the impedance on
the positive input. On older adjustable regulators, such as
the LT1086 loop gain changes with output voltage and
bandwidth changes if the adjustment pin is bypassed to
ground. For the LT3081, the loop gain is unchanged with
output voltage changes or bypassing. Output regulation
is not a fixed percentage of output voltage, but is a fixed
fraction of millivolts. Use of a true current source allows
all of the gain in the buffer amplifier to provide regulation,
and none of that gain is needed to amplify up the reference
to a higher output voltage.
LT3081
IN
C
IN
50µA
+
–
SET
R
OUT
R
V
= 50µA • R
SET
OUT
C
C
OUT
SET
SET
LOAD
3081 F01
Figure 1. Basic Adjustable Regulator
3081fc
11
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LT3081
applicaTions inForMaTion
Table 1 lists many common output voltages and the clos-
est standard 1% resistor values used to generate that
output voltage.
depends on the guard ring width. 50nA of leakage into or
out of the SET pin and its associated circuitry creates a
0.1%referencevoltageerror. Leakagesofthismagnitude,
coupled with other sources of leakage, can cause signifi-
cant offset voltage and reference drift, especially over the
possible operating temperature range. Figure 2 depicts an
example guard ring layout.
Regulation of the output voltage requires a minimum load
current of 5mA. For true zero voltage output operation,
return this 5mA load current to a negative output voltage.
Table 1. 1% Resistors for Common Output Voltages
If guard ring techniques are used, this bootstraps any
stray capacitance at the SET pin. Since the SET pin is
a high impedance node, unwanted signals may couple
into the SET pin and cause erratic behavior. This will
be most noticeable when operating with minimum
output capacitors at full load current. The easiest way
to remedy this is to bypass the SET pin with a small
amount of capacitance from SET to ground, 10pF to
20pF is sufficient.
V
(V)
R
SET
(kΩ)
OUT
1
20
1.2
24.3
30.1
35.7
49.9
66.5
100
1.5
1.8
2.5
3.3
5
Withthe50µAcurrentsourceusedtogeneratethereference
voltage, leakage paths to or from the SET pin can create
errors in the reference and output voltages. High quality
insulation should be used (e.g., Teflon, Kel-F); cleaning of
allinsulatingsurfacestoremovefluxesandotherresidues
is required. Surface coating may be necessary to provide
a moisture barrier in high humidity environments.
Configuring the LT3081 as a Current Source
Setting the LT3081 to operate as a 2-terminal current
sourceisasimplematter.The50µAreferencecurrentfrom
the SET pin is used with one resistor to generate a small
voltage, usually in the range of 100mV to 1V (200mV is a
level that rejects offset voltage, line regulation, and other
errors without being excessively large). This voltage is
then applied across a second resistor that connect from
OUT to the first resistor. Figure 3 shows connections and
formulastocalculateabasiccurrentsourceconfiguration.
Minimize board leakage by encircling the SET pin and
circuitry with a guard ring operated at a potential close
to itself. Tie the guard ring to the OUT pin. Guarding both
sidesofthecircuitboardisrequired.Bulkleakagereduction
IN
LT3081
OUT
IOUT ≥ 5mA
50µA
VSET = 50µA •RSET
+
–
VSET 50µA •RSET
IOUT
=
=
ROUT
ROUT
SET
OUT
3081 F03
+
–
V
R
SET
SET
R
OUT
3081 F02
GND
I
OUT
SET PIN
Figure 2. Guard Ring Layout Example of DF Package
Figure 3. Using the LT3081 as a Current Source
3081fc
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LT3081
applicaTions inForMaTion
Again, the lower current levels used in the LT3081 neces-
sitateattentiontoboardleakagesaserrorsources(seethe
Programming Linear Regulator Output Voltage section).
Programming Current Limit Externally
A resistor placed between I and OUT on the LT3081
externallysetscurrentlimittoalevellowerthantheinternal
current limit. Connect this resistor directly at the OUT pins
for best accuracy. The value of this resistor calculates as:
LIM
In a current source configuration, programmable cur-
rent limit and current monitoring functions are often
unused. When not used, tie I
to OUT and leave I
MON
LIM
R
= I
/360mA/kΩ + 450Ω
LIMIT
ILIM
open. The TEMP pin is still available for use, if unused tie
Theresistorfora1.3Acurrentlimitis:R
=1.3A/360mA/
TEMP to OUT.
ILIM
kΩ + 450Ω = 4.06k. Tolerance over temperature is 15%,
so current limit is normally set 20% above maximum load
current. The 450Ω offset resistance built in to the pro-
grammablecurrentlimitallowsforloweringthemaximum
outputcurrenttoonlybiascurrents(seecurveofMinimum
Load Current in Typical Performance Characteristics) us-
ing external switches.
Selecting R and R
in Current Source Applications
SET
OUT
In Figure 3, both resistors R
and R
program the
OUT
SET
value of the output current. The question now arises: the
ratio of these resistors is known, but what value should
each resistor be?
ThefirstresistortoselectisR .Thevalueselectedshould
SET
The LT3081’s internal current limit overrides the pro-
grammed current limit if the input-to-output voltage dif-
ferential in the power transistor is excessive. The internal
currentlimitis≈2Awithafoldbackcharacteristicdependent
on input-to-output differential voltage, not output voltage
per se (see Typical Performance Characteristics).
generate enough voltage to minimize the error caused by
the offset between the SET and OUT pins. A reasonable
startinglevelis~200mVofvoltageacrossR (R equal
SET SET
to 4.02k). Resultant errors due to offset voltage are a few
percent. The lower the voltage across R becomes, the
SET
higher the error term due to the offset.
From this point, selecting R
is easy, as it is a straight-
Stability and Input Capacitance
OUT
forwardcalculationfromR .Takenote,however,resistor
SET
The LT3081 does not require an input capacitor to main-
tain stability. Input capacitors are recommended in linear
regulator configurations to provide a low impedance input
source to the LT3081. If using an input capacitor, low
ESR, ceramic input bypass capacitors are acceptable for
applications without long input leads. However, applica-
tions connecting a power supply to an LT3081 circuit’s
IN and GND pins with long input wires combined with
low ESR, ceramic input capacitors are prone to voltage
spikes, reliability concerns and application-specific board
oscillations. The input wire inductance found in many
battery-poweredapplications, combinedwiththelowESR
ceramic input capacitor, forms a high Q LC resonant tank
circuit. In some instances this resonant frequency beats
against the output current dependent LDO bandwidth and
interferes with proper operation. Simple circuit modifica-
tions/solutions are then required. This behavior is not
indicative of LT3081 instability, but is a common ceramic
input bypass capacitor application issue.
errors must be accounted for as well. While larger voltage
drops across R
minimize the error due to offset, they
SET
also increase the required operating headroom.
Obtainingthebesttemperaturecoefficientdoesnotrequire
the use of expensive resistors with low ppm temperature
coefficients.Instead,sincetheoutputcurrentoftheLT3081
is determined by the ratio of R
to R , those resis-
SET
OUT
tors should have matching temperature characteristics.
Less expensive resistors made from the same material
provide matching temperature coefficients. See resistor
manufacturers’ data sheets for more details.
Higher output currents necessitate the use of higher watt-
age resistors for R . There may be a difference between
OUT
the resistors used for R
and R . A better method to
OUT
SET
maintain consistency in resistors is to use multiple resis-
tors in parallel to create R , allowing the same wattage
OUT
SET
and type of resistor as R
.
3081fc
13
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LT3081
applicaTions inForMaTion
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the self-
inductance of a 2-AWG isolated wire (diameter = 0.26") is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01"). One foot of 30-AWG wire has about 465nH of
self inductance.
performance, place a capacitor across the voltage setting
resistor. Capacitors up to 1μF can be used. This bypass
capacitor reduces system noise as well, but start-up time
is proportional to the time constant of the voltage setting
resistor (R in Figure 1) and SET pin bypass capacitor.
SET
Stability and Frequency Compensation for Current
Source Configurations
One of two ways reduces a wire’s self-inductance. One
method divides the current flowing towards the LT3081
between two parallel conductors. In this case, the farther
apart the wires are from each other, the more the self-
inductanceisreduced;uptoa50%reductionwhenplaced
a few inches apart. Splitting the wires basically connects
two equal inductors in parallel, but placing them in close
proximity gives the wires mutual inductance adding to
the self-inductance. The second and most effective way
to reduce overall inductance is to place both forward and
return current conductors (the input and GND wires) in
very close proximity. Two 30-AWG wires separated by
only 0.02", used as forward and return current conduc-
tors, reduce the overall self-inductance to approximately
one-fifth that of a single isolated wire.
The LT3081 does not require input or output capacitors
for stability in many current-source applications. Clean,
tight PCB layouts provide a low reactance, well controlled
operating environment for the LT3081 without requiring
capacitors to frequency compensate the circuit. Figure 3
highlights the simplicity of using the LT3081 as a current
source.
Some current source applications use a capacitor con-
nected in parallel with the SET pin resistor to lower the
current source’s noise. This capacitor also provides a
soft-start function for the current source. See Quieting the
Noise section for further details. When operating without
output capacitors, the high impedance nature of the SET
pin as the input of the error amplifier allows signal from
the output to couple in, showing as high frequency ring-
ing during transients. Bypassing the SET resistor with a
capacitorintherangeof20pFto30pFdampenstheringing.
If wiring modifications are not permissible for the applica-
tions,includingseriesresistancebetweenthepowersupply
and the input of the LT3081 also stabilizes the application.
As little as 0.1Ω to 0.5Ω, often less, is effective in damp-
ing the LC resonance. If the added impedance between
the power supply and the input is unacceptable, adding
ESR to the input capacitor also provides the necessary
damping of the LC resonance. However, the required ESR
is generally higher than the series impedance required.
Depending on the pole introduced by a capacitor or other
complex impedances presented to the LT3081, external
compensation may be required for stability. Techniques
are discussed to achieve this in the following paragraphs.
Linear Technology strongly recommends testing stability
insituwithfinalcomponentsbeforebeginningproduction.
Stability and Frequency Compensation for Linear
Regulator Configurations
Although the LT3081’s design strives to be stable without
capacitors over a wide variety of operating conditions, it is
not possible to test for all possible combinations of input
and output impedances that the LT3081 will encounter.
These impedances may include resistive, capacitive, and
inductive components and may be complex distributed
networks. In addition, the current source’s value will dif-
fer between applications and its connection may be GND
referenced,powersupplyreferenced,orfloatinginasignal
line path. Linear Technology strongly recommends that
stability be tested in situ for any LT3081 application.
The LT3081 does not require an output capacitor for
stability. LTC recommends an output capacitor of 10μF
with an ESR of 0.5Ω or less to provide good transient
performance in linear regulator configurations. Larger
valuesofoutputcapacitancedecreasepeakdeviationsand
provideimprovedtransientresponseforlargerloadcurrent
changes. Bypass capacitors, used to decouple individual
components powered by the LT3081, increase the effec-
tive output capacitor value. For improvement in transient
3081fc
14
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
In LT3081 applications with long wires or PCB traces, the
inductive reactance may cause instability. In some cases,
adding series resistance to the input and output lines (as
showninFigure4)maysufficientlydampenthesepossible
high-Q lines and provide stability. The user must evaluate
therequiredresistorvaluesagainstthedesign’sheadroom
constraints. In general, operation at low output current
levels (<20mA) automatically requires higher values of
programming resistors and may provide the necessary
damping without additional series impedance.
capacitor’s stored energy to create a spark or arc. For ap-
plicationswhereasinglecapacitorisunacceptable, Figure
5 alternately shows a series RC network connected across
the two terminals of the current source. This network has
the added benefit of limiting the discharge current of the
capacitor under a fault condition, preventing sparks or
arcs. In many instances, a series RC network is the best
solutionforstabilizingtheapplicationcircuit.Typicalresis-
tor values will range from 100Ω to 5k. Once again, Linear
Technology strongly recommends testing stability in situ
foranyLT3081applicationacrossalloperatingconditions,
especiallyonesthatpresentcompleximpedancenetworks
at the input and output of the current source.
If the line impedances in series with the LT3081 are
complex enough such that series damping resistors are
not sufficient, a frequency compensation network may be
necessary. Several options may be considered.
If an application refers the bottom of the LT3081 current
source to GND, it may be necessary to bypass the top
of the current source with a capacitor to GND. In some
cases, this capacitor may already exist and no additional
capacitance is required. For example, if the LT3081 was
used as a variable current source on the output of a power
supply, the output bypass capacitance would suffice to
provide LT3081 stability. Other applications may require
the addition of a bypass capacitor. A series RC network
may also be used as necessary, and depends on the ap-
plication requirements.
Figure 5 depicts the simplest frequency compensation
networks as a single capacitor across the two terminals
of the current source. Some applications may use the
capacitance to stand off DC voltage but allow the transfer
of data down a signal line.
For some applications, pure capacitance may be unac-
ceptable or present a design constraint. One circuit
example typifying this is an “intrinsically-safe” circuit in
which an overload or fault condition potentially allows the
LONG LINE
REACTANCE/INDUCTANCE
IN
LT3081
R
COMP
R
SERIES
50µA
C
OR
COMP
IN
LT3081
+
–
C
COMP
50µA
+
–
SET
OUT
R
SET
R
OUT
SET
OUT
3081 F05
R
R
OUT
SET
3081 F04
Figure 5. Compensation from Input to Output
of Current Source Provides Stability
R
SERIES
LONG LINE
REACTANCE/INDUCTANCE
Figure 4. Adding Series Resistance Decouples
and Dampens Long Line Reactances
3081fc
15
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LT3081
applicaTions inForMaTion
In some extreme cases, capacitors or series RC networks
may be required on both the LT3081’s input and output to
stabilize the circuit. Figure 6 depicts a general application
using input and output capacitor networks rather than
an input-to-output capacitor. As the input of the current
source tends to be high impedance, placing a capacitor
on the input does not have the same effect as placing a
capacitoronthelowerimpedanceoutput.Capacitorsinthe
range of 0.1µF to 1µF usually provide sufficient bypassing
on the input, and the value of input capacitance may be
increased without limit. Pay careful attention to using low
ESR input capacitors with long input lines (see the Stabil-
ity and Input Capacitance section for more information).
Using Ceramic Capacitors
Give extra consideration to the use of ceramic capacitors.
Ceramic capacitors are manufactured with a variety of di-
electrics, each with different behavior across temperature
and applied voltage. The most common dielectrics used
are specified with EIA temperature characteristic codes of
Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are
good for providing high capacitances in a small package,
but they tend to have strong voltage and temperature
coefficients as shown in Figures 7 and 8. When used with
a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF for the DC bias voltage
appliedandovertheoperatingtemperaturerange.TheX5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
The X7R type has better stability across temperature,
while the X5R is less expensive and is available in higher
values. Care still must be exercised when using X5R and
X7R capacitors. The X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltage should be verified.
V
IN
IN
R
LT3081
50µA
IN
C
IN
+
–
SET
OUT
R
SET
R
I
OUT
R
OUT
OUT
C
OR
OUT
C
OUT
3081 F06
Figure 6. Input and/or Output Capacitors May
Be Used for Compensation
40
20
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
X5R
X5R
0
–20
–20
–40
–40
Y5V
–60
–60
Y5V
–80
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–100
50
TEMPERATURE (°C)
75
100 125
0
8
12
14
–50 –25
0
25
2
4
6
10
16
DC BIAS VOLTAGE (V)
3081 F07
3081 F08
Figure 7. Ceramic Capacitor Temperature Characteristics
Figure 8. Ceramic Capacitor DC Bias Characteristics
3081fc
16
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress. In a
ceramic capacitor, the stress can be induced by vibrations
in the system or thermal transients.
LT3081
IN
50µA
+
–
SET
OUT
10mΩ
Paralleling Devices
LT3081
IN
V
IN
Higher output current is obtained by paralleling multiple
LT3081stogether.TietheindividualSETpinstogetherand
tie the individual IN pins together. Connect the outputs in
commonusingsmallpiecesofPCtraceasballastresistors
to promote equal current sharing. PC trace resistance in
milliohms/inch is shown in Table 2. Ballasting requires
only a tiny area on the PCB.
4.8V TO 40V
50µA
+
–
1µF
SET
OUT
V
3.3V
3A
10mΩ
10µF
OUT
33k
Table 2. PC Board Trace Resistance
3081 F09
WEIGHT (oz)
10mil WIDTH
54.3
20mil WIDTH
27.1
1
2
Figure 9. Parallel Devices
27.1
13.6
Trace resistance is measured in mΩ/in.
The worst-case room temperature offset, only 1.5mV
between the SET pin and the OUT pin, allows the use of
very small ballast resistors.
Quieting the Noise
The LT3081 offers numerous noise performance advan-
tages. Every linear regulator has its sources of noise. In
general, a linear regulator’s critical noise source is the
reference. In addition, consider the error amplifier’s noise
contribution along with the resistor divider’s noise gain.
As shown in Figure 9, each LT3081 has a small 10mΩ
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
resistance of 10mΩ (5mΩ for the two devices in parallel)
only adds about 15mV of output regulation drop at an
output of 3A. Even with an output voltage as low as 1V,
thisonlyadds1.5%totheregulation.Ofcourse,paralleling
morethantwoLT3081syieldsevenhigheroutputcurrent.
Spreading the devices on the PC board also spreads the
heat. Series input resistors can further spread the heat if
the input-to-output difference is high.
Manytraditionallownoiseregulatorsbondoutthevoltage
reference to an external pin (usually through a large value
resistor) to allow for bypassing and noise reduction. The
LT3081 does not use a traditional voltage reference like
other linear regulators. Instead, it uses a 50µA reference
current. The 50µA current source generates noise current
levels of 18pA/√Hz (5.7nA
over a 10Hz to 100kHz
RMS
bandwidth). The equivalent voltage noise equals the RMS
If the increase in load regulation from the ballast resis-
noise current multiplied by the resistor value.
tors is unacceptable, the I
output can be used to
MON
The SET pin resistor generates spot noise equal to √4kTR
(k=Boltzmann’sconstant,1.38•10 J/°K,andTisabso-
lute temperature) which is RMS summed with the voltage
noise.Iftheapplicationrequireslowernoiseperformance,
bypassthevoltagesettingresistorwithacapacitortoGND.
Notethatthisnoise-reductioncapacitorincreasesstart-up
time as a factor of the RC time constant.
compensate for these drops (see Using I
Cancels
MON
–23
BallastResistorDropintheTypicalApplicationssection).
Regulatorparallelingwithouttheuseofballastresistorsis
accomplished by comparing the I
outputs of regula-
MON
tors (see Load Current Sharing Without Ballasting in the
Typical Applications section).
3081fc
17
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
LT3081
The LT3081 uses a unity-gain follower from the SET pin
to the OUT pin. Therefore, multiple possibilities exist
(besides a SET pin resistor) to set output voltage. For
example, using a high accuracy voltage reference from
SET to GND removes the errors in output voltage due to
reference current tolerance and resistor tolerance. Active
driving of the SET pin is acceptable.
IN
50µA
+
–
PARASITIC
RESISTANCE
SET
OUT
R
P
LOAD
R
SET
R
R
P
The typical noise scenario for a linear regulator is that the
outputvoltagesettingresistordividergainsupthereference
P
3081 F10
noise, especially if V
is much greater than V . The
OUT
REF
LT3081’s noise advantage is that the unity-gain follower
presents no noise gain whatsoever from the SET pin to the
output. Thus, noise figures do not increase accordingly.
Figure 10. Connections for Best Load Regulation
TEMP Pin Operation (Die Temperature Monitor)
Error amplifier noise is typical 85nV/√Hz(27µV
over
RMS
a 10Hz to 100kHz bandwidth). The error amplifier’s noise
is RMS summed with the other noise terms to give a final
noise figure for the regulator.
TheTEMPpinoftheLT3081outputsacurrentproportional
to average die temperature. At 25°C, the current from the
TEMP pin is 25µA, with a slope of 1µA/°C. The current out
of the TEMP pin is valid for junction temperatures above
0°C (absent initial offset considerations). Below 0°C, the
TEMP pin will not sink current to indicate die temperature.
The TEMP pin output current is valid for voltages up to
40V below and 0.4V above the OUT pin allowing operation
even during short-circuit conditions.
Paralleling of regulators adds the benefit that output noise
is reduced. For n regulators in parallel, the output noise
drops by a factor of √n.
Curves in the Typical Performance Characteristics sec-
tion show noise spectral density and peak-to-peak noise
characteristics for both the reference current and error
amplifier over a 10Hz to 100kHz bandwidth.
Connecting a resistor from TEMP to ground converts the
TEMP pin current into a voltage to allow for monitoring
by an ADC. With a 1k resistor, 0mV to 150mV indicates
0°C to 150°C.
Load Voltage Regulation
The LT3081 is a floating device. No ground pin exists on
the packages. Thus, the IC delivers all quiescent current
and drive current to the load. Therefore, it is not possible
to provide true remote load sensing. The connection re-
sistance between the regulator and the load determines
load regulation performance. The data sheet’s load
regulation specification is Kelvin sensed at the package’s
pins. Negative-side sensing is a true Kelvin connection by
returning the bottom of the voltage setting resistor to the
negative side of the load (see Figure 10).
It should benoted that the TEMP pin current represents an
average temperature and should not be used to guarantee
that maximum junction temperature is not exceeded.
Instantaneous power along with thermal gradients and
time constants may cause portions of the die to exceed
maximum ratings and thermal shutdown thresholds. Be
sure to calculate die temperature rise for steady state (>1
minute) as well as impulse conditions.
I
Pin Operation (Current Monitor)
MON
Connected as shown, system load regulation is the sum
of the LT3081’s load regulation and the parasitic line
resistance multiplied by the output current. To minimize
load regulation, keep the positive connection between the
regulator and load as short as possible. If possible, use
large diameter wire or wide PC board traces.
The LT3081’s I
pin outputs a current proportional to
MON
the load current supplied at a ratio of 1:5000. The I
MON
pin current is valid for voltages up to 40V below and 0.4V
above the OUT pin, allowing operation even during short-
circuit conditions.
3081fc
18
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
Connecting a resistor from I
MON
an ADC. With a 1k resistor, 0mV to 300mV indicates 0A
to 1.5A of load current.
to ground converts the
PC board, copper traces and planes. Surface mount heat
sinks, plated through-holes and solder-filled vias can also
spread the heat generated by power devices.
MON
I
pin current into a voltage to allow for monitoring by
Junction-to-case thermal resistance is specified from the
IC junction to the bottom of the case directly, or the bot-
tom of the pin most directly in the heat path. This is the
lowest thermal resistance path for heat flow. Only proper
device mounting ensures the best possible thermal flow
from this area of the packages to the heat sinking material.
Compensating for Cable Drops with I
MON
The I
pin can compensate for resistive drops in wires
MON
or cables between the LT3081 and the load. Breaking the
SETresistorintotwopiecesadjuststheoutputvoltageasa
function of load current. The ratio of the output wire/cable
impedance to the bottom resistor should be 1:5000. The
sum total of the two SET resistor values determines the
initialoutputvoltage.Figure11showsatypicalapplication
and formulas for calculating resistor values.
Note that the exposed pad of the DFN and TSSOP pack-
ages and the tab of the DD-Pak and TO-220 packages
are electrically connected to the output (V ).
OUT
Tables 3 through 5 list thermal resistance as a function
of copper areas on a fixed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm.
R
CABLE2
0.02Ω
IN
OUT
LT3081
I
SET
MON
Table 3. DF Package, 12-Lead DFN
C
C
OUT
10µF
IN
LOAD
R
SET
1µF
COPPER AREA
29.8k
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2
2
2
2
2
2
2
2
2
2500mm
1000mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
18°C/W
22°C/W
29°C/W
35°C/W
R
COMP
R
CABLE
200Ω
2
0.02Ω
3081 F11
2
225mm
100mm
R
= 5000 • R
CABLE(TOTAL)
COMP
2
V
= 50µA (R
+ R
)
COMP
OUT(LOAD)
SET
*Device is mounted on topside
Figure 11. Using IMON to Compensate for Cable Drops
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
Thermal Considerations
2
2
2
2
2
2
2
2
2
2500mm
1000mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
2500mm
16°C/W
20°C/W
26°C/W
32°C/W
TheLT3081’sinternalpowerandthermallimitingcircuitry
protects itself under overload conditions. For continuous
normal load conditions, do not exceed the 125°C (E- and
I-grades) or 150°C (H- and MP-grades) maximum junc-
tiontemperature. Carefullyconsiderallsourcesofthermal
resistance from junction-to-ambient. This includes (but is
not limited to) junction-to-case, case-to-heat sink inter-
face, heat sink resistance or circuit board-to-ambient as
the application dictates. Consider all additional, adjacent
heat generating sources in proximity on the PCB.
2
2
225mm
100mm
2
*Device is mounted on topside
Table 5. R Package, 7-Lead DD-Pak
COPPER AREA
THERMAL RESISTANCE
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm2 2500mm2
1000mm2 2500mm2
2500mm2
2500mm2
2500mm2
13°C/W
14°C/W
16°C/W
225mm2
2500mm2
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
*Device is mounted on topside
3081fc
19
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
T7 Package, 7-Lead TO-220
Reducing Power Dissipation
Thermal Resistance (Junction-to-Case) = 3°C/W
In some applications it may be necessary to reduce the
powerdissipationintheLT3081packagewithoutsacrificing
outputcurrentcapability.Two techniquesareavailable.The
first technique, illustrated in Figure 12, employs a resis-
tor in series with the regulator’s input. The voltage drop
For further information on thermal resistance and using
thermal information, refer to JEDEC standard JESD51,
notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Tables 3 through 5
provide thermal resistance numbers for best-case 4-layer
boardswith1ozinternaland2ozexternalcopper. Modern,
multilayer PCBs may not be able to achieve quite the same
level performance as found in these tables. Demo circuit
across R decreases the LT3081’s IN-to-OUT differential
S
voltage and correspondingly decreases the LT3081’s
power dissipation.
Asanexample,assume:V =7V,V =3.3VandI
OUT(MAX)
IN
OUT
= 1.5A. Use the formulas from the Calculating Junction
Temperature section previously discussed.
1870A’s board layout using multiple inner V
planes
OUT
and multiple thermal vias achieves 16°C/W performance
for the FE package.
Without series resistor R , power dissipation in the
S
LT3081 equals:
P
TOTAL
= (7V – 3.3V) • 1.5A = 5.55W
Calculating Junction Temperature
If the voltage differential (V ) across the LT3081 is
DIFF
Example: Given an output voltage of 0.9V, an IN voltage
of 2.5V 5%, output current range from 10mA to 1A
and a maximum ambient temperature of 50°C, what is
the maximum junction temperature for the DD-Pak on a
chosen as 1.5V, then R equals:
S
7V – 3.3V – 1.5V
RS =
= 1.5Ω
1.5A
Power dissipation in the LT3081 now equals:
= 1.5V • 1.5A = 2.25W
2
2500mm2 board with topside copper of 1000mm ?
The power in the circuit equals:
P
TOTAL
P
TOTAL
= (V – V )(I
)
IN
OUT OUT
TheLT3081’spowerdissipationisnowonly40%compared
The current delivered to the SET pin is negligible and can
be ignored.
tonoseriesresistor. R dissipates3.3Wofpower. Choose
S
appropriate wattage resistors or use multiple resistors in
parallel to handle and dissipate the power properly.
V
V
= 2.625V (2.5V + 5%)
IN(MAX_CONTINUOUS)
V
IN
= 0.9V, I
= 1A, T = 50°C
A
OUT
OUT
R
S
Power dissipation under these conditions equals:
V
′
IN
C1
IN
LT3081
P
P
= (V – V )(I
)
TOTAL
TOTAL
IN
OUT OUT
50µA
= (2.625V – 0.9V)(1A) = 1.73W
+
–
Junction Temperature equals:
T = T + P • θ (using tables)
J
A
TOTAL
JA
SET
OUT
T = 50°C + 1.73W • 14°C/W = 74.2°C
J
V
OUT
R
SET
C2
In this case, the junction temperature is below the maxi-
mum rating, ensuring reliable operation.
3081 F12
Figure 12. Reducing Power Dissipation Using a Series Resistor
3081fc
20
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
R dissipates 1.52W of power. As with the first technique,
The second technique for reducing power dissipation,
shown in Figure 13, uses a resistor in parallel with the
LT3081. This resistor provides a parallel path for current
flow, reducing the current flowing through the LT3081.
This technique works well if input voltage is reasonably
constant and output load current changes are small. This
technique also increases the maximum available output
current at the expense of minimum load requirements.
P
choose appropriate wattage resistors to handle and dis-
sipate the power properly. With this configuration, the
LT3081 supplies only 0.86A. Therefore, load current can
increase by 0.64A to a total output current of 2.14A while
keeping the LT3081 in its normal operating range.
High Temperature Operation
Care must be taken when designing the LT3081H/
LT3081MP applications to operate at high ambient tem-
peratures. The LT3081H/LT3081MP operates at high
temperatures, but erratic operation can occur due to un-
foreseenvariationsinexternalcomponents.Sometantalum
capacitorsareavailableforhightemperatureoperation,but
ESR is often several ohms; capacitor ESR above 0.5Ω is
unsuitable for use with the LT3081H/LT3081MP. Multiple
ceramiccapacitormanufacturersnowofferceramiccapaci-
tors that are rated to 150°C using an X8R dielectric. Check
each passive component for absolute value and voltage
ratings over the operating temperature range.
V
IN
C1
IN
LT3081
50µA
R
P
+
–
SET
OUT
V
C2
OUT
R
SET
3081 F13
Figure 13. Reducing Power Dissipation Using a Parallel Resistor
Leakages in capacitors or from solder flux left after insuf-
ficientboardcleaningadverselyaffectslowcurrentnodes,
As an example, assume: V = 5V, V
= 5.5V, V
OUT
IN
IN(MAX)
such as the SET, I
, and TEMP pins. Consider junction
MON
= 3.3V, V
= 3.2V, I
= 1.5A and I
OUT(MIN)
OUT(MAX) OUT(MIN)
temperature increase due to power dissipation in both
the junction and nearby components to ensure maximum
specificationsarenotviolatedfortheLT3081H/LT3081MP
or external components.
= 0.7A. Also, assuming that R carries no more than 90%
P
of I
= 630mA.
OUT(MIN)
Calculating R yields:
P
5.5V – 3.2V
RP =
= 3.65Ω
Protection Features
0.63A
The LT3081 incorporates several protection features ideal
for harsh industrial and automotive environments, among
otherapplications.Inadditiontonormalmonolithicregula-
torprotectionfeaturessuchascurrentlimitingandthermal
limiting, the LT3081 protects itself against reverse-input
voltages, reverse-output voltages, and large OUT-to-SET
pin voltages.
(5% Standard value = 3.6Ω)
The maximum total power dissipation is:
(5.5V – 3.2V) • 1.5A = 3.5W
However, the LT3081 supplies only:
5.5V – 3.2V
1.5A –
= 0.86A
3.6Ω
Therefore, the LT3081’s power dissipation is only:
= (5.5V – 3.2V) • 0.86A = 1.98W
Current limit protection and thermal overload protection
protect the IC against output current overload conditions.
For normal operation, do not exceed the rated absolute
maximum junction temperature. The thermal shutdown
circuit’s temperature threshold is typically 165°C and
incorporates about 5°C of hysteresis.
P
DISS
3081fc
21
For more information www.linear.com/LT3081
LT3081
applicaTions inForMaTion
TheLT3081’sINpinwithstands 40Vvoltageswithrespect
to the OUT and SET pins. Reverse current flow, if OUT is
greater than IN, is less than 1mA (typically under 100µA),
protecting the LT3081 and sensitive loads.
handle 10V differential voltages and 25mA crosspin
current flow without concern. Relative to these applica-
tion concerns, note the following two scenarios. The first
scenario employs a noise-reducing SET pin bypass ca-
pacitor while OUT is instantaneously shorted to GND. The
second scenario follows improper shutdown techniques
in which the SET pin is reset to GND quickly while OUT
is held up by a large output capacitance with light load.
Clamping diodes and 400Ω limiting resistors protect the
LT3081’s SET pin relative to the OUT pin voltage. These
protection components typically only carry current under
transient overload conditions. These devices are sized to
Typical applicaTions
Paralleling Regulators
Using IMON Cancels Ballast Resistor Drop
V
V
IN
IN
IN
IN
LT3081
LT3081
I
I
SET
50µA
SET
50µA
+
–
+
–
R
BALLAST
10mΩ
V
3V
3A
V
1.5V
3A
10mΩ
OUT
OUT
OUT
OUT
I
I
LIM
I
I
LIM
MON
SET TEMP
1k
MON
SET TEMP
1k
IN
IN
LT3081
LT3081
I
I
SET
50µA
SET
50µA
+
–
+
–
R
BALLAST
10mΩ
10mΩ
3.01k
OUT
OUT
3081 TA03
3081 TA04
I
I
LIM
I
I
LIM
MON
SET TEMP
MON
SET TEMP
1k
1k
R
SET
15k
R
SET
30.1k
1k
R
COMP
25Ω
3081fc
22
For more information www.linear.com/LT3081
LT3081
Typical applicaTions
Load Sharing Without Ballast Resistors
V
OUT
V
IN
1V
IN
OUT
IN
OUT
IN
OUT
3V TO 18V
4.5A
22µF
22µF
LT3081
LT3081
LT3081
I
I
I
MON
SET
MON
SET
MON
SET
20k
1k
5.1k
20k
1k
20k
1k
0.1µF
0.1µF
0.1µF
100k
100k
+
+
1/2 LT1638
1/2 LT1638
5.1k
–
–
0.47µF
0.47µF
5.1k
5.1k
3081 TA05
Load Current Sharing Without Ballasting
V
1V
3A
OUT
V
IN
IN
OUT
OUT
IN
3V TO 36V
4.7µF
LT3081
LT3081
2.2µF
100Ω
I
I
LIM
LIM
I
I
MON
SET
MON
SET
0.1µF
20k
= 2N3904
20k
0.1µF
1k
1k
3081 TA05
3081fc
23
For more information www.linear.com/LT3081
LT3081
Typical applicaTions
3081fc
24
For more information www.linear.com/LT3081
LT3081
Typical applicaTions
Boosting Fixed Output Regulators
IN
LT3081
I
SET
50µA
+
–
20mΩ
OUT
I
I
LIM
MON
SET TEMP
20mΩ
3.3V
3A
OUT
5V
LT1963-3.3
47µF
8.2Ω*
6.2k
10µF
47µF
3081 TA08
*4mV DROP ENSURES LT3081 IS OFF WITH NO LOAD
MULTIPLE LT3081s CAN BE USED
Reference Buffer
V
IN
IN
LT3081
I
SET
50µA
+
–
OUT
V
OUT
I
I
LIM
MON
SET TEMP
1k
47µF
1k
1k*
INPUT
LT1019
GND
OUTPUT
3081 TA09
1µF
*MIN LOAD 5mA
Adding Soft-Start
V
IN
4.8V TO 38V
IN
LT3081
10µF
I
SET
50µA
+
–
IN4148
V
3.3V
1.5A
OUT
OUT
I
I
LIM
MON
SET TEMP
1k
10µF
1k
3081 TA10
0.1µF
66.5k
3081fc
25
For more information www.linear.com/LT3081
LT3081
Typical applicaTions
Using a Lower Value Set Resistor
V
IN
12V
4.7µF
IN
LT3081
I
SET
50µA
+
–
OUT
V
OUT
0.2V TO 10V
I
I
LIM
MON
SET TEMP
4.7µF
1k 4.02k 1k
40.2Ω
3081 TA11
R
SET
V
OUT
= 0.2V + 5mA • R
SET
2k
Using an External Reference Current
V
IN
1µF
LT3092
10µA
IN
IN
LT3081
I
SET
50µA
+
–
+
–
OUT
V
OUT
SET
20k
OUT
0V TO 20V
I
I
LIM
MON
SET TEMP
1k
215Ω
1k
1µF
3081 TA12
20k
1mA
3081fc
26
For more information www.linear.com/LT3081
LT3081
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DF Package
12-Lead Plastic DFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1733 Rev A)
2.50 REF
0.70 0.05
3.38 0.05
4.50 0.05
2.65 0.05
3.ꢀ0 0.05
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
4.00 0.ꢀ0
(4 SIDES)
2.50 REF
7
ꢀ2
0.40 0.ꢀ0
3.38 0.ꢀ0
2.65 0.ꢀ0
PIN ꢀ NOTCH
R = 0.20 TYP OR
0.35 × 45°
PIN ꢀ
TOP MARK
(NOTE 6)
CHAMFER
(DFꢀ2) DFN ꢀꢀꢀ2 REV A
6
R = 0.ꢀꢀ5
TYP
ꢀ
0.25 0.05
0.50 BSC
0.200 REF
0.75 0.05
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
ꢀ. PACKAGE OUTLINE DOES NOT CONFORM TO JEDEC MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3081fc
27
For more information www.linear.com/LT3081
LT3081
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation BB
4.70
DETAIL A
4.90 – 5.10*
(.193 – .201)
(.185)
3.58
0.56
(.022)
REF
(.141)
3.58
(.141)
0.53
(.021)
REF
NOTE 5
16 1514 13 12 1110
9
NOTE 5
DETAIL A IS THE PART OF THE
LEAD FRAME FEATURE FOR
REFERENCE ONLY
6.60 ±0.10
4.50 ±0.10
2.94 3.05
(.116) (.120)
DETAIL A
NO MEASUREMENT PURPOSE
6.40
(.252)
BSC
SEE NOTE 4
2.94
(.116)
1.05 ±0.10
0.45 ±0.05
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
FE16 (BB) TSSOP REV K 0913
0.195 – 0.30
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION
IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED
TRACES OR VIAS ON PBC LAYOUT
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
3. DRAWING NOT TO SCALE
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
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LT3081
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
T7 Package
7-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1422)
.165 – .180
(4.191 – 4.572)
.147 – .155
(3.734 – 3.937)
DIA
.390 – .415
(9.906 – 10.541)
.045 – .055
(1.143 – 1.397)
.230 – .270
(5.842 – 6.858)
.570 – .620
(14.478 – 15.748)
.620
(15.75)
TYP
.460 – .500
(11.684 – 12.700)
.330 – .370
(8.382 – 9.398)
.700 – .728
(17.780 – 18.491)
.095 – .115
(2.413 – 2.921)
.155 – .195*
(3.937 – 4.953)
SEATING PLANE
.152 – .202
(3.860 – 5.130)
.260 – .320
(6.604 – 8.128)
.013 – .023
(0.330 – 0.584)
.050
BSC
.026 – .036
(0.660 – 0.914)
(1.27)
.135 – .165
(3.429 – 4.191)
*MEASURED AT THE SEATING PLANE
T7 (TO-220) 0801
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LT3081
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
R Package
7-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1462 Rev F)
.060
(1.524)
TYP
.390 – .415
(9.906 – 10.541)
.060
(1.524)
.256
(6.502)
.165 – .180
(4.191 – 4.572)
.045 – .055
(1.143 – 1.397)
15° TYP
.060
+.008
.004
.183
(4.648)
–.004
(1.524)
.059
(1.499)
TYP
.330 – .370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
DETAIL A
.013 – .023
.300
(7.620)
.050
(1.27)
BSC
.050 .012
(1.270 0.305)
+.012
.143
–.020
(0.330 – 0.584)
.026 – .035
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
+0.305
–0.508
(0.660 – 0.889)
3.632
(
)
TYP
DETAIL A
0° – 7° TYP
0° – 7° TYP
.420
.276
.080
.420
.350
.325
.585
.205
.320
.585
.090
.035
.090
.035
.050
.050
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
R (DD7) 0212 REV F
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
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For more information www.linear.com/LT3081
LT3081
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
11/13 Modified Typical Application circuit for more detail
Added H- and MP-grade references
1
Throughout
Changed T
to 150°C on the FE and T7 packages
2
4
JMAX
Changed specs to TEMP Output Current Absolute Error
Modified Block Diagram
10
22
24
25, 26
32
32
1
Modified Paralleling Regulators Circuit
Modified Arduino Supply Circuit
Added new Typical Application circuits
Modified High Efficiency Adjustable Supply circuit
Updated Related Parts Table
B
C
7/14
3/15
Updated the Typical Application circuit.
Changed T7 diagram to 'Standard’ package drawing.
29
3
Updated Typical Values for External I Programming
LIM
Corrected I Text in Pin Functions
10
13
LIM
Corrected Formula and Text in Programming Current Limit Section
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
31
LT3081
Typical applicaTion
High Efficiency Adjustable Supply
V
IN
V
IN
BD
6.3V TO
36V
RUN/SS BOOST
V
OUT
0.47µF
LT3680
0V TO
25V,
IN
OUT
V
RT
PG
SW
C
6.8µH
LT3081
1.5A
15k
22µF
47µF 590k
6.04k
0.1µF
6V
1k
MBRA340T3
63.4k
1000pF
I
TEMP SET
1k
I
LIM
MON
MTD2955
SYNC GND FB
500k
15k
10k
1k
1µF
2N3904
3081 TA13
1µF
CMDSH-4E
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LT1185
3A Negative Low Dropout Regulator V : –4.5V to –35V, 0.8V Dropout Voltage, DD-Pak and TO-220 Packages
IN
LT1764/
LT1764A
3A, Fast Transient Response,
Low Noise LDO
340mV Dropout Voltage, Low Noise: 40µV
, V = 2.7V to 20V, TO-220, TSSOP and DD-Pak,
RMS IN
LT1764A Version Stable Also with Ceramic Capacitors
LT1963/
LT1963A
1.5A Low Noise, Fast Transient
Response LDO
340mV Dropout Voltage, Low Noise: 40µV , V = 2.5V to 20V, LT1963A Version Stable with
RMS IN
Ceramic Capacitors, TO-220, DD, TSSOP, SOT-223 and SO-8 Packages
LT1965
1.1A, Low Noise, Low Dropout
Linear Regulator
290mV Dropout Voltage, Low Noise: 40µV , V : 1.8V to 20V, V : 1.2V to 19.5V, Stable with
RMS IN
OUT
Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages
V : 0.9V to 10V, Dropout Voltage: 145mV Typical, Adjustable Output (V = V = 200mV),
OUT(MIN)
LT3022
1A, Low Voltage, VLDO Linear
Regulator
IN
REF
Stable with Low ESR, Ceramic Output Capacitors, 16-Pin DFN (5mm × 3mm) and 16-Lead
MSOP Packages
LT3070
LT3071
5A, Low Noise, Programmable
OUT
Dropout Voltage: 85mV, Digitally Programmable V : 0.8V to 1.8V, Digital Output Margining: 1ꢀ,
OUT
V
, 85mV Dropout Linear
3ꢀ or 5ꢀ, Low Output Noise: 25µV
(10Hz to 100kHz), Parallelable: Use Two for a 10A Output,
RMS
Regulator with Digital Margining Stable with Low ESR Ceramic Output Capacitors (15µF Minimum), 28-Lead 4mm × 5mm QFN Package
5A, Low Noise, Programmable Dropout Voltage: 85mV, Digitally Programmable V : 0.8V to 1.8V, Analog Margining: 10ꢀ,
, 85mV Dropout Linear
OUT
V
Low Output Noise: 25µV
(10Hz to 100kHz), Parallelable: Use Two for a 10A Output, I
Output
OUT
RMS
MON
Regulator with Analog Margining Current Monitor, Stable with Low ESR Ceramic Output Capacitors (15µF Minimum) 28-Lead
4mm × 5mm QFN Package
LT3080/
LT3080-1
1.1A, Parallelable, Low Noise,
Low Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40µV
, V : 1.2V to 36V, V : 0V to 35.7V,
RMS IN OUT
Current-Based Reference with 1-Resistor V
Set; Directly Parallelable (No Op Amp Required),
OUT
Stable with Ceramic Capacitors, TO-220, DD-Pak, SOT-223, MS8E and 3mm × 3mm DFN-8 Packages;
LT3080-1 Version Has Integrated Internal Ballast Resistor
LT3082
LT3085
LT3092
200mA, Parallelable, Single
Resistor, Low Dropout Linear
Regulator
Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage
Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets Output
Voltage 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages
500mA, Parallelable, Low Noise, 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µV
Low Dropout Linear Regulator
, V : 1.2V to 36V,
RMS IN
V
: 0V to 35.7V, Current-Based Reference with 1-Resistor V
Set; Directly Parallelable
OUT
OUT
(No Op Amp Required), Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages
200mA 2-Terminal Programmable Programmable 2-Terminal Current Source, Maximum Output Current = 200mA, Wide Input Voltage
Current Source
Range: 1.2V to 40V, Resistor Ratio Sets Output Current, Initial Set Pin Current Accuracy = 1ꢀ, Current
Limit and Thermal Shutdown Protection, Reverse-Voltage Protection, Reverse-Current Protection,
8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages.
LT3083
Adjustable 3A Single Resistor
Low Dropout Regulator
Low Noise: 40µV , 50µA Set Pin Current, Output Adjustable to 0V, Wide Input Voltage Range: 1.2V to 23V
RMS
(DD-Pak and TO-220), Low Dropout Operation: 310mV (2 Supplies)
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LT 0315 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT3081
●
●
LINEAR TECHNOLOGY CORPORATION 2014
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