LT3439EFE#TRPBF [Linear]
LT3439 - Slew Rate Controlled Ultralow Noise 1A Isolated DC/DC Transformer Driver; Package: TSSOP; Pins: 16; Temperature Range: -40°C to 85°C;
| 型号： | LT3439EFE#TRPBF |
| 厂家： | 
Linear |
| 描述： | LT3439 - Slew Rate Controlled Ultralow Noise 1A Isolated DC/DC Transformer Driver; Package: TSSOP; Pins: 16; Temperature Range: -40°C to 85°C 变压器 驱动器 |
| 文件： | 总12页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3439
Slew Rate Controlled
Ultralow Noise1A Isolated
DC/DC Transformer Driver
U
FEATURES
DESCRIPTIO
■
Reduced Conducted and Radiated EMI
The LT®3439 is a push-pull DC/DC transformer driver that
reduces conducted and radiated electromagnetic interfer-
ence (EMI). Ultralow noise and EMI are achieved by
controlling the output switch voltage and current slew
rates. Slew rates are user adjustable to optimize output
noise versus efficiency. The LT3439 can reduce high
frequencyharmoniccontentbyasmuchas40dBwithonly
a minor decrease in efficiency.
■
Single Resistor Control of Output Switch Voltage
and Current Slew Rates
■
Cross Conduction Prevention Circuitry
■
Two 1A Current Limited Power Switches
■
Low Minimum Supply Voltage: 2.8V
■
Low Shutdown Current: <20µA
■
50% Duty Cycle
■
20kHz to 250kHz Oscillator Frequency
TheLT3439includestwo1Acurrentlimitedpowerswitches
to ensure start-up under heavy loads. It also includes an
oscillator that can be synchronized to an external clock for
more accurate placement of switcher harmonics. Protec-
tion features include current limiting, undervoltage lock-
out, thermal shutdown and cross conduction prevention
circuitry.
■
Synchronizable to 300kHz
■
Overcurrent and Overtemperature Protected
U
APPLICATIO S
■
Low Noise Isolated Supplies
■
Radio and Telecom Supplies
The LT3439 is available in a thermally enhanced 16-pin
TSSOP with an exposed backside.
■
Distributed Supplies
■
Medical Instruments
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
Precision Instruments
■
Low Noise Filament Supplies
U
TYPICAL APPLICATIO
Low Noise 5V to 5V Push-Pull DC/DC Transformer
5V Output Noise
OPTIONAL
D1
L1 33µH
V
IN
5V
V
A
B
T1
OUT
5V
C
IN
13
C1
47µF
6.3V
C2
47µF
6.3V
•
•
•
•
500mA
22µF
V
10V
IN
B
3
11
200µV/DIV
SHDN
SYNC
COL A
COL B
LT3439
14
4
5
6
C
T
D2
C
: MURATA GRM235Y5V226Z10
C1, C2: TDK C4532X5R0J476M
D1, D2: MBR0520
L1: TDK SLF6028T-330MR69
T1: COILTRONICS 15835
IN
680pF
7
R
R
SL
T
A
16.9k
GND
10
PGND
1, 16
20mV/DIV
34k
3439 TA01
5µs/DIV
3439 TA01b
sn3439 3439fs
1
LT3439
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
VIN Voltage ............................................................. 20V
COL A, COL B Voltage............................................. 35V
SHDN, SYNC Voltage.............................................. 20V
Maximum Junction Temperature ......................... 150°C
Operating Junction Temperature Range
(Note 2) ............................................ –40°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
PGND
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PGND
NC
COL A
COL B
LT3439EFE
R
V
IN
SL
SYNC
NC
C
T
SHDN
GND
NC
FE PART
MARKING
R
T
NC
FE PACKAGE
16-LEAD PLASTIC TSSOP
3439EFE
TJMAX = 125°C, θJA = 40°C/ W
NOTE: BACKSIDE OF PACKAGE CONNECTED TO GND
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V
IN = 5V; RT = 16.9k; CT = 680pF; RSL = 16.9k; COL A, COL B, SHDN pins open, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
Supply and Shutdown
MIN
TYP
MAX
UNITS
V
V
Operating Range
●
2.8
17.5
2.7
V
V
IN
Minimum Input Voltage
2.55
12
IN(MIN)
VIN
I
I
Supply Current
2.8V ≤ V ≤ 17.5V
●
mA
µA
V
IN
Supply Current in Shutdown Mode
Shutdown Turn-On Threshold
Shutdown Turn-Off Threshold
Shutdown Pin Current Hysteresis
2.8V ≤ V ≤ 17.5V, V
= 0V
5
20
VIN(SHDN)
IN
SHDN
V
V
2.8V ≤ V ≤ 17.5V
●
●
●
1.3
1.26
20
1.4
SHDN(ON)
SHDN(OFF)
SHDN
IN
2.8V ≤ V ≤ 17.5V
1.20
10
V
IN
I
2.8V ≤ V ≤ 17.5V, V
= 1.4V
40
µA
IN
SHDN
Oscillator and Sync
f
f
Oscillator Frequency
●
●
●
250
300
2.25
kHz
kHz
V
MAX
Synchronization Frequency Range
SYNC Pin Threshold
SYNC
V
1.4
40
SYNC
R
SYNC Pin Input Resistance
kΩ
SYNC
Output Switches (COL A, COL B)
DC
BV
Switch Duty Cycle
●
●
●
50
50
%
V
Output Switch Breakdown Voltage
Output Switch On Resistance
Switch Current Limit
2.8V ≤ V ≤ 17.5V
35
IN
R
I
or I = 0.75A
COLB
0.5
1.4
0.95
1.65
Ω
A
ON
COLA
I
1.2
LIM(MAX)
Slew Control
V
V
Output Voltage Slew Rising Edge
Output Voltage Slew Falling Edge
Output Current Slew Rising Edge
Output Current Slew Falling Edge
Collector A or B
Collector A or B
Collector A or B
Collector A or B
17
17
5
V/µs
V/µs
A/µs
A/µs
SLEWR
SLEWF
SLEWR
SLEWF
I
I
5
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT3439E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls.
sn3439 3439fs
2
LT3439
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current in Shutdown Mode
vs Temperature
Minimum Input Voltage
vs Temperature
Oscillator Frequency
vs Temperature
2.750
2.700
2.650
2.600
2.550
2.500
2.450
2.400
2.350
2.300
16
14
12
10
8
120
115
110
105
100
95
R
C
= 16.9k
= 680pF
T
T
17.5V
5V
6
4
90
2.7V
2
85
0
80
0
0
0
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3439 G01
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3439 G02
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
3439 G03
Switch Voltage Drop
vs Switch Current
SHDN Pin Hysteresis Current
vs Temperature
Supply Current vs Slew Resistor
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
25
20
24
22
T
A
= 25°C
125°C
20
85°C
25°C
15
18
16
14
12
10
5
0
10
0
0
10000
20000
30000
40000
–25
0
50 75 100 125 150
25
TEMPERATURE (°C)
0.1 0.2 0.3 0.4 0.5 0.6
1.0
–50
0.7 0.8 0.9
SLEW RESISTOR (Ω)
SWITCH CURRENT (A)
3439 G05
3439 G04
3439 G06
SHDN Pin Voltage Threshold
vs Temperature
SYNC Pin Voltage Threshold
vs Temperature
Current Limit vs Temperature
2.0
1.8
1.6
1.4
1.2
1.0
0.8
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.35
1.34
1.33
1.32
1.31
1.30
1.29
1.28
1.27
75 100
–50 –25
0
25 50
125 150
50
0
–50 –25
0
25
75 100 125 150
–50
125 150
–25
25 50 75 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3439 G09
3439 G07
3439 G08
sn3439 3439fs
3
LT3439
U
U
U
PI FU CTIO S
PGND (Pins 1, 16): Power ground is connected to the
emitter of the power switches via an internal sense resis-
tor. It has large currents flowing through it and should be
connected to a good quality ground plane.
RT (Pin 7): The oscillator resistor pin is used to set the
charge and discharge currents of the oscillator capacitor.
Thenominalvalueis16.9k.Theresistancecanbeadjusted
between ±25% of nominal for better frequency accuracy.
COL A, COL B (Pins 3, 14): These are the open collectors
of the output power switches. They are connected to the
outer terminals of the center tap transformer. Large cur-
rentsflowintothesepinssoexternaltracesshouldbekept
as short as possible.
SHDN (Pin 11): The SHDN pin is used to shut down the
part. Grounding this pin will disable all internal circuitry.
Increasing the SHDN voltage above the turn-on threshold
will enable the part. At the turn-on threshold, approxi-
mately 20µA of current is sourced out of the pin. This
current,inconjunctionwiththeTheveninresistanceonthe
pin, sets up the hysteresis. This allows the user to set the
undervoltagelockout(UVLO)ofthesupplyandtheamount
ofstart-uphysteresiswitharesistordivideroffoftheinput
voltage. Above 2.1V on the SHDN pin, the hysteresis
current is reduced to zero. If unused the pin can be left
floating or tied directly to the input voltage.
R
SL (Pin 4): The slew control resistor sets the maximum
current and voltage slew rate for the collectors A and B.
Theminimumresistorvalueis3.4kforfastslewingandthe
maximum resistor is 34k for slow slewing. For more
details, see “Slew Rate Setting” in the Applications Infor-
mation section of this data sheet.
SYNC (Pin 5): The SYNC pin can be used to synchronize
the oscillator to an external clock. RT and CT should be set
such that the oscillator clock frequency is approximately
10% below the external clock frequency. If unused, this
pinshouldbetiedtoGND. Formoredetails, see“Oscillator
Sync” in the Applications Information section of this data
sheet.
GND (Pin 10): Signal Ground. The oscillator, slew control
circuitry and the internal regulator are referred to signal
ground. Internally, signal ground is tied to substrate and
the exposed backside of the device. Connect the GND pin
to the ground plane and keep the connection free of large
currents.
VIN (Pin 13): This is the supply pin for the part and should
be bypassed with a 4.7µF or greater, low ESR capacitor.
When VIN ≤ 2.5V, an internal undervoltage lockout circuit
will trip and turn both outputs off.
CT (Pin 6): The oscillator capacitor pin is used in conjunc-
tion with the RT pin to set the oscillator frequency. For
RT = 16.9k, CT can be calculated as follows:
CT(nF) = 70/fOSC(kHz)
The transformer operating frequency and the frequency
ofeachoutputisonehalfofthefrequencyoftheoscillator.
sn3439 3439fs
4
LT3439
W
BLOCK DIAGRA
D1
T1
V
OUT
•
•
•
•
V
C
IN
OUT
D2
11
13
3
14
COLB
LT3439
COLA
SHDN
V
IN
LDO
OUTPUT
DRIVERS
REGULATOR
INTERNAL V
Q
SLEW
CONTROL
T
FF
QB
CC
R
T
R
T
7
C
T
OSCILLATOR
+
–
C
T
16
1
6
5
R
SENSE
PGND
SYNC
GND
R
SL
10
4
3439 BD
R
SL
U
OPERATIO
Push-Pull Topology
eventually cause the transformer to saturate. Also, dur-
ing the turn-off of the switches, the leakage inductance
causes a large undesirable voltage spike. The LT3439
slew control feature addresses both of these concerns
and is discussed in the Applications Information section.
The push-pull DC transformer topology is a very straight-
forward switching power supply. The two switches are
turned on out of phase at 50% duty cycles. During the
switch on time, VIN is applied across the primary side of
the transformer. The voltage on the secondary side of the
transformer is simply VIN times the turns ratio. The diodes
rectify the secondary voltage and generate the output
voltage. The output capacitor is for hold-up and filtering.
Slew Control
Control of voltage and current slew rate is maintained via
two feedback loops. One loop controls the output switch
collector voltage dV/dt and the other loop controls the
emitter current dI/dt. Output slew control is achieved by
comparing the two currents generated by these slewing
eventstoacurrentsetbytheexternalresistorRSL.Thetwo
controlloopsworktogethertoprovideasmoothtransition
from voltage slew control to current slew control.
Some of the topology’s advantages are: 1) Stepping up or
down the input voltage can easily be done by setting the
turns ratio. 2) The transformer provides isolation between
the input and output. 3) Each switch cycle applies VIN
across the transformer in opposite polarities. Therefore,
the transformer core never saturates and a separate reset
circuit is not necessary.
Internal Regulator
The push-pull topology is not without its concerns. An
imbalance in the two sides of the transformer can
Mostofthecontrolcircuitryoperatesfromaninternal2.4V
low dropout regulator that is powered from VIN. VIN can
sn3439 3439fs
5
LT3439
U
OPERATIO
vary from 2.8V to 17.5V with very little change in device
performance. When the part is in shutdown mode, the
internal regulator is turned off, drawing less than 20µA of
current from VIN.
Overtemperature Protection
When the IC has exceeded the maximum temperature the
part will trigger the overtemperature protection circuit
where both output drivers are turned off.
Overcurrent Protection
Undervoltage Lockout Protection
A linearly controlled current limit circuit is provided to
protect the circuit from excessive currents and to facilitate
start-up into a highly capacitive load. Upon reaching cur-
rentlimit,theswitchingcycleisnotterminated,insteadthe
base drive to the output transistor is regulated to maintain
themaximumcurrentovertheentireswitchcycle.Veryhigh
powerdissipationintheswitchesoccursduringthismode
ofoperation.Ifthecurrentlimitisenabledforalongenough
period of time, over temperature protection shutdown will
be enabled to protect the device.
When VIN is below 2.55V the part will go into undervoltage
lockout mode where both output drivers are turned off.
No Load Operation
The operation of the supply is stable all the way down to
zero load and a preload is not required.
W U U
U
APPLICATIO S I FOR ATIO
Reducing EMI from switching power supplies has tradi-
tionally invoked fear in designers. Many switchers are
designed solely on efficiency and, as such, produce wave-
formsfilledwithhighfrequencyharmonicsthatpropagate
through the rest of the supply.
harmonics. Using quality external components is impor-
tant to ensure oscillator frequency stability. A current
defined by external resistor RT charges and discharges
the capacitor CT creating a saw tooth waveform where the
outputs’ states change at the peak. The frequency of each
output is one half of the frequency of the oscillator.
The LT3439 provides control of two of the primary vari-
ables for controlling EMI while switching inductive loads:
switch voltage slew rate and switch current slew rate. The
use of this part will reduce noise and EMI over conven-
tional switch mode controllers. Because these variables
are under control, a supply built with this part will exhibit
far less tendency to create EMI and less chance of running
into problems during production.
By having both components external, the user has greater
flexibilityinsettingthefrequencyandthefrequencyisless
susceptible to any temperature variations in the device.
The external capacitance CT is chosen by:
CT(nF) = 1183/[fOSC(kHz) • RT(kΩ)]
where fOSC is the desired oscillator frequency.
For RT equal to 16.9k, this simplifies to:
CT(nF) = 70/fOSC(kHz)
It is beyond the scope of this data sheet to get into EMI
fundamentals. AN70, “A Monolithic Switching Regulator
with 100µV Output Noise” contains much information
concerning noise in switching regulators and should be
consulted.
e.g., CT = 1nF for fOSC = 70kHz
Nominally, RT should be set to 16.9k.
Oscillator Frequency
Low tolerance and low temperature coefficient compo-
nents are recommended.
The internal oscillator generates the switching frequency
that determines the fundamental positioning of the
sn3439 3439fs
6
LT3439
W U U
APPLICATIO S I FOR ATIO
U
Oscillator SYNC
RA +RB
VON
=
• VSHDN
RB
The oscillator can be synchronized to an external clock.
Set the RC timing components for an oscillator frequency
10% below the desired sync frequency.
R
A
V
IN
SHDN
R
B
It is recommended that the SYNC pin be driven with a
squarewavethathasanamplitudegreaterthan2V,apulse
widthgreaterthan1µsandarisetimelessthan500ns. The
rising edge of the sync waveform triggers the change in
the state of the outputs.
3439 AI01
VON istheinputvoltageatwhichthesupplywillturnonand
VSHDN is the SHDN pin turn-on threshold, typically 1.3V.
∆V
RA||RB
VHYST = RA •
SHDN +ISHDN
Slew Rate Setting
Setting the LT3439 maximum slew rate is easy. The
external resistor to ground on the RSL pin sets the maxi-
mum slew rate. To determine the maximum slew rate
connect a 50k resistor pot with a 3.4k series resistance to
the RSL pin. Start at the lowest resistance setting and
increase the pot until the noise level meets your require-
ments. Note that slower slewing waveforms will lower the
powersupplyefficiency.ConsultLinearTechnologyAppli-
cation Note 70, “A Monolithic Switching Regulator with
100µV Output Noise” for recommended noise measure-
ment techniques.
VHYST is the actual hysteresis voltage seen at the input
voltage. ISHDN is the current hysteresis sourced by the IC
at the turn-on threshold, typically 20µA. ∆VSHDN is the
voltage hysteresis seen at the SHDN pin at the turn-on
threshold, typically 35mV.
The resistors can be calculated as follows:
V
HYST • VSHDN – VON • ∆VSHDN
(
)
RA =
RB =
ISHDN • VSHDN
VHYST • VSHDN – VON • ∆VSHDN
(
)
Shutdown
ISHDN • V – V
(
)
ON
SHDN
The SHDN pin is used to shut down the part. Grounding
this pin will disable all internal circuitry.
For example if the turn-on voltage was to be set at 5V with
0.5V of hysteresis:
Increasing the SHDN voltage above the turn-on threshold,
approximately 1.3V, will enable the part. At the turn-on
threshold approximately 20µA of current is sourced out of
the pin. This current, in conjunction with the Thevenin
resistance on the pin, sets up the amount of hysteresis.
Thisallowstheusertosettheturn-onvoltageofthesupply
and the start-up hysteresis with a resistor divider. The
hysteresis can be used to prevent the part from shutting
down due to input voltage sag from an initial high current
draw. When the SHDN pin is greater than 2.1V, the
hysteresis current is reduced to zero.
0.5V •1.3V – 5V • 35mV
(
)
RA =
RB =
= 18.27k
= 6.42k
20µA •1.3V
0.5V •1.3V – 5V • 35mV
(
)
20µA • 5V – 1.3V
(
)
The nearest 1% values would be 18.2k and 6.49k.
AresistorinserieswiththeSHDNpincouldfurtherchange
hysteresis without changing the turn-on voltage.
In addition to the current hysteresis, there is also approxi-
mately 35mV of voltage hysteresis on the SHDN pin.
Thermal Considerations
Decreasing the noise by lowering the slew rate of the
output switches does not come for free. Lower slew rates
If a resistor divider is used to set the turn on threshold the
resistors are determined by the following equations:
sn3439 3439fs
7
LT3439
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APPLICATIO S I FOR ATIO
mean greater switching losses in the internal output
switches. However, efficiency is only modestly reduced
for a large improvement in EMI.
Table 1
NOMINAL
NOMINAL
OUTPUT
VOLTAGE
INPUT
VOLTAGE
OUTPUT
POWER
COILTRONICS
PART NUMBER
Care should be taken to ensure that the worst-case input
voltage and load current conditions do not cause an
excessive die temperature. The total power dissipation of
the IC is dominated by three loss terms, regulator losses,
saturation losses and switching losses. The following
formulas may be used to approximate these losses:
5V
5V
5V
5V
5V
5V
12V
12V
12V
±15V
±15V
12V
12V
–12V
1.5W
3.0W
1.5W
3.0W
1.5W
10W
6W
CTX02-13716-X1
CTX02-13665-X1
CTX02-13713-X1
CTX02-13664-X1
CTX02-13834-X3
CTX02-13949-X1
CTX02-16076
1. Regulator Dissipation:
These transformers will yield slightly high output voltages
so that they can accommodate an LDO regulator on the
output.
I
P
VIN = V 12mA +
IN
60
Ifyourapplicationisnotlisted, theLTCApplicationsgroup
is available to assist in the choice and/or the design of the
transformer.
where I is the average switch current.
2. Switch Saturation Dissipation:
PVSAT = (VSAT)(I)
In the design/selection of the transformer the following
characteristics are critical and should be considered.
3. Switch Switching Dissipation:
Turns Ratio
I
PSW = 10–6 • V •I• fOSC
+
IN
The turns ratio of the transformer determines the output
voltage. The following equation can be used as a first pass
to calculate the turns ratio:
–2.3 •10–4 •RSL + 10.8
(
)
V
–1.7 •10–3 •RSL + 65.8
NS
VOUT + V
F
(
)
=
NP V – VSW
IN
Total IC power dissipation (PD) is the sum of these three
terms. Die junction temperature can be computed as
follows:
where VF is the forward voltage of the output diode and
VSW is the voltage drop across the internal switches (see
Typical Performance curves).
TJ = TAMB + (PD)(θJA)
Sufficient margin should be added to the turns ratio to
account for voltage drops due to transformer winding
resistances. Also, ifusinganLDOforregulatingtheoutput
voltage, don’t forget to take into account the voltage drop
where TAMB is the ambient temperature, TJ is the junction
temperature and θJA is the thermal resistance from junc-
tion to ambient.
that should be added to VOUT
.
The LT3439 comes in the 16-pin TSSOP with exposed
backside package that has a very low junction-to-ambient
thermal resistance (θJA) of approximately 40°C/W.
Magnetizing Current
The primary inductance of the transformer causes a ripple
current that is independent of load current. The ripple
current manifests itself in the output voltage through the
parasitic resistances of the supply. Increasing the trans-
former magnetizing inductance can reduce the ripple
Transformer Design
Table1listsrecommendedcentertappedtransformersfor
a variety of input voltage, output voltage and power
combinations.
sn3439 3439fs
8
LT3439
W U U
APPLICATIO S I FOR ATIO
U
current. This can be accomplished by adding more turns
onto a given core or selecting a new core with a higher
inductance per turn squared characteristic (AL).
of the switching cycle do not match, the transformer’s flux
level walks up the BH curve and the transformer goes into
saturation. This is undesirable because the effective mag-
netizing inductance drops off and the magnetizing current
increases rapidly. Fortunately, there are parasitics in the
circuit that counteract the transformer saturation. When
the transformer begins to saturate the magnetizing cur-
rent increases in one half of the switching cycle and
therefore, the IR drops increase thereby reducing the volt/
secondproductofthathalfcycle. Thetransformerbalance
is maintained. Also, the losses in the transformer and the
mainswitcheshavepositivetemperaturecoefficientselimi-
nating the potential for thermal runaway. The LT3439 can
compensate for small circuit imbalances, however care
should be taken to balance both sides of the circuit
including transformer design and PCB layout.
The following equation can be used to set the transformer
primary inductance:
tON
∆I
L
PRI = V
IN
tON can be calculated by 1/fOSC
.
∆I is somewhat arbitrary but a general rule of thumb is to
set it between 10% to 30% of IPRI where IPRI is calculated
as follows:
VOUT •IOUT
IPRI
=
V Eff
IN
Eff can be estimated at 70%.
Transformer Design Example
The following is an example of the design of a DC trans-
former for a 5V to 5V at 500mA supply.
Winding Resistance
Resistance in either the primary or secondary winding will
reduce overall efficiency and degrade load regulation. If
efficiency or load regulation is unsatisfactory, verify that
the voltage drops in the transformer windings are not
excessive.
Supply specs: VIN = 5V, VOUT = 5V, IOUT = 500mA,
fOSC = 100kHz
Assume: VF = 0.5V (forward voltage of output diode)
Efficiency ≈ 70%
Calculate the primary switch current (IPRI):
Leakage Inductance
When the output switches turn off, the transformer leak-
age inductance causes a voltage spike on the output
switch collector. The size of the voltage spike is propor-
tional to the magnitude of the leakage inductance and to
thesquareoftheloadcurrent(energystoredintheleakage
inductance). The voltage spike should be limited so that it
does not exceed the voltage breakdown of the output
switches. This can be accomplished by reducing the
transformer’sleakageinductanceorbyreducingthemaxi-
mum slew rate. The voltage slew control will limit the
voltage spike by dissipating the leakage energy in the
power switches.
VOUT •IOUT 5V • 500mA
IPRI
=
=
= 0.714A
V Eff
IN
5V • 70%
The “Switch Voltage Drop vs Switch Current” Typical
Performance curve gives a typical value of the switch
voltagedrop(VSW)foragivenswitchcurrent(IPRI). Inthis
example, IPRI ≈ 0.7A, therefore VSW ≈ 0.5V.
Next, calculate the turns ratio:
NS
VOUT + V 5V + 0.5V
F
=
=
= 1.22
NP V – VSW 5V – 0.5V
IN
Add 15% margin to account for winding resistance of the
transformer:
Transformer Imbalance
NS
NP
A common concern for the push-pull topology is trans-
former imbalance. If the volt/second products of each half
= 1.22 +15% = 1.41
sn3439 3439fs
9
LT3439
W U U
U
APPLICATIO S I FOR ATIO
The primary inductance is then calculated:
Optional LC Filter
An optional LC filter, as shown on the Typical Application
on the first page of this data sheet, should be included if
ultralow noise and ripple are required. It is recommended
that the corner frequency of the filter should be set a
decade below the switching frequency so that the switch
noise is attenuated by a factor of 100. For example, if the
1
1
fOSC
100kHz
0.107A
L
PRI = V
= 5
= 467µH
IN ∆IPRI
∆I = 15% of IPRI = 0.15 • 0.714A = 0.107A
Next, build a transformer with the calculated values of
turnsratioandprimaryinductance. Minimizeresistancein
the windings. The turns ratio can be tweaked to get the
specified output voltage.
f
OSC = 100kHz, then fCORNER = 10kHz where:
1
fCORNER
2 • π LC
Capacitors
Output Voltage Regulation
The DC transformer topology runs effectively at 100%
duty cycle (50% each side). This means that the input
supplycurrentisapproximatelyconstant. Therefore, large
“hold-up type” capacitors are not necessary. A low value
(>4.7µF), low ESR ceramic will be adequate to filter high
frequency noise at the input.
The output voltage of the DC transformer topology is
unregulated. Variations in the input voltage will cause the
output voltage to vary because the output voltage is a
function of the input voltage and the transformer turn
ratio. Also, variations in the output load will cause the
output voltage to change because of circuit parasitics,
such as the transformer DC resistance and power switch
on resistance. If regulation is necessary, a post regulator
such as a linear regulator can be added to the output of the
supply. See the Typical Applications for examples of
adding a linear regulator.
Theoutputcapacitorssupplyenergytotheoutputloadonly
during switch transitions. Therefore, large capacitance
valuesarenotnecessary.LowESR,surfacemountcapaci-
tors such as ceramic, OS-CON of POSCAPs are recom-
mended. An additional LC filter can be added in addition to
the output capacitor to further reduce output noise.
Transformer winding capacitance between the isolated
primary and secondary have parasitic currents that can
cause noise on the grounds. Providing a high frequency,
low impedance path between the primary and secondary
givestheparasiticcurrentsalocalreturnpath.A2.2nF,1kV
ceramic capacitor is recommended.
More Help
AN70: “A Monolithic Switching Regulator with 100µV
Output Noise” contains much information concerning
applications and noise measurement techniques.
AN19: “LT1070 Design Manual”
AN29: “Some Thoughts on DC-DC Converters” also have
general knowledge on switching regulators.
Switching Diode Selection
A fast recovery, surface mount diode such as a Schottky
is recommended. The proximity of the diodes to the
transformer outputs is important and should be as close
as possible with short, wide traces connecting them.
TM
An LTC SwitcherCAD model is available to verify design
performance.
The LTC Applications department is always ready to lend
a helping hand.
SwitcherCAD is a trademark of Linear Technology Corporation.
sn3439 3439fs
10
LT3439
U
TYPICAL APPLICATIO
Low Noise 5V to ±12V Push-Pull DC Transformer
OPTIONAL
L1
C7
BYP
LT1761-BYP
D1
D2
0.01µF
V
OUT
12V
IN
OUT
80mA
+
+
+
R1
442k
C9
39µF
C3
47µF
C4
47µF
GND
ADJ
V
IN
T1
5V
13
C1
•
•
•
•
R2
49.9k
4.7µF
V
IN
3
11
SHDN
SYNC
COLA
COLB
LT3439
14
4
5
6
7
D3
D4
OPTIONAL
L2
C
T
C8
0.01µF
BYP
LT1964-BYP
IN OUT
R8
10k
R
T
R
SL
V
OUT
R
16.9k
C
T
T
–12V
GND
10
PGND
1, 16
R
SI
16.9k
820pF
80mA
C10
C6
47µF
R3
442k
C5
C11
2.2nF
1kV
+
39µF
GND
ADJ
+
+
47µF
C1: TAIYO YUDEN JMK212BJ475KG
C3-C6: SANYO OS-CON 20SVQP47M
C9, C10: SANYO OS-CON 16SVQPA39M
C11: AVX 1206AC222MA11A
3439 TA02
R4
49.9k
D1-D4: MMBD914
L1, L2: COILCRAFT DT1608C-333
T1: COILTRONICS CTX02-16030
U
PACKAGE DESCRIPTIO
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BA
4.90 – 5.10*
(.193 – .201)
2.74
(.108)
2.74
(.108)
16 1514 13 12 1110
9
6.60 ±0.10
4.50 ±0.10
2.74
(.108)
SEE NOTE 4
2.74
(.108)
6.40
BSC
0.45 ±0.05
1.05 ±0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0° – 8°
0.65
(.0256)
BSC
0.45 – 0.75
0.09 – 0.20
0.05 – 0.15
(.018 – .030)
(.0036 – .0079)
(.002 – .006)
0.195 – 0.30
(.0077 – .0118)
FE16 (BA) TSSOP 0203
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
sn3439 3439fs
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LT3439
U
TYPICAL APPLICATIO
Low Noise 12V to –12V, 6W Push-Pull DC Transformer
OPTIONAL
LT1175
L2
33µH
IN
I
D1
V
V
T1
IN
LIM2
OUT
12V
–12V
I
OUT
SENSE
LIM4
GND
13
C1
4.7µF
C2
•
•
•
•
500mA
0.1µF
C5
4.7µF
C3
15µF
C4
15µF
V
IN
3
11
SHDN
SYNC
COLA
COLB
3439 TA03
D2
LT3439
R1
150k
R2
324k
14
4
5
6
7
C
T
C1: TDK C3216X5R1C475K
R
R
SL
T
R
16.9k
C
C3, C4: TDK C4532X5R1E156M
C5: TEK C3216X5R1C475K
D1, D2: MBRA130LT3
T
T
GND
10
PGND
1, 16
R
SI
16.9k
680pF
L1: COILCRAFT DO1608C-333
T1: COILTRONICS CTX02-16076
RELATED PARTS
PART NUMBER
DESCRIPTION
Slew Rate Controlled Ultralow Noise 1A Switching Regulator
COMMENTS
LT1533
V : 2.7V to 23V, I (Supply): 12mA, I : <12µA, SO-16, Low
IN Q SD
Noise: <100µV , Independent Control of Switch Voltage and
P-P
Current Slew Rates
LT1534/LT1534-1 Slew Rate Controlled Ultralow Noise 2A Switching Regulators V : 2.7V to 23V, I (Supply): 12mA, I : <12µA, SO-16, Low
IN
Q
SD
Noise: <2mV , Independent Control of Switch Voltage and
P-P
Current Slew Rates
LT1683
Slew Rate Controlled Ultralow Noise Push-Pull Controller
Slew Rate Controlled Ultralow Noise DC/DC Controller
500mA, Low Noise Micropower, LDO
V : 2.7V to 20V, I (Supply): 25mA, I : <24µA, SSOP-20, Low
IN Q SD
Noise: <200µV , Independent Control of Switch Voltage and
P-P
Current Slew Rates
LT1738
V : 2.7V to 20V, I (Supply): 12mA, I : <24µA, SSOP-20, Greatly
IN Q SD
Reduced Conducted and Radiated EMI, Independent Control of
Switch Voltage and Current Slew Rates
LT1763
V : 1.8V to 20V, V
IN
: 1.22V, Dropout Voltage (V at I ):
OUT(MIN) OUT
0.30V, I (Supply): 30µA, V : 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V,
Q
OUT
I
: <1µA, SO-8, Low Noise: <20µV
SD
RMSP-P
LT1764/LT1764A
3A, Low Noise, Fast Transient Response, LDOs
V : 2.7V to 20V, V
: 1.21V, Dropout Voltage (V at I ):
OUT(MIN) OUT
IN
0.34V, I (Supply): 1mA, V : 1.8V, 2.5V, 3.3V, I : <1µA,
Q
OUT
SD
DD, TO220-5, Low Noise: <40µV
, “A” Version Stable with
RMSP-P
Ceramic Capacitors
LT1962
300mA, Low Noise Micropower, LDO
V : 1.8V to 20V, V
: 1.22V, Dropout Voltage (V at I ):
OUT(MIN) OUT
IN
0.27V, I (Supply): 30µA, V : 1.5V, 1.8V, 2.5V, 3V, 3.3V, 5V,
Q
OUT
I
: <1µA, MS8, Low Noise: <20µV
SD
RMSP-P
LT1963/LT1963A
1.5A, Low Noise, Fast Transient Response, LDOs
V : 2.1V to 20V, V
: 1.21V, Dropout Voltage (V at I ):
OUT(MIN) OUT
IN
0.34V, I (Supply): 1mA, V : 1.5V, 1.8V, 2.5V, 3.3V, I : <1µA,
Q
OUT
SD
DD, TO220-5, SOT-223, SO-8, Low Noise: <40µV , “A” Version
RMSP-P
Stable with Ceramic Capacitors
LT1964
200mA, Low Noise Micropower, Negative LDO
V : –0.9V to –20V, V
: –1.21V, Dropout Voltage (V at I ):
OUT(MIN) OUT
IN
0.34V, I (Supply): 30µA, V : Adj, –5V, I : <3µA, ThinSOTTM,
Q
OUT
SD
Low Noise: <30µV
, Stable with Ceramic Capacitors
RMSP-P
ThinSOT is a trademark of Linear Technology Corporation.
sn3439 3439fs
LT/TP 0303 2K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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