LT3506AEDHD-PBF [Linear]
Dual Monolithic 1.6A Step-Down Switching Regulator; 双通道单片式1.6A降压型开关稳压器
| 型号： | LT3506AEDHD-PBF |
| 厂家： | 
Linear |
| 描述： | Dual Monolithic 1.6A Step-Down Switching Regulator |
| 文件： | 总24页 (文件大小：680K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3506/LT3506A
Dual Monolithic 1.6A
Step-Down Switching Regulator
U
DESCRIPTIO
FEATURES
TheLT®3506isadualcurrentmodePWMstep-downDC/DC
■
Wide Input Voltage Range, 3.6V to 25V
Two 1.6A Output Switching Regulators with Internal
Power Switches
■
converter with internal 2A power switches. Both convert-
ers are synchronized to a single oscillator and run with
oppositephases,reducinginputripplecurrent.Theoutput
voltages are set with external resistor dividers, and each
regulatorhasindependentshutdownandsoft-startcircuits.
Each regulator generates a power-good signal when its
output is in regulation, easing power supply sequencing
and interfacing with microcontrollers and DSPs.
■
Constant Switching Frequency
LT3506: 575kHz
LT3506A: 1.1MHz
■
■
■
■
Anti-Phase Switching Reduces Ripple
Accurate 0.8V Reference, 1ꢀ
Independent Shutdown/Soft-Start Pins
Independent Power Good Indicators Ease Supply
Sequencing
TheLT3506switchingfrequencyis575kHzandtheLT3506A
is 1.1MHz. These high switching frequencies allow the
use of tiny inductors and capacitors, resulting in a very
small dual 1.6A output solution. Constant frequency and
ceramic capacitors combine to produce low, predictable
output ripple voltage. With its wide input range of 3.6V to
25V,theLT3506regulatesawidevarietyofpowersources,
from 4-cell batteries and 5V logic rails to unregulated wall
transformers, lead acid batteries and distributed-power
supplies. Current mode PWM architecture provides fast
transientresponsewithsimplecompensationcomponents
and cycle-by-cycle current limiting. Frequency foldback
and thermal shutdown provide additional protection.
■
■
Uses Small Inductors and Ceramic Capacitors
Small 16-Lead Thermally Enhanced 5mm × 4mm
DFN and TSSOP Surface Mount Packages
U
APPLICATIO S
■
Disk Drives
■
DSP Power Supplies
■
Wall Transformer Regulation
Distributed Power Regulation
DSL Modems
Cable Modems
■
■
■
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
U
TYPICAL APPLICATIO
Efficiency
V
IN
100
1/2 BAT-54A
1/2 BAT-54A
4.5V TO 25V
V
= 5V
IN
22µF
V
V
IN2
IN1
90
80
70
60
50
BOOST1 BOOST2
V
= 3.3V
V
OUT
0.22µF
0.22µF
4.7µH
6.4µH
33.2k
V
V
3.3V
1.6A
OUT1
1.8V
1.6A
OUT2
SW1
FB1
SW2
FB2
= 1.8V
OUT
18.7k
1000pF
15k
2200pF
10k
V
V
C2
C1
LT3506
47µF
15k
D1
D2
10.7k
22µF
RUN/SS1 RUN/SS2
PGOOD1
100k
100k
1.5nF
1.5nF
3506 F01
0
0.5
1.0
(A)
1.5
2.0
I
OUT
3506 TA01b
PGOOD2
GND
D1, D2: ON SEMI MBR5230LT3
PGOOD1
PGOOD2
3506afb
ꢀ
LT3506/LT3506A
Absolute MAxiMuM RAtings
(Note 1)
V Voltage................................................. –0.3V to 25V
Maximum Junction Temperature........................... 125°C
Operating Temperature Range (Note 2)
E Grade................................................ –40°C to 85°C
I Grade............................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
IN
BOOST Pin Voltage ...................................................50V
BOOST Pin Above SW Pin.........................................25V
PG Pin Voltage..........................................................25V
RUN/SS, FB, V Pins................................................5.5V
C
U U
PI CO FIGURATIO
TOP VIEW
TOP VIEW
BOOST1
SW1
1
2
3
4
5
6
7
8
16
15
FB1
BOOST1
SW1
1
2
3
4
5
6
7
8
16 FB1
15
V
V
C1
C1
V
V
V
V
14 PG1
V
V
V
V
14 PG1
IN1
IN1
IN2
IN2
IN1
IN1
IN2
IN2
13 RUN/SS1
12 RUN/SS2
11 PG2
13 RUN/SS1
12 RUN/SS2
11 PG2
17
17
SW2
10
9
V
C2
SW2
10
9
V
C2
BOOST2
FB2
BOOST2
FB2
FE PACKAGE
DHD PACKAGE
16-LEAD PLASTIC TSSOP NARROW
16-LEAD PLASTIC DFN
T
= 125°C, θ = 45°C/W, θ = 10°C/W
JA JC
EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB
JMAX
T
JMAX
= 125°C, θ = 43°C/W, θ = 4.3°C/W
JA JC
EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB
U
W
U
ORDER I FOR ATIO
LEAD FREE FINISH
LT3506EDHD#PBF
LT3506AEDHD#PBF
LT3506IDHD#PBF
LT3506AIDHD#PBF
LT3506EFE#PBF
LT3506AEFE#PBF
LT3506IFE#PBF
LT3506AIFE#PBF
TAPE AND REEL
PART MARKING*
3506
3506A
3506
3506A
3506EFE
3506AEFE
3506IFE
3506AIFE
PACKAGE DESCRIPTION
16-Lead (5mm x 4mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
LT3506EDHD#TRPBF
LT3506AEDHD#TRPBF
LT3506IDHD#TRPBF
LT3506AIDHD#TRPBF
LT3506EFE#TRPBF
LT3506AEFE#TRPBF
LT3506IFE#TRPBF
LT3506AIFE#TRPBF
16-Lead (5mm x 4mm) Plastic DFN
16-Lead (5mm x 4mm) Plastic DFN
16-Lead (5mm x 4mm) Plastic DFN
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
–40°C to 85°C
–40°C to 125°C
–40°C to 125°C
–40°C to 85°C
–40°C to 85°C
–40°C to 125°C
–40°C to 125°C
LEAD BASED FINISH
LT3506EDHD
LT3506AEDHD
LT3506IDHD
LT3506AIDHD
LT3506EFE
LT3506AEFE
LT3506IFE
LT3506AIFE
TAPE AND REEL
LT3506EDHD#TR
LT3506AEDHD#TR
LT3506IDHD#TR
LT3506AIDHD#TR
LT3506EFE#TR
LT3506AEFE#TR
LT3506IFE#TR
PART MARKING*
3506
3506A
3506
3506A
3506EFE
3506AEFE
3506IFE
3506AIFE
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 85°C
–40°C to 125°C
–40°C to 125°C
–40°C to 85°C
–40°C to 85°C
–40°C to 125°C
–40°C to 125°C
16-Lead (5mm x 4mm) Plastic DFN
16-Lead (5mm x 4mm) Plastic DFN
16-Lead (5mm x 4mm) Plastic DFN
16-Lead (5mm x 4mm) Plastic DFN
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
16-Lead Plastic TSSOP Narrow
LT3506AIFE#TR
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3506afb
ꢁ
LT3506/LT3506A
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 5V, VBOOST = 8V, unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
3.4
3.8
30
MAX
3.6
4.8
45
UNITS
V
●
V
Undervoltage Lockout
Quiescent Current
Shutdown Current
Feedback Voltage
IN(MIN)
INQ
I
I
Not Switching
mA
µA
V
= 0V
RUNSS
INSD
●
●
●
V
FB
–40°C to 85°C, EDHD
–40°C to 85°C, EFE
–40°C to 125°C, IFE, IDHD
792
784
784
800
800
800
808
816
816
mV
mV
mV
●
I
FB Pin Bias Current
Reference Line Regulation
Error Amp GM
V
V
= 800mV, V = 0.4V
40
0.005
350
100
nA
%/V
FB
FB
IN
C
V
= 5V to 25V
FB(REG)
gm
uMhos
EA
A
V
Error Amp Voltage Gain
400
I
VC
V Source Current
C
V
FB
V
FB
= 0.6V, V = 0V
30
30
µA
µA
C
C
V Sink Current
= 1.2V, V = 1100mV
C
V
V
V Switching Threshold
0.7
1.9
V
V
VC(THRESH)
VC(CLAMP)
C
V Clamp Voltage
C
f
SW
Switching Frequency
LT3506
LT3506A
500
1
575
1.1
650
1.2
kHz
MHz
Switching Phase
(Note 5)
180
Deg
DC
Maximum Duty Cycle
LT3506
LT3506A
89
78
93
88
%
%
V
Frequency Shift Threshold on FB
Foldback Frequency
0.4
170
2.6
V
kHz
A
FB(SWTHRESH)
f
V
= 0V
FB
FOLD
SW
I
Switch Current Limit
(Note 3)
2.0
0.3
3.6
V
Switch V
(Note 4)
I
SW
= 1A
210
mV
µA
V
SW(SAT)
LSW
CESAT
I
Switch Leakage Current
Minimum Boost Voltage Above Switch
BOOST Pin Current
10
2.5
30
V
I
I
= 1A
= 1A
1.5
20
BOOST(MIN)
BOOST
SW
SW
I
I
mA
µA
V
RUN/SS Current
2.1
0.8
720
0.22
0.1
RUN/SS
V
V
V
RUN/SS Threshold
RUN/SS(THRESH)
FB(PGTHRESH)
PG(LOW)
V
FB
PG Threshold
V
V
V
Rising
mV
V
FB
FB
PG
PG Voltage Output Low
PG Pin Leakage
= 640mV, I = 250µA
0.4
1
PG
I
= 2V
µA
LPG
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
correlation with statistical process controls. The LT3506I/LT3506AI are
guaranteed and tested over the full –40°C to 125°C operating temperature
range.
Note 3: Current limit is guaranteed by design and/or correlation to static
Note 2: The LT3506E/LT3506AE are guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
test. Slope compensation reduces current limit at high duty cycle.
Note 4: Switch V
guaranteed by design.
CESAT
Note 5: Switching phase is guaranteed by design.
3506afb
ꢂ
LT3506/LT3506A
W U
TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency, VOUT = 1.8V (LT3506A)
Efficiency, VOUT = 3.3V (LT3506)
Efficiency, VOUT = 5V (LT3506)
100
90
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
V
= 1.8V
V
= 3.3V
V
= 5V
OUT
OUT
OUT
L = 4.7µH (COILCRAFT MSS6122-472MLB)
L = 6.4µH (SUMIDA CR54-6R4)
= 25°C
L = 10µH (COOPER UP1B-100)
= 25°C
T
= 25°C
T
T
A
A
A
V
= 8V
V
= 5V
IN
IN
80
70
60
50
40
V
IN
= 15V
V
= 12V
IN
V
IN
= 25V
0.4
V
= 25V
0.4
IN
V
V
V
= 4.5V
= 12V
= 25V
IN
IN
IN
30
0.2 0.4 0.6 0.8
1.6
0
1.0 1.2 1.4
0
0.8
(A)
1.2
1.6
0
0.8
(A)
1.2
1.6
OUTPUT CURRENT (A)
I
I
OUT
OUT
3506 G01
3506 G02
3506 G03
Maximum Load Current,
VOUT = 1.8V (LT3506A)
Maximum Load Current,
VOUT = 3.3V (LT3506A)
Switch VCESAT
1.8
1.6
1.4
1.2
1.0
1.8
1.6
1.4
1.2
1.0
400
300
200
100
0
T
= 25°C
SLOPE COMPENSATION REQUIRES
A
T
= 25°C
A
L > 2.2µH FOR V < 7 WITH V
A
= 3.3V
IN
OUT
T
= 25°C
L = 2.2µH
L = 4.7µH
L = 3.3µH
L = 1.5µH
L = 1µH
L = 2.2µH
0
2
4
6
8
10 12 14 16
0
5
10
15
20
25
1.0
SW CURRENT (A)
1.5
0
2.0
0.5
INPUT VOLTAGE (V)*
INPUT VOLTAGE (V)*
3506 G04
3506 G05
3506 G06
Frequency vs Temperature
Boost Pin Current
Current Limit vs Duty Cycle
40
30
20
10
0
700
650
600
550
500
1.20
1.15
1.10
1.05
1.00
3.0
2.5
2.0
1.5
1.0
0.5
0
T
= 25°C
T
= 25°C
A
A
TYPICAL
LT3506A
MINIMUM
LT3506
1.0
1.5
0
2.0
0.5
0
20
40
60
80
100
–50 –25
0
25
50
75
100 125
TEMPERATURE (°C)
SWITCH CURRENT (A)
DUTY CYCLE (%)
3506 G10
3506 G07
3506 G08
3506afb
ꢃ
LT3506/LT3506A
W U
TYPICAL PERFOR A CE CHARACTERISTICS
RUN/SS Thresholds vs
Temperature
IRUN/SS vs Temperature
3.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
2.5
2.0
1.5
1.0
0.5
0
TO SWITCH
TO RUN
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
–50
0
25
50
75 100 125
–25
TEMPERATURE (°C)
3506 G13
3506 G12
U U
U
PI FU CTIO S
PG1 (Pin 14), PG2 (Pin 11): The Power Good pins are
the open collector outputs of an internal comparator. PG
remains low until the FB pin is within 10% of the final
regulation voltage. As well as indicating output regulation,
the PG pins can be used to sequence the two switching
regulators. These pins can be left unconnected. The PG
BOOST1 (Pin 1), BOOST2 (Pin 8): The BOOST pins are
used to provide drive voltages, higher than the input
voltage, to the internal bipolar NPN power switches. Tie
through a diode from V
or from V .
OUT
IN
SW1 (Pin 2), SW2 (Pin 7): The SW pins are the outputs
of the internal power switches. Connect these pins to the
inductors, catch diodes and boost capacitors.
outputs are valid when V is greater than 3.4V and either
IN
of the RUN/SS pins is high. The PG comparators are
disabled in shutdown.
V
IN1
(Pins 3, 4): The V
pins supply current to the
IN1
LT3506’s internal regulator and to the internal power
switch connected to SW1. These pins must be locally
bypassed.
V
(Pin 15), V (Pin 10): The V pins are the outputs of
C2 C
C1
theinternalerroramps. Thevoltagesonthesepinscontrol
the peak switch currents. These pins are normally used
to compensate the control loops, but can also be used to
override the loops. Pull these pins to ground with an open
drain to shut down each switching regulator.
V
(Pins 5, 6): The V pins supply current to the inter-
IN2
IN2
nal power switch connected to SW2 and must be locally
bypassed.ConnectthesepinsdirectlytoV unlesspower
for Channel 2 is coming from a different source.
IN1
FB1 (Pin 16), FB2 (Pin 9): The LT3506 regulates each
feedback pin to 800mV. Connect the feedback resistor
divider taps to these pins.
RUN/SS1 (Pin 13), RUN/SS2 (Pin 12): The RUN/SS pins
are used to shut down the individual switching regula-
tors and the internal bias circuits. They also provide a
soft-start function. To shut down either regulator, pull the
RUN/SS pin to ground with an open drain or collector.
Tie a capacitor from these pins to ground to limit switch
current during start-up. If neither feature is used, leave
these pins unconnected.
Exposed Pad (Pin 17): The Exposed Pad of the package
providesbothelectricalcontacttogroundandgoodthermal
contacttotheprintedcircuitboard.TheExposedPadmust
be soldered to the circuit board for proper operation.
3506afb
ꢄ
LT3506/LT3506A
BLOCK DIAGRA
V
IN
2µA
RUN/SS2
CLK1
CLK2
INT REG
AND REF
MASTER
OSC
2µA
V
IN
RUN/SS1
V
IN
C
IN
0.75V
∑
SLOPE
R
S
BOOST
SW
C1
D2
L1
Q
C3
FOLDBACK
LOGIC
CLK
OUT
C1
D1
FB
R1
–
+
V
C
ERROR
AMP
R2
800mV
80mV
R
C
–
C
F
I
LIMIT
C
RUN/SS
C
CLAMP
+
PG
+
–
GND
3506 F02
Figure 2. Block Diagram of the LT3506 with Associated External Components (1 of 2 Regulators Shown)
3506afb
ꢅ
LT3506/LT3506A
U
OPERATIO
(Refer to the Block Diagram)
The LT3506 is a dual, constant frequency, current mode
buck regulator with internal 2A power switches. The two
regulators share common circuitry including voltage
reference and oscillator. In addition, the analog blocks
the inductor flows through the external Schottky diode,
and begins to decrease. The cycle begins again at the next
pulse from the oscillator. In this way the voltage on the V
C
pincontrolsthecurrentthroughtheinductortotheoutput.
The internal error amplifier regulates the output voltage
on both regulators share the V supply voltage, but are
IN1
otherwise independent. This section describes the opera-
by continually adjusting the V pin voltage.
C
tion of the LT3506.
The threshold for switching on the V pin is 0.75V, and an
C
IftheRUN/SS(run/soft-start)pinsarebothtiedtoground,
the LT3506 is shut down and draws 30μA from V
active clamp of 1.9V limits the output current. The V pin
C
.
is also clamped to the RUN/SS pin voltage. As the internal
current source charges the external soft-start capacitor,
the current limit increases slowly. Each switcher contains
an independent oscillator. This slave oscillator is normally
synchronized to the master oscillator. However, during
start-up, short-circuit or overload conditions, the FB pin
voltage will be near zero and an internal comparator gates
the master oscillator clock signal. This allows the slave
oscillator to run the regulator at a lower frequency. This
frequency foldback behavior helps to limit switch current
and power dissipation under fault conditions.
IN1
Internal 2μA current sources charge external soft-start
capacitors,generatingvoltagerampsatthesepins.Ifeither
RUN/SS pin exceeds 0.6V, the internal bias circuits turn
on, including the internal regulator, 800mV reference and
575kHz master oscillator. In this state, the LT3506 draws
1.8mA from V , whether one or both RUN/SS pins are
IN1
high. Neither switching regulator will begin to operate
until its RUN/SS pin reaches ~0.8V. The master oscillator
generates two clock signals of opposite phase.
Thetwoswitchersarecurrentmode,step-downregulators.
This means that instead of directly modulating the duty
cycle of the power switch, the feedback loop controls the
peak current in the switch during each cycle. This cur-
rent mode control improves loop dynamics and provides
cycle-by-cycle current limit.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate
the internal bipolar NPN power switch for efficient opera-
tion.
The Block Diagram in Figure 2 shows only one of the two
switching regulators. A pulse from the slave oscillator
sets the RS flip-flop and turns on the internal NPN bipolar
powerswitch.Currentintheswitchandtheexternalinduc-
tor begins to increase. When this current exceeds a level
determined by the voltage at V , current comparator C1
resets the flip-flop, turning off the switch. The current in
A power good comparator trips when the FB pin is at 90%
of its regulated value. The PG output is an open collector
transistor that is off when the output is in regulation, al-
lowing an external resistor to pull the PG pin high. Power
good is valid when the LT3506 is enabled (either RUN/SS
C
pin is high) and V is greater than ~3.4V.
IN
3506afb
ꢆ
LT3506/LT3506A
U U
W
APPLICATIO S I FOR ATIO
FB Resistor Network
maximum input voltage is ~8V with V =0.8V. Note that
OUT
this is a restriction on the operating input voltage; the
circuit will tolerate transient inputs up to the absolute
maximum rating.
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resis-
tors according to:
Inductor Selection and Maximum Output Current
R1 = R2(V /0.8 – 1)
OUT
A good first choice for the inductor value is:
The parallel combination of R1 and R2 should be 10k or
less to avoid bias current errors. Reference designators
refer to the Block Diagram in Figure 2.
L = 2 • (V
+ V ) for the LT3506
D
OUT
L = (V
+ V ) for the LT3506A
D
OUT
Input Voltage Range
where V is the voltage drop of the catch diode (~0.4V)
D
and L is in μH. With this value the maximum load current
will be ~1.6A, independent of input voltage. The inductor’s
RMS current rating must be greater than your maximum
loadcurrentanditssaturationcurrentshouldbeabout30%
higher.Tokeepefficiencyhigh,theseriesresistance(DCR)
shouldbelessthan0.1W. Table1listsseveralvendorsand
types that are suitable. Of course, such a simple design
guide will not always result in the optimum inductor for
your application. A larger value provides a slightly higher
maximum load current, and will reduce the output volt-
age ripple. If your load is lower than 1.6A, then you can
decrease the value of the inductor and operate with higher
ripple current. This allows you to use a physically smaller
inductor, or one with a lower DCR resulting in higher ef-
ficiency. Be aware that if the inductance differs from the
simple rule above, then the maximum load current will
depend on input voltage. There are several graphs in the
Typical Performance Characteristics section of this data
sheet that show the maximum load current as a function
of input voltage and inductor value for several popular
output voltages. Also, low inductance may result in dis-
continuous mode operation, which may be acceptable,
but further reduces maximum load current. For details of
maximum output current and discontinuous mode opera-
tion, see Linear Technology Application Note 44. Finally,
The minimum input voltage is determined by either the
LT3506’s minimum operating voltage of ~3.6V, or by its
maximum duty cycle. The duty cycle is the fraction of
time that the internal switch is on and is determined by
the input and output voltages:
DC = (V
+ V )/(V – V + V )
D IN SW D
OUT
where V is the forward voltage drop of the catch diode
D
(~0.4V) and V is the voltage drop of the internal switch
SW
(~0.3V at maximum load). This leads to a minimum input
voltage of:
V
= (V
+ V )/DC
- V + V
MAX D SW
IN(MIN)
OUT
D
with DC
= 0.89 (0.78 for the LT3506A).
MAX
A more detailed analysis includes inductor loss and the
dependence of the diode and switch drop on operating
current. A common application where the maximum duty
cycle limits the input voltage range is the conversion of 5V
to 3.3V. The maximum load current that the LT3506 can
deliver at 3.3V depends on the accuracy of the 5V input
supply. With a low loss inductor (DCR less than 80mW),
the LT3506 can deliver 1.2A for V > 4.7V and 1.6A for
IN
V
> 4.85V. The maximum input voltage is determined
by the absolute maximum ratings of the V and BOOST
pins and by the minimum duty cycle DC
for the LT3506A):
IN
IN
= 0.08 (0.15
MIN
for duty cycles greater than 50%(V /V < 0.5), there
OUT IN
is a minimum inductance required to avoid subharmonic
oscillations. See Application Note 19 for detailed informa-
tiononsubharmonicoscillations.Thefollowingdiscussion
assumes continuous inductor current.
V
= (V
+ V )/DC
– V + V
.
SW
IN(MAX)
OUT
D
MIN
D
This limits the maximum input voltage to ~21V with V
OUT
= 1.2V and ~15V with V
= 0.8V. For the LT3506A the
OUT
3506afb
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The current in the inductor is a triangle wave with an
average value equal to the load current. The peak switch
currentisequalto theoutput currentplushalfthe peak-to-
peak inductor ripple current. The LT3506 limits its switch
current in order to protect itself and the system from
overload faults. Therefore, the maximum output current
that the LT3506 will deliver depends on the current limit,
the inductor value and the input and output voltages. L
is chosen based on output current requirements, output
voltageripplerequirements,sizerestrictionsandefficiency
goals. When the switch is off, the inductor sees the output
voltage plus the catch diode drop. This gives the peak-to-
peak ripple current in the inductor:
Table 1. Inductors
Part Number
Value
(μH)
ISAT (A)
DCR (W)
Height
(mm)
Sumida
CR43-3R3
3.3
4.7
2.2
2.6
5.6
10
1.44
1.15
2.16
2.60
2.00
2.00
0.086
0.109
0.030
0.013
0.027
0.047
3.5
3.5
2.5
3.0
2.8
3.7
CR43-4R7
CDC5d23-2R2
CDRH5D28-2R6
CDRH6D26-5R6
CDH113-100
Coilcraft
DO1606T-152
DO1606T-222
DO1608C-332
DO1608C-472
DO1813P-682HC
Cooper
1.5
2.2
3.3
4.7
6.8
2.10
1.70
2.00
1.50
2.20
0.060
0.070
0.080
0.090
0.080
2.0
2.0
2.9
2.9
5.0
ΔI = (1 – DC)(V
+ V )/(L • f)
D
L
OUT
where f is the switching frequency of the LT3506 and L
is the value of the inductor. The peak inductor and switch
current is
SD414-2R2
SD414-6R8
UP1B-100
2.2
6.8
10
2.73
1.64
1.90
0.061
0.135
0.111
1.35
1.35
5.0
I
= I
= I + ΔI /2.
OUT L
SWPK
LPK
To maintain output regulation, this peak current must be
Toko
less than the LT3506’s switch current limit I . I is at
LIM LIM
(D62F)847FY-2R4M
2.4
2.2
2.5
2.7
0.037
0.03
2.7
3.0
least 2A at low duty cycle and decreases linearly to 1.7A
at DC = 0.8. The maximum output current is a function of
the chosen inductor value:
(D73LF)817FY-
2R2M
Input Capacitor Selection
I
= I – ΔI /2 = 2A • (1 – 0.21 • DC) – ΔI /2
LIM L L
OUT(MAX)
Bypass the input of the LT3506 circuit with a 4.7μF or
higher ceramic capacitor of X7R or X5R type. A lower
value or a less expensive Y5V type can be used if there is
additional bypassing provided by bulk electrolytic or tan-
talum capacitors. The following paragraphs describe the
input capacitor considerations in more detail. Step-down
regulators draw current from the input supply in pulses
with very fast rise and fall times. The input capacitor is
requiredtoreducetheresultingvoltagerippleattheLT3506
and to force this very high frequency switching current
into a tight local loop, minimizing EMI. The input capaci-
If the inductor value is chosen so that the ripple current
is small, then the available output current will be near
the switch current limit. One approach to choosing the
inductor is to start with the simple rule given above, look
at the available inductors, and choose one to meet cost or
space goals. Then use these equations to check that the
LT3506 will be able to deliver the required output current.
Note again that these equations assume that the inductor
current is continuous. Discontinuous operation occurs
when I
is less than ΔI /2 as calculated above.
OUT
L
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tor must have low impedance at the switching frequency
to do this effectively, and it must have an adequate ripple
current rating. With two switchers operating at the same
frequency but with different phases and duty cycles, cal-
culating the input capacitor RMS current is not simple.
However, aconservativevalueistheRMSinputcurrentfor
ESR and ripple current requirements. Because the input
capacitorislikelytoseehighsurgecurrentswhentheinput
source is applied, tantalum capacitors should be surge
rated. The manufacturer may also recommend operation
below the rated voltage of the capacitor. Be sure to place
the 1μF ceramic as close as possible to the V and GND
IN
the channel that is delivering most power (V
This is given by:
• I ).
pins on the IC for optimal noise immunity.
OUT OUT
A final caution is in order regarding the use of ceramic
capacitors at the input. A ceramic input capacitor can
combine with stray inductance to form a resonant tank
circuit. If power is applied quickly (for example by plug-
ging the circuit into a live power source) this tank can ring,
doubling the input voltage and damaging the LT3506. The
solution is to either clamp the input voltage or dampen the
tank circuit by adding a lossy capacitor in parallel with the
ceramic capacitor. For details, see Application Note 88.
VOUT • V − V
(
)
<
IOUT
2
IN
OUT
IINRMS =IOUT
V
IN
and is largest when V = 2V
(50% duty cycle). As
IN
OUT
the second, lower power channel draws input current,
the input capacitor’s RMS current actually decreases as
the out-of-phase current cancels the current drawn by
the higher power channel. Considering that the maximum
load current from a single channel is ~1.6A, RMS ripple
current will always be less than 0.8A.
Output Capacitor Selection
The output capacitor filters the inductor current to gen-
erate an output with low voltage ripple. It also stores
energy in order satisfy transient loads and to stabilize the
LT3506’s control loop. Because the LT3506 operates at a
high frequency, you don’t need much output capacitance.
Also, the current mode control loop doesn’t require the
presence of output capacitor series resistance (ESR). For
these reasons, you are free to use ceramic capacitors to
achieve very low output ripple and small circuit size.
The high frequency of the LT3506 reduces the energy
storage requirements of the input capacitor, so that the
capacitance required is less than 22μF (less than 10μF
for the LT3506A). The combination of small size and low
impedance (low equivalent series resistance or ESR) of
ceramic capacitors makes them the preferred choice.
The low ESR results in very low voltage ripple and the
capacitorscanhandleplentyofripplecurrent.Theyarealso
comparatively robust and can be used in this application
at their rated voltage. X5R and X7R types are stable over
temperature and applied voltage, and give dependable
service. Other types (Y5V and Z5U) have very large tem-
perature and voltage coefficients of capacitance, so they
mayhaveonlyasmallfractionoftheirnominalcapacitance
in your application. While they will still handle the RMS
ripple current, the input voltage ripple may become fairly
large, and the ripple current may end up flowing from
your input supply or from other bypass capacitors in your
system, as opposed to being fully sourced from the local
input capacitor.
Estimate output ripple with the following equations:
V
V
= ΔI /(8 • f • C ) for ceramic capacitors, and
L OUT
RIPPLE
= ΔI • ESR for electrolytic capacitors (tantalum
RIPPLE
L
and aluminum);
where ΔI is the peak-to-peak ripple current in the induc-
L
tor. The RMS content of this ripple is very low, and the
RMS current rating of the output capacitor is usually not
of concern.
Another constraint on the output capacitor is that it
must have greater energy storage than the induc-
tor; if the stored energy in the inductor is transferred
to the output, you would like the resulting voltage
step to be small compared to the regulation volt-
An alternative to a high value ceramic capacitor is a lower
valuealongwithalargerelectrolyticcapacitor,forexample
a1μFceramiccapacitorinparallelwithalowESRtantalum
capacitor. For the electrolytic capacitor, a value larger than
22mF (10mF for the LT3506A) will be required to meet the
age. For a 5% overshoot, this requirement becomes
2
C
OUT
> 10L(I /V ) .
LIM OUT
3506afb
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Finally,theremustbeenoughcapacitanceforgoodtransient
performance.Thelastequationgivesagoodstartingpoint.
Alternatively, you can start with one of the designs in this
datasheetandexperimenttogetthedesiredperformance.
This topic is covered more thoroughly in the section on
loop compensation.
Table 2. Low-ESR Surface Mount Capacitors
VENDOR
Taiyo-Yuden
AVX
TYPE
SERIES
Ceramic
Ceramic
Tantalum
TPS
Kemet
Tantalum
Tantalum
Organic
Aluminum
Organic
T491, T494, T495, T520
For 5V and 3.3V outputs with greater than 1A output, a
22μF 6.3V ceramic capacitor (X5R or X7R) at the output
results in very low output voltage ripple and good tran-
sient response. For lower voltages, 22μF is adequate but
A700
Sanyo
Tantalum or Aluminum
Organic
POSCAP
increasing C
will improve transient performance. For
OUT
Panasonic
TDK
Aluminum
Organic
SP
CAP
the LT3506A, 10μF of output capacitance is sufficient at
between 3.3V and 5V. Other types and values can be
Ceramic
V
OUT
used. The following discusses tradeoffs in output ripple
and transient performance.
Catch Diode
The high performance (low ESR), small size and robust-
ness of ceramic capacitors make them the preferred type
for LT3506 applications. However, all ceramic capacitors
are not the same. As mentioned above, many of the
higher value capacitors use poor dielectrics with high
temperature and voltage coefficients. In particular, Y5V
and Z5U types lose a large fraction of their capacitance
with applied voltage and temperature extremes. Because
the loop stability and transient response depend on the
The catch diode (D1 in Figure 2) must have a reverse volt-
age rating greater than the maximum input voltage. The
average current of the catch diode is given by:
I =I (1-DC
DAVE OUT
)
MIN
A Schottky diode with a 1A average forward current rating
will suffice for most applications. The ON Semiconductor
MBRM120LT3 (20V) and MBRM130LT3 (30V) are good
choices;theyhaveatinypackagewithgoodthermalproper-
ties.Manyvendorshavesuitablesurfacemountversionsof
the 1N5817 (20V) and 1N5818 (30V) 1A Schottky diodes
such as the Microsemi UPS120.
value of C , you may not be able to tolerate this loss.
OUT
Use X7R and X5R types.
Youcanalsouseelectrolyticcapacitors. TheESRsofmost
aluminum electrolytics are too large to deliver low output
ripple. Tantalumandnewer, lowerESRorganicelectrolytic
capacitors intended for power supply use are suitable,
and the manufacturers will specify the ESR. The choice of
capacitor value will be based on the ESR required for low
ripple. Because the volume of the capacitor determines
its ESR, both the size and the value will be larger than a
ceramic capacitor that would give similar ripple perfor-
mance. One benefit is that the larger capacitance may give
bettertransientresponseforlargechangesinloadcurrent.
Table 2 lists several capacitor vendors.
Applications with large step down ratios and high output
currents may have more than 1A of average diode current.
TheONSemiconductorMBRS230LT3orInternationalRec-
tifier 20BQ030 (both 2A, 30V) would be good choices.
BOOST Pin Considerations
The capacitor and diode tied to the BOOST pin generate
a voltage that is higher than the input voltage. In most
cases a 0.1μF capacitor and fast switching diode (such
as the CMDSH-3 or FMMD914) will work well. Figure 3
3506afb
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shows three ways to arrange the boost circuit. The BOOST
pin must be more than 2.5V above the SW pin for full
efficiency. For outputs of 3.3V and higher the standard
circuit (Figure 3a) is best. For outputs between 2.8V and
3.3V, use a small Schottky diode (such as the BAT-54).
For lower output voltages the boost diode can be tied to
the input (Figure 3b). The circuit in Figure 3a is more ef-
ficientbecausetheBOOSTpincurrentcomesfromalower
voltage source. Finally, as shown in Figure 3c, the anode
of the boost diode can be tied to another source that is
at least 3V. For example, if you are generating 3.3V and
1.8V and the 3.3V is on whenever the 1.8V is on, the 1.8V
boost diode can be connected to the 3.3V output. In any
case, you must also be sure that the maximum voltage at
the BOOST pin is less than the maximum specified in the
Absolute Maximum Ratings section.
The boost circuit can also run directly from a DC voltage
that is higher than the input voltage by more than 3V,
as in Figure 3d. The diode is used to prevent damage to
the LT3506 in case V is held low while V is present.
INB
IN
The circuit saves several components (both BOOST pins
can be tied to D2). However, efficiency may be lower and
dissipation in the LT3506 may be higher. Also, if V is
INB
absent, the LT3506 will still attempt to regulate the output,
but will do so with very low efficiency and high dissipation
because the switch will not be able to saturate, dropping
1.5V to 2V in conduction.
D2
D2
C3
C3
BOOST
LT3506
BOOST
LT3506
V
V
V
V
OUT
V
SW
V
SW
IN
OUT
IN
IN
IN
GND
GND
V
– V ≅ V
V
– V ≅ V
BOOST
BOOST
SW
OUT
BOOST
SW
IN
IN
MAX V
≅ V + V
MAX V
≅ 2V
BOOST
IN
OUT
(3a)
(3b)
D2
D2
V
INB
V
INB
> 3V
>V + 3V
IN
BOOST
LT3506
BOOST
LT3506
C3
V
V
V
V
OUT
V
SW
V
SW
IN
OUT
IN
IN
IN
GND
GND
V
– V ≅ V
MAX V
MAX V
– V ≅ V
BOOST SW INB
≅ V
BOOST INB
BOOST
SW
INB
3506 F03
MAX V
≅ V + V
BOOST
INB
IN
MINIMUM VALUE FOR V = 3V
MINIMUM VALUE FOR V = V + 3V
INB
INB IN
(3c)
(3d)
Figure 3. Generating the Boost Voltage
3506afb
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The minimum input voltage of an LT3506 application is
limited by the minimum operating voltage (<3.6V) and by
the maximum duty cycle as outlined above. For proper
start-up, the minimum input voltage is also limited by
the boost circuit. If the input voltage is ramped slowly,
or the LT3506 is turned on with its RUN/SS pin when the
output is already in regulation, then the boost capacitor
may not be fully charged. Because the boost capacitor is
charged with the energy stored in the inductor, the circuit
will rely on some minimum load current to get the boost
circuit running properly. This minimum load will depend
on input and output voltages, and on the arrangement of
the boost circuit. The minimum load generally goes to
zero once the circuit has started. The plots below show
the minimum load current to start and to run as a function
of input voltage for 3.3V and 5V outputs. In many cases
the discharged output capacitor will present a load to the
switcher which will allow it to start. The plots show the
worst-case situation where V is ramping very slowly.
IN
Use a Schottky diode (such as the BAT-54) for the lowest
start-up voltage.
Minimum Input Voltage,
VOUT = 3.3V (LT3506A)
Minimum Input Voltage,
VOUT = 5V (LT3506A)
5.5
7.0
T
= 25°C
BOOST
T = 25°C
A
V
TO START
A
IN
D
= 1N5817
D
= 1N5817
BOOST
V
TO START
IN
6.5
6.0
5.5
5.0
4.5
5.0
4.5
4.0
3.5
3.0
BOOST DIODE
BOOST DIODE
TIED TO OUTPUT
TIED TO OUTPUT
V
TO RUN
IN
V
TO RUN
IN
BOOST DIODE
TIED TO INPUT
BOOST DIODE
TIED TO INPUT
0.001
0.01
0.1
1
0.001
0.01
0.1
1
I
(A)
I
(A)
LOAD
LOAD
3506 G14
3506 G15
3506afb
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Frequency Compensation
LT3506
CURRENT MODE
POWER STAGE
V
SW
The LT3506 uses current mode control to regulate the
output.Thissimplifiesloopcompensation.Inparticular,the
LT3506 does not require the ESR of the output capacitor
for stability so you are free to use ceramic capacitors to
achieve low output ripple and small circuit size.
OUTPUT
ERROR
g
mp
2.4A/V
C
R1
AMPLIFIER
PL
FB
–
330umhos
ESR
+
V
FB
800mV
1MΩ
C1
+
GND
V
C
C1
Frequency compensation is provided by the components
tied to the V pin. Generally a capacitor and a resistor in
POLYMER
OR
TANTALUM
CERAMIC
C
R2
R
C
series to ground determine loop gain. In addition, there
is a lower value capacitor in parallel. This capacitor is not
part of the loop compensation but is used to filter noise
at the switching frequency.
C
F
C
C
3506 F04
Loop compensation determines the stability and transient
performance.Designingthecompensationnetworkisabit
complicatedandthebestvaluesdependontheapplication
and in particular the type of output capacitor. A practical
approachistostartwithoneofthecircuitsinthisdatasheet
that is similar to your application and tune the compensa-
tionnetworktooptimizetheperformance. Stabilityshould
thenbecheckedacrossalloperatingconditions, including
load current, input voltage and temperature. The LT1375
data sheet contains a more thorough discussion of loop
compensationanddescribeshowtotestthestabilityusing
atransientload.Figure4showsanequivalentcircuitforthe
LT3506 control loop. The error amp is a transconductance
amplifierwithfiniteoutputimpedance. Thepowersection,
consisting of the modulator, power switch and inductor,
is modeled as a transconductance amplifier generating an
Figure 4. Circuit Model for Frequency Compensation
Soft-Start and Shutdown
The RUN/SS (Run/Soft-Start) pins are used to place the
individualswitchingregulatorsandtheinternalbiascircuits
inshutdownmode.Theyalsoprovideasoft-startfunction.
Toshutdowneitherregulator,pulltheRUN/SSpintoground
with an open-drain or collector. If both RUN/SS pins are
pulled to ground, the LT3506 enters its shutdown mode
with both regulators off and quiescent current reduced to
~30μA. Internal 2μA current sources pull up on each pin.
If either pin reaches ~0.6V, the internal bias circuits start
and the quiescent current increases to ~3.5mA.
If a capacitor is tied from the RUN/SS pin to ground, then
theinternalpull-upcurrentwillgenerateavoltagerampon
this pin. This voltage clamps the V pin, limiting the peak
C
output current proportional to the voltage at the V pin.
C
switchcurrentandthereforeinputcurrentduringstart-up.
Note that the output capacitor integrates this current, and
A good value for the soft-start capacitor is C /10,000,
OUT
that the capacitor on the V pin (C ) integrates the error
C
C
where C
is the value of the output capacitor.
OUT
amplifier output current, resulting in two poles in the loop.
The RUN/SS pins can be left floating if the shutdown
feature is not used. They can also be tied together with a
single capacitor providing soft-start. The internal current
sources will charge these pins to ~2.5V.
In most cases a zero is required and comes from either the
output capacitor ESR or from a resistor in series with C .
C
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. A phase lead
The RUN/SS pins provide a soft-start function that limits
peakinputcurrenttothecircuitduringstart-up. Thishelps
to avoid drawing more current than the input source can
capacitor (C ) across the feedback divider may improve
PL
the transient response.
3506afb
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supply or glitching the input supply when the LT3506 is
enabled. The RUN/SS pins do not provide an accurate
delaytostartoranaccuratelycontrolledrampattheoutput
voltage, both of which depend on the output capacitance
and the load current. However, the power good indicators
can be used to sequence the two outputs, as described
below.
Output Sequencing
The PG and RUN/SS pins can be used to sequence the
two outputs. Figure 5 shows several circuits to do this. In
each case channel 1 starts first. Note that these circuits
sequence the outputs during start-up. When shut down
the two channels turn off simultaneously. In Figure 5a, a
largercapacitoronRUN/SS2delayschannel2withrespect
to channel 1. The soft-start capacitor on RUN/SS2 should
be at least twice the value of the capacitor on RUN/SS1.
A larger ratio may be required, depending on the output
capacitance and load on each channel. Make sure to test
the circuit in the system before deciding on final values
for these capacitors. The circuit in Figure 5b requires the
fewest components, with both channels sharing a single
soft-start capacitor. The power good comparator of chan-
nel 1 disables channel 2 until output 1 is in regulation. For
independent control of channel 2, use the circuit in Figure
5c. The capacitor on RUN/SS1 is smaller than the capaci-
Power Good Indicators
The PG pin is the open collector output of an internal
comparator. PG remains low until the FB pin is within
10% of the final regulation voltage. Tie the PG pin to any
supply with a pull-up resistor that will supply less than
250μA. Note that this pin will be open when the LT3506 is
placed in shutdown mode (both RUN/SS pins at ground)
regardless of the voltage at the FB pin. Power good is valid
when the LT3506 is enabled (either RUN/SS pin is high)
and V is greater than ~2.4V.
IN
RUN/SS1
V
C2
RUN/SS1
OFF ON
1nF
1nF
OFF ON
LT3506
LT3506
RUN/SS2
GND
PG1
RUN/SS2
GND
2.2nF
(5a) Channel 2 is Delayed
(5b) Fewest Components
RUN/SS1
RUN/SS1
LT3506
1nF
LT3506
1nF
OFF ON
OFF ON
PG1
PG1
RUN/SS2
RUN/SS2
GND
GND
OFF2 ON2
1.5nF
1.5nF
3506 F05
(5c) Independent Control of Channel 2
Figure 5. Sequencing the Outputs
(5d) Doesn't Work !
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PARASITIC DIODE
D4
tor on RUN/SS2. This allows the LT3506 to start up and
enable its power good comparator before RUN/SS2 gets
highenoughtoallowchannel2tostartswitching. Channel
2onlyoperateswhenitisenabledwiththeexternalcontrol
signals and output 1 is in regulation. The circuit in Figure
5a leaves both power good indicates free. However, the
circuits in Figures 5b and 5c have another advantage. As
well as sequencing the two outputs at start-up, they also
disable channel 2 if output 1 falls out of regulation (due
to a short circuit or a collapsing input voltage).
V
SW
IN
V
V
OUT
IN
LT3506
3506 F06
Figure 6. Shorted Input Protection
and needs to generate 12V and 2.5V, it would be more
efficient to generate the 2.5V output from the 5V supply
and the 12V output from the 18V supply. The LT3506 can
step down 18V to 2.5V, but the efficiency would be lower
than stepping down from 5V to 2.5V.
Finally, be aware that the circuit in Figure 5d does not
work,becausethepowergoodcomparatorsaredisabledin
shutdown. When the system is placed in shutdown mode
by pulling down on RUN/SS1, then output 1 will go low,
PG1 will pull down on RUN/SS2, and the LT3506 will enter
its low current shutdown state. This disables PG1, and
RUN/SS2rampsupagaintoenabletheLT3506.Thecircuit
will oscillate and pull extra current from the input.
This feature can also be used when the maximum step-
down ratio is exceeded. In this case, V can be tied to
IN2
IN
V
for applications requiring high V to V
ratios. A
OUT1
OUT
dual step-down application steps down the input voltage
(V ) to the highest output voltage then uses that voltage
IN1
to power the second channel (V ). V
must be able
IN2
OUT1
Multiple Input Supplies
to provide enough current for its output plus the average
current drawn from V
. Note that the V
must be
OUT2
OUT1
The internal supplies of the LT3506 operate from V . It is
IN1
above minimum input voltage for V when the second
IN2
possible to supply V from a different source, provided
IN2
channel starts to switch. Delaying the second channel can
be accomplished by either using independent soft-start
capacitors or sequencing with the PG1 output. The Two
StageStep-DowncircuitintheApplicationssectionshows
an example of the latter approach.
V
IN1
is above the minimum supply level whenever V is
IN2
present. This could be used when a system has two pri-
mary supplies available. It is more efficient to generate the
desired outputs with the lowest step-down ratio possible.
For example, if a system has 18V and 5V power available
V
SW
V
IN
SW
IN
GND
GND
(7a)
(7b)
V
SW
L1
V
SW
IN
I
C1
C1
D1
C2
GND
3506 F07
(7c)
Figure 7. Subtracting the Current when the Switch is ON (a) From the Current when the Switch in OFF (b) Reveals the Path
of the High Frequency Switching current (c) Keep This Loop Small. The Voltage on the SW and BOOST Nodes will also be
Switched; Keep these Nodes as Small as Possible. Finally, Make Sure the Circuit is Shielded with a Local Ground Plane.
3506afb
ꢀꢅ
LT3506/LT3506A
U U
W
APPLICATIO S I FOR ATIO
Shorted Input Protection
output through the SW pin and the V pin. A Schottky
IN
diode in series with the input to the LT3506 will protect
the LT3506 and the system from a shorted or reversed
input, as shown in Figure 6.
If the inductor is chosen so that it won’t saturate exces-
sively, the LT3506 will tolerate a shorted output. There is
another situation to consider in systems where the output
will be held high when the input to the LT3506 is absent.
PCB Layout
If the V and one of the RUN/SS pins are allowed to float,
IN
For proper operation and minimum EMI, care must be
taken during printed circuit board (PCB) layout. Figure 7
shows the high-di/dt paths in the buck regulator circuit.
Notethatlarge,switchedcurrentsflowinthepowerswitch,
thecatchdiodeandtheinputcapacitor.Theloopformedby
these components should be as small as possible. These
components,alongwiththeinductorandoutputcapacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components,
andtiethisgroundplanetosystemgroundatonelocation,
ideally at the ground terminal of the output capacitor C2.
Additionally, the SW and BOOST nodes should be kept as
small as possible. Figure 8 shows recommended compo-
nent placement with trace and via locations.
then the LT3506’s internal circuitry will pull its quiescent
current through its SW pin. This is fine if your system can
tolerate a few mA of load in this state. With both RUN/SS
pinsgrounded,theLT3506entersshutdownmodeandthe
SW pin current drops to ~30μA. However, if the V pin
IN
is grounded while the output is held high, then parasitic
diodes inside the LT3506 can pull large currents from the
PIN 1
TOP MARK
Thermal Considerations
ThePCBmustalsoprovideheatsinkingtokeeptheLT3506
cool. The exposed metal on the bottom of the package
must be soldered to a ground plane. This ground should
be tied to other copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3506.
Place additional vias near the catch diodes. Adding more
copper to the top and bottom layers and tying this cop-
per to the internal planes with vias can reduce thermal
resistance further. With these steps, the thermal resis-
tance from die (or junction) to ambient can be reduced to
θ
JA
= 43°C/W.
V
GND
V
OUT2
OUT1
The power dissipation in the other power components—
catchdiodes,boostdiodesandinductors,causeadditional
copper heating and can further increase what the IC sees
as ambient temperature. See the LT1767 data sheet’s
Thermal Considerations section.
VIA TO LOCAL GROUND PLANE
VIA TO V
3506 F08
IN
Figure 8. A Good PCB Layout Ensures Proper Low EMI Operation
3506afb
ꢀꢆ
LT3506/LT3506A
U U
W U
APPLICATIO S I FOR ATIO
Single, Low-Ripple 3.2A Output
prevent the two channels from properly sharing current.
If, for example, channel 1 gets started first, it can supply
the load current, while channel 2 never switches enough
current to get its boost capacitor charged. In this case,
channel 1 will supply the load until it reaches current limit,
the output voltage drops, and channel 2 gets started. The
solution is to generate a boost supply generated from
either SW pin that will service both BOOST pins. The low
profile, single output 5V to 3.3V converter shown in the
Typical Applications section shows how to do this.
The LT3506 can generate a single, low-ripple 3.2A output
if the outputs of the two switching regulators are tied
together and share a single output capacitor. By tying the
two FB pins together and the two V pins together, the
C
two channels will share the load current. There are several
advantages to this two-phase buck regulator. Ripple cur-
rents at the input and output are reduced, reducing volt-
age ripple and allowing the use of smaller, less expensive
capacitors. Although two inductors are required, each will
be smaller than the inductor required for a single-phase
regulator. This may be important when there are tight
height restrictions on the circuit. The Typical Applications
section shows circuits with maximum heights of 1.4mm,
1.8mm and 2.1mm.
Other Linear Technology Publications
Application notes 19, 35 and 44 contain more detailed
descriptions and design information for buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensationandstabilitytesting.Designnote100shows
how to generate a dual (+ and –) output supply using a
buck regulator
Thereisonespecialconsiderationregardingthetwophase
circuit. When the difference between the input voltage and
outputvoltageislessthan2.5V,thentheboostcircuitsmay
3506afb
ꢀꢇ
LT3506/LT3506A
U
TYPICAL APPLICATIO S
1.8V and 1.2V Outputs with Sequencing
V
IN
4.5V TO 21V
D3a
D3b
22µF
V
IN1
V
IN2
BOOST1 BOOST2
LT3506
L1
4.7µH
L2
3.3µH
0.22µF
0.22µF
V
V
1.2V
1.5A
OUT1
1.8V
1.5A
OUT2
SW1
FB1
SW2
FB2
18.7k
16.2k
1500pF
1000pF
V
V
C2
C1
D1
D2
47µF
15k
15k
20k
32.4k
68µF
RUN/SS1 PGOOD1
RUN/SS2
4.7nF
3506 TA01
100k
PGOOD2
GND
PGOOD
D1, D2: ON SEMICONDUCTOR MBRS230LT3
D3: BAT-54A
OUTPUT CURRENTS CAN INCREASE TO 1.6A WHEN V >12V.
IN
L1: COILCRAFT MSS6122-472
L2: TDK SLF7028-3R3M
1.8V and 5V Outputs
V
OUT2
V
OUT3
–5V
V
IN
0.3A
7V TO 25V
D4
D3a
D3b
47k
22µF
22µF
V
V
IN2
IN1
BOOST1 BOOST2
LT3506
L2
4.7µH
L1
4.7µH
0.22µF
0.22µF
2.2µF
V
V
OUT1
1.8V
1.5A
OUT2
5V
SW1
FB1
SW2
FB2
0.6A
18.7k
69.8k
1500pF
1500pF
V
C1
V
C2
D1
D2
47µF
15k
15k
15k
13.3k
22µF
RUN/SS1
4.7nF
PGOOD2 RUN/SS2
3506 TA02
100k
2.2nF
PGOOD1
GND
PGOOD
D1: ON SEMICONDUCTOR MBRS230LT3
D2: ON SEMICONDUCTOR MBRM130LT3
D3: BAT-54A
L1: COILCRAFT MSS6122-472
L2: COILTRONICS CTX5-1A
I
SHOULD NEVER EXCEED 1/2 OF I
.
OUT2
OUT3
SEE DESIGN NOTE 100 FOR DETAILS ON
GENERATING DUAL OUTPUTS USING A BUCK
REGULATOR.
D4: ON SEMICONDUCTOR MBR0530
3506afb
ꢀꢈ
LT3506/LT3506A
U
TYPICAL APPLICATIO S
Low Ripple, Low Profile 1.2V, 3A Converter, Maximum Height = 2mm
V
IN
4.5V TO 21V
D3a
D3b
22µF
V
V
IN2
IN1
BOOST1
LT3506
L1
4.1µH
0.22µF
V
1.2V
3A
OUT2
V
V
SW1
C1
C2
1000pF
20k
D1
D2
BOOST2
V
OUT
L2
0.22µF
4.7nF
4.1µH
RUN/SS1
RUN/SS2
PGOOD1
PGOOD2
SW2
100k
PGOOD
FB1
FB2
16.2k
GND
32.4k
68µF
D1, D2: DIODES, INC. B230A
D3: BAT-54A
L1, L2: SUMIDA CDRH5D18-4R1
3506 TA03
Two Stage Step Down, Up to 25V Input to 1.2V Output
V
IN
8V TO 25V
D3a
D3b
22µF
V
V
IN2
IN1
BOOST1 BOOST2
LT3506
L1
10µH
L2
2.2µH
0.22µF
0.22µF
V
V
1.2V
1.5A
OUT1
5V
1A
OUT2
SW1
FB1
SW2
FB2
69.8k
16.2k
1500pF
1000pF
V
C1
V
C2
D1
D2
47µF
13.3k
15k
20k
32.4k
68µF
100k
RUN/SS1 PGOOD1
RUN/SS2
4.7nF
PGOOD2
GND
3506 TA04
PGOOD
D1, D2: ON SEMICONDUCTOR MBRS230LT3
D3: BAT-54A
L1: COOPER UP1B-100
L2: COOPER UP0.4C-2R2
3506afb
ꢁ0
LT3506/LT3506A
U
TYPICAL APPLICATIO S
Low Ripple, Low Profile 0.8V, 3A Converter, Maximum Height = 1mm
V
IN
3.6V TO 8V
D3a
D3b
22µF
V
V
IN2
IN1
BOOST1
LT3506AEDHD
L1
1.5µH
0.1µF
V
0.8V
3A
OUT
V
V
SW1
C1
C2
1000pF
4.7nF
20k
D1
D2
BOOST2
V
OUT
L2
0.1µF
1.5µH
RUN/SS1
RUN/SS2
PGOOD1
PGOOD2
SW2
100k
PGOOD
FB1
FB2
10k
GND
68µF
D1, D2: DIODES, INC. DFLS230L
D3: BAT-54AT
L1, L2: COILCRAFT LPO6610-152ML
3506 TA05
Low Profile 1.8V and 1.3V Outputs with Sequencing, Maximum Height = 1.2mm
V
IN
4.5V TO 10V
D3a
D3b
10µF
V
V
IN2
IN1
BOOST1 BOOST2
LT3506AEDHD
L1
2.2µH
L2
2.2µH
0.1µF
0.1µF
V
V
1.3V
1.6A
OUT1
1.8V
1.5A
OUT2
SW1
FB1
SW2
FB2
18.7k
17.4k
1.5nF
10k
1.5nF
V
C1
V
C2
D1
D2
22µF
15k
15k
28k
47µF
RUN/SS1 PGOOD1
RUN/SS2
4.7nF
3506 TA06
100k
PGOOD2
GND
PGOOD
D1, D2: DIODES, INC. DFLS230L
D3: BAT-54AW
L1, L2: COILCRAFT LPS4012-222
3506afb
ꢁꢀ
LT3506/LT3506A
PAckAge DescRiPtion
DHD Package
16-Lead Plastic DFN (5mm × 4mm)
(Reference LTC DWG # 05-08-1707)
0.70 ±0.05
4.50 ±0.05
3.10 ±0.05
2.44 ±0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.34 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 ± 0.10
5.00 ±0.10
(2 SIDES)
9
16
R = 0.20
TYP
4.00 ±0.10 2.44 ± 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHD16) DFN 0504
8
1
0.25 ± 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
4.34 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJGD-2) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3506afb
ꢁꢁ
LT3506/LT3506A
PAckAge DescRiPtion
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663)
Exposed Pad Variation BA
4.90 – 5.10*
(.193 – .201)
2.74
(.108)
2.74
(.108)
16 1514 13 12 1110
9
6.60 ±0.10
2.74
(.108)
4.50 ±0.10
6.40
2.74
SEE NOTE 4
(.252)
(.108)
0.45 ±0.05
BSC
1.05 ±0.10
0.65 BSC
5
7
8
1
2
3
4
6
RECOMMENDED SOLDER PAD LAYOUT
1.10
(.0433)
MAX
4.30 – 4.50*
(.169 – .177)
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
0.05 – 0.15
(.002 – .006)
FE16 (BA) TSSOP 0204
0.195 – 0.30
(.0077 – .0118)
TYP
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS 4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
MILLIMETERS
(INCHES)
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
3506afb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
ꢁꢂ
LT3506/LT3506A
RelAteD PARts
PART NUMBER
DESCRIPTION
COMMENTS
V : 3V to 25V, V
LT1765
25V, 2.75A (I ), 1.25MHz, High
Efficiency Step-Down DC/DC Converter
= 1.2V, I = 1mA, S8, TSSOP16E Packages
OUT(MIN) Q
OUT
IN
LT1766
60V, 1.2A (I ), 200kHz, High
V : 5.5V to 60V, V
IN
= 1.2V, I = 2.5mA, TSSOP16/TSSOP16E Packages
OUT(MIN) Q
OUT
Efficiency Step-Down DC/DC Converter
LT1767
25V, 1.2A (I ), 1.25MHz, High
V : 3V to 25V, V
IN
= 1.2V, I = 1mA, MS8, MS8E Packages
OUT(MIN) Q
OUT
Efficiency Step-Down DC/DC Converter
LT1940/LT1940L
LTC3407/LTC3407-2
LT3493
Dual Monolithic 1.4A, 1.1MHz Step-
Down Switching Regulator
V : 3.6V to 25V, V
= 1.25V, I = 3.8mA, TSSOP16E Packages
OUT(MIN) Q
IN
Dual 600mA/800mA, 1.5MHz,
Synchronous Step-Down Regulator
V : 2.5V to 5.5V, V
IN
= 0.6V, I = 40mA, MSE Package
Q
OUT(MIN)
OUT(MIN)
OUT(MIN)
1.2A, 750kHz Step-Down Switching
Regulator in 2mm × 3mm DFN
V : 3.6V to 36V, V
IN
= 0.78V, I = 1.9mA, 2mm × 3mm DFN Package
Q
LT3505
1.2A, 3MHz Step-Down Switching
Regulator in 3mm × 3mm DFN
V : 3.6V to 36V, V
IN
= 0.8V, I = 2mA, DFN or MSE10 Package
Q
LTC3548
Dual 800mA and 400mA, 2.25MHz,
Synchronous Step-Down Regulator
V : 2.5V to 5.5V, V
= 0.6V, I = 40µA, 3mm × 3mm DFN or MSE10 Package
Q
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
LTC3549
Dual 300mA, 2.25MHz, Synchronous
Step-Down Regulator
V : 2.5V to 5.5V, V
IN
= 0.6V, I = 40µA, 3mm × 3mm DFN Package
Q
LTC3701
Two Phase, Dual, 500kHz, Constant
Frequency, Current Mode, High
Efficiency Step-Down DC/DC Controller
V : 2.5V to 10V, V
IN
= 0.8V, I = 460µA, SSOP-16 Package
Q
LTC3736
LTC3737
Dual Two Phase, No R
™,
V : 2.75V to 9.8V, V
= 0.6V, I = 300µA, 4mm × 4mm QFN or SSOP-24
Q
SENSE
IN
OUT(MIN)
OUT(MIN)
Synchronous Controller with Output
Tracking
Packages
Dual Two Phase, No R
DC/DC
V : 2.75V to 9.8V, V
= 0.6V, I = 220µA, 4mm × 4mm QFN or SSOP-24
Q
SENSE
IN
Controller with Output Tracking
Packages
No R
is a trademark of Linear Technology Corporation.
SENSE
3506afb
LT 0807 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
ꢁꢃ
●
●
LINEAR TECHNOLOGY CORPORATION 2006
(408)432-1900 FAX: (408) 434-0507 www.linear.com
相关型号：
LT3506AEFE#TR
LT3506 - Dual Monolithic 1.6A Step-Down Switching Regulator; Package: TSSOP; Pins: 16; Temperature Range: -40°C to 85°C
Linear
LT3506AIDHD#TR
IC 3.6 A SWITCHING REGULATOR, 1200 kHz SWITCHING FREQ-MAX, PDSO16, 5 X 4 MM, PLASTIC, MO-229WJGD-2, DFN-16, Switching Regulator or Controller
Linear
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