LT3685EDD#PBF [Linear]
LT3685 - 36V, 2A, 2.4MHz Step-Down Switching Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C;型号: | LT3685EDD#PBF |
厂家: | Linear |
描述: | LT3685 - 36V, 2A, 2.4MHz Step-Down Switching Regulator; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C 调节器 |
文件: | 总24页 (文件大小:293K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT3645
36V 500mA Step-Down
Regulator and 200mA LDO
FEATURES
DESCRIPTION
TheLT®3645isadualoutputregulatorcombininga500mA
buck regulator and a 200mA low dropout linear regula-
tor (LDO). The wide input voltage range of 3.6V to 36V
makes the LT3645 suitable for regulating power from a
wide variety of sources, including 24V industrial supplies
and automotive batteries. Its high operating frequency
allows the use of tiny, low cost inductors and capacitors,
resulting in a very small solution.
n
Wide Input Range:
Operation from 3.6V to 36V
Overvoltage Lockout Protects Circuit Through
55V Transients on Input
n
500mA Output Current Switching Regulator
n
High Switching Frequency: 750kHz
n
200mA Low Dropout Linear Regulator
1.2V to 16V Input; 0.8V to 8V Output
310mV Dropout Voltage V
to OUT2
CC2
Cycle-by-cycle current limit and frequency foldback pro-
vide protection against shorted outputs. Soft-start and
frequency foldback eliminate input current surge during
start-up.
n
n
n
n
n
Precision Programmable Undervoltage Lockout
Short-Circuit Robust
Internal Soft-Start
<2μA Shutdown Current
ThelinearregulatoroperatesfromtheV pinatvoltages
Small Thermally Enhanced 16-Lead (3mm × 3mm)
QFN and 12-Lead MSE Packages
CC2
down to 1.2V. It supplies 200mA of output current with a
typical dropout voltage of 310mV.
Other features of the LT3645 include a <2μA shutdown,
short circuit protection, soft-start and thermal shutdown.
The LT3645 is available in the thermally enhanced 16-lead
(3mm × 3mm) QFN package, or a 12-lead MSE package.
L, LT, LTC, LTM, Linear Technology, Burst Mode and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
APPLICATIONS
n
Automotive CMOS Image Sensors
n
Industrial/Automotive Micro-Controller Supply
TYPICAL APPLICATION
Buck Regulator Efficiency
3.3V/5V Step-Down Converter
90
0.1μF
V
= 5V
OUT
BOOST
15μH
5V
6.2V TO 36V
SW
V
IN
300mA
80
70
60
50
1μF
LT3645
V
OUT
= 3.3V
52.3k
10k
DA
FB
10μF
ON OFF
EN/UVLO
NPG
EN2
V
PGOOD
CC2
V
= 12V
3.3V
200mA
IN
OUT2
0
100
300
LOAD CURRENT (mA)
400
500
200
31.6k
10k
2.2μF
FB2
3645 TA01b
GND
3645 TA01a
3645f
1
LT3645
ABSOLUTE MAXIMUM RATINGS
(Note 1)
EN2, NPG Voltages .................................... –0.3V to 16V
Operating Junction Temperature Range (Note 2)
LT3645E ............................................ –40°C to 125°C
LT3645I ............................................. –40°C to 125°C
LT3645H............................................ –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)……...........300°C
V , EN/UVLO (Note 5).......................…….–0.3V to 55V
IN
BOOST Voltage……………………………………….55V
BOOST Above SW Voltage...............................…….25V
V
V
Voltage .............................................. –0.3V to 16V
OUT2
FB, FB2 Voltages.......................................... –0.3V to 6V
CC2
Voltage .............................................. –0.3V to 8V
PIN CONFIGURATION
TOP VIEW
16 15 14 13
TOP VIEW
NC
NC
1
2
3
4
12 NC
1
2
3
4
5
6
EN/UVLO
FB
GND
DA
BOOST
SW
12 NPG
11 EN2
10 FB2
11
10
9
V
IN
17
GND
13
GND
NPG
EN2
BOOST
SW
9
8
7
OUT2
V
V
CC2
IN
5
6
7
8
MSE PACKAGE
12-LEAD PLASTIC MSOP
θ
= 40°C/W, θ = 5°C/W TO 10°C/W
JC
JA
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
θ
= 58.7°C/W, θ = 7.1°C/W
JC
JA
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3645EUD#PBF
LT3645IUD#PBF
LT3645EMSE#PBF
LT3645IMSE#PBF
LT3645HMSE#PBF
TAPE AND REEL
PART MARKING*
LFVS
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3645EUD#TRPBF
LT3645IUD#TRPBF
LT3645EMSE#TRPBF
LT3645IMSE#TRPBF
LT3645HMSE#TRPBF
16-Lead Plastic QFN
16-Lead Plastic QFN
12-Lead Plastic MSOP
12-Lead Plastic MSOP
12-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
LFVS
3645
3645
3645
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3645f
2
LT3645
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BOOST = 15.3V, VCC2 = 3.3V, OUT2 = 1.8V unless
otherwise noted. (Notes 2, 3)
PARAMETER
CONDITIONS
Rising
MIN
3
TYP
3.4
38.5
1
MAX
3.6
UNITS
l
l
Undervoltage Lockout on V
V
V
V
V
IN
Overvoltage Lockout on V
Rising
36
40
IN
Overvoltage Lockout Hysteresis
Feedback Voltage FB
0.79
0.785
0.8
0.8
0.81
0.813
l
l
l
FB Pin Bias Current
20
0.015
1.4
0.01
750
87
300
nA
%/V
mA
μA
kHz
%
Feedback Voltage Line Regulation
V
IN
V
IN
Quiescent Current
Not Switching
3
2
Quiescent Current in Shutdown
V
= 0.3V, V
= 0V, V
= 0V
EN/UVLO
CC2
OUT2
Switching Frequency
Maximum Duty Cycle
Switch Current Limit
DA Pin Current to Stop Osc
675
83
825
l
100mA Load
Rising (Note 4)
0.8
0.6
1
1.25
1.25
A
1
A
Switch V
I
= 500mA
400
mV
μA
V
CESAT
SW
Switch Leakage Current
2
Minimum Boost Voltage Above Switch
BOOST Pin Current
I
I
I
= 500mA
= 500mA
= 50mA
1.6
10
2.2
18
SW
mA
V
SW
BOOST Schottky Forward Drop
EN/UVLO Threshold High
EN/UVLO Threshold Hysteresis
EN/UVLO Input Current
0.7
1.23
50
0.9
1.29
OUT
Rising
1.17
782
V
mV
V
V
= 5V
= 0V
25
50
1
μA
μA
EN/UVLO
EN/UVLO
Buck Soft-Start Time
0.9
1.1
1.8
1.38
810
300
ms
V
LDO Minimum Input Voltage V
LDO Feedback Voltage FB2
LDO FB2 Bias Current
I
= 200mA, V
= 0.8V, V = 4.0V
OUT2 IN
CC2
LOAD
l
l
797
20
mV
nA
LDO Line Regulation
0.020
–1
%/V
mV
LDO Load Regulation
LDO Dropout Voltage (V
to V
)
I
I
I
= 10mA
= 10mA
= 200mA
45
65
mV
mV
mV
CC2
OUT2
LOAD
LOAD
LOAD
l
145
310
1.1
LDO Dropout Voltage (V to V
)
I
I
= 200mA
= 200mA
1.4
1.7
V
V
IN
OUT2
LOAD
LOAD
l
l
LDO Current Limit
EN2 Pin Threshold
LDO Soft-Start Time
270
mA
mA
210
0.5
l
l
Rising
Falling
1.3
0.8
1.6
V
V
0.6
1.2
0.4
0.5
92
ms
V
NPG V
I
= 1mA, V = V = 850mV
NPG FB FB2
CESAT
NPG Leakage
FB2 NPG Threshold, % of Regulation Voltage
V
V
= 16V, V = V = 750mV
μA
%
NPG
FB
FB2
= 800mV, V Rising
88
90
FB
FB2
3645f
3
LT3645
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BOOST = 15.3V, VCC2 = 3.3V, OUT2 = 1.8V unless
otherwise noted. (Notes 2, 3)
PARAMETER
CONDITIONS
= 800mV, V Rising
MIN
TYP
90
MAX
UNITS
%
FB NPG Threshold, % of Regulation Voltage
NPG Threshold Hysteresis
V
88
92
FB2
FB
25
mV
Note1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3645E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LT3645I is guaranteed over the full
–40°C to 125°C operating temperature range. The LT3645H is guaranteed
over the full –40°C to 150°C operating temperature range. High junction
temperatures degrade operating lifetimes. Operating lifetime is derated at
junction temperatures greater than 125°C.
Note 3: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum junction operating temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may result in
device degradation or failure.
Note 4: Current Measurements are performed when the outputs are not
switching. Slope compensation reduces current limit at high duty cycles.
Note 5: Absolute Maximum Voltage at V and EN/UVLO pins is 55V for
IN
nonrepetitive one second transients, and 36V for continuous operation.
TYPICAL PERFORMANCE CHARACTERISTICS
Buck Minimum Input Voltage,
VOUT = 5V
Efficiency VOUT = 5V
Efficiency VOUT = 3.3V
8.0
7.5
7.0
90
80
70
60
50
90
80
70
60
50
V
V
TO RUN
TO START
IN
IN
6.5
6.0
5.5
5.0
V
IN
V
IN
V
IN
= 7V
= 12V
= 24V
V
V
V
= 7V
= 12V
= 24V
IN
IN
IN
1
100
1000
0
200
300
400
500
10
100
0
200
300
400
500
100
OUTPUT CURRENT (mA)
LOAD CURRENT (mA)
OUTPUT CURRENT (mA)
3645 G03
3645 G02
3645 G01
Buck Minimum Input Voltage,
VOUT = 3.3V
FB Voltage
FB2 Voltage
6.5
6.0
804
803
802
801
800
799
798
797
796
795
794
800
799
V
V
TO RUN
TO START
IN
IN
5.5
5.0
4.5
4.0
3.5
3.0
798
797
796
795
794
1
100
1000
10
–50 –30 –10
70 90 110 130 150
–50
0
100
150
10 30 50
50
OUTPUT CURRENT (mA)
TEMPERATURE (°C)
TEMPERATURE (°C)
3645 G04
3645 G05
3645 G06
3645f
4
LT3645
TYPICAL PERFORMANCE CHARACTERISTICS
Buck Power Switch Voltage Drop
Buck Power Switch Current Limit
Undervoltage Lockout
400
350
300
250
200
150
100
50
1000
950
900
850
800
750
700
650
600
3.8
3.7
3.6
3.5
3.4
3.3
3.2
0
0
50 100 150 200 250 300 350 400 450 500
SWITCH CURRENT (mA)
–50
0
100
150
–50 –30 –10
70 90 110 130 150
50
10 30 50
TEMPERATURE (°C)
TEMPERATURE (°C)
3645 G07
3645 G08
3645 G09
LDO Power Transistor Current
Limit
Overvoltage Lockout
Switching Frequency
800
790
780
770
760
750
740
730
720
340
320
300
280
260
240
220
200
39.5
39.0
38.5
38.0
37.5
37.0
36.5
RISING
FALLING
710
700
–50
0
100
150
–50
0
100
150
50
50
–50
0
100
TEMPERATURE (°C)
150
50
TEMPERATURE (°C)
TEMPERATURE (°C)
3645 G11
3645 G12
3645 G10
LDO Dropout Voltage to VCC2
LDO Dropout Voltage
LDO Load Regulation
350
300
250
200
150
100
50
350
300
250
200
150
100
50
0
–0.02
–0.04
–0.06
–0.08
–0.10
–0.12
–0.14
–0.16
OUT2 = 0.8V
OUT2 = 3.3V
0
0
0
50
LOAD CURRENT (mA)
150
200
–60 –40 –20
0
20 40 60
100 120 140 160
0
50
100
150
200
100
80
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
3645 G13
3645 G14
3645 G15
3645f
5
LT3645
TYPICAL PERFORMANCE CHARACTERISTICS
EN/UVLO Pin Current
EN/UVLO PIN Threshold Voltage
120
100
80
60
40
20
0
1.26
1.25
1.24
1.23
1.22
1.21
RISING
1.20
FALLING
1.18
0
5
10 15 20 25 30 35 40
EN/UVLO PIN VOLTAGE
–50
0
50
100
150
TEMPERATURE (°C)
3645 G16
3645 G17
EN2 Threshold Voltage
NPG Threshold Voltage, FB = 0.8V
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
750
740
730
720
710
700
690
680
670
660
650
RISING
RISING
FALLING
FALLING
–50
0
100
150
50
–50
0
100
150
50
TEMPERATURE (°C)
TEMPERATURE (°C)
3645 G18
3645 G19
3645f
6
LT3645
PIN FUNCTIONS (MSOP/QFN)
EN/UVLO(Pin1/Pin5):TheEN/UVLOpinisusedtoenable
the buck switching regulator and the low dropout linear
regulator(LDO). Anaccuratethresholdof1.23Vallowsthe
user to set the undervoltage lockout point with a simple
resistor divider, see Precision Undervoltage Lockout sec-
tion for more information. The EN/UVLO pin can be tied
V
(Pin 8/Pin 14): The V
pin supplies current to the
CC2
CC2
linear regulator’s output device. The V
pin is also the
CC2
anode of an internal Schottky diode used to generate the
BOOST voltage. The V pin must be tied to a voltage
source greater than 2.5V to utilize the internal Schottky
boost diode. If the V pin is tied to a voltage lower than
2.5V, then an external Schottky diode must be connected
between a power supply greater than 2.5V (anode) and
the BOOST pin (cathode). Bypass this pin to ground with
a 0.1μF capacitor close to the part.
CC2
CC2
directly to V if the UVLO or shutdown is not used.
IN
FB (Pin 2/Pin 6): The FB pin programs the buck output
voltage. The LT3645 regulates the FB pin to 0.8V. The
feedback resistor divider tap should be connected to this
pin. The output voltage is programmed according to the
following equation:
OUT2 (Pin 9/Pin 15): The OUT2 pin is the output of the
LDO. Connect a capacitor of at least 0.47μF from this pin
to ground. See Frequency Compensation (LDO) section
for more details.
V
0.8
⎛
⎞
OUT
R1= R2 •
– 1
⎜
⎝
⎟
⎠
FB2(Pin10/Pin16):TheFB2pinprogramstheLDOoutput
voltage. The LT3645 regulates the FB2 pin to 0.797V. The
feedback resistor divider tap should be connected to this
pin. The output voltage is programmed according to the
following equation:
where R1 connects between OUT and FB and R2 connects
between FB and GND. A good value for R2 is 10k.
GND(Pin3,ExposedPadPin13/Pin7,ExposedPadPin17):
TheGNDpinshouldbetiedtoalocalgroundplanebelowthe
LT3645 and the circuit components. Return the feedback
dividers from FB and FB2 to this pin. The exposed pad
must be soldered to the PCB and electrically connected
to ground. Use a large ground plane and thermal vias to
optimize thermal performance.
V
⎛
⎞
OUT2
R3 = R4 t
– 1
⎜
⎝
⎟
⎠
0.797
where R3 connects between OUT2 and FB2 and R4
connects between FB2 and GND. A good value for R4 is
10k.
DA (Pin 4/Pin 8): The DA pin senses the external catch
diodecurrentandpreventsthebuckregulatorfromswitch-
ing if the sensed current is too high. Connect the anode
of the external Schottky catch diode to this pin.
EN2(Pin11/Pin4):TheEN2pinisusedtoenablethelinear
regulator. Pull this pin above 1.6V to enable the LDO. Pull
EN2 below 0.5V to disable the LDO.
BOOST (Pin 5/Pin 10): The BOOST pin provides a drive
voltage to the internal bipolar NPN power switch. Tie a
0.1μF capacitor between the BOOST and SW pins.
NPG (Pin 12/Pin 3): The NPG pin is an open-collector
output used to indicate that both buck and LDO output
voltages are in regulation. The NPG pin pulls low when
FB and FB2 both exceed 720mV.
SW (Pin 6/Pin 9): The SW pin is the output of the internal
buck power switch. Connect the inductor and the cathode
of the external catch Schottky diode to this pin.
NC (Pins 1, 2, 12, 13, QFN Only): No Connect Pins. Tie
these to ground.
V
(Pin 7/ Pin 11): The V pin supplies current to the
IN
IN
LT3645’s internal circuitry, to the internal buck power
switch, and to the LDO. The V pin must be locally
bypassed.
IN
3645f
7
LT3645
BLOCK DIAGRAM
3645f
8
LT3645
OPERATION
The LT3645 includes a constant frequency, current mode
step-down buck switching regulator together with a low-
dropout regulator (LDO).
The buck power switch (Q1) is driven from the BOOST
pin. An external capacitor and internal diode are used to
generate a voltage at the BOOST pin that is higher than the
input supply, which allows the driver to fully saturate the
internal bipolar NPN power switch for efficient operation.
An external diode can be used to make the BOOST drive
more effective at low output voltages.
If EN/UVLO is less than ~0.7V, both the buck and LDO
are off, the output is disconnected and the input current
is less than 2ꢀA. The buck turns on when EN/UVLO is
greater than 1.23V. An undervoltage lockout (UVLO)
turns the buck and LDO off when V is less than 3.4V.
The oscillator reduces the LT3645’s operating frequency
duringthesoft-startperiod.Thisfrequencyfoldbackhelps
to control the output current during startup.
IN
An overvoltage lockout (OVLO) turns the buck and LDO
off when V is greater than 38.5V. The part will withstand
IN
nonrepetitive one second input voltage transients up to
55V.Aninternalthermalshutdowncircuitmonitorsthedie
temperature and shuts both the buck and LDO off if the
die temperature exceeds ~160°C. The thermal shutdown
has 10 degrees of hysteresis.
The current in the external catch diode (D1) is sensed
through the DA pin. If the catch diode current exceeds
0.9A, the oscillator frequency is decreased. This prevents
current runaway during startup or overload.
The LDO only operates if EN/UVLO is greater than 1.23V
and EN2 is greater than 1.3V. If EN/UVLO is low and EN2
is high, the LDO will not start. When EN2 > 1.3V and EN/
UVLO > 1.23V, the LDO power transistor will turn on and
regulate the output at the OUT2 pin. An error amplifier
driving Q2 has its positive input at the 0.797V reference.
The output of an external resistor divider between OUT2
Aninternalregulatorprovidespowertothecontrolcircuitry
and produces the 0.8V feedback voltage for the buck and
LDO error amplifiers.
An internal, fixed-frequency oscillator in the step-down
regulator enables an RS flip-flop, turning on the internal
power switch Q1. A comparator monitors the current
flowing between the V and SW pins, turning the switch
and ground is tied to the V
pin and presented to the
IN
FB2
off when this current reaches a level determined by the
negative error amp input, forcing the V pin to 0.797V.
FB2
voltageatV andtheinternalslope-compensation.Anerror
ThereferencevoltageoftheLDOerroramplifierisramped
C
amplifier servos the V node. The output of an external
over 600μs during the soft-start period. The LDO power
C
resistor divider between OUT and ground is tied to the
transistor (Q2) is driven from the V pin. Q2 is a bipolar
IN
V
pin and presented to the negative error amp input.
NPN which draws its collector current from the V
pin.
FB
CC2
The positive input to the error amp is a 0.8V reference, so
The NPG pin is an open-collector output that indicates
when both buck and LDO outputs are in at least 90% in
regulation. When FB and FB2 rise above 720mV, the NPG
pin is pulled low.
the voltage loop forces the V pin to 0.8V. The reference
FB
voltage of the buck error amplifier is ramped over 900μs
during the soft-start period. When V rises, it results in an
C
increase in output current, and when V falls, it results in
C
less output current. Current limit is provided by an active
clamp on the V node.
C
3645f
9
LT3645
APPLICATIONS INFORMATION
FB Resistor Networks
voltages up to 55V, but once the input voltage exceeds
36V, the power switch will shut off and stop regulating
the output voltage until the input voltage falls below 36V.
The output voltages are programmed with resistor dividers
between the outputs and the V and V
pins. Choose
FB
FB2
the resistors according to
Minimum On Time
V
0.8
V
©
¹
OUT
The LT3645 will operate at the correct frequency while
R1" R2 t
R3 " R4 t
– 1
ª
«
º
»
the input voltage is below V
. At input voltages
IN(MAX)
that exceed V
, the LT3645 will still regulate the
©
¹
OUT2
IN(MAX)
– 1
ª
º
output properly (up to 38.5V); however, the LT3645 will
skip pulses to regulate the output voltage resulting in
increased output voltage ripple.
«
»
0.797
R2 and R4 should be 20k or less to avoid bias current
errors. In the step-down converter, an optional phase
Figure 1 illustrates switching waveforms for a LT3645
lead capacitor of 22pf between V
light-load ripple.
and V reduces
OUT
FB
application with V
= 1.2V near V
= 21.3V.
OUT
IN(MAX)
Input Voltage Range
SWITCH
VOLTAGE
10V/DIV
The maximum operating input voltage for the LT3645 is
36V. The minimum input voltage is determined by either
the LT3645’s minimum operating voltage of 3.6V or by
its maximum duty cycle. The duty cycle is the fraction of
time that the internal switch is on and is determined by
the input and output voltages:
INDUCTOR
CURRENT
0.5A/DIV
3645 F01
V
V
= 18V
IN
= 1.2V
OUT
OUT
I
= 500mA
= 10μF
C
OUT
DC = (V
+ V )/(V – V + V )
D IN SW D
OUT
L = 10μH
Figure 1.
where V is the forward voltage drop of the catch diode
D
(~0.4V) and V is the voltage drop of the internal switch
SW
As the input voltage is increased, the part is required
to switch for shorter periods of time. Delays associated
with turning off the power switch dictate the minimum on
time of the part. The minimum on time for the LT3645 is
100ns. Figure 2 illustrates the switching waveforms when
(~0.4V at maximum load). This leads to a minimum input
voltage of:
V
= ((V
+ V )/DC
) – V + V
MAX D SW
IN(MIN)
OUT
D
with DC
= 0.83 for the LT3645.
MAX
the input voltage is increased to V = 22V.
IN
The maximum input voltage is determined by the absolute
maximum ratings of the V and BOOST pins. For fixed
IN
SWITCH
VOLTAGE
10V/DIV
frequency operation, the maximum input voltage is de-
termined by the minimum duty cycle, which is:
INDUCTOR
CURRENT
0.5A/DIV
V
= ((V
+ V )/DC ) – V + V
IN(MAX)
OUT D MIN D SW
with DC
= 0.075 for the LT3645.
MIN
3645 F02
V
V
= 22V
Notethatthisisarestrictionontheoperatinginputvoltage
for continuous mode operation. The circuit will continue
to regulate the output up until the overvoltage lockout
input voltage (38.5V). The part will tolerate transient input
IN
= 1.2V
= 500mA
= 10μF
OUT
OUT
OUT
I
C
L = 10μH
Figure 2.
3645f
10
LT3645
APPLICATIONS INFORMATION
Table 1. Inductor Vendors
Vendor
URL
Part Series
Inductance Range (μH)
Size (mm)
Sumida
www.sumida.com
CDRH4D28
CDRH5D28
CDRH8D28
1.2 to 4.7
2.5 to 10
2.5 to 33
4.5 × 4.5
5.5 × 5.5
8.3 × 8.3
Toko
www.toko.com
A916CY
D585LC
2 to 12
1.1 to 39
6.3 × 6.2
8.1 × 8.0
Würth Elektronik
www.we-online.com
WE-TPC(M)
WE-PD2(M)
WE-PD(S)
1 to 10
2.2 to 22
1 to 27
4.8 × 4.8
5.2 × 5.8
7.3 × 7.3
tor MBRA140T3 and Central Semiconductor CMMSH1-40
are good choices, as they are rated for 1A continuous
forward current and a maximum reverse voltage of 40V.
Now the required on time has decreased below the mini-
mum on time of 100ns. Instead of the switch pulse width
becoming narrower to accommodate the lower duty cycle
requirement, the part skips a few pulses so that the aver-
age inductor current meets and does not exceed the load
current requirement.
Input Filter Network
Bypass V with a 1ꢀF or higher ceramic capacitor of X7R
IN
or X5R type. Y5V types have poor performance over tem-
peratureandappliedvoltageandshouldnotbeused.A1ꢀF
ceramic capacitor is adequate to bypass the LT3645 and
will easily handle the ripple current. However, if the input
power source has high impedance, or there is significant
inductance due to long wires or cables, additional bulk
capacitance might be necessary. This can be provided
with a low performance (high ESR) electrolytic capacitor
in parallel with the ceramic device. Step-down regulators
draw current from the input supply in pulses with very
fast rise and fall times. The input capacitor is required to
reduce the resulting voltage ripple at the LT3645 input
and to force this very high frequency switching current
into a tight local loop, minimizing EMI. A 1ꢀF capacitor
is capable of this task, but only if it is placed close to the
LT3645 and catch diode (see the PCB layout section). A
second precaution regarding the ceramic input capacitor
concernsthemaximuminputvoltageratingoftheLT3645.
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (underdamped) tank cir-
cuit. If the LT3645 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possibly
exceeding the LT3645’s voltage rating. This situation can
easily be avoided. For more details, see Linear Technology
Application Note 88.
The LT3645 is robust enough to survive prolonged opera-
tion under these conditions as long as the peak inductor
current does not exceed 1.2A. Inductor saturation due
to high current may further limit performance in this
operating region.
Inductor Selection and Maximum Output Current
Choose the inductor value according to:
L = 2.2 •(V
+ V )/ƒ
D
OUT
where V is the forward voltage drop of the catch diode
D
(~0.4V), f is the switching frequency in MHz and L is in
ꢀH. With this value, there will be no subharmonic oscilla-
tion for applications with 50% or greater duty cycle. For
robustoperationinfaultconditions, thesaturationcurrent
should be above 1.5A. To keep efficiency high, the series
resistance (DCR) should be less than 0.1Ω. Table 1 lists
several inductor vendors. If the buck load current is less
than 500mA, then a lower valued inductor can be used.
Catch Diode
Depending on load current, a 500mA to 1A Schottky diode
is recommended for the catch diode, D1. The diode must
have a reverse voltage rating equal to or greater than the
overvoltagelockoutvoltage(38.5V).TheONSemiconduc-
3645f
11
LT3645
APPLICATIONS INFORMATION
Output Capacitor
BOOST Pin Considerations
The external capacitor C2 and an internal Schottky diode
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated
by the LT3645 to produce the DC output. In this role it
determines the output ripple so low impedance at the
switching frequency is important. The second function
is to store energy in order to satisfy transient loads and
stabilize the LT3645’s control loop.
connected between the V
and BOOST pins form a
CC2
charge pump circuit which is used to generate a boost
voltage that is higher than the input voltage (V ). In most
IN
application circuits where the duty cycle is less than 50%,
use C2 = 0.1μF. If the duty cycle is higher than 50% then
use C2 = 0.22μF.
The BOOST pin must be at least 2.2V above the SW pin
to fully saturate the NPN power switch (Q1). The forward
drop of the internal Schottky diode is 0.8V. This means
Ceramic capacitors have very low equivalent series re-
sistance (ESR) and provide the best ripple performance.
A good value is:
that V
must be tied to a supply greater than 2.6V.
CC2
C
= 26.4/(V
• ƒ)
OUT
OUT
V
may be tied to a supply between 2.2V and 2.6V if an
CC2
where f is the switching frequency in MHz and C
is in
external Schottky diode (such as a BAS70) is connected
from V (anode) to BOOST (cathode).
OUT
μF. This choice will provide low output ripple and good
transient response. C = 10μF is a good choice for
CC2
OUT
If no voltage supply greater than 2.6V is available, then
an external boost Schottky diode can be tied from the
output voltages above 2.5V. For lower output voltages
use 22μF or higher.
V pin (anode) to the BOOST pin (cathode) as shown in
IN
Transient performance can be improved with a high value
capacitor, but a phase lead capacitor across the feedback
resistor R1 may be required to get the full benefit (see the
Compensation section). Using a small output capacitor
results in an increased loop crossover frequency.
Figure3. Inthisconfiguration, theBOOSTcapacitorwillbe
charged to approximately the V voltage, and will change
IN
if V changes. In this configuration the maximum operat-
IN
ing V is 25V, because when V = 25V, then when the
IN
IN
power switch Q1 turns on, V ~ 25V, and since the boost
SW
capacitor is charged to 25V, the BOOST pin will be at 50V.
This connection is not as efficient as the others because
the BOOST pin current comes from a higher voltage.
Use X5R or X7R types and keep in mind that a ceramic
capacitor biased with V
will have less than its nominal
OUT
capacitance.Highperformanceelectrolyticcapacitorscan
beusedfortheoutputcapacitor. LowESRisimportant, so
chooseonethatisintendedforuseinswitchingregulators.
The ESR should be specified by the supplier and should be
0.1Ω or less. Such a capacitor will be larger than a ceramic
capacitor and will have a larger capacitance, because the
capacitor must be large to achieve low ESR.
The minimum operating voltage of an LT3645 application
is limited by the undervoltage lockout (~3.4V) and by
the maximum duty cycle as outlined above. For proper
startup, the minimum input voltage is also limited by the
D2
Table 2 lists several capacitor vendors.
C3
BOOST
LT3645
Table 2. Capacitor Vendors
V
V
OUT
V
SW
IN
IN
AVX
www.avxcorp.com
www.murata.com
www.t-yuden.com
www.vishay.com
www.tdk.com
Murata
GND
3645 F03
Taiyo Yuden
Vishay Siliconix
TDK
V
– V % V
BOOST
SW
BOOST
IN
IN
MAX V
% 2V
Figure 3.
3645f
12
LT3645
APPLICATIONS INFORMATION
boost circuit. If the input voltage is ramped slowly, or if
the LT3645 is turned on with the EN/UVLO pin when the
output is already in regulation, then the boost capacitor
might not be fully charged. Because the boost capacitor is
charged with the energy stored in the inductor, the circuit
will rely on some minimum load current to get the boost
circuit running properly. This minimum load generally
goes to zero once the circuit has started. The worst case
(thermalshutdown).Thesoft-startfortheLDOcanalsobe
reset by pulling the EN2 pin low. The soft-start functions
act to reduce the maximum input current during startup.
Soft-start can not be disabled in the LT3645.
Reversed Input Protection
In some systems, the output will be held high when the
input to the LT3645 is absent. This may occur in bat-
tery charging applications or in battery backup systems
where a battery or some other supply is diode OR’d with
situation is when V is ramping very slowly. Figure 4a
IN
shows the minimum input voltage needed to start a 5V
application versus output current. Figure 4b shows the
minimum input voltage needed to start a 3.3V application
versus output current.
the LT3645’s output. If the V pin is allowed to float and
IN
the EN/UVLO pin is held high (either by a logic signal
or because it is tied to V ), then the LT3645’s internal
IN
circuitry will draw its quiescent current through its SW
pin. This is fine if the system can tolerate a few mA in this
state. You can reduce this current by grounding the EN/
UVLO pin, then the SW pin current will drop to essentially
Soft-Start
The LT3645 includes a 500μs internal soft-start for the
buck converter and a 500μs soft-start for the LDO regula-
tor. Both soft-starts are reset if the EN/UVLO pin is low, if
zero. However, if the V pin is grounded while the output
IN
V drops below 3.4V (undervoltage), if V exceeds 36V
IN
IN
is held high, then parasitic diodes inside the LT3645 can
(overvoltage), orwhenthedietemperatureexceeds160°C
8.0
6.5
V
V
TO RUN
V
V
TO RUN
IN
IN
IN
IN
TO START
TO START
6.0
7.5
7.0
5.5
5.0
4.5
4.0
3.5
3.0
6.5
6.0
5.5
5.0
1
100
1000
10
100
1
1000
10
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
3645 F04a
3645 F04b
(4b) Typical Minimum Input Voltage,
VOUT = 3.3V
(4a) Typical Minimum Input Voltage,
VOUT = 5V
Figure 4.
3645f
13
LT3645
APPLICATIONS INFORMATION
pull large currents from the output through the SW pin
and the V pin. Figure 5 shows a circuit that will run only
IN
G
whentheinputvoltageispresentandthatprotectsagainst
a shorted or reversed input.
OUT
C
OUT
R1
R2
CERAMIC
C
PL
BOOST
ESR
g
m
0.8V
EN/UVLO
SW
DA
+
R
1M
C
LT3645
C
C
D4
ELECTROLYTIC
V
CC2
V
V
IN
IN
3645 F06
BACKUP
FB
g
= 100μA/V
OUT2
FB2
m
G = 1A/V
R
C
= 150k
= 60pF
C
C
EN2
Figure 6. Model for Loop Response
NPG
GND
3645 F05
The error amplifier (g ) is a transconductance type with
m
finite output impedance. The power section, consisting
of the modulator, power switch, and inductor, is modeled
as a transconductance amplifier (G) generating an output
Figure 5. Diode D4 Prevents a Shorted Input from Discharging a
Backup Battery Tied to the Output; It Also Protects the Circuit from
a Reversed Input. The LT3645 Runs Only When the Input Is Present
current proportional to the voltage at the V node. Note
C
that the output capacitor integrates this current, and that
Frequency Compensation (Buck)
the capacitor on the V node (C ) integrates the error
C
C
The LT3645 uses current mode control to regulate the
loop. This simplifies loop compensation. In particular, the
LT3645 does not require the ESR of the output capacitor
for stability, allowing the use of ceramic capacitors to
achieve low output ripple and small circuit size. A low
ESR output capacitor will typically provide for a greater
margin of circuit stability than an otherwise equivalent
capacitor with higher ESR, although the higher ESR will
tend to provide a faster loop response. Figure 6 shows an
equivalent circuit for the LT3645 control loop.
amplifier output current, resulting in two poles in the
loop. R provides a zero. With the recommended output
C
capacitor, the loop crossover occurs above the R C zero.
C C
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. With a larger
ceramiccapacitorthatwillhavelowerESR,crossovermay
be lower and a phase lead capacitor connected across
R1 in the feedback divider may improve the transient
response. Large electrolytic capacitors may have an ESR
3645f
14
LT3645
APPLICATIONS INFORMATION
large enough to create an additional zero, and the phase pinandtheFB2pin. Capacitorsupto1nFcanbeused. This
lead might not be necessary. If the output capacitor is bypass capacitor reduces system noise as well.
differentthantherecommendedcapacitor,stabilityshould
Extra consideration must be given to the use of ceramic
becheckedacrossalloperatingconditions,includinginput
capacitors. Ceramic capacitors are manufactured with a
voltage and temperature.
variety of dielectrics, each with different behavior across
Figure7showsthetransientresponseoftheLT3645witha temperature and applied voltage. The most common
few output capacitor choices. The output is 3.3V. The load dielectrics used are specified with EIA temperature char-
current is stepped from 0.25A to 0.5A and back to 0.25A, acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
and the oscilloscope traces show the output voltage. The Y5V dielectrics are good for providing high capacitances
upper photo shows the recommended value. The second in a small package, but they tend to have strong voltage
photo shows the improved response (faster recovery) and temperature coefficients as shown in Figures 8 and 9.
resulting from a phase lead capacitor.
When used with a 5V regulator, a 16V 10ꢀF Y5V capaci-
tor can exhibit an effective value as low as 1ꢀF to 2ꢀF
for the DC bias voltage applied and over the operating
No Phase Lead Capacitor
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
0
X5R
–20
–40
With Phase Lead Capacitor
–60
Y5V
–80
–100
0
8
12 14
2
4
6
10
16
DC BIAS VOLTAGE (V)
3645 F08
Figure 8. Ceramic Capacitor DC Bias Characteristics
Figure 7.
40
20
Frequency Compensation (LDO)
TheLT3645LDOrequiresanoutputcapacitorforstability.
It is designed to be stable with most low ESR capacitors
(typically ceramic, tantalum or low ESR electrolytic). A
minimum output capacitor of 2.2ꢀF with an ESR of 0.5Ω
or less is recommended to prevent oscillations. Larger
values of output capacitance decrease peak deviations
and provide improved transient response for larger load
current changes. Bypass capacitors, used to decouple
individual components powered by the LT3645, increase
the effective output capacitor value. For improvement in
transient performance, place a capacitor across the OUT2
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
–100
–50 –25
0
25
50
TEMPERATURE (°C)
75
100 125
3645 F09
Figure 9. Ceramic Capacitor Temperature Characteristics
3645f
15
LT3645
APPLICATIONS INFORMATION
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values. Care still must be exercised
when using X5R and X7R capacitors; the X5R and X7R
codesonlyspecifyoperatingtemperaturerangeandmaxi-
mum capacitance change over temperature. Capacitance
change due to DC bias with X5R and X7R capacitors
is better than Y5V and Z5U capacitors, but can still be
significant enough to drop capacitor values below ap-
propriate levels. Capacitor DC bias characteristics tend to
improve as component case size increases, but expected
capacitanceatoperatingvoltageshouldbeverified.Voltage
and temperature coefficients are not the only sources of
problems. Some ceramic capacitors have a piezoelectric
response. A piezoelectric device generates voltage across
its terminals due to mechanical stress, similar to the way
apiezoelectricmicrophoneworks.Foraceramiccapacitor
the stress can be induced by vibrations in the system or
thermal transients.
With the resistor divider connected, the part will only
operate at input voltages greater than V
. Note that
IN(MIN)
the resistor divider will always draw current from V . To
IN
reduce this current, the user might use large value resis-
tors for R7 and R8. This is acceptable as long as R7 and
R8 are selected such that they can supply 10μA to the
EN/UVLO pin. A good value for R8 is 100k.
Output Voltage Sequencing
There are a few applications available for sequencing the
buck and LDO output voltages. In Figures 11 and 12, the
buckoutput(OUT1)isprogrammedto3.3V, whiletheLDO
output (OUT2) is programmed to 1.8V.
Figure11showsastandardconfigurationwhereOUT1and
OUT2 come up as soon as possible. In this configuration,
4.7μH
OUT1
SW
LT3645
31.6K
10K
DA
FB
10μF
Precision Undervoltage Lockout
The EN/UVLO pin has an accurate 1.23V threshold that
can be used to shutdown the part when the input voltage
drops below a specified level. To perform this function, a
V
CC2
EN2
resistor divider between the EN/UVLO pin and the V pin
IN
OUT2
OUT2
can be tied as shown in Figure 10. The resistor values can
be determined from the following equation:
12.4k
10k
FB2
2.2μF
V
©
¹
IN(MIN)
R7 " R8 t
– 1
ª
«
º
»
1.23V
3645 F11
EN/UVLO
20V/DIV
V
V
IN
IN
OUT1
5V/DIV
LT3645
R7
R8
OUT2
2V/DIV
EN/UVLO
GND
NPG
5V/DIV
500μs/DIV
3645 F10
Figure 11. OUT1 and OUT2 Come Up as Soon as Possible
Figure 10. Precision UVLO Circuit
3645f
16
LT3645
APPLICATIONS INFORMATION
there is a small delay before OUT2 begins ramping up as
When both OUT2 and the buck output are in regulation,
the NPG pin will pull low, turning on PFET P1 and sup-
plying power to OUT1.
OUT2 has to wait until V is above 2V before power can
CC2
be supplied to OUT2.
Figure12utilizestheNPGpintosequencetheoutputssuch
that OUT1 comes into regulation after OUT2 is already in
regulation. When the part is off, the buck output, OUT1
and OUT2 will be 0V. The NPG pin will be high impedance,
PFET P1 will be off and OUT1 will be disconnected from
the buck output. When the part is turned on, first the buck
output will come up to 3.3V. Once the Buck output is in
regulation, the LDO output, OUT2 will come up to 1.8V.
The NPG pin is capable of sinking 1mA and will pull the
gate of P1 down to 300mV. Therefore R9 should be chosen
such that:
R9 < (V
– 300mV)/1mA
OUT1
Where R7 is in Ω. For a 3.3V buck output application,
PFET P1 must be able to source 300mA to OUT1 from
the buck output with ~3V of gate drive. Note that PFET
4.7μH
SW
BUCK OUTPUT
P1
OUT1
LT3645
DA
R9
31.6K
31.6K
0.1μF
10μF
FB
10K
V
CC2
EN2
NPG
OUT2
OUT2
12.4k
10k
FB2
2.2μF
3645 F12
EN/UVLO, 20V/DIV
BUCK OUTPUT, 5V/DIV
OUT1, 5V/DIV
OUT2
2V/DIV
NPG
5V/DIV
500μs/DIV
Figure 12. OUT2 Comes Up Before OUT1
3645f
17
LT3645
APPLICATIONS INFORMATION
P1 has a finite on-resistance which will result in power
dissipation and some loss in efficiency. For higher buck
output voltage applications, a smaller PFET may be used
since the gate drive will be higher.
on that layer. Place a local, unbroken ground plane below
these components, and tie this ground plane to system
ground at one location (ideally at the ground terminal of
theoutputcapacitorC1).TheSWandBOOSTnodesshould
be kept as small as possible. Finally, keep the FB nodes
small so that the ground pin and ground traces will shield
them from the SW and BOOST nodes. Include vias near
the exposed GND pad of the LT3645 to help remove heat
from the LT3645 to the ground plane.
PCB Layout
ForproperoperationandminimumEMI,caremustbetaken
during printed circuit board layout. Figure 13 shows the
recommended component placement with trace, ground
plane, and via locations.
High Temperature Considerations
Note that large, switched currents flowintheLT3645’sV
IN
The die temperature of the LT3645 must be lower than
the maximum rating of 125°C (150°C for H-grade). This
is generally not a concern unless the ambient tempera-
ture is above 85°C. For higher temperatures, extra care
should be taken in the layout of the circuit to ensure good
heat sinking at the LT3645. The maximum load current
shouldbederatedastheambienttemperatureapproaches
125°C.Thedietemperatureiscalculatedbymultiplyingthe
LT3645 power dissipation by the thermal resistance from
junction to ambient. Power dissipation within the LT3645
can be estimated by calculating the total power loss from
anefficiencymeasurementandsubtractingthecatchdiode
loss. The resulting temperature rise at full load is nearly
independentofinputvoltage.Thermalresistancedepends
upon the layout of the circuit board, but 68°C/W is typical
for the QFN (UD) package, and 40°C/W is typical for the
MSE package. Thermal shutdown will turn off the Buck
and LDO when the die temperature exceeds 160°C, but
it is not a warrant to allow operation at die temperatures
exceeding 125°C (150°C for H-grade).
and SW pins, the catch diode (D1), and the input capacitor
(C1). The loop formed by these components should be as
small as possible and tied to system ground in only one
place. These components, along with the inductor and
output capacitor, should be placed on the same side of the
circuit board, and their connections should be made on
thatlayer.Placealocal,unbrokengroundsystemgroundin
onlyoneplace.Thesecomponents,alongwiththeinductor
and output capacitor, should be placed on the same side
of the circuit board, and their connections should be made
OUT1
OUT2
EN/UVLO
NPG EN2
C3
C4
R2
R4
FB1
SW
FB2
R1
R3
C2
C5
V
BOOST
D1
CC2
V
IN
C1
Other Linear Technology Publications
Application Notes 19, 35, and 44 contain more detailed
descriptions and design information for step-down regu-
lators and other switching regulators. The LT1376 data
sheet has an extensive discussion of output ripple, loop
compensation, and stability testing. Design Note 318
shows how to generate a bipolar output supply using a
step-down regulator.
DA
V
IN
MAIN PCB
BOARD
POWER
L1
+
3645 F13
VIA TO LOCAL GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE
Figure 13.
3645f
18
LT3645
TYPICAL APPLICATIONS
5V Step-Down Converter with 3.3V Logic Rail
0.1μF
BOOST
LT3645
15μH
5V
300mA
V
SW
12V
ON OFF
PGOOD
IN
1μF
52.3k
10k
MBRM140
DA
FB
10μF
EN/UVLO
NPG
EN2
V
CC2
3.3V
200mA
OUT2
31.6k
2.2μF
FB2
GND
10k
3645 TA02
3.3V Step-Down Converter with 1.8V Logic Rail
0.1μF
BOOST
LT3645
10μH
3.3V
300mA
V
SW
12V
ON OFF
PGOOD
IN
1μF
31.6k
10k
MBRM140
DA
FB
10μF
EN/UVLO
NPG
EN2
V
CC2
1.8V
200mA
OUT2
12.4k
2.2μF
FB2
GND
10k
3645 TA03
3645f
19
LT3645
TYPICAL APPLICATIONS
3.3V Step-Down Converter with 1.8V Core Rail
0.1μF
L1
10μH
BOOST
LT3645
OUT1
3.3V
V
SW
12V
IN
300mA
1μF
31.6k
10k
31.6K
0.1μF
DA
FB
10μF
EN/UVLO
ON OFF
EN2
V
CC2
NPG
OUT2
1.8V
200mA
OUT2
FB2
12.4k
2.2μF
GND
10k
3645 TA04
2.5V Step-Down Converter with 1.2V Logic Rail
BAT85
0.1μF
BOOST
LT3645
4.7μH
2.5V
300mA
V
SW
12V
ON OFF
PGOOD
IN
1μF
21.5k
10k
MBRM140
DA
FB
10μF
EN/UVLO
NPG
EN2
V
CC2
1.2V
200mA
OUT2
4.99k
2.2μF
FB2
GND
10k
3645 TA05
3645f
20
LT3645
TYPICAL APPLICATIONS
3.3V Step-Down Converter with 5V Logic Rail
0.1μF
BOOST
LT3645
6.8μH
3.3V
450mA
V
SW
12V
ON OFF
PGOOD
IN
1μF
31.6k
10k
MBRM140
DA
FB
10μF
EN/UVLO
NPG
EN2
V
5.5V
CC2
5V
50mA
0.1μF
OUT2
52.3k
2.2μF
FB2
GND
10k
3645 TA06
3645f
21
LT3645
PACKAGE DESCRIPTION
MSE Package
12-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 t 0.102
(.112 t .004)
2.845 t 0.102
(.112 t .004)
0.889 t 0.127
(.035 t .005)
1
6
0.35
REF
5.23
(.206)
MIN
1.651 t 0.102
(.065 t .004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
12
4.039 t 0.102
7
NO MEASUREMENT PURPOSE
0.65
(.0256)
BSC
0.42 t 0.038
(.0165 t .0015)
(.159 t .004)
TYP
(NOTE 3)
0.406 t 0.076
RECOMMENDED SOLDER PAD LAYOUT
(.016 t .003)
12 11 10 9 8 7
REF
DETAIL “A”
0.254
(.010)
3.00 t 0.102
(.118 t .004)
(NOTE 4)
0s – 6s TYP
4.90 t 0.152
(.193 t .006)
GAUGE PLANE
0.53 t 0.152
(.021 t .006)
1
2 3 4 5 6
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.1016 t 0.0508
(.004 t .002)
MSOP (MSE12) 0910 REV D
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3645f
22
LT3645
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 p0.05
3.50 p 0.05
2.10 p 0.05
1.45 p 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 p0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 s 45o CHAMFER
R = 0.115
TYP
0.75 p 0.05
3.00 p 0.10
(4 SIDES)
15 16
PIN 1
TOP MARK
(NOTE 6)
0.40 p 0.10
1
2
1.45 p 0.10
(4-SIDES)
(UD16) QFN 0904
0.200 REF
0.25 p 0.05
0.00 – 0.05
0.50 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3645f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However,noresponsibilityisassumedforitsuse.LinearTechnologyCorporationmakesnorepresenta-
t ion th a t the in ter c onne c t ion of i t s cir cui t s a s de s cr ibed her ein w ill not in fr inge on ex is t ing p a ten t r igh t s.
23
LT3645
TYPICAL APPLICATION
1.8V Step-Down Converter with 0.8V Logic Rail
0.1μF
BOOST
LT3645
4.7μH
1.8V
500mA
V
SW
12V
IN
1μF
12.4k
10k
MBRM140
DA
FB
10μF
EN/UVLO
NPG
ON OFF
EN2
V
PGOOD
CC2
+
–
0.8V
200mA
3V
OUT2
0.1μF
V
2.2μF
FB2
ALTERNATE
POWER SOURCE
GND
3645 TA07
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PART NUMBER DESCRIPTION
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Q SD
IN
3mm × 3mm QFN-12
40V, 350mA (I ), 2.2MHz, High Efficiency
V : 4.2V to 40V, V
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Q SD
OUT
IN
OUT(MIN)
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Quiescent Current
LT3990
62V, 350mA (I ), 2.2MHz, High Efficiency
V : 4.2V to 40V, V
= 1.21V, I = 2.5μA, I < 1μA, 3mm × 3mm DFN-10,
Q SD
OUT
IN
OUT(MIN)
Step-Down DC/DC Converter with Only 2.5μA of MSOP-10
Quiescent Current
LT3791
LT3991
LT3480
38V, 1.2A, 2.2MHz High Efficiency MicroPower V : 4.3V to 38V, V
= 1.2V, I = 2.8mA, I < 1μA, 3mm × 3mm DFN-10,
Q SD
IN
OUT(MIN)
OUT(MIN)
OUT(MIN)
Step-Down DC/DC Converter with I = 2.8μA
MSOP-10E
Q
55V, 1.2A, 2.2MHz High Efficiency MicroPower V : 4.3V to 55V, V
= 1.2V, I = 2.8mA, I < 1μA, 3mm × 3mm DFN-10,
IN
Q
SD
Step-Down DC/DC Converter with I = 2.8μA
MSOP-10E
Q
36V with Transient Protection to 60V, 2A (I ), V : 3.6V to 38V, V
= 0.78V, I = 70μA, I < 1μA, 3mm × 3mm DFN-10,
Q SD
OUT
IN
2.4MHz, High Efficiency Step-Down DC/DC
MSOP-10E
Converter with Burst Mode® Operation
LT3685
36V with Transient Protection to 60V, 2A (I ), V : 3.6V to 38V, V
= 0.78V, I = 70μA, I < 1μA, 3mm × 3mm DFN-10,
OUT(MIN) Q SD
OUT
IN
2.4MHz, High Efficiency Step-Down DC/DC
MSOP-10E
Converter
3645f
LT 0511 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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