LT3690HUFE#PBF [Linear]
LT3690 - 36V, 4A, 1.5MHz Synchronous Step-Down Switching Regulator with 70µA Quiescent Current; Package: QFN; Pins: 26; Temperature Range: -40°C to 125°C;
| 型号： | LT3690HUFE#PBF |
| 厂家： | 
Linear |
| 描述： | LT3690 - 36V, 4A, 1.5MHz Synchronous Step-Down Switching Regulator with 70µA Quiescent Current; Package: QFN; Pins: 26; Temperature Range: -40°C to 125°C 开关 |
| 文件： | 总30页 (文件大小：1184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3690
36V, 4A, 1.5MHz Synchronous
Step-Down Switching Regulator
with 70µA Quiescent Current
DescripTion
FeaTures
n
Wide Input Range:
The LT®3690 is an adjustable frequency monolithic buck
switching regulator that accepts input voltages up to 36V.
A high efficiency 90mΩ switch is included on the device
along with the boost diode and the necessary oscillator,
control,andlogiccircuitry.Theinternalsynchronouspower
switch of 30mΩ increases efficiency and eliminates the
need for an external Schottky catch diode. Current mode
topology is used for fast transient response and good
loop stability. Shutdown reduces input supply current to
less than 1µA. The low ripple Burst Mode maintains high
efficiency at low output currents while keeping output
ripple below 15mV in typical applications.
– Operation from 3.9V to 36V
– Overvoltage Lockout Protects Circuits
Through 60V Transients
n
4A Maximum Output Current
n
Integrated 30mΩ N-Channel Synchronous Switch
Low Ripple (<15mV ) Burst Mode® Operation:
Q
Programmable Input Undervoltage Lockout
0.8V Feedback Reference Voltage
Output Voltage: 0.8V to 20V
Programmable and Synchronizable Oscillator
(170kHz to 1.5MHz)
Soft-Startup and Output Voltage Tracking
Short-Circuit Robust
Power Good Flag
n
P-P
I = 70µA at 12V to 3.3V
IN
OUT
n
n
n
n
The LT3690 features robust operation and is easily con-
figurable.UsingaresistordividerontheUVLOpinprovides
a programmable undervoltage lockout. A power good flag
n
n
n
n
signals when V
reaches 90% of the programmed out-
OUT
Small Thermally Enhanced 4mm × 6mm QFN Package
put voltage. Protection circuitry senses the current in the
powerswitchestoprotecttheLT3690againstshort-circuit
conditions. Frequency foldback and thermal shutdown
provide additional protection. The LT3690 is available in
a 4mm × 6mm QFN package with exposed pads for low
thermal resistance.
applicaTions
n
Automotive Systems
n
Industrial Supplies
n
Distributed Supply Regulation
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
3.3V Step-Down Converter
Efficiency and Power Loss
V
IN
100
90
80
70
60
50
2.5
2.0
1.5
1.0
0.5
0
0.68µF
4.5V TO 36V
V
= 5V
OUT
V
EN
BST
SW
BIAS
PG
10µF
IN
3.3µH
3.3V
4A
V
= 3.3V
OUT
UVLO
SS
LT3690
V
= 5V
OUT
V
V
C
316k
102k
V
= 3.3V
OUT
FB
CCINT
22k
0.47µF
SYNC
RT
V
= 12V
IN
100µF
L = 4.7µH
GND
680pF
ƒ = 600kHz
32.4k
ƒ = 600kHz
0
0.5
1
1.5
2
2.5
3
3.5
4
3690 TA01a
LOAD CURRENT (A)
3690 TA01b
3690fb
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For more information www.linear.com/LT3690
LT3690
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
EN, UVLO, V Voltage (Note 2) ................................60V
IN
BST Voltage .............................................................55V
BST Voltage Above SW Voltage ...............................30V
BIAS, PG Voltage . ....................................................30V
SW
SW
SW
SW
SW
SW
BST
GND
V
1
2
26
25
24
23
22
21
20
19
18
17
27
SW
SW
3
FB, RT, SS, SYNC, V , V
Voltage ........................6V
C
CCINT
SW
4
Operating Junction Temperature Range (Notes 3 and 4)
LT3690E ........................................... –40°C to 125°C
LT3690I ............................................ –40°C to 125°C
LT3690H ........................................... –40°C to 150°C
LT3690MP ........................................ –55°C to 150°C
Storage Temperature Range ................. –65°C to 150°C
SYNC
GND
RT
5
6
7
CCINT
28
GND
V
C
BIAS
PG
8
FB
9
GND
EN
10
UFE PACKAGE
26-LEAD (4mm × 6mm) PLASTIC QFN
θ
JA
= 40°C/W, θ = 2.7°C/W
JC
EXPOSED PAD (PIN 27) IS SW, MUST BE SOLDERED TO PCB
EXPOSED PAD (PIN 28) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LT3690EUFE#PBF
LT3690IUFE#PBF
LT3690HUFE#PBF
LT3690MPUFE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3690EUFE#TRPBF
LT3690IUFE#TRPBF
LT3690HUFE#TRPBF
LT3690MPUFE#TRPBF
3690
3690
3690
3690
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
26-Lead (4mm × 6mm) Plastic QFN
26-Lead (4mm × 6mm) Plastic QFN
26-Lead (4mm × 6mm) Plastic QFN
26-Lead (4mm × 6mm) Plastic QFN
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
3690fb
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For more information www.linear.com/LT3690
LT3690
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V unless otherwise noted (Notes 3, 7).
PARAMETER
CONDITIONS
MIN
TYP
3.0
38.2
0.1
35
MAX
3.9
40
UNITS
V
l
l
V
V
Fixed Undervoltage Lockout
Overvoltage Lockout OVLO
IN
IN
V
V
V
V
V
V
V
Rising
= 0.2V
36
V
IN
Quiescent Current from V
1
µA
µA
µA
µA
µA
µA
mV
V
IN
EN
l
l
l
= 3V, V = 0.85V Not Switching
60
BIAS
BIAS
FB
= 0V, V = 0.85V Not Switching
110
0.1
70
150
1
FB
Quiescent Current from BIAS Pin
= 0.2V
EN
= 3V, V = 0.85V Not Switching
110
–10
950
2.3
140
6
BIAS
BIAS
BIAS
FB
= 0V, V = 0.85V Not Switching
–3
FB
Boost Schottky Diode Drop (V
– V
)
BST
I
= 200mA
820
1.6
70
BIAS
BST Voltage (Note 5) (V
BST Pin Current
– V
)
Minimum BOOST Voltage Above SW, I = 4A
SW
BST
SW
I
= 4A
mA
µA
mV
A
SW
BST Pin Leakage
V
= 12V, V
= 4A
= 0V
0.1
370
6.6
0.1
SW
BIAS
HS Switch Drop (V – V
)
I
SW
600
8
IN
SW
HS Switch Current Limit (Note 6)
HS Switch Leakage Current
HS Minimum Switch Off-Time
LS Switch Off Voltage Drop
LS Switch On-Resistance
5.5
V
SW
= 0V
2
µA
ns
mV
mΩ
mΩ
A
l
210
850
60
I
I
I
= 4A
700
30
30
5
SW
= 4A, V
= 4A, V
= 5V
= 4V
SW
SW
CCINT
CCINT
LS Switch On-Resistance
90
LS Switch Current Threshold
LS Switch Leakage Current
4
6.5
10
V
V
= 0V, V = 12V, V
= 12V
0.1
µA
µA
V
EN
SW
BST
= 0V, V = 12V, V
= 12V, T = 125°C
95
EN
SW
BST
J
V
V
Pin Output Voltage
Pin Output Voltage
I
I
= 0µA
4.3
4.2
4.9
4.8
8
5.3
5.3
15
CCINT
CCINT
VCCINT
VCCINT
= –10mA
V
EN Input Current
V
V
= 12V
µA
µA
V
EN
EN
= 2.5V
2.5
6
EN Input Voltage, Enable
EN Input Voltage, Disable
UVLO Threshold Voltage
UVLO Pin Current
1.5
1.1
0.4
1.33
–3.8
1
V
V
V
V
= 1.33V
= 1.1V
–2.0
0.1
2
µA
µA
µA
µA
mV
V
UVLO
UVLO
UVLO
UVLO Pin Current
UVLO Pin Current Hysteresis
Pull-Up Current at SS Pin
I
at 1.1V – I
at 1.33V
1.2
–1.2
–4
2.8
–2.8
15
UVLO
V
SS
V
SS
= 0.8V
= 0.4V
–2
7
Tracking Offset (V – V
)
FB
SS
SYNC Input Voltage High
SYNC Input Voltage Low
0.8
0.4
600
1.5
V
SYNC Input Resistance to GND
SYNC Input Frequency
150
300
kΩ
MHz
0.17
Feedback Reference Voltage
792
786
800
800
808
814
mV
mV
l
l
FB Pin Bias Current Flows Out of Pin
FB Voltage Line Regulation
V
= 800mV
–8
–40
nA
FB
3.6V < V < 36V
0.001
0.01
%/V
IN
3690fb
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For more information www.linear.com/LT3690
LT3690
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V unless otherwise noted (Notes 3, 7).
PARAMETER
CONDITIONS
MIN
TYP
90
MAX
UNITS
%
PG Threshold as Percentage of V
PG Hysteresis
V
Rising
88
92
FB
FB
12
mV
µA
l
PG Sink Current
PG Leakage
V
V
= 0.3V
= 5V
100
500
0.1
400
60
PG
PG
1
µA
Error Amplifier Transconductance
Error Amp Voltage Gain
µA/V
dB
V Source Current
–50
50
µA
C
V Sink Current
C
µA
V Pin to Switch Current Gain
4.6
A/V
C
Transconductance
V Switching Threshold
0.7
2.0
1.5
750
138
V
V
C
V Clamp Voltage
C
Programmable Switching Frequency
R = 10kΩ
1.32
660
122
1.68
840
154
MHz
kHz
kHz
T
R = 24.9kΩ
T
R = 180kΩ
T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability.
Note 2: Absolute maximum voltage at the EN, UVLO and V pins is 36V
IN
for continuous operation. For non-repetitive 1 second transients while
T < 125°C, the absolute maximum voltage is 60V.
Note 5: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the switch.
J
Note 3: The LT3690E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3690I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3690H is guaranteed over the full –40°C to
150°C operating junction temperature range. The LT3690MP is guaranteed
over the full –55°C to 150°C operating junction temperature range. High
junction temperatures degrade operating lifetime. Operating lifetime is
derated at junction temperatures greater than 125°C.
Note 6: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at higher duty cycles. Current
limit reduced when feedback voltage is below the reference voltage.
Note 7: The voltages are referred to GND and currents are assumed
positive, when the current flows into the pin. Negative magnitudes are
shown as maximum.
3690fb
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LT3690
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Efficiency and Power Loss
Efficiency and Power Loss
100
90
80
70
60
50
40
3.0
2.5
2.0
1.5
1.0
0.5
0
100
90
80
70
60
50
40
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 5V
OUT
V
= 3.3V
OUT
L = 4.7µH
L = 3.3µH
ƒ = 600kHz
ƒ = 500kHz
V
V
V
= 12V
= 24V
= 34V
IN
IN
IN
V
V
V
= 12V
= 24V
= 34V
IN
IN
IN
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
3.5
4
LOAD CURRENT (A)
LOAD CURRENT (A)
3690 G01
3690 G02
Efficiency and Power Loss
Efficiency and Power Loss
No Load Supply Current vs VIN
160
140
120
100
80
100
90
80
70
60
50
40
3.0
2.5
2.0
1.5
100
90
80
70
60
50
40
30
20
10
0
3.0
2.4
1.8
1.2
0.6
0
V
OUT
= 3.3V, L = 3.3µH, ƒ = 600kHz
V
= 3.3V
OUT
V
IN
V
IN
V
IN
= 12V
= 24V
= 34V
EFFICIENCY
60
V
= 3.3V
1.0
0.5
0
OUT
L = 3.3µH
40
ƒ = 600kHz
POWER LOSS
V
V
V
= 12V
= 24V
= 34V
IN
IN
IN
20
0
0
5
10
15
20
25
30
35
0
0.5
1
1.5
2
2.5
3
3.5
0.0001 0.0010 0.0100 0.1000 1.0000 10.0000
INPUT VOLTAGE (V)
LOAD CURRENT (A)
LOAD CURRENT (A)
3690 G03
3690 G03a
3690 G04
No Load Supply Current
vs Temperature
Maximum Load Current vs VIN
Maximum Load Current vs VIN
200
150
100
50
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
V
= 5V
V
= 3.3V
V
V
= 12V
OUT
OUT
IN
OUT
L = 4.7µH
L = 4.7µH
= 3.3V
ƒ = 600kHz
ƒ = 600kHz
TYPICAL
TYPICAL
MINIMUM
MINIMUM
0
–50 –25
0
25 50 75 100 125 150
5
10
15
20
25
30
35
5
10
15
20
25
30
35
TEMPERATURE (°C)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3690 G05
3690 G06
3690 G07
3690fb
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LT3690
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Switch Current Limit
vs Duty Cycle
Switch Current Limit
vs Temperature
Switch Voltage Drop vs ISW
0.6
0.5
0.4
0.3
0.2
0.1
0
8
7
6
5
4
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
DUTY CYCLE = 10%
V
> 0.75V
FB
DUTY CYCLE = 90%
V
= 0V
FB
0
1
2
3
4
5
6
0
20
40
60
80
100
–50 –25
0
25 50 75 100 125 150
SWITCH CURRENT (A)
DUTY CYCLE (%)
TEMPERATURE (°C)
3690 G09
3690 G10
3690 G08
Boost Diode Drop (VBIAS – VBST
vs IBST
)
Catch Diode Voltage Drop
(VGND – VSW) vs ISW
BST Pin Current vs ISW
8
7
6
5
4
3
2
1
0
120
100
80
60
40
20
0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
0
1
2
3
4
5
6
0
0.5
1
1.5
2
2.5
VOLTAGE DROP (V)
SWITCH CURRENT (A)
BST DIODE CURRENT (A)
3690 G13
3690 G11
3690 G12
Minimum Input Voltage
vs Load Current
Minimum Input Voltage
vs Load Current
Maximum VIN for Fixed Frequency
40
35
30
25
20
15
10
5
6.5
6.0
5.5
5.0
4.5
4.0
5.0
4.5
4.0
3.5
3.0
2.5
V
= 5V
V
= 3.3V
OUT
OUT
L = 4.7µH
L = 4.7µH
ƒ = 600kHz
ƒ = 600kHz
LIMITED BY
T = 125°C
J
V
= 3.3V
OUT
L = 3.3µH
ƒ = 600kHz
V
SYNC
V
SYNC
V
SYNC
V
SYNC
> 0.8V, T = 25°C
A
> 0.8V, T = 85°C
A
< 0.4V, T = 25°C
A
< 0.4V, T = 85°C
A
0
0
1
2
3
4
1
10
100
1000
10000
1
10
100
1000
10000
SWITCH CURRENT (A)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3690 G16
3690 G14
3690 G15
3690fb
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LT3690
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
EN Threshold Voltage
vs Temperature
UVLO Threshold Voltage
vs Temperature
EN Pin Current vs VEN
2.5
2.0
1.5
1.0
0.5
0
10
8
2.5
2.0
1.5
1.0
0.5
0
6
4
2
0
–50 –25
0
25 50 75 100 125 150
0
5
10
15
20
25
30
35
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
EN PIN VOLTAGE (V)
TEMPERATURE (°C)
3690 G19
3690 G17
3690 G18
UVLO Pin Current vs Temperature
(VUVLO = 1.33V)
Power Good Threshold
vs Temperature
Feedback Voltage vs Temperature
95
90
85
80
75
–1.2
–1.4
–1.6
–1.8
–2.0
–2.2
–2.4
–2.6
–2.8
0.82
0.81
0.80
0.79
0.78
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3690 G22
3690 G21
3690 G20
VC Voltages vs Temperature
Frequency Foldback vs VFB
Error Amp Output Current vs VFB
60
40
2.5
2.0
1.5
1.0
0.5
0
800
700
600
500
400
300
200
100
0
R
T
= 32.4k
CURRENT LIMIT CLAMP
20
0
–20
–40
–60
SWITCHING THRESHOLD
0.6
0.7
0.8
0.9
1.0
–50 –25
0
25 50 75 100 125 150
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
FB PIN VOLTAGE (V)
TEMPERATURE (°C)
FB PIN VOLTAGE (V)
3690 G24
3690 G23
3690 G25
3690fb
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LT3690
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Switching Frequency
vs Temperature
Minimum Switch On-Time
vs Temperature
Soft-Start Pin Current
vs Temperature
–1.2
650
630
610
590
570
550
240
200
160
120
80
R
T
= 32.4k
–1.4
–1.6
–1.8
–2.0
–2.2
–2.4
–2.6
–2.8
40
0
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3690 G26
3690 G28
3690 G27
VCCINT vs VIN
VVCCINT Current Limit
VCCINT Pin Voltage
5
4
3
2
1
0
5
4
3
2
1
0
0
–10
–20
–30
–40
–50
–50 –25
0
25 50 75 100 125 150
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
TEMPERATURE (°C)
V
PIN VOLTAGE (V)
V
PIN VOLTAGE (V)
CCINT
IN
3690 G31
3690 G29
3690 G30
Switching Waveforms, Transition
from Burst Mode Operation to Full
Frequency
Switching Waveforms,
Burst Mode Operation
Switching Waveforms, Full
Frequency Continuous Operation
V
SW
V
SW
V
SW
5V/DIV
5V/DIV
5V/DIV
I
L
I
L
I
1A/DIV
L
0.5A/DIV
0.5A/DIV
V
V
OUT
OUT
V
OUT
10mV/DIV
10mV/DIV
10mV/DIV
3690 G34
3690 G32
3690 G33
1µs/DIV
= 2A
5µs/DIV
= 20mA
FRONT PAGE APPLICATION
1µs/DIV
= 200mA
LOAD
FRONT PAGE APPLICATION
V
= 12V, I
V
= 12V, I
V
= 12V, I
LOAD
IN
LOAD
IN
IN
FRONT PAGE APPLICATION
3690fb
8
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LT3690
pin FuncTions
SW (Pins 1-4, 23-26, Exposed Pad Pin 27): The SW pin
is the emitter output of the internal highside NPN power
switch (HS) and the drain output of the internal lowside
power N-channel switch (LS). Connect this pin to the
inductor and boost capacitor. This pin is driven up to the
and thermal shutdown, the SS pin pulls low if the output
voltage is below the power good threshold to restart the
output voltage with soft-start behavior. If driving this pin
from a digital output, use at least 10k in series. Leave this
pin disconnected if unused.
V
IN
voltage by the HS switch during the on-time of the
UVLO (Pin 12): Tie a resistor divider between V , UVLO,
IN
PWM duty cycle. The inductor current drives the SW pin
negative during the off-time. The on-resistance of the LS
switch and the internal Schottky diode fixes the negative
voltage.
and GND to program an undervoltage lockout threshold.
The UVLO pin has an accurate 1.25V threshold. Above the
threshold,thepartoperatesnormally.Belowthethreshold,
the part drops into a low quiescent current state. See the
UndervoltageLockoutsectionintheApplicationsInforma-
tion section for more details.
The exposed pad is connected internally with SW pins
1-4, 23-26 and should be soldered to a large copper area
to reduce thermal resistance.
V
(Pins 13, 14, 15): The V pin supplies current to
IN
IN
SYNC (Pin 5): The SYNC pin is used to synchronize the
internal oscillator to an external signal. It is directly logic
compatible and can be driven with any signal between
20% and 80% duty cycle. The synchronizing range is
from 170kHz to 1.5MHz. See the Synchronization section
in the Applications Information section for details. When
not used for synchronization, the SYNC pin can be tied
to ground to select low ripple Burst Mode operation or
tied to the output voltage to select standard PWM mode.
the LT3690’s internal regulator and to the internal power
switch. This pin must be locally bypassed.
EN (Pin 17): The EN input is used to put the LT3690 in
shutdown mode. Pull to GND to shut down the LT3690.
Tie to 1.5V or more for normal operation.
PG (Pin 18): The PG pin is the open collector output of
an internal comparator. PG remains low until the FB pin is
within 10% of the final regulation voltage. The PG output
is valid when V is above 3.9V, the UVLO pin is high and
IN
RT (Pin 7): Oscillator Resistor Input. Connecting a resis-
tor to ground (Pin 10) from this pin sets the switching
frequency.
EN is high.
BIAS(Pin19):Thispinconnectstotheanodeoftheinternal
boost Schottky diode. BIAS also supplies the current to
the LT3690’s internal regulator. Tie this pin to the lowest
V (Pin 8): The V pin is the output of the internal error
C
C
amplifier. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
available voltage source above 3V (typically V ). This
OUT
pin must be locally bypassed with 10nF.
V
(Pin 20): V
is an output of the internally gen-
CCINT
CCINT
FB (Pin 9): The LT3690 regulates the FB pin to 0.8V.
Connect the feedback resistor divider tap to this pin. The
adjacent ground pin (Pin 10) is recommended for the
resistor divider.
erated supply voltage for the synchronous power DMOS
transistor driver. An external capacitor C must be con-
VCC
nected between this pin and ground (Pin 21) to buffer the
internal supply voltage of the LS switch.
SS (Pin 11): The SS pin is used to provide a soft-start
BST (Pin 22): This pin is used to provide, with the external
or tracking function. The internal 2µA pull-up current
boost capacitor, a drive voltage higher than the input volt-
I
in combination with an external capacitor tied to this
SS
age V to the internal bipolar NPN power switch.
IN
pin creates a voltage ramp. The output voltage tracks to
this voltage. For tracking, tie a resistor divider to this pin
from the tracked output. In undervoltage, overvoltage
GND (Exposed Pad Pin 28, Pin 6, Pin 10, Pin 16, Pin 21):
Ground. The exposed pad is connected internally to GND
Pins 6, 10, 16 and 21, and should be soldered to a large
copper area to reduce thermal resistance.
3690fb
9
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LT3690
block DiagraM
V
IN
13
14
15
CURRENT SENSE
V
V
IN
IN
V
IN
–
C
+
IN
GND
EN
BIAS
16
17
19
22
2.5V
BST
REFERENCE
0.8V
0.72V
OVLO
UVLO
TSD
2µA
SLEEP
V
IN
MONITOR
C
BST
TEMPERATURE
MONITOR
HS
SWITCH
UVLO
SYNC
1, 2
3, 4
SW
SW
12
5
–
+
23, 24,
25, 26
R
S
Q
L
FF
OSCILLATOR
SLOPE
COMP
SYNC
V
OUT
V
IN
0.17MHz
SWITCH
CONTROL
C
OUT
TO 1.5MHz
V
CCINT
20
REG
BURST MODE
DETECT
RT
7
LS
SWITCH
SOFT-START/TRACKING
R
T
+
0.8V
2.5V
–
ZERO
C
–
+
VCC
ERROR AMP
OVLO
UVLO
TSD
2µA
+
–
g
m
SS
PG
–
+
11
18
VC CLAMP
6
C
SS
GND
TSD
OVLO
UVLO
21
OVERLOAD
V
C
POWER GOOD
8
0.72V
+
–
R
C
C
F
C
C
R1
R2
FB
9
GND
10
3690 BD
3690fb
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LT3690
operaTion
The LT3690 is a constant frequency, current mode step-
TheHSswitchdriveroperatesfromeithertheinputorfrom
the BOOST pin. An external capacitor is used to generate
a voltage at the BOOST pin that is higher than the input
supply. This allows the driver to fully saturate the internal
bipolar NPN power switch for efficient operation.
down regulator. An oscillator, with frequency set by R ,
T
enables an RS flip-flop, turning on the internal high side
(HS) power switch. An amplifier and comparator monitor
the current flowing between the V and SW pins, turn-
IN
ing the RS flip-flop and HS switch off when this current
ThesynchronouslydrivenN-channeltransistor(LSswitch)
inparallelwiththecatchdiodereducestheoverallsolution
sizeandimprovesefficiency.Internaloverloadcomparator
circuitry monitors the current through the LS switch and
delaysthegenerationofnewswitchpulsesifthiscurrentis
toohigh(above5Anominal).Thismechanismalsoprotects
the part during short-circuit and overload conditions by
keeping the current through the inductor under control.
reaches a level determined by the voltage at V .
C
While the high side switch is off, the inductor current con-
ducts through the catch diode and the turned on low side
(LS)switchuntileitherthenextclockpulseoftheoscillator
starts the next cycle, or the inductor current becomes too
low, as indicated by the zero crossing comparator. This
prevents the inductor from running reverse current.
A short-circuit protected regulator at V
supplies the
CCINT
CCINT
An error amplifier measures the output voltage through
an external resistor divider tied to the FB pin and servos
LS driver. The LS switch only operates at V
voltages
greater than 3.8V.
the V pin. If the error amplifier’s output increases, more
C
current is delivered to the output; if it decreases, less cur-
To further optimize efficiency, the LT3690 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down, reducing the input sup-
ply current to 70µA in a typical application. Pulling the
SYNC pin above 0.8V prevents Burst Mode operation. The
positive edge of an external clock signal at the SYNC pin
synchronizestheinternaloscillatorandthereforeswitching.
rent is delivered. An active clamp on the V pin provides
C
current limit.
The SS node acts as an auxiliary input to the error ampli-
fier. The voltage at FB will servo to the SS voltage until SS
goes above 0.8V. Soft-start is implemented by generating
a voltage ramp at the SS pin using an external capacitor
C
SS
which is charged by an internal constant current.
Alternatively, connecting the SS pin to a resistive divider
between the voltage to be tracked and ground provides a
tracking function.
The oscillator reduces the LT3690’s operating frequency
when the voltage at the FB pin is low. This frequency fold-
back helps to control the output current during start-up
and overload conditions.
An internal regulator provides power to the control cir-
cuitry. The bias regulator normally draws power from the
TheLT3690containsapowergoodcomparatorwhichtrips
when the FB pin is at 90% of its regulated value. The PG
output is an open-collector transistor that is off when the
output is in regulation, allowing an external resistor to pull
the PG pin high. Power good is valid when the LT3690
V
pin, but if the BIAS pin is connected to an external
IN
voltage higher than 3V, bias power will be drawn from the
external source (typically the regulated output voltage).
This improves efficiency.
is enabled, the UVLO pin is high and V is above 3.9V.
IN
The EN pin is used to place the LT3690 in shutdown,
disconnecting the output and reducing the input current
to less than 1µA. A comparator monitors the voltage at
the UVLO input. A external resistive divider connected to
The LT3690 has an overvoltage protection feature which
disablesswitchingactionwhenV goesabove38V(typical)
IN
duringtransients.Whenswitchingisdisabled,theLT3690
V
programs the wake up threshold and hysteresis. If
can safely sustain transient input voltages up to 60V.
IN
unused, connect the input to V or above 1.5V.
IN
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LT3690
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FB Resistor Network
Operating Frequency Trade-Offs
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the resistor
values according to:
Selectionoftheoperatingfrequencyisatrade-offbetween
efficiency,componentsize,minimumdropoutvoltage,and
maximum input voltage. The advantage of high frequency
operationisthatsmallerinductorandcapacitorvaluesmay
be used. The disadvantages are lower efficiency, lower
maximum input voltage, and higher dropout voltage. The
⎛
⎞
VOUT
0.8V
R1 = R2
−1
⎟
⎜
⎝
⎠
highest acceptable switching frequency (f
) for a
SW(MAX)
Reference designators refer to the Block Diagram. 1%
resistors are recommended to maintain output voltage
accuracy.
given application can be calculated as follows:
V
OUT + V
LS
ƒSW(MAX)
=
tON(MIN) • V − VSW + V
(
)
IN
LS
Setting the Switching Frequency
where V is the typical input voltage, V
is the output
IN
OUT
The LT3690 uses a constant frequency PWM architecture
thatcanbeprogrammedtoswitchfrom150kHzto1.5MHz
by using a resistor tied from the RT pin to ground. Table 1
voltage, V is the LS switch drop (0.12V at maximum
LS
load) and V is the internal switch drop (0.37V at maxi-
SW
mum load). This equation shows that slower switching
shows the necessary R value for a desired switching
T
frequency is necessary to accommodate high V /V
IN OUT
frequency.
ratio. Also, as shown in the Input Voltage Range section,
lower frequency allows a lower dropout voltage. Input
voltage range depends on the switching frequency be-
cause the LT3690 switch has finite minimum on and off
times. An internal timer forces the switch to be off for at
Table 1. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz)
R VALUE (kΩ)
T
0.15
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
164
117
72.9
52.2
40.2
32.4
26.8
22.7
19.6
17.0
15.0
13.3
11.8
10.6
9.59
least t
per cycle; this timer has a maximum value
OFF(MIN)
of 210ns over temperature. On the other hand, delays
associated with turning off the power switch dictate the
minimumon-timet
beforetheswitchcanbeturned
ON(MIN)
off; t
has a maximum value of 210ns (250ns for
ON(MIN)
T > 125°C) over temperature. The minimum and maxi-
J
mum duty cycles that can be achieved taking minimum
on and off times into account are:
DC
DC
= ƒ • t
SW ON(MIN)
MIN
= 1 – ƒ • t
MAX
SW OFF(MIN)
where ƒ is the switching frequency, the t
is the
ON(MIN)
J
SW
minimum switch on-time (210ns; 250ns for T > 125°C),
and the t
is the minimum switch off-time (210ns).
OFF(MIN)
These equations show that duty cycle range increases
when switching frequency is decreased.
A good choice of switching frequency should allow
adequate input voltage range (see Input Voltage Range
section) and keep the inductor and capacitor values small.
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LT3690
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Input Voltage Range
quency will reduce the maximum operating input voltage.
Conversely, alowerswitchingfrequencywillbenecessary
to achieve optimum operation at high input voltages. The
maximumoperatingvoltageis36V(minimumovervoltage
lockout threshold).
The minimum input voltage is determined by either the
LT3690’s minimum operating voltage of 3.9V (V
3V) or by its maximum duty cycle (see equation in the
Operating Frequency Trade-offs section). The minimum
input voltage due to duty cycle limitation is:
>
BIAS
Special attention must be paid when the output is in start-
up, short-circuit, or other overload conditions. In these
cases, the LT3690 tries to bring the output in regulation
by driving current into the output load. During these
events, the inductor peak current might easily reach and
even exceed the maximum current limit of the LT3690,
especiallyinthosecaseswheretheswitchalreadyoperates
at minimum on-time. The circuitry monitoring the current
through the LS switch prevents the HS switch from turn-
V
OUT + V
LS
V
=
− V + VSW
LS
IN(MIN)
1− ƒSW • tOFF(MIN)
whereV
istheminimuminputvoltage,andt
OFF(MIN)
IN(MIN)
is the minimum switch off-time (210ns). Note that higher
switching frequency will increase the minimum input volt-
age.Ifalowerdropoutvoltageisdesired,alowerswitching
frequency should be used.
ing on again if the inductor valley current is above I
PSDLIM
The maximum input voltage for LT3690 applications
depends on switching frequency, the absolute maximum
(5A nominal). In these cases, the inductor peak current is
therefore the maximum current limit of the LT3690 plus
the additional current overshoot during the turn-off delay
due to minimum on-time:
ratings of the V and BST pins, and the operating mode.
IN
The LT3690 can operate from continuous input voltages
up to 36V. If the operating junction temperature is below
125°C, the LT3690 will tolerate input voltage transients of
V
IN(MAX) − VOUTOL
I
L(PEAK)= 8A +
• tON(MIN)
L
up to 60V. However, note that while V > V
(typically
IN
OVLO
38V), the LT3690 will stop switching, allowing the output
where I is the peak inductor current, V
is
IN(MAX)
L(PEAK)
to fall out of regulation.
the maximum expected input voltage, L is the inductor
value, t is the minimum on-time and V is
For a given application where the switching frequency
and the output voltage are already fixed, the maximum
input voltage that guarantees optimum output voltage
ripple for that application can be found by applying the
following expression:
ON(MIN)
OUTOL
the output voltage under the overload condition. The part
is robust enough to survive prolonged operation under
theseconditionsaslongasthepeakinductorcurrentdoes
not exceed 9A. Inductor current saturation and excessive
junction temperature may further limit performance.
V
OUT + V
LS
V
=
− V + VSW
LS
IN(MAX)
If the output is in regulation and no short-circuit, start-
up, or overload events are expected, then input voltage
ƒSW • tON(MIN)
where V
OUT
is the maximum operating input voltage,
transients of up to V
are acceptable regardless of the
IN(MAX)
OVLO
V
istheoutputvoltage,V istheLSswitchdrop(0.12V
switching frequency. In this case, the LT3690 may enter
pulse-skipping operation where some switching pulses
are skipped to maintain output regulation. In this mode,
the output voltage ripple and inductor current ripple will
be higher than in normal operation.
LS
at maximum load), V is the internal switch drop (0.37V
SW
SW
at maximum load), f is the switching frequency (set by
RT), and t
is the minimum switch on-time (210ns;
ON(MIN)
250ns for T > 125°C). Note that a higher switching fre-
J
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LT3690
applicaTions inForMaTion
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
0.67MHz
Finally, for duty cycles greater than 50% (V /V > 0.5),
OUT IN
a minimum inductance is required to avoid sub-harmonic
oscillations:
0.42MHz
L = VOUT + VLS
•
(
)
LMIN = VOUT + V
•
(
)
LS
ƒSW
ƒSW
where V is the voltage drop of the low side switch
LS
whereV isthevoltagedropofthelowsideswitch(0.12V
LS
(0.12V), ƒ is in MHz, and L is in μH. The inductor’s
SW
at maximum load), ƒ is in MHz, and L
is in μH.
SW
MIN
RMS current rating must be greater than the maximum
load current and its saturation current should be at least
30% higher. For highest efficiency, the series resistance
(DCR) should be less than 0.03Ω. Table 2 lists several
vendors and types that are suitable.
Thecurrentintheinductorisatrianglewavewithanaverage
value equal to the load current. The peak switch current
is equal to the output current plus half the peak-to-peak
inductor ripple current. The LT3690 limits its switch cur-
rent in orderto protect itselfand the system from overload
faults. Therefore, the maximum output current that the
LT3690 will deliver depends on the switch current limit,
the inductor value, and the input and output voltages.
Table 2. Inductor Vendors
VENDOR
Murata
TDK
URL
PART SERIES
www.murata.com
www.tdk.com
LQH6P
CLF10040T
SLF10165T
When the switch is off, the potential across the inductor
is the output voltage plus the low side switch drop. This
gives the peak-to-peak ripple current in the inductor:
Toko
www.toko.com
DEM8045C
FDVE1040
Coilcraft
Sumida
www.coilcraft.com
www.sumida.com
MSS1048
1−DC VOUT + V
(
)
)
(
LS
CDRH8D43
CDRH105R
ΔIL =
L • ƒ
SW
Vishay
www.vishay.com
IHLP-2525EZ
where ƒ is the switching frequency of the LT3690 and L
SW
is the value of the inductor. The peak inductor and switch
The optimum inductor for a given application may differ
fromtheoneindicatedbythissimpledesignguide.Alarger
value inductor provides a higher maximum load current,
and reduces the output voltage ripple. If your load is lower
than the maximum load current, then you can relax the
value of the inductor and operate with higher ripple cur-
rent. This allows you to use a physically smaller inductor,
or one with a lower DCR, resulting in higher efficiency. Be
aware that if the inductance differs from the simple rule
above,thenthemaximumloadcurrentwilldependoninput
voltage. In addition, low inductance may result in discon-
tinuous mode operation, which further reduces maximum
load current. For details of maximum output current and
discontinuous mode operation, see Application Note 44.
current is:
ΔIL
ISW(PK) =IL(PK) =IOUT
+
To maintain output regulation, this peak current must be
less than the LT3690’s switch current limit I . See the
LIM
Typical Performance graphs for the change in current
limit vs duty cycle.
Choosing an inductor value so that the ripple current is
smallwillallowamaximumoutputcurrentneartheswitch
current limit.
3690fb
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applicaTions inForMaTion
One approach to choosing the inductor is to start with the
simple rule given above, look at the available inductors,
and choose one to meet cost or space goals. Then use
these equations to check that the LT3690 will be able to
deliver the required output current. Note again that these
equations assume that the inductor current is continu-
the output ripple, and low impedance at the switching
frequency is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
LT3690’s control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good starting value is:
ous. Discontinuous operation occurs when I
is less
OUT
150
COUT
=
than ΔI /2.
L
VOUT • ƒSW
Input Capacitor
where ƒ is in MHz, and C
is the recommended out-
OUT
SW
BypasstheinputoftheLT3690circuitwithaceramiccapaci-
tor of X7R or X5R type. Y5V types have poor performance
over temperature and applied voltage, and should not be
used. A 10µF ceramic capacitor is adequate to bypass
the LT3690, and easily handles the ripple current. Note
that larger input capacitance is required when a lower
switching frequency is used. If the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. Thiscanbeprovidedwithalowerperformance
electrolytic capacitor.
put capacitance in µF. Use X5R or X7R types, which will
provide low output ripple and good transient response.
Using a high value capacitor on the output can improve
transient performance, but a phase lead capacitor across
the feedback resistor R1 may be required to get the full
benefit (see the Frequency Compensation section).
High performance electrolytic capacitors can be used for
the output capacitor. If using an electrolytic capacitor,
choose one intended for use in switching regulators, and
with a specified ESR of 0.03Ω or less. Such a capacitor
will be larger than a ceramic capacitor and will have a
larger capacitance because the capacitor must be large to
achieve low ESR. Table 3 lists several capacitor vendors.
Step-down regulators draw current from the input sup-
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage
ripple at the LT3690 and to force this very high frequency
switching current into a tight local loop, minimizing EMI.
A 10µF capacitor is capable of this task, but only if it is
placed close to the LT3690 (see the PCB Layout section).
Asecondprecautionregardingtheceramicinputcapacitor
concernsthemaximuminputvoltageratingoftheLT3690.
A ceramic input capacitor combined with trace or cable
inductance forms a high quality (under damped) tank
circuit. If the LT3690 circuit is plugged into a live supply,
the input voltage can ring to twice its nominal value, pos-
sibly exceeding the LT3690’s maximum voltage rating.
See Application Note 88 for more details.
Table 3. Capacitor Vendors
VENDOR
Panasonic
Kemet
PART SERIES
COMMENTS
EEF Series
T494, T495
POSCAP
Ceramic, Polymer, Tantalum
Ceramic, Tantalum
Ceramic, Polymer, Tantalum
Ceramic
Sanyo
Murata
AVX
Ceramic, Tantalum
Ceramic
TPS Series
Taiyo Yuden
Ceramic Capacitors
Ceramic capacitors are small, robust and have very
low ESR. However, ceramic capacitors can sometimes
cause problems when used with the LT3690 due to their
piezoelectric nature. When in Burst Mode operation, the
LT3690’sswitchingfrequencydependsontheloadcurrent,
and at very light loads the LT3690 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
withtheinductor,itfiltersthesquarewavegeneratedbythe
LT3690toproducetheDCoutput.Inthisroleitdetermines
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Since the LT3690 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet. If
this is unacceptable, use a high performance tantalum or
electrolytic capacitor at the output.
one of the circuits in this data sheet that is similar to your
applicationandtunethecompensationnetworktooptimize
theperformance.Stabilityshouldthenbecheckedacrossall
operatingconditions, includingloadcurrent, inputvoltage
and temperature. The LT1375 data sheet contains a more
thorough discussion of loop compensation and describes
how to test the stability using a transient load.
Frequency Compensation
The LT3690 uses current mode control to regulate the
output.Thissimplifiesloopcompensation.Inparticular,the
LT3690 does not require the ESR of the output capacitor
for stability, so you are free to use ceramic capacitors to
achieve low output ripple and small circuit size.
Figure1showsanequivalentcircuitfortheLT3690control
loop. The error amplifier is a transconductance amplifier
withfiniteoutputimpedance.Thepowersection,consisting
of the modulator, power switch and inductor, is modeled
as a transconductance amplifier generating an output
Frequency compensation is provided by the components
tied to the V pin, as shown in Figure 1. Generally a capaci-
current proportional to the voltage at the V pin. Note that
C
C
tor (C ) and a resistor (R ) in series to ground are used. In
the output capacitor integrates this current, and that the
C
C
addition, there may be a lower value capacitor in parallel.
capacitor on the V pin (C ) integrates the error amplifier
C
C
This capacitor (C ) is not part of the loop compensation
output current, resulting in two poles in the loop. In most
cases, a zero is required and comes either from the output
F
but is used to filter noise at the switching frequency, and
is required only if a phase-lead capacitor is used or if the
output capacitor has high ESR.
capacitor ESR or from a resistor R in series with C .
C
C
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. A phase lead
capacitor (CPL) across the feedback divider may improve
the transient response.
Loop compensation determines the stability and transient
performance. The best values for the compensation net-
work depend on the application and, in particular, the type
of output capacitor. A practical approach is to start with
LT3690
CURRENT MODE
V
OUT
POWER STAGE
SW
FB
100mV/DIV
OUTPUT
g
= 4.6S
m
R1
C
PL
–
+
g
= 400µS
m
I
L
ESR
2A/DIV
0.8V
C1
+
3M
C1
3690 F02
20µs/DIV
V
GND
C
CERAMIC
POLYMER
OR
V
= 12V, I
LOAD
STEPPED BETWEEN 0.6A AND 3.5A
IN
FRONT PAGE APPLICATION
TANTALUM
OR
R
R2
C
C
F
ELECTROLITIC
Figure 2. Transient Load Response
C
C
3690 F01
Figure 1. Model for Loop Response
3690fb
16
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LT3690
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Low-Ripple Burst Mode and Pulse-Skipping Mode
If low quiescent current is not required, the LT3690 can
operate in pulse-skipping mode. The benefit of this mode
is that the LT3690 will enter full frequency standard PWM
operation at a lower output load current than when in
Burst Mode operation. The front page application circuit
will switch at full frequency at output loads higher than
The LT3690 is capable of operating in either low ripple
Burst Mode operation or pulse-skipping mode, which is
selected using the SYNC pin. See the Synchronization and
Mode section for details.
To enhance efficiency at light loads, the LT3690 can be
operated in low ripple Burst Mode operation that keeps
the output capacitor charged to the proper voltage while
minimizingtheinputquiescentcurrent.DuringBurstMode
operation,theLT3690deliverssinglecycleburstsofcurrent
to the output capacitor followed by sleep periods where
the output capacitor is delivers output power to the load.
Because the LT3690 delivers power to the output with
single, low current pulses, the output ripple stays below
about 64mA at V = 12V.
IN
Low Side Switch Considerations
The operation of the internal low side switch is optimized
for reliable, high efficiency operation. The low side switch
is connected in parallel with a catch diode. When the top
side switch turns off, the inductor current pulls the SW
pin low, and forward biases the internal catch diode. In
order to prevent shoot through currents, the internal low
side switch only turns on after detecting the SW pin going
low. Once the low side switch turns on, the voltage drop
between SW and GND is very small, minimizing power
loss and improving efficiency. At the end of the switching
cycle, the low side switch turns off, and after a delay, the
top side switch can turn on again. The switching sequence
is shown in Figure 4.
15mV for a typical application. In addition, V and BIAS
IN
quiescentcurrentsarereducedto35µAand70µA(typical),
respectively, during the sleep time. As the load current
decreases towards a no-load condition, the percentage
of time that the LT3690 operates in sleep mode increases
and the average input current is greatly reduced, resulting
in high efficiency even at very low loads (see Figure 3).
At higher output loads (above about 385mA at V = 12V
IN
for the front page application) the LT3690 will run at the
The overload comparator monitors the current flowing
through the low side switch and helps protect the circuit.
This comparator delays switching if the low side switch
current goes higher than 5A (typical) during a fault con-
dition such as a shorted output with high input voltage.
frequency programmed by the R resistor, and operate in
T
standard PWM mode. The transition between PWM and
low ripple Burst Mode operation is seamless, and does
not disturb the output voltage.
V
V
= 12V
IN
OUT
= 3.3V
L = 3.3µH
V
SW
5V/DIV
V
SW
2V/DIV
I
L
0.5A/DIV
V
OUT
0V
10mV/DIV
3690 F03
3690 F04
5µs/DIV
= 20mA
200ns/DIV
V
= 12V: I
LOAD
IN
FRONT PAGE APPLICATION
Figure 3. Burst Mode Operation
Figure 4. Switching Sequence of High Side,
Catch Diode and Low Side Switch
3690fb
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The switching will only resume once the low side switch
current has fallen below the 5A limit. This way, the com-
parator regulates the valley current of the inductor to
5A during short-circuit. With properly chosen external
components, this will ensure that the part will survive a
short-circuit event.
more than 2.3V above the SW pin for best efficiency. For
outputs of 3V and above, the standard circuit (Figure 5a)
is best. For outputs between 2.8V and 3V, use a 1µF boost
capacitor. A2.5Voutputpresentsaspecialcasebecauseit
is marginally adequate to support the boosted drive stage
while using the internal boost diode. For reliable BST pin
operation with 2.5V outputs, use a good external Schottky
diode (such as the ON Semi MBR0540), and a 1µF boost
capacitor (see Figure 5b). For lower output voltages, the
boost diode can be tied to the input (Figure 5c), or to
another supply greater than 2.8V. The circuit in Figure 5a
is more efficient because the BST pin current and BIAS
pin quiescent current comes from a lower voltage source.
However, the full benefit of the BIAS pin is not realized
unless it is at least 3V. Ensure that the maximum voltage
ratings of the BST and BIAS pins are not exceeded.
V
Considerations
CCINT
The linear voltage regulator requires a capacitor of 0.47µF
to deliver the peak current for the gate driver of the low
sideN-channeltransistor.Theoutputvoltageismonitored
by a comparator. To ensure proper operation, the low side
driver only turns on if V
is above 3.8V (typ).
CCINT
BST and BIAS Pin Considerations
Capacitor C and the internal boost Schottky diode (see
BST
The minimum operating voltage of an LT3690 application
is limited by the minimum input voltage (3.9V) and by the
maximumdutycycleasoutlinedintheInputVoltageRange
section. For proper start-up, the minimum input voltage
the Block Diagram) are used to generate boost voltages
that are higher than the input voltage. In most cases a
0.68µF capacitor will work well. Figure 5 shows three
ways to arrange the boost circuit. The BST pin must be
V
IN
V
BIAS
BST
IN
C
BST
V
OUT
LT3690
SW
GND
3690 F05a
(5a) VOUT > 2.8
V
V
IN
IN
D2
V
BIAS
BST
V
BIAS
BST
IN
IN
C
C
BST
BST
V
V
OUT
OUT
LT3690
LT3690
SW
SW
GND
GND
3690 F05b
3690 F05c
(5b) 2.5V < VOUT < 2.8V
(5c) VOUT < 2.5V, VIN(MAX) = 27V
Figure 5. Three Circuits for Generating the Boost Voltage
3690fb
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LT3690
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6.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
V
= 3.3V
V
= 5V
OUT
OUT
L = 4.7µH
L = 4.7µH
TO START
TO START
5.5
5.0
4.5
4.0
3.5
3.0
ƒ = 600kHz
ƒ = 600kHz
TO RUN
TO RUN
1
10
100
1000
10000
1
10
100
1000
10000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3690 F06a
3690 F06b
Figure 6. The Minimum Input Voltage Depends on Output Voltage, Load Current and Boost Circuit
is also limited by the boost circuit. If the input voltage is
ramped slowly, or the LT3690 is turned on with its EN pin
when the output is already in regulation, then the boost
capacitor may not be fully charged. Because the boost
capacitor charges with the energy stored in the inductor,
the circuit relies on some minimum load current to get the
boostcircuitrunningproperly.Thisminimumloaddepends
on the input and output voltages, and on the arrangement
of the boost circuit. The minimum load generally goes to
zero once the circuit has started. Figure 6 shows a plot of
minimum load to start and to run as a function of input
voltage. In many cases the discharged output capacitor
will present a load to the switcher, which will allow it to
pin.Agoodvalueforthesoft-startcapacitorisC /10000,
OUT
where C
is the value of the output capacitor.
OUT
Thesoft-startfunctionlimitspeakinputcurrenttothecircuit
during start-up. The output of the LT3690 regulates to the
lowest voltage present at either the SS pin or an internal
0.8V reference. A capacitor from the SS pin to ground is
charged by an internal 2μA current source resulting in a
linear output ramp from 0V to the regulated output volt-
age. The ramp duration is given by:
CSS • 0.8V
tRAMP
=
2µA
Atpower-up, aninternalopen-collectoroutputdischarges
the SS pin. The SS pin can be left floating if the soft-start
featureisnotused.Theinternalcurrentsourceswillcharge
this pin to ~2V as shown in Figure 7.
start. The plots show the worst-case situation, where V
IN
is ramping very slowly. For lower start-up voltage, the
boost diode can be tied to V ; however, this restricts the
IN
input range to one-half of the absolute maximum rating of
the BST pin. At light loads, the inductor current becomes
discontinuousandtheeffectivedutycyclecanbeveryhigh.
This reduces the minimum input voltage to approximately
V
EN
2V/DIV
300mV above V . At higher load currents, the inductor
OUT
V
SS
current is continuous and the duty cycle is limited by the
maximum duty cycle of the LT3690, requiring a higher
input voltage to maintain regulation.
1V/DIV
V
OUT
2V/DIV
I
L
2A/DIV
Soft-Start
3690 F07
50ms/DIV
C
SS
= 0.22µF
The SS (soft-start) pin provides a soft-start function. If a
capacitor C is tied from the SS pin to ground, then the
SS
Figure 7. Soft-Start Ramp
internalpull-upcurrentwillgenerateavoltageramponthis
3690fb
19
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LT3690
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LT3690
V
5V
SS
OUT1
EN
2V/DIV
0.1µF
V
OUT1
2V/DIV
LT3690
OUT2
3.3V
SS
V
OUT2
2V/DIV
0.047µF
3690 F08b
5ms/DIV
3690 F08a
(8a) Independent Start-Up
LT3690
OUT1
V
5V
SS
EN
2V/DIV
0.22µF
V
OUT1
2V/DIV
LT3690
OUT2
3.3V
SS
V
OUT2
2V/DIV
3690 F08d
5ms/DIV
3690 F08c
(8b) Ratiometric Start-Up
Figure 8. Output Tracking and Sequencing
3690fb
20
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LT3690
5V
SS
OUT1
V
EN
0.1µF
2V/DIV
R1
28.7k
V
OUT1
2V/DIV
LT3690
OUT2
V
OUT2
3.3V
SS
2V/DIV
R2
10k
3690 F09b
5ms/DIV
3690 F09a
(9a) Coincident Start-Up
LT3690
OUT1
PG1
5V
SS
V
EN
2V/DIV
0.1µF
V
OUT1
2V/DIV
LT3690
OUT2
V
OUT2
3.3V
SS
0.047µF
2V/DIV
3690 F09d
5ms/DIV
3690 F09b
(9b) Output Sequencing
Figure 9. Output Tracking and Sequencing
3690fb
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Output Tracking and Sequencing
To assure reliable and safe operation, the LT3690 will
synchronize when the output voltage is above 90% of its
regulated voltage. It is therefore necessary to choose a
large enough inductor value to supply the required output
Output tracking and sequencing between voltage regu-
lators can be implemented using the LT3690’s SS and
PG pins. Figures 8 and 9 show several configurations
for output tracking and sequencing of the LT3690 and
an additional regulator. Independent soft-start for each
channel is shown in Figure 8a. The output ramp time for
each output is set by the soft-start capacitor as described
in the soft-start section.
current at the frequency set by the R resistor (see the
T
Inductor Selection section). It is also important to note
that slope compensation is set by the R value. When the
T
synchronization frequency is much higher than the one
setbyR , theslopecompensationissignificantlyreduced,
T
which may require a larger inductor value to prevent sub-
RatiometrictrackingisachievedinFigure8bbyconnecting
SS pins of two regulators together. In this configuration,
the SS pin current is set by the sum of the SS pin currents
of the two regulators, which must be taken into account
when calculating the output rise time.
harmonic oscillation.
For duty cycles greater than 50% (V /V > 0.5), a
OUT IN
minimum inductance is required to avoid sub-harmonic
oscillations:
0.42MHz
LMIN = VOUT + V
•
(
)
By connecting a feedback network from OUT1 to the
SS pin with the same ratio that set the OUT2 voltage,
absolute tracking shown in Figure 9a is implemented. A
small OUT2 voltage offset will be present due to the SS
pin’s 2µA source current. This offset can be corrected by
slightly reducing the value of R2.
LS
ƒSW
where V is the voltage drop of the low side switch
LS
(0.12V at maximum load), ƒ is in MHz, and L
is in
SW
MIN
μH. For ƒ in the above calculation, use the frequency
SW
programmed by R , not the synchronization frequency.
T
Figure 9b illustrates output sequencing. When V
is
OUT1
Undervoltage Lockout
within 10% of its regulated voltage, PG releases the SS
soft-start pin, allowing V
to soft-start.
OUT2
Figure 10 shows how to add undervoltage lockout (UVLO)
to the LT3690. Typically, UVLO is used in situations where
the input supply is current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current
Synchronization
To select low-ripple Burst Mode operation, tie the SYNC
pin below 0.4V (this can be ground or a logic output).
SynchronizetheLT3690oscillatortoanexternalfrequency
by connecting a square wave (with positive and negative
pulse width > 100ns) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.4V and
peaks that are above 1V (up to 6V).
V
IN
V
IN
LT3690
2µA
The LT3690 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will skip pulses to maintain regulation.
R3
R4
UVLO
–
+
The LT3690 may be synchronized over a 170kHz to
1.25V
SLEEP
C4
1.5MHz range. The R resistor should be chosen to set
T
3690 F10
the LT3690 switching frequency 20% below the lowest
synchronizationinput. Forexample, ifthesynchronization
Figure 10. Undervoltage Lockout
signal will be 350kHz and higher, choose R for 280kHz.
T
3690fb
22
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LT3690
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limit or latch low under low source voltage conditions.
The UVLO circuitry prevents the regulator from operating
at source voltages where the problems might occur. An
internalcomparatorwillforcethepartintoshutdownbelow
to switching nodes. If high resistor values are used, the
UVLO pin should be bypassed with a 1nF capacitor to
prevent coupling problems from the switch node.
Shorted and Reversed Input Protection
the fixed V UVLO threshold of 3.0V. This feature can be
IN
used to prevent excessive discharge of battery-operated
systems. If an adjustable UVLO threshold is required, the
UVLO pin can be used. The threshold voltage of the UVLO
pin comparator is 1.25V. Current hysteresis is added
above the UVLO threshold. This can be used to set volt-
age hysteresis of the UVLO using the following equations:
If the inductor is chosen to prevent excessive saturation,
the LT3690 will tolerate a shorted output. When operat-
ing in short-circuit condition, the LT3690 will reduce its
frequency until the valley current is at a typical value of 5A
(see Figure 11). There is another situation to consider in
systems where the output is held high when the input to
the LT3690 is absent. This may occur in battery charging
applications or in battery backup systems where a battery
or some other supply is diode ORed with the LT3690’s
VH − V
2µA
L
R3 =
1
output. If the V pin is allowed to float and the EN pin
R4 = R3 •
VH
IN
is held high (either by a logic signal or because it is tied
−1
1.25V
to V ), then the LT3690’s internal circuitry will pull its
IN
Example:switchingshouldnotstartuntiltheinputisabove
4.4V, and is to stop if the input falls below 4V.
quiescent current through its SW pin. This is acceptable
if the system can tolerate a few mA in this state. If the EN
pinisgrounded, theSWpincurrentwilldroptoessentially
4.4V − 4.0V
R3 =
= 200kΩ
zero. However, if the V pin is grounded while the output
IN
2µA
is held high, then parasitic diodes inside the LT3690 can
1
4.4V
1.25V
pull large currents from the output through the SW pin
R4 = 200kΩ •
= 79.4kΩ
and the V pin. Figure 12 shows a circuit that will run
IN
−1
only when the input voltage is present and that protects
Keep the connection from the resistor to the UVLO pin
short and minimize the interplane or surface capacitance
against a shorted or reversed input.
D4
MBRS540
V
IN
V
BIAS
BST
V
IN
SW
10V/DIV
V
OUT
UVLO
LT3690
0V
SW
FB
EN
BACKUP
GND
I
L1
2A/DIV
3690 F12
3690 F11
2µs/DIV
Figure 11. The LT3690 Reduces its Frequency to Below
250kHz to Protect Against Shorted Output with 36V Input
Figure 12. Diode D4 Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output; It Also
Protects the Circuit from a Reversed Input. The LT3690
Runs Only When the Input Is Present
3690fb
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PCB Layout
High Temperature Considerations
ForproperoperationandminimumEMI,caremustbetaken
during printed circuit board layout. Figure 13 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
ThePCBmustprovideheatsinkingtokeeptheLT3690cool.
The GND exposed pad on the bottom of the package must
be soldered to a ground plane and the SW exposed pad
must be soldered to a SW plane. Tie the ground plane and
SW plane to large copper layers below with thermal vias;
these layers will spread the heat dissipated by the LT3690.
Placing additional vias can reduce thermal resistance fur-
ther. With these steps, the thermal resistance from die (or
flow in the LT3690’s V , SW and GND pins and the input
IN
capacitor (C ). The loop formed by these components
IN
should be as small as possible. These components, along
with the inductor and output capacitor, should be placed
on the same side of the circuit board, and their connec-
tionsshouldbemadeonthatlayer. Placealocal, unbroken
ground plane below these components. The SW and BST
nodes should be small as possible. If synchronizing the
partexternallyusingtheSYNCpin,avoidroutingthissignal
junction)toambientcanbereducedtoθ =40°C/Worless.
JA
With 100 LFPM airflow, this resistance can fall by another
25%.Furtherincreasesinairflowwillleadtolowerthermal
resistance. Because of the large output current capability
of the LT3690, it is possible to dissipate enough heat to
near sensitive nodes, especially V and FB. Finally, keep
raise the junction temperature beyond the absolute maxi-
C
the FB and V nodes small so that the ground traces will
mum of 125°C (150°C for H-grade or MP-grade). When
operating at high ambient temperatures, the maximum
loadcurrentshouldbederatedastheambienttemperature
approaches the maximum junction temperature. Power
dissipationwithintheLT3690canbeestimatedbycalculat-
ing the total power loss from an efficiency measurement.
ThedietemperatureiscalculatedbymultiplyingtheLT3690
powerdissipationbythethermalresistancefromjunction-
to-ambient. Thermal resistance depends on the layout of
the circuit board, but values from 20°C/W to 60°C/W are
typical. Die temperature rise was measured on a 4-layer,
6cm • 6cm circuit board in still air at a load current of 4A
C
shield them from the SW and BST nodes. The exposed
GND pad on the bottom of the package must be soldered
to ground so that the pad acts as a heat sink. To keep ther-
mal resistance low, extend the ground plane as much as
possible, and add thermal vias under and near the LT3690
to additional ground planes within the circuit board and
on the bottom side. In addition, the exposed SW pad on
the bottom of the package must be soldered to the PCB
to act as a heat sink for the low side switch. Add thermal
vias under the SW pad and to the bottom side.
(ƒ = 600kHz). For a 12V input to 3.3V output the die
SW
C
C
temperature elevation above ambient was 43°C; for 24V
IN
C
F
R1
R2
to 3.3V
the rise was 52°C; for 12V to 5V
the rise
OUT
IN
OUT
R
C
L
was 55°C and for 24V to 5V
the rise was 62°C.
R
T
IN
OUT
C
SS
Other Linear Technology Publications
V
OUT
V
IN
Application Notes 19, 35 and 44 contain detailed descrip-
tionsanddesigninformationforbuckregulatorsandother
switching regulators. The LT1376 data sheet has a more
extensive discussion of output ripple, loop compensa-
tion and stability testing. Design Note 318 shows how to
generate a bipolar output supply using a buck regulator.
C
IN
C
OUT
C
BST
GND
C
VCC
Figure 13. Top Layer PCB Layout and Component
Placement in the LT3690 Demonstration Board
3690fb
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LT3690
Typical applicaTions
5V Step-Down Converter
V
IN
6.3V TO 36V
V
IN
BIAS
10µF
UVLO
EN
PG
ON OFF
0.68µF
LT3690
SS
BST
SW
FB
L
4.7µH
V
5V
4A
OUT
V
C
536k
V
CCINT
15k
1nF
0.47µF
SYNC
RT
47µF
GND
680pF
32.4k
102k
ƒ = 600kHz
3690 TA02
3.3V Step-Down Converter
V
IN
4.5V TO 36V
V
IN
BIAS
10µF
UVLO
EN
PG
ON OFF
0.68µF
LT3690
SS
BST
SW
FB
L
3.3µH
V
3.3V
4A
OUT
V
C
316k
V
CCINT
22k
1nF
0.47µF
SYNC
RT
100µF
GND
680pF
32.4k
102k
ƒ = 600kHz
3690 TA03
(FIXED FREQUENCY AT V < 26V)
IN
3690fb
25
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LT3690
Typical applicaTions
2.5V Step-Down Converter
V
IN
3.9V TO 36V
V
IN
BIAS
10µF
MBR0540
1µF
UVLO
EN
PG
ON OFF
BST
LT3690
SS
L
3.3µH
V
2.5V
4A
OUT
V
C
SW
FB
160k
V
CCINT
15k
1nF
0.47µF
SYNC
RT
100µF
GND
1nF
32.4k
75k
ƒ = 600kHz
3690 TA04
(FIXED FREQUENCY AT V < 21V)
IN
1.8V Step-Down Converter
AUXILIARY SUPPLY
3.3V OR 5V
1µF
V
IN
100k
3.9V TO 36V
V
IN
BIAS
10µF
UVLO
EN
PG
POWER GOOD
ON OFF
L
4.7µH
0.68µF
LT3690
V
1.8V
4A
OUT
SS
BST
SW
FB
V
V
C
18.7k
CCINT
16k
1nF
0.47µF
SYNC
RT
100µF
GND
1nF
40.2k
15k
ƒ = 500kHz
3690 TA05
(FIXED FREQUENCY AT V < 18.5V)
IN
(POWER GOOD IS ONLY VALID WHEN EN IS HIGH AND V > 3.9V)
IN
3690fb
26
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LT3690
Typical applicaTions
1.2V Step-Down Converter
AUXILIARY SUPPLY
3.3V OR 5V
1µF
V
IN
100k
3.9V TO 36V
2×
V
IN
BIAS
10µF
UVLO
EN
PG
POWER GOOD
ON OFF
L
0.68µF
8.2µH
LT3690
V
1.2V
4A
OUT
SS
BST
SW
FB
V
V
C
23.2k
CCINT
14k
0.47µF
+
680µF
LOW ESR
SYNC
RT
10nF
100µF
GND
46.4k
2.2nF
140k
ƒ = 170kHz
3690 TA06
(POWER GOOD IS ONLY VALID WHEN EN IS HIGH AND V > 3.9V)
IN
5V Step-Down Converter with Undervoltage Lockout
V
IN
14V TO 36V
200k
V
IN
BIAS
10µF
UVLO
EN
PG
21k
ON OFF
0.68µF
LT3690
SS
BST
SW
FB
L
4.7µH
V
5V
4A
OUT
V
C
536k
V
CCINT
15k
1nF
0.47µF
SYNC
RT
100µF
GND
1nF
40.2k
102k
SLEEP: V < 12.3V
IN
ƒ = 500kHz
WAKE UP: V > 13.4V
IN
3690 TA07
3690fb
27
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LT3690
package DescripTion
Please refer to http://www.linear.com/product/LTC3690#packaging for the most recent package drawings.
UFE Package
26-Lead Plastic QFN (4mm × 6mm)
(Reference LTC DWG # 05-08-1770 Rev A)
0.70 ±0.05
2.64 ± 0.05
2.64 ± 0.05
2.31 ± 0.05
4.50 ± 0.05
3.10 ± 0.05
2.50 REF
0.41 ± 0.05
2.18 ± 0.05
2.36 ± 0.05
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
2.55 ± 0.05
3.25 ± 0.05
4.50 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PIN 1 NOTCH
R = 0.30 OR
0.35 × 45°
CHAMFER
0.75 ± 0.05
R = 0.10
4.00 ± 0.10
TYP
PIN 1
TOP MARK
(NOTE 6)
26
25
1
2
2.64 ± 0.10
R = 0.125
TYP
2.18 ± 0.10
0.41 ± 0.10
4.50 REF
6.00 ± 0.10
0.50 BSC
2.36 ± 0.10 2.31 ± 0.10
2.64 ± 0.10
0.25 ± 0.05
0.40 ± 0.10
0.200 REF
2.50 REF
(UFE26MA) QFN 0608 REV A
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3690fb
28
For more information www.linear.com/LT3690
LT3690
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
2 to 8, 13, 25
9
A
9/11
Added H- and MP-grades.
Revised BIAS pin description in Pin Functions section.
B
11/15 Clarified ULVO Pin Current Hysteresis Conditions
Clarified SS (Pin 11) and PG (Pin 18) Descriptions
Clarified Power Good Description Paragraph
3
9
11
Clarified 1.8V and 1.2V Step-Down Converter Schematics
26, 27
3690fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
29
LT3690
Typical applicaTion
3.3V Step-Down Converter
V
IN
4.5V TO 36V
V
IN
BIAS
10µF
UVLO
EN
PG
ON OFF
0.68µF
LT3690
SS
BST
SW
FB
L
3.3µH
V
3.3V
4A
OUT
V
C
316k
V
CCINT
22k
1nF
0.47µF
SYNC
RT
100µF
GND
680pF
40.2k
102k
ƒ = 500kHz
3690 TA08
(FIXED FREQUENCY AT V < 31V)
IN
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
= 3.6V, V
LT3680
36V, 3.5A, 2.4MHz High Efficiency MicroPower Step-Down
DC/DC Converter
V
I
= 36V, V
= 0.8V, I = 75µA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
SD
LT3972
LT3971
LT3991
LT3480
LT3685
LT3500
LT3507
LT3682
Transients to 60V, 3.5A, 2.4MHz High Efficiency Step-Down
DC/DC Converter
V
SD
= 3.6V, V
= 33V, V
= 0.8V, I = 75µA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
I
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
38V, 1.2A (I ), 2MHz, High Efficiency Step-Down DC/DC
V
= 4.3V, V
= 38V, V
= 1.19V, I = 2.8µA,
OUT(MIN) Q
OUT
IN(MIN)
IN(MAX)
Converter with Only 2.8µA of Quiescent Current
I
SD
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
55V, 1.2A (I ), 2MHz, High Efficiency Step-Down DC/DC
V
= 4.3V, V
= 38V, V
= 1.19V, I = 2.8µA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
Converter with Only 2.8µA of Quiescent Current
I
SD
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High
V
= 3.6V, V
= 38V, V
= 0.78V, I = 70µA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
Efficiency Step-Down DC/DC Converter with Burst Mode Operation
I
SD
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
36V with Transient Protection to 60V, 2A (I ), 2.4MHz,
V
= 3.6V, V
= 38V, V
= 0.78V, I = 70µA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
High Efficiency Step-Down DC/DC Converter
I
SD
<1µA, 3mm × 3mm DFN-10 and MSOP-10E Packages
36V, 40V
, 2A, 2.5MHz High Efficiency Step-Down DC/DC
V
= 3.6V, V
= 36V, V
= 0.8V, I = 2.5mA,
MAX
IN(MIN)
IN(MAX)
OUT(MIN) Q
Converter and LDO Controller
I
SD
<10µA, 3mm × 3mm DFN-10 Package
36V 2.5MHz, Triple (2.4A + 1.5A + 1.5A (I )) with LDO Controller
V
= 4.0V, V
= 36V, V
= 0.8V, I = 7mA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
High Efficiency Step-Down DC/DC Converter
I
= 1µA, 5mm × 7mm QFN-38 Package
SD
36V, 60V
, 1A, 2.2MHz High Efficiency Micropower Step-Down
V
= 3.6V, V
= 36V, V
= 0.8V, I = 75µA,
MAX
IN(MIN)
IN(MAX)
OUT(MIN) Q
DC/DC Converter
I
<1µA, 3mm × 3mm DFN-12 Package
SD
3690fb
LT 1115 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
30
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT3690
●
●
LINEAR TECHNOLOGY CORPORATION 2011
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