LT3695HMSETRPBF [Linear]
1A Fault Tolerant Micropower Step-Down Regulator; 1A容错微功率降压型稳压器
| 型号： | LT3695HMSETRPBF |
| 厂家： | 
Linear |
| 描述： | 1A Fault Tolerant Micropower Step-Down Regulator |
| 文件： | 总28页 (文件大小：299K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT3695
1A Fault Tolerant Micropower
Step-Down Regulator
FEATURES
DESCRIPTION
TheLT®3695isanadjustablefrequency(250kHzto2.2MHz)
monolithicbuckswitchingregulatorthatacceptsinputvolt-
ages up to 36V and can safely sustain transient voltages
up to 60V. The device includes a high efficiency switch, a
boostdiode,andthenecessaryoscillator,controlandlogic
circuitry. Current mode topology is used for fast transient
response and good loop stability. A SYNC pin allows the
user to synchronize the part to an external clock, and to
choose between low ripple Burst Mode operation and
standard PWM operation.
n
Wide Input Range:
Operation from 3.6V to 36V
Overvoltage Lockout Protects Circuits Through
60V Transients
n
FMEA Fault Tolerant:
Output Stays at or Below Regulation Voltage
During Adjacent Pin Short or When a Pin Is Left
Floating
n
1A Output Current
Low Ripple (< 15mV ) Burst Mode® Operation
n
P-P
IN
I = 75μA for 12V to 3.3V with No Load
Q
OUT
The LT3695 tolerates adjacent pin shorts or an open pin
without raising the output voltage above its programmed
value.
n
n
n
n
n
n
Adjustable Switching Frequency: 250kHz to 2.2MHz
Short-Circuit Protected
Synchronizable Between 300kHz and 2.2MHz
Output Voltage: 0.8V to 20V
Low ripple Burst Mode operation maintains high effi-
ciency at low output currents while keeping output ripple
below 15mV in a typical application. Shutdown reduces
input supply current to less than 1μA while a resistor and
capacitor on the RUN/SS pin provide a controlled output
voltage ramp (soft-start). Protection circuitry senses the
current in the power switch and external Schottky catch
diode to protect the LT3695 against short-circuit condi-
tions. Frequency foldback and thermal shutdown provide
additional protection.
Power Good Flag
Small Thermally Enhanced 16-Pin MSOP Package
APPLICATIONS
n
Automotive Battery Regulation
n
Automotive Entertainment Systems
n
Distributed Supply Regulation
Industrial Supplies
n
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
The LT3695 is available in a thermally enhanced 16-Pin
MSOP package.
TYPICAL APPLICATION
Efficiency
100
5V Step-Down Converter
V
V
IN
V
= 5V
OUT
OUT
6.9V TO 36V
5V
90
80
TRANSIENT TO 60V
0.9A, V > 6.9V
1A, V > 12V
IN
IN
V
BD
BOOST
IN
RUN/SS
V
OUT
= 3.3V
2.2μF
ON OFF
0.22μF
10μH
V
C
SW
LT3695
RT
70
PG
DA
FB
536k
16.2k
40.2k
SYNC
60
50
V
= 12V
IN
GND PGND
470pF 100k
102k
10μF
L = 10µH
f = 800kHz
3695 TA01a
f = 800kHz
0
0.2
0.4
0.6
0.8
1
LOAD CURRENT (A)
3695 TA01b
3695f
1
LT3695
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
TOP VIEW
V , RUN/SS Voltage (Note 3)...................................60V
IN
1
2
3
4
5
6
7
8
PGND
DA
16 BOOST
15 BD
BOOST Pin Voltage ...................................................50V
BOOST Pin Above SW Pin.........................................30V
BD Voltage ................................................................30V
NC
14 GND
13 PG
SW
17
RUN/SS
RT
12 NC
11 FB
SYNC
10 NC
RT, V Voltage ............................................................5V
V
9
V
C
C
IN
RT Pin Current .........................................................1mA
SYNC Voltage............................................................20V
FB Voltage...................................................................5V
PG Voltage ................................................................30V
Operating Junction Temperature Range (Notes 4, 5)
LT3695E............................................. –40°C to 125°C
LT3695I.............................................. –40°C to 125°C
LT3695H ............................................ –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
MSE PACKAGE
16-LEAD PLASTIC MSOP
θ
JA
= 40°C/W WITH EXPOSED PAD SOLDERED
= 110°C/W WITHOUT EXPOSED PAD SOLDERED
JA
θ
ORDER INFORMATION
LEAD FREE FINISH
LT3695EMSE#PBF
LT3695IMSE#PBF
LT3695HMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
16-Lead Plastic MSOP
16-Lead Plastic MSOP
16-Lead Plastic MSOP
TEMPERATURE RANGE
–40°C to 125°C
LT3695EMSE#TRPBF
LT3695IMSE#TRPBF
LT3695HMSE#TRPBF
3695
3695
3695
–40°C to 125°C
–40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3695f
2
LT3695
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, unless otherwise noted. (Note 4)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
Minimum Operating Voltage (Note 6)
V
BD
V
BD
= 3.3V
< 3V
3.4
3.4
3.6
4.3
V
V
l
V
IN
Overvoltage Lockout
36
38
39.9
V
Quiescent Current from V
V
V
V
= 0.2V
0.01
35
90
0.5
60
160
μA
μA
μA
IN
RUN/SS
RUN/SS
RUN/SS
l
= 10V, V = 3.3V, Not Switching
BD
= 10V, V = 0V, Not Switching
BD
Quiescent Current from BD Pin
V
V
V
= 0.2V
0.01
55
0
0.5
100
–5
μA
μA
μA
RUN/SS
RUN/SS
RUN/SS
l
= 10V, V = 3.3V, Not Switching
35
BD
= 10V, V = 0V, Not Switching
BD
Minimum BD Pin Voltage
Feedback Voltage
2.8
3
V
792
785
800
800
808
815
mV
mV
l
l
FB Pin Bias Current
FB Pin Voltage = 800mV
3.6V < V < 36V
–5
0.001
430
1300
50
–40
nA
%/V
μS
V/V
μA
μA
A/V
V
Reference Voltage Line Regulation
0.005
IN
Error Amp g
I
= 1.5μA
VC
m
Error Amp Voltage Gain
V Source Current
C
V Sink Current
C
50
V Pin to Switch Current Gain
C
1.25
0.6
V Switching Threshold
C
0.4
0.8
V Clamp Voltage
C
2
V
Switching Frequency
R
RT
R
RT
R
RT
= 8.06k
= 29.4k
= 158k
1.98
0.9
225
2.2
1.0
250
2.42
1.1
275
MHz
MHz
kHz
l
l
Minimum Switch Off-Time
E- and I-Grades
H-Grade
130
130
210
250
ns
ns
Switch Current Limit (Note 7)
SYNC = 0V
SYNC = 3.3V or Clocked
1.45
1.18
1.7
1.4
2
1.66
A
A
Switch V
I
= 1A
SW
350
1.6
mV
A
CESAT
DA Pin Current to Stop OSC
Switch Leakage Current
1.25
1.95
1
V
= 0V, V = 36V
0.01
μA
SW
IN
3695f
3
LT3695
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, unless otherwise noted. (Note 4)
PARAMETER
CONDITIONS
= 50mA
MIN
TYP
720
0.1
MAX
900
1
UNITS
mV
μA
Boost Schottky Diode Voltage Drop
Boost Schottky Diode Reverse Leakage
Minimum Boost Voltage (Note 8)
BOOST Pin Current
I
BSD
V
SW
= 10V, V = 0V
BD
l
l
1.7
2.3
V
I
SW
= 0.5A
10.5
17.5
mA
RUN/SS Pin Current
V
V
= 2.5V
= 10V
4.5
12
7.5
20
μA
μA
RUN/SS
RUN/SS
RUN/SS Input Voltage High
RUN/SS Input Voltage Low
PG Leakage Current
2.5
V
V
0.2
1
V
V
= 5V
0.1
1000
90
μA
PG
l
PG Sink Current
= 0.4V
100
88
μA
PG
PG Threshold as % of V
Measured at FB Pin (Pin Voltage Rising)
Measured at FB Pin
92
%
FB
PG Threshold Hysteresis
SYNC Threshold Voltage
SYNC Input Frequency
12
mV
mV
MHz
300
0.3
550
800
2.2
Note 1: Stresses beyond those listed under absolute maximum ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect the device
reliability and lifetime.
Note 2: Positive currents flow into pins, negative currents flow out of pins.
Minimum and maximum values refer to absolute values.
Note 5: This IC includes overtemperature protection that is intended to
protect the devices during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability.
Note 6: This is the voltage necessary to keep the internal bias circuitry in
regulation.
Note 3: Absolute maximum voltage at V and RUN/SS pins is 60V for
nonrepetitive 1 second transients, and 36V for continuous operation.
IN
Note 7: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at higher duty cycles.
Note 8: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the switch.
Note 4: The LT3695E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3695I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3695H is guaranteed over the full –40°C to
150°C operating junction temperature range.
3695f
4
LT3695
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency (VOUT = 5V, SYNC = 0V)
Efficiency (VOUT = 3.3V, SYNC = 0V)
Efficiency (VOUT = 3.3V, SYNC = 0V)
90
80
100
90
1
90
80
L = 10μH
f = 800kHz
L = 10μH
f = 800kHz
V
V
= 12V
IN
OUT
= 3.3V
L = 10μH
V
= 12V
= 24V
IN
V
IN
= 12V
80
70
60
f = 800kHz
70
60
50
70
60
50
V
IN
= 34V
V
IN
= 34V
0.1
V
IN
= 24V
V
IN
50
40
30
20
40
30
20
40
30
20
0.01
10
10
0.001
10
10
100
0.1
1000
1
10
LOAD CURRENT (mA)
10
100
0.1
100
1000
0.1
1000
1
1
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3695 G01
3695 G03
3695 G02
No-Load Supply Current
No-Load Supply Current
Maximum Load Current
140
120
100
80
1300
1.75
V
OUT
= 3.3V
CATCH DIODE: DIODES, INC. B140
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
TYPICAL
V
V
= 12V
IN
OUT
1.50
1.25
1.00
0.75
0.50
0.25
= 3.3V
60
INCREASED SUPPLY CURRENT
DUE TO CATCH DIODE LEAKAGE
AT HIGH TEMPERATURE
MINIMUM
40
V
= 3.3V
OUT
20
SYNC = 0V
SYNC = 3.3V
L = 10μH
f = 800kHz
0
0
5
10 15 20 25 30 35 40
–50 –25
0
25 50 75 100 125 150
0
5
15
20 25 30 35
40
10
INPUT VOLTAGE (V)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
3695 G04
3695 G05
3695 G06
Maximum Load Current
Maximum Load Current
Maximum Load Current
1.50
1.25
1.00
0.75
0.50
0.25
1.75
1.50
1.25
1.00
0.75
1.50
1.25
TYPICAL
TYPICAL
TYPICAL
1.00
0.75
0.50
MINIMUM
MINIMUM
MINIMUM
V
= 1.8V
V
= 5V
OUT
OUT
V
= 5V
0.50
0.25
OUT
L = 10μH
L = 10μH
SYNC = 0V
SYNC = 5V
SYNC = 0V
SYNC = 3.3V
SYNC = 0V
SYNC = 5V
L = 4.7μH
f = 2MHz
f = 500kHz
f = 800kHz
0.25
12
14
16
18
10 15 20 25 30 35
INPUT VOLTAGE (V)
15
20
25
30
35
8
10
20
0
5
40
5
40
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3695 G08
3695 G09
3682 G07
3695f
5
LT3695
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Switch Current Limit
(SYNC Pin Grounded)
Switch Current Limit
Switch Voltage Drop
1.9
400
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
DC = 10%
1.7
1.5
1.3
1.1
0.9
0.7
0.5
SYNC < 0.3V
300
200
100
0
DC = 90%
SYNC > 0.8V
OR CLOCKED
40
60
80
0
100
–50 –25
0
25 50 75 100 125 150
0.50
SWITCH CURRENT (A)
20
0
0.75
1.00
1.25
0.25
TEMPERATURE (°C)
DUTY CYCLE (%)
3695 G11
3695 G10
3695 G28
BOOST Pin Current
Feedback Voltage
Switching Frequency
35
30
25
20
15
10
5
810
800
790
780
770
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
R
= 29.4k
T
0
0.50
0.75
1.00
–50 –25
0
25 50 75 100 125 150
–50 –25
0
25 50 75 100 125 150
0
1.25
0.25
TEMPERATURE (°C)
TEMPERATURE (°C)
SWITCH CURRENT (A)
3695 G14
3695 G15
3695 G13
Frequency Foldback
Minimum Switch On Time
Soft-Start
120
100
80
60
40
20
0
1200
1000
800
2.0
1.8
1.6
1.4
I
= 1A
SYNC < 0.3V
OUT
R
RT
= 29.4k
1.2
1.0
0.8
0.6
0.4
0.2
0
600
400
200
0
–50 –25
0
25 50 75 100 125 150
0
100 200 300 400 500 600 700 800 900
0
0.5 1.0 1.5
2.0 2.5
3.0
3.5
TEMPERATURE (°C)
FB PIN VOLTAGE (mV)
RUN/SS PIN VOLTAGE (V)
3695 G17
3695 G16
3695 G20
3695f
6
LT3695
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
RUN/SS Pin Current
Boost Diode Forward Voltage
Error Amplifier Output Current
12
10
8
1.4
60
50
40
30
20
10
1.2
1.0
0.8
0.6
0.4
0.2
0
6
0
–10
4
–20
–30
–40
–50
2
0
–60
0
5
10 15 20 25 30 35 40
RUN/SS PIN VOLTAGE (V)
0
0.25
0.5
0.75
1
–200
–100
0
100
200
BOOST DIODE CURRENT (A)
FB PIN ERROR VOLTAGE (mV)
3695 G21
3695 G21
3659 G23
Minimum Input Voltage
Minimum Input Voltage
6.5
6.0
5.5
5.0
4.5
5.0
V
= 5V
OUT
V
= 3.3V
OUT
L = 10μH
L = 10μH
f = 800kHz
f = 800kHz
4.5
4.0
3.5
3.0
2.5
4
1
2.0
10
100
1000
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3695 G27
3695 G26
Maximum VIN for Full Frequency
Maximum VIN for Full Frequency
40
35
40
35
T
= 25˚C
A
T
= 25˚C
A
30
25
20
15
30
25
20
15
T
= 85˚C
T
= 85˚C
A
A
V
= 3.3V
V
= 5V
OUT
OUT
L = 10μH
L = 10μH
10
10
5
f = 800kHz
SYNC = 3.3V
f = 800kHz
SYNC = 5V
5
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
LOAD CURRENT(A)
1
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
LOAD CURRENT(A)
0.1
0
1
0.1
3695 G30
3695 G29
3695f
7
LT3695
T = 25°C, unless otherwise noted.
A
TYPICAL PERFORMANCE CHARACTERISTICS
Switching Waveforms,
60V Input Voltage Transient
Maximum VIN for Full Frequency
VC Voltages
2.5
2.0
1.5
1.0
0.5
0
40
35
V
T
= 25˚C
SW
A
10V/DIV
CURRENT LIMIT CLAMP
30
25
20
15
T
= 85˚C
A
V
IN
20V/DIV
V
OUT
5V/DIV
3695 G33
5ms/DIV
SWITCHING THRESHOLD
V
= 5V
V
LOAD
= 12V, FRONT PAGE APPLICATION
OUT
IN
L = 4.7μH
f = 2MHz
I
= 500mA
10
5
SYNC = 5V
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
LOAD CURRENT(A)
0
1
0.1
3695 G32
3695 G31
Switching Waveforms,
Full Frequency Continuous
Operation
Switching Waveforms,
Transition from Burst Mode
Operation to Full Frequency
Switching Waveforms,
Burst Mode Operation
V
V
V
SW
SW
SW
5V/DIV
5V/DIV
5V/DIV
I
L
I
L
I
0.5A/DIV
L
0.2A/DIV
0.2A/DIV
V
OUT
20mV/DIV
V
V
OUT
20mV/DIV
OUT
20mV/DIV
3695 G34
3695 G35
3695 G36
5μs/DIV
1μs/DIV
1μs/DIV
V
LOAD
= 12V, FRONT PAGE APPLICATION
V
LOAD
= 12V, FRONT PAGE APPLICATION
V
LOAD
= 12V, FRONT PAGE APPLICATION
IN
IN
IN
I
= 5mA
I
= 55mA
I
= 500mA
3695f
8
LT3695
PIN FUNCTIONS
PGND (Pin 1): This is the power ground used by the catch
diode (D1 in the Block Diagram) when its anode is con-
nected to the DA pin.
V
(Pin 8): The V pin supplies current to the internal
IN IN
regulator and to the internal power switch. This pin must
be locally bypassed.
DA (Pin 2): Connect the anode of the catch diode (D1)
to this pin. Internal circuitry senses the current through
the catch diode providing frequency foldback in extreme
situations.
V (Pin 9): The V pin is the output of the internal error
C C
amplifier. The voltage on this pin controls the peak switch
current. Tie an RC network from this pin to ground to
compensate the control loop.
NC (Pins 3, 10, 12): No Connects. These pins are not
connected to internal circuitry and must be left floating
to ensure fault tolerance.
FB (Pin 11): The LT3695 regulates the FB pin to 0.8V. Con-
nect the feedback resistor divider tap to this pin.
PG (Pin 13): The PG pin is the open-collector output of
an internal comparator. PG remains low until the FB pin
is within 10% of the final regulation voltage. PG output is
SW (Pin 4): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
valid when V is above the minimum input voltage and
IN
RUN/SS is high.
RUN/SS(Pin5):TheRUN/SSpinisusedtoputtheLT3695
inshutdownmode.TietogroundtoshutdowntheLT3695.
Tie to 2.5V or more for normal operation. RUN/SS also
provides a soft-start function; see the Applications Infor-
mation section for more information.
GND (Pin 14): The GND pin is the ground of all the internal
circuitry. Tie directly to the local GND plane.
BD (Pin 15): This pin connects to the anode of the boost
Schottky diode and also supplies current to the LT3695’s
internal regulator.
RT (Pin 6): Oscillator Resistor Input. Connect a resistor
from this pin to ground to set the switching frequency.
BOOST (Pin 16): This pin is used to provide a drive volt-
age, higher than the input voltage, to the internal bipolar
NPN power switch. Connect a capacitor (typically 0.22μF)
between BOOST and SW.
SYNC (Pin 7): This is the external clock synchronization
input. Ground this pin with a 100k resistor for low ripple
Burst Mode operation at low output loads. Tie to 0.8V or
more for pulse-skipping mode operation. Tie to a clock
source for synchronization. Clock edges should have rise
and fall times faster than 1μs. Note that the maximum
load current depends on which mode is chosen. See the
Applications Information section for more information.
Exposed Pad (Pin 17): PGND. This is the power ground
used by the catch diode (D1) when its anode is connected
to the DA pin. The Exposed Pad may be soldered to the
PCB in order to lower the thermal resistance.
3695f
9
LT3695
BLOCK DIAGRAM
V
IN
V
IN
8
–
+
C1
OVLO
THERMAL
SHUTDOWN
BD
15
16
INTERNAL 0.8V REF
SLOPE COMP
BOOST
R
S
Q
OUT
RT
C3
L1
OSCILLATOR
250kHz-2.2MHz
6
7
SW
DA
R
4
2
V
OUT
OUTB
T
C2
D1
SYNC
+
–
SYNC
DISABLE
Burst Mode
DETECT
RUN/SS
PG
SOFT-START
5
ERROR AMP
13
V
C
CLAMP
+
–
+
–
V
C
0.720V
9
C
C
C
F
R
C
GND
14
FB
11
PGND
PGND
17
1
R2
R1
3695 BD
3695f
10
LT3695
OPERATION
The LT3695 is a constant frequency, current mode step-
To further optimize efficiency, the LT3695 automatically
switches to Burst Mode operation in light load situations.
Between bursts, all circuitry associated with controlling
the output switch is shut down, reducing the input supply
current to 75μA in a typical application.
down regulator. An oscillator, with frequency set by R ,
T
enables an RS flip-flop, turning on the internal power
switch. An amplifier and comparator monitor the current
flowing between the V and SW pins, turning the switch
IN
off when this current reaches a level determined by the
The oscillator reduces the LT3695’s operating frequency
when the voltage at the FB pin is low. This frequency fold-
back helps to control the output current during start-up
and overload conditions.
voltage at V . An error amplifier measures the output
C
voltage through an external resistor divider tied to the FB
pin and servos the V pin. If the error amplifier’s output
C
increases, more current is delivered to the output; if it
Internal circuitry monitors the current flowing through the
catch diode via the DA pin and delays the generation of
new switch pulses if this current is too high (above 1.6A
nominal). This mechanism also protects the part during
short-circuit and overload conditions by keeping the cur-
rent through the inductor under control.
decreases,lesscurrentisdelivered.Anactiveclamponthe
V pinprovidescurrentlimit. TheV pinisalsoclampedto
C
C
the voltage on the RUN/SS pin; soft-start is implemented
by generating a voltage ramp at the RUN/SS pin using an
external resistor and capacitor.
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator normally draws power from the V
pin, but if the BD pin is connected to an external voltage
higher than 3V, bias power will be drawn from the external
source. This improves efficiency. The RUN/SS pin is used
toplacetheLT3695inshutdown,disconnectingtheoutput
and reducing the input current to less than 1μA.
TheLT3695containsapowergoodcomparatorwhichtrips
when the FB pin is at 90% of its regulated value. The PG
output is an open-collector transistor that is off when the
output is in regulation, allowing an external resistor to pull
the PG pin high. Power good is valid when the LT3695 is
IN
enabled and V is above the minimum input voltage.
IN
The LT3695 has an overvoltage protection feature which
The switch driver operates from either the input or from
theBOOSTpin.Anexternalcapacitorandtheinternalboost
diode are used to generate a voltage at the BOOST pin that
is higher than the input supply. This allows the driver to
fully saturate the internal bipolar NPN power switch for
efficient operation.
disables switching action when V goes above 38V (typi-
IN
cal) during transients. The LT3695 can then safely sustain
transient input voltages up to 60V.
3695f
11
LT3695
APPLICATIONS INFORMATION
FB Resistor Network
Operating Frequency Trade-Offs
The output voltage of the LT3695 is programmed with a
resistordividerbetweentheoutputandtheFBpin. Choose
the resistor values according to:
Selectionoftheoperatingfrequencyisatrade-offbetween
efficiency, componentsize, minimumdropoutvoltageand
maximum input voltage. The advantage of high frequency
operationisthatsmallerinductorandcapacitorvaluesmay
be used. The disadvantages are lower efficiency, lower
maximum input voltage and higher dropout voltage. The
⎛
⎞
V
0.8V
R1=R2 OUT −1
⎜
⎟
⎝
⎠
highest acceptable switching frequency (f
) for a
SW(MAX)
Reference designators refer to the Block Diagram of the
LT3695.1%resistorsarerecommendedtomaintainoutput
voltage accuracy.
given application can be calculated as follows:
VOUT + VD
tON(MIN)(VIN − VSW + VD)
fSW(MAX)
=
Setting the Switching Frequency
where V is the typical input voltage, V
is the output
OUT
IN
The LT3695 uses a constant frequency PWM architecture
thatcanbeprogrammedtoswitchfrom250kHzto2.2MHz
by using a resistor tied from the RT pin to ground. A table
voltage, V is the catch diode drop (~0.5V) and V is the
D
SW
internal switch drop (~0.5V at max load). This equation
shows that lower switching frequency is necessary to
showing the necessary R value for a desired switching
T
safely accommodate high V /V
ratio. Also, as shown
IN OUT
frequency is in Table 1.
intheInputVoltageRangesection,lowerfrequencyallows
a lower dropout voltage. Input voltage range depends on
the switching frequency because the LT3695 switch has
finite minimum on and off times. An internal timer forces
Table 1. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz)
R VALUE (kΩ)
T
0.25
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
2.0
2.2
158
127
theswitchtobeoffforatleastt
percycle;thistimer
OFF(MIN)
has a maximum value of 210ns (250ns for T > 125°C). On
90.9
71.5
57.6
47.5
40.2
34
J
theotherhand,delaysassociatedwithturningoffthepower
switch dictate the minimum on-time, t
, before the
ON(MIN)
switch can be turned off; t
has a maximum value
ON(MIN)
of 150ns over temperature. The minimum and maximum
duty cycles that can be achieved taking minimum on and
off times into account are:
29.4
22.6
18.2
14.7
12.1
9.76
8.06
DC
DC
= f
t
MIN
SW ON(MIN)
= 1 – f
t
SW OFF(MIN)
MAX
where f
is the switching frequency, t
is the
is the
SW
ON(MIN)
OFF(MIN)
minimum switch on time (150ns), and t
minimum switch off time (210ns, 250ns for T > 125°C).
J
These equations show that the duty cycle range increases
when the switching frequency is decreased.
3695f
12
LT3695
APPLICATIONS INFORMATION
A good choice of switching frequency should allow an
adequateinputvoltagerange(seeInputVoltageRangesec-
tion) and keep the inductor and capacitor values small.
switching frequency will reduce the maximum operating
input voltage. Conversely, a lower switching frequency
will be necessary to achieve optimum operation at high
input voltages.
Input Voltage Range
Special attention must be paid when the output is in start-
up,short-circuitorotheroverloadconditions.Duringthese
events, the inductor peak current might easily reach and
even exceed the maximum current limit of the LT3695,
especiallyinthosecaseswheretheswitchalreadyoperates
at minimum on-time. The circuitry monitoring the current
through the catch diode via the DA pin prevents the switch
fromturningonagainiftheinductorvalleycurrentisabove
1.6A nominal. In these cases, the inductor peak current is
therefore the maximum current limit of the LT3695 plus
the additional current overshoot during the turn off delay
due to minimum on time:
The minimum input voltage is determined by either the
LT3695’s minimum operating voltage of ~3.6V (V > 3V)
BD
or by its maximum duty cycle (see equation in Operating
FrequencyTrade-Offssection).Theminimuminputvoltage
due to duty cycle is:
VOUT + VD
VIN(MIN)
=
− VD + VSW
1− fSW OFF(MIN)
t
whereV
istheminimuminputvoltage,andt
IN(MIN)
OFF(MIN)
is the minimum switch off time. Note that a higher switch-
ing frequency will increase the minimum input voltage.
If a lower dropout voltage is desired, a lower switching
frequency should be used.
VIN(MAX)− VOUT(OL)
IL(PEAK) = 2A +
where I
• tON(MIN)
L
The maximum input voltage for LT3695 applications
depends on switching frequency, the Absolute Maximum
is the peak inductor current, V
is
L(PEAK)
IN(MAX)
the maximum expected input voltage, L is the inductor
value, t is the minimum on time and V is the
RatingsoftheV andBOOSTpinsandtheoperatingmode.
IN
ON(MIN)
OUT(OL)
The LT3695 can operate from continuous input voltages
output voltage under the overload condition. The part is
robustenoughtosurviveprolongedoperationunderthese
conditions as long as the peak inductor current does not
exceed 3.5A. Inductor current saturation and excessive
junction temperature may further limit performance.
up to 36V. Input voltage transients of up to 60V are also
safely withstood. However, note that while V > V
IN
OVLO
(overvoltage lockout, 38V typical), the LT3695 will stop
switching, allowing the output to fall out of regulation.
For a given application where the switching frequency
and the output voltage are already fixed, the maximum
input voltage that guarantees optimum output voltage
ripple for that application can be found by applying the
following expression:
Input voltage transients of up to V
are acceptable
OVLO
regardless of the switching frequency. In this case, the
LT3695 may enter pulse-skipping operation where some
switchingpulsesareskippedtomaintainoutputregulation.
Inthismodetheoutputvoltagerippleandinductorcurrent
ripple will be higher than in normal operation.
VOUT + VD
VIN(MAX)
=
− VD + VSW
fSW ON(MIN)
t
Input voltage transients above V
and up to 60V can
OVLO
be tolerated. However, since the part will stop switching
duringthesetransients,theoutputwillfalloutofregulation
and the output capacitor may eventually be completely
discharged. This case must be treated then as a start-up
where V
OUT
is the maximum operating input voltage,
IN(MAX)
V
is the output voltage, V is the catch diode drop
D
(~0.5V),V istheinternalswitchdrop(~0.5Vatmaxload),
SW
f
is the switching frequency (set by R ) and t
is
SW
T
ON(MIN)
condition as soon as V returns to values below V
IN
OVLO
the minimum switch on time (~150ns). Note that a higher
and the part starts switching again.
3695f
13
LT3695
APPLICATIONS INFORMATION
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
The current in the inductor is a triangle wave with an av-
erage value equal to the load current. The peak inductor
and switch current is:
1.8
L =(VOUT + VD)•
fSW
ΔIL
2
ISW(PEAK) =IL(PEAK) =IOUT(MAX)
where I
+
is the peak inductor current, I
is
where f is the switching frequency in MHz, V
is the
L(PEAK)
OUT(MAX)
SW
OUT
the maximum output load current and ΔI is the induc-
output voltage, V is the catch diode drop (~0.5V) and L
L
D
tor ripple current. The LT3695 limits its switch current in
order to protect itself and the system from overload faults.
Therefore,themaximumoutputcurrentthattheLT3695will
deliver depends on the switch current limit, the inductor
value and the input and output voltages.
is the inductor value in μH.
Theinductor’sRMScurrentratingmustbegreaterthanthe
maximumloadcurrentanditssaturationcurrentshouldbe
about 30% higher. To keep the efficiency high, the series
resistance (DCR) should be less than 0.1Ω, and the core
materialshouldbeintendedforhighfrequencyapplications.
Table 2 lists several vendors and suitable types.
When the switch is off, the potential across the inductor
is the output voltage plus the catch diode drop. This gives
the peak-to-peak ripple current in the inductor:
For robust operation in fault conditions (start-up or short-
circuit) and high input voltage (>30V), the saturation
current should be chosen high enough to ensure that the
inductor peak current does not exceed 3.5A. For example,
an application running from an input voltage of 36V
using a 10μH inductor with a saturation current of 2.5A
will tolerate the mentioned fault conditions.
(1−DC)•(VOUT + VD)
ΔIL =
L • fSW
where f is the switching frequency of the LT3695, DC
SW
is the duty cycle and L is the value of the inductor.
To maintain output regulation, the inductor peak current
must be less than the LT3695’s switch current limit, I
.
LIM
The optimum inductor for a given application may differ
fromtheoneindicatedbythissimpledesignguide.Alarger
value inductor provides a higher maximum load current
and reduces the output voltage ripple. If your load is lower
than the maximum load current, then you can relax the
value of the inductor and operate with higher ripple cur-
rent. This allows you to use a physically smaller inductor,
or one with a lower DCR resulting in higher efficiency.
Be aware that if the inductance differs from the simple
rule above, then the maximum load current will depend
on input voltage. In addition, low inductance may result
in discontinuous mode operation, which further reduces
maximum load current. For details of maximum output
current and discontinuous mode operation, see Linear
Technology’s Application Note 44. Finally, for duty cycles
If the SYNC pin is grounded, I is at least 1.45A at low
LIM
duty cycles and decreases to 1.1A at DC = 90%. If the
SYNC pin is tied to 0.8V or more or if it is tied to a clock
source for synchronization, I
is at least 1.18A at low
LIM
duty cycles and decreases to 0.85A at DC = 90%. The
maximum output current is also a function of the chosen
inductor value and can be approximated by the following
expressions depending on the SYNC pin configuration:
For the SYNC pin grounded:
ΔI
2
ΔIL
2
IOUT(MAX) =ILIM
−
L =1.45A •(1−0.24•DC)−
For the SYNC pin tied to 0.8V or more, or tied to a clock
source for synchronization:
greaterthan50%(V /V >0.5), aminimuminductance
OUT IN
ΔI
2
ΔIL
2
is required to avoid sub-harmonic oscillations:
IOUT(MAX) =ILIM
−
L =1.18A •(1−0.29•DC)−
1.2
LMIN =(VOUT + VD)•
fSW
3695f
14
LT3695
APPLICATIONS INFORMATION
Choosing an inductor value so that the ripple current is
smallwillallowamaximumoutputcurrentneartheswitch
current limit.
switching current into a tight local loop, minimizing EMI.
A 2.2μF capacitor is capable of this task, but only if it is
placed close to the LT3695 (see the PCB Layout section
for more information). A second precaution regarding
the ceramic input capacitor concerns the maximum input
voltage rating of the LT3695. A ceramic input capacitor
combined with trace or cable inductance forms a high-Q
(underdamped)tankcircuit.IftheLT3695circuitisplugged
into a live supply, the input voltage can ring to twice its
nominal value, possibly exceeding the LT3695’s voltage
rating. For details see Application Note 88.
Table 2. Inductor Vendors
VENDOR
Murata
TDk
URL
PART SERIES
TYPE
www.murata.com
www.componenttdk.com
LQH55D
Open
SLF7045
SLF10145
Shielded
Shielded
Toko
www.toko.com
D62CB
D63CB
D73C
Shielded
Shielded
Shielded
Open
D75F
Coilcraft
Sumida
www.coilcraft.com
www.sumida.com
MSS7341
MSS1038
Shielded
Shielded
Output Capacitor and Output Ripple
The output capacitor has two essential functions. Along
withtheinductor,itfiltersthesquarewavegeneratedbythe
LT3695toproducetheDCoutput. Inthisroleitdetermines
the output ripple, and low impedance at the switching
frequency is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
LT3695’s control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good starting value is:
CR54
CDRH74
CDRH6D38
CR75
Open
Shielded
Shielded
Open
One approach to choosing the inductor is to start with the
simple rule given above, look at the available inductors,
and choose one to meet cost or space goals. Then use
these equations to check that the LT3695 will be able to
deliver the required output current. Note again that these
equations assume that the inductor current is continu-
50
ous. Discontinuous operation occurs when I
than ΔI /2.
is less
OUT
COUT
=
fSW
VOUT
is in MHz, and C is the recommended
OUT
L
where f
Input Capacitor
SW
output capacitance in μF. Use X5R or X7R types. This
choice will provide low output ripple and good transient
response. Transient performance can be improved with a
higher value capacitor if the compensation network is also
adjusted to maintain the loop bandwidth. A lower value
of output capacitor can be used to save space and cost
but transient performance will suffer. See the Frequency
Compensation section to choose an appropriate compen-
sation network.
BypasstheinputoftheLT3695circuitwithaceramiccapaci-
tor of X7R or X5R type. Y5V types have poor performance
over temperature and applied voltage, and should not be
used. A 2.2μF to 10μF ceramic capacitor is adequate to
bypasstheLT3695andwilleasilyhandletheripplecurrent.
Notethatlargerinputcapacitanceisrequiredwhenalower
switching frequency is used. If the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a lower performance
electrolytic capacitor.
When choosing a capacitor, look carefully through the
data sheet to find out what the actual capacitance is under
operating conditions (applied voltage and temperature).
A physically larger capacitor, or one with a higher voltage
rating, may be required. High performance tantalum or
electrolyticcapacitorscanbeusedfortheoutputcapacitor.
Step-down regulators draw current from the input sup-
ply in pulses with very fast rise and fall times. The input
capacitor is required to reduce the resulting voltage
ripple at the LT3695 and to force this very high frequency
3695f
15
LT3695
APPLICATIONS INFORMATION
Table 3. Capacitor Vendors
VENDOR
Panasonic
Kemet
PHONE
URL
PART SERIES
Ceramic, Polymer, Tantalum EEF Series
Ceramic, Tantalum T494, T495
COMMANDS
(714) 373-7366
(864) 963-6300
(408) 749-9714
(408) 436-1300
www.panasonic.com
www.kemet.com
www.sanyovideo.com
www.murata.com
www.avxcorp.com
www.taiyo-yuden.com
Sanyo
Ceramic, Polymer, Tantalum POSCAP
Ceramic
Murata
AVX
Ceramic, Tantalum
Ceramic
TPS Series
Taiyo Yuden
(864) 963-6300
Low ESR is important, so choose one that is intended for
use in switching regulators. The ESR should be specified
by the supplier, and should be 0.05Ω or less. Such a
capacitor will be larger than a ceramic capacitor and will
have a larger capacitance, because the capacitor must be
large to achieve low ESR. Table 3 lists several capacitor
vendors.
Table 4. Schottky Diodes
PART NUMBER V (V)
I
(A) V at 1A (mV) V at 2A (mV)
AVE F F
R
On-Semiconducor
MBR0520L
MBR0540
MBRM120E
MBRM140
Diodes Inc.
B0530W
B0540W
B120
20
40
20
40
0.5
0.5
1
620
530
550
595
1
Diode Selection
30
40
20
30
40
20
30
40
40
40
40
0.5
0.5
1
The catch diode (D1 from Block Diagram) conducts cur-
rent only during switch off time. Average forward current
in normal operation can be calculated from:
620
500
500
500
B130
1
B140
1
I
= I
• (1 – DC)
OUT
D(AVG)
B220
2
500
500
where DC is the duty cycle. The only reason to consider a
diodewithlargercurrentratingthannecessaryfornominal
operation is for the case of shorted or overloaded output
conditions. For the worst case of shorted output the diode
average current will then increase to a value that depends
on the following internal parameters: switch current limit,
catch diode (DA pin) current threshold and minimum
on-time. The worst case (taking maximum values for the
above mentioned parameters) is given by the following
expression:
B230
2
B140HB
DFLS240L
DFLS140
B240
1
530
510
2
500
500
1.1
2
Central Semiconductor
CMSH1-40M
CMSH1-40ML
CMSH2-40M
CMSH2-40L
CMSH2-40
40
40
40
40
40
1
1
2
2
2
500
400
550
400
500
V
2 L
1
ID(AVG)MAX = 2A + • IN •150ns
than the input voltage. If transients at the input of up to
60V are expected, use a diode with a reverse voltage rat-
ing of 40V. Table 4 lists several Schottky diodes and their
manufacturers.Ifoperatingathighambienttemperatures,
consider using a Schottky with low reverse leakage.
Peakreversevoltageisequaltotheregulatorinputvoltage
if it is below the overvoltage protection threshold. This
feature keeps the switch off for V > V
(39.9V maxi-
IN
OVLO
mum). For inputs up to the maximum operating voltage
of 36V, use a diode with a reverse voltage rating greater
3695f
16
LT3695
APPLICATIONS INFORMATION
Audible Noise
Loop compensation determines the stability and transient
performance. Optimizing the design of the compensation
network depends on the application and type of output
capacitor. A practical approach is to start with one of the
circuits in this data sheet that is similar to your applica-
tion and tune the compensation network to optimize the
performance. Stability should then be checked across all
operatingconditions, includingloadcurrent, inputvoltage
and temperature. The LT1375 data sheet contains a more
thorough discussion of loop compensation and describes
how to test the stability using a transient load. Figure 1
shows an equivalent circuit for the LT3695 control loop.
The error amplifier is a transconductance amplifier with
finite output impedance. The power section, consisting of
the modulator, power switch and inductor, is modeled as
a transconductance amplifier generating an output cur-
Ceramic capacitors are small, robust and have very
low ESR. However, ceramic capacitors can sometimes
cause problems when used with the LT3695 due to their
piezoelectric nature. When in Burst Mode operation, the
LT3695’sswitchingfrequencydependsontheloadcurrent,
and at very light loads the LT3695 can excite the ceramic
capacitor at audio frequencies, generating audible noise.
Since the LT3695 operates at a lower current limit during
Burst Mode operation, the noise is typically very quiet. If
this is unacceptable, use a high performance tantalum or
electrolytic capacitor at the output.
Frequency Compensation
The LT3695 uses current mode control to regulate the
output.Thissimplifiesloopcompensation.Inparticular,the
LT3695 does not require the ESR of the output capacitor
for stability, so you are free to use ceramic capacitors to
achieve low output ripple and small circuit size. Frequency
compensation is provided by the components tied to the
rent proportional to the voltage at the V pin. Note that
C
the output capacitor integrates this current, and that the
capacitor on the V pin (C ) integrates the error ampli-
C
C
fier output current, resulting in two poles in the loop. In
most cases a zero is required and comes from either the
V pin, as shown in Figure 1. Generally a capacitor (C )
C
C
output capacitor ESR or from a resistor R in series with
C
and a resistor (R ) in series to ground are used. In ad-
C
C . This simple model works well as long as the value
C
dition, there may be a lower value capacitor in parallel.
of the inductor is not too high and the loop crossover
This capacitor (C ) is used to filter noise at the switching
F
frequency is much lower than the switching frequency.
frequency, and is required only if a phase-lead capacitor
A phase lead capacitor (C ) across the feedback divider
PL
(C ) is used or if the output capacitor has high ESR.
PL
may improve the transient response. Figure 2 shows the
transient response when the load current is stepped from
300mA to 650mA and back to 300mA.
LT3695
CURRENT MODE
POWER STAGE
SW
FB
OUTPUT
g
= 1.25S
m
R1
C
PL
–
+
V
OUT
g
= 430µS
ESR
m
100mV/DIV
C1
+
0.8V
C1
3M
I
LOAD
CERAMIC
POLYMER
OR
V
C
GND
0.5A/DIV
TANTALUM
OR
ELECTROLITIC
3695 F02
20μs/DIV
R2
R
C
C
F
C
C
Figure 2. Transient Load Response of the LT3695. A 3.3VOUT
Typical Application with VIN = 12V as the Load Current is
Stepped from 300mA to 650mA
3695 F01
Figure 1. Model for Loop Response
3695f
17
LT3695
APPLICATIONS INFORMATION
Low Ripple Burst Mode Operation
at output loads higher than about 100mA. With the SYNC
pin tied high, the front page application circuit will switch
at full frequency at output loads higher than about 30mA.
The maximum load current that the LT3695 can supply is
reduced when SYNC is high.
The LT3695 is capable of operating in either low ripple
Burst Mode operation or pulse-skipping mode which are
selected using the SYNC pin. See the Synchronization
section for more information.
To enhance efficiency at light loads, the LT3695 can be
operated in low ripple Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst
Modeoperation, theLT3695deliverssinglecycleburstsof
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the
outputcapacitor.BecausetheLT3695deliverspowertothe
output with single, low current pulses, the output ripple
is kept below 15mV for a typical application. In addition,
BOOST Pin Considerations
CapacitorC3andtheinternalboostSchottkydiode(seethe
Block Diagram) are used to generate a boost voltage that
is higher than the input voltage. In most cases a 0.22μF
capacitor will work well. Figure 4 shows three ways to
arrange the boost circuit for the LT3695. The BOOST pin
must be more than 2.3V above the SW pin for best ef-
ficiency. For outputs of between 3V and 8V, the standard
circuit (Figure 4a) is best. For outputs between 2.8V and
3V, use a 1μF boost capacitor. A 2.5V output presents a
special case because it is marginally adequate to support
the boosted drive stage while using the internal boost
diode. For reliable BOOST pin operation with 2.5V outputs
use a good external Schottky diode (such as the ON Semi
MBR0540), and a 1μF boost capacitor (see Figure 4b).
For lower output voltages the boost diode can be tied to
the input (Figure 4c), or to another supply greater than
2.8V. Keep in mind that a minimum input voltage of 4.3V
is required if the voltage at the BD pin is smaller than 3V.
V
and BD quiescent currents are reduced to typically
IN
35μA and 55μA respectively during the sleep time. As the
load current decreases towards a no-load condition, the
percentageoftimethattheLT3695operatesinsleepmode
increases and the average input current is greatly reduced
resulting in high efficiency even at very low loads. (See
Figure 3). At higher output loads (above about 70mA for
the front page application) the LT3695 will be running at
the frequency programmed by the R resistor, and will be
T
operating in standard PWM mode. The transition between
PWM and low ripple Burst Mode operation is seamless,
and will not disturb the output voltage.
Tying BD to V reduces the maximum input voltage to
IN
25V. The circuit in Figure 4a is more efficient because the
BOOST pin current and BD pin quiescent current come
from a lower voltage source. You must also be sure that
the maximum voltage ratings of the BOOST and BD pins
are not exceeded.
If low quiescent current is not required, tie SYNC high to
select pulse-skipping mode. The benefit of this mode is
that the LT3695 will enter full frequency standard PWM
operation at a lower output load current than when in
Burst Mode operation. With the SYNC pin tied low, the
front page application circuit will switch at full frequency
As mentioned, a minimum of 2.5V across the BOOST
capacitor is required for proper operation of the internal
BOOST circuitry to provide the base current for the power
NPNswitch.ForBDpinvoltageshigherthan3V,theexcess
voltage across the BOOST capacitor does not bring an
increaseinperformancebutdissipatesadditionalpowerin
the internal BOOST circuitry instead. The BOOST circuitry
toleratesreasonableamountsofpower,howeverexcessive
powerdissipationonthiscircuitrymayimpairreliability.For
reliable operation, use no more than 8V on the BD pin for
the circuit in Figure 4a. For higher output voltages, make
sure that there is no more than 8V at the BD pin either by
V
SW
5V/DIV
I
L
0.2A/DIV
V
OUT
20mV/DIV
3695 F03
5μs/DIV
V
LOAD
= 12V, FRONT PAGE APPLICATION
IN
I
= 5mA
Figure 3. Switching Waveforms, Burst Mode Operation
connecting it to another available supply higher than 3V or
3695f
18
LT3695
APPLICATIONS INFORMATION
V
running properly. This minimum load will depend on input
and output voltages, and on the arrangement of the boost
circuit. The minimum load generally goes to zero once the
circuit has started. Figure 5 shows a plot of minimum load
to start and to run as a function of input voltage. In many
cases the discharged output capacitor will present a load
to the switcher, which will allow it to start. The plots show
OUT
BD
V
IN
V
BOOST
IN
C3
D1
SW
LT3695
DA
GND PGND
3695 F04a
theworst-casesituationwhereV isrampingveryslowly.
IN
For lower start-up voltage, the boost diode can be tied to
(4a) For VOUT > 2.8V, VIN(MIN) = 4.3V if VOUT < 3V
V ; however, this restricts the input range to one-half of
IN
V
OUT
the absolute maximum rating of the BOOST pin. At light
loads, the inductor current becomes discontinuous and
the effective duty cycle can be very high. This reduces the
minimum input voltage to approximately 300mV above
D2
BD
BOOST
V
IN
V
IN
C3
D1
SW
LT3695
V
. At higher load currents, the inductor current is
OUT
DA
continuous and the duty cycle is limited by the maximum
duty cycle of the LT3695, requiring a higher input voltage
to maintain regulation.
GND PGND
3695 F04b
(4b) For 2.5V < VOUT < 2.8V, VIN(MIN) = 4.3V
6.0
5.5
5.0
4.5
4.0
TO START
(WORST CASE)
BD
BOOST
V
IN
V
IN
C3
D1
V
OUT
SW
LT3695
3.5
3.0
DA
TO RUN
GND PGND
V
A
= 3.3V
OUT
T
= 25˚C
3695 F04c
2.5
2.0
L = 10μH
f = 800kHz
(4c) For VOUT < 2.5V, VIN(MAX) = 25V
1
10
100
1000
LOAD CURRENT (mA)
Figure 4. Three Circuits for Generating
the Boost Voltage
8.0
7.5
7.0
6.5
6.0
TO START
(WORST CASE)
by using a Zener diode between V
and BD to maintain
OUT
the BD pin voltage between 3V and 8V.
5.5
5.0
4.5
The minimum operating voltage of the LT3695 applica-
tion is limited by the minimum input voltage and by the
maximum duty cycle as outlined previously. For proper
start-up, the minimum input voltage is also limited by the
boost circuit. If the input voltage is ramped slowly, or the
LT3695 is turned on with its RUN/SS pin when the output
is already in regulation, then the boost capacitor may not
be fully charged. Because the boost capacitor is charged
with the energy stored in the inductor, the circuit will rely
on some minimum load current to get the boost circuit
TO RUN
4.0
3.5
3.0
2.5
V
A
= 5V
OUT
T
= 25˚C
L = 10μH
f = 800kHz
2.0
1
10
100
1000
LOAD CURRENT(mA)
3695 F05
Figure 5. The Minimum Input Voltage depends on
Output Voltage, Load Current and Boost Circuit
3695f
19
LT3695
APPLICATIONS INFORMATION
Soft-Start
TheLT3695maybesynchronizedovera300kHzto2.2MHz
range. The R resistor should be chosen to set the LT3695
T
The RUN/SS pin can be used to soft-start the LT3695,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC network to
create a voltage ramp at this pin. Figure 6 shows the start-
up and shutdown waveforms with the soft-start circuit.
By choosing a large RC time constant, the peak start-up
current can be reduced to the current that is required
to regulate the output, with no overshoot. Choose the
value of the resistor so that it can supply 7.5μA when the
RUN/SS pin reaches 2.5V. For fault tolerant applications,
see the discussion of the RUN/SS resistor in the Fault
Tolerance section.
switchingfrequency20%belowthelowestsynchronization
input.Forexample,ifthesynchronizationsignalis360kHz,
theR shouldbechosenfor300kHz.Toassurereliableand
T
safe operation the LT3695 will only synchronize when the
output voltage is near regulation as indicated by the PG
flag. It is therefore necessary to choose a large enough
inductor value to supply the required output current at the
frequencysetbytheR resistor.SeetheInductorSelection
T
section for more information. It is also important to note
that slope compensation is set by the R value; to avoid
T
subharmonicoscillations,calculatetheminimuminductor
value using the frequency determined by R .
T
V
RUN
Shorted and Reversed Input Protection
5V/DIV
RUN
15k
V
If the inductor is chosen so that it won’t saturate exces-
sively, the LT3695 will tolerate a shorted output. When
operatinginshort-circuitcondition,theLT3695willreduce
its frequency until the valley current is at a typical value of
1.6A (see Figure 7). There is another situation to consider
in systems where the output will be held high when the
input to the LT3695 is absent. This may occur in battery
charging applications or in battery backup systems where
a battery or some other supply is diode ORed with the
RUN/SS
5V/DIV
RUN/SS
GND
0.22μF
V
OUT
5V/DIV
I
L
1A/DIV
3695 F05
5ms/DIV
Figure 6. To Soft-Start the LT3695, Add a
Resistor and Capacitor to the RUN/SS Pin
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below 0.3V (this can be ground or a logic output).
V
SW
20V/DIV
Synchronizing the oscillator of the LT3695 to an external
frequency can be done by connecting a square wave (with
20% to 80% duty cycle) to the SYNC pin. The square wave
amplitude should have valleys that are below 0.3V and
peaks that are above 0.8V (up to 6V).
0V
I
L
500mA/DIV
The LT3695 will not enter Burst Mode operation at low
output loads while synchronized to an external clock, but
instead will skip pulses to maintain regulation.
0A
3695 F07
2μs/DIV
Figure 7. The LT3695 Reduces its Frequency to
Protect Against Shorted Output with 36V Input
The maximum load current that the part can supply is
reduced when a clock signal is applied to SYNC.
3695f
20
LT3695
APPLICATIONS INFORMATION
LT3695’s output. If the V pin is allowed to float and the
IN
GND
V
RUN/SSpinisheldhigh(eitherbyalogicsignalorbecause
OUT
it is tied to V ), then the LT3695’s internal circuitry will
IN
C2
D1
pull its quiescent current through its SW pin. This is fine
if your system can tolerate a few mA in this state. If you
ground the RUN/SS pin, the SW pin current will drop to
L
essentially zero. However, if the V pin is grounded while
IN
C3
the output is held high, then parasitic diodes inside the
LT3695 can pull large currents from the output through
the SW pin and the V pin. Figure 8 shows a circuit that
IN
R2
R1
will run only when the input voltage is present and that
R
V
T
protects against a shorted or reversed input.
R
C
D4
C1
C
C
MBRS140
BD
GND
IN
V
IN
V
IN
BOOST
LT3695
V
RUN/SS
SW
DA
OUT
3695 F09
Figure 9. A Good PCB Layout Ensures Proper,
Low EMI Operation
V
C
BACKUP
GND PGND FB
components, alongwiththeinductorandoutputcapacitor
(C ), should be placed on the same side of the circuit
OUT
3695 F09
board, andtheirconnectionsshouldbemadeonthatlayer.
All connections to GND should be made at a common
star ground point or directly to a local, unbroken ground
planebelowthesecomponents.TheSWandBOOSTnodes
should be laid out carefully to avoid interference. Finally,
Figure 8. Diode D4 Prevents a Shorted Input from Discharging
a Backup Battery Tied to the Output. It Also Protects the Circuit
from a Reversed Input. The Regulator Runs Only when the Input
is Present
keep the FB, R and V nodes small so that the ground
T
C
PCB Layout
traces will shield them from the SW and BOOST nodes.
To keep thermal resistance low, extend the ground plane
as much as possible and add thermal vias under and near
the LT3695 to any additional ground planes within the
circuit board and on the bottom side. Keep in mind that
thethermaldesignmustkeepthejunctionsoftheICbelow
the specified absolute maximum temperature.
ForproperoperationandminimumEMI,caremustbetaken
during printed circuit board layout. Figure 9 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3695’s V , SW and PGND pins, the catch
IN
diode and the input capacitor (C ). The loop formed by
IN
these components should be as small as possible. These
3695f
21
LT3695
APPLICATIONS INFORMATION
High Temperature Considerations
Power dissipation within the LT3695 can be estimated
by calculating the total power loss from an efficiency
measurement. The die temperature rise is calculated by
multiplying the power dissipation of the LT3695 by the
thermalresistancefromjunctiontoambient. Dietempera-
ture rise was measured on a 2-layer, 10cm × 10cm circuit
The PCB must provide heat sinking to keep the LT3695
cool. The Exposed Pad on the bottom of the package
may be soldered to a copper area which should be tied
to large copper layers below with thermal vias; these lay-
ers will spread the heat dissipated by the LT3695. Place
additional vias to reduce thermal resistance further. With
these steps, the thermal resistance from die (or junction)
board in still air at a load current of 1A (f = 800kHz).
SW
For a 12V input to 5V output the die temperature elevation
above ambient was 22°C with the exposed pad soldered
and 44°C without the exposed pad soldered.
to ambient can be reduced to θ = 40°C/W or less. With
JA
100 LFPM airflow, this resistance can fall by another 25%.
Further increases in airflow will lead to lower thermal
resistance. Because of the large output current capability
of the LT3695, it is possible to dissipate enough heat to
raise the junction temperature beyond the absolute maxi-
mum. When operating at high ambient temperatures, the
maximum load current should be derated as the ambient
temperature approaches these maximums. If the junction
temperature reaches the thermal shutdown threshold, the
part will stop switching to prevent internal damage due
to overheating.
Fault Tolerance
The LT3695 is designed to tolerate single fault conditions.
Shorting two adjacent pins together or leaving one single
pin floating does not raise V
or cause damage to the
OUT
LT3695. However, the application circuit must meet the
requirements discussed in this section in order to achieve
this tolerance level.
Tables 5 and 6 show the effects that result from shorting
adjacent pins or from a floating pin, respectively.
Table 5: Effects of Pin Shorts
PINS
EFFECT
No effect if V < V
PGND-DA
SW-RUN/SS
RUN/SS-RT
RT-SYNC
. See Input Voltage Range section for description of V
.
IN
IN(MAX)
IN(MAX)
The result of this short depends on the load resistance and on R3 (Figure 10). See the following discussion.
No effect or V
No effect or V
will fall below regulation voltage if I (Figure 10) < 1mA.
OUT
OUT
R3
will fall below regulation voltage if the current into the RT pin is less than 1mA.
SYNC-V
No effect if V does not exceed the absolute maximum voltage of SYNC (20V).
IN
IN
PG-GND
GND-BD
No effect.
V
may fall below regulation voltage, power dissipation of the power switch will be increased. Note that this short also grounds the
OUT
voltage source supplying BD. Make sure it is safe to short the supply for BD to ground. For this reason BD should not be connected to
V , but it is safe to connect it to V
.
OUT
IN
BD-BOOST
If diode D2 (see Figure 10) is used, no effect or V
may fall below regulation voltage. Otherwise the device may be damaged.
OUT
3695f
22
LT3695
APPLICATIONS INFORMATION
Table 6: Effects of Floating Pins
PIN
EFFECT
PGND
No effect if the Exposed Pad is soldered.
Otherwise: V
may fall below regulation voltage. Make sure that V < V
(see Input Voltage Range section for details) and
IN(MAX)
OUT
IN
provide a bypass resistor at the DA pin. See the following discussion.
may fall below regulation voltage. Make sure that V < V (see Input Voltage Range section for details) and provide a bypass
IN(MAX)
DA
V
OUT
IN
resistor. See the following discussion.
SW
V
V
V
V
will fall below regulation voltage.
will fall below regulation voltage.
will fall below regulation voltage.
OUT
OUT
OUT
OUT
RUN/SS
RT
SYNC
may fall below regulation voltage. A floating SYNC pin configures the LT3695 for pulse-skipping mode. However, a floating SYNC
pin is sensitive to noise which can degrade device performance.
V
V
V
V
will fall below regulation voltage.
IN
C
OUT
may fall below regulation voltage. Disconnecting the V pin alters the loop compensation and potentially degrades device
OUT
C
performance. The output voltage ripple will increase if the part becomes unstable.
V will fall below regulation voltage.
OUT
FB
PG
No effect.
GND
BD
Output maintains regulation, but potential degradation of device performance.
V
may fall below regulation voltage. If BD is not connected, the boost capacitor cannot be charged and thus the power switch cannot
OUT
saturate properly, which increases its power dissipation.
V may fall below regulation voltage. If BOOST is not connected, the boost capacitor cannot be charged and thus the power switch
OUT
BOOST
cannot saturate properly, which increases its power dissipation.
For the best fault tolerance to inadvertent adjacent pin
shorts, the RUN/SS pin must not be directly connected to
V
IN
D2
R3
V
BD
IN
RUN/SS BOOST
either ground or V . If there was a short between RUN/SS
IN
C3
D1
L1
andSWthenconnectingRUN/SStoV wouldtieSWtoV
IN
IN
V
OUT
SW
LT3695
R
SS
and would thus raise V . Likewise, grounding RUN/SS
47Ω
OUT
RT
DA
FB
would tie SW to ground and would damage the power
R1
R
LOAD
C
SS
220nF
switch if this is done when the power switch is on. A short
R
T
R2
C2
between RT and a RUN/SS pin that is connected to V
3695 F10
IN
would violate the absolute maximum ratings of the RT pin.
Therefore, the current supplying the RUN/SS pin must be
limited, for example, with resistor R3 in Figure 10. In case
of a short between RUN/SS and SW this resistor charges
C2 through the inductor L1 if the current it supplies from
Figure 10. The Dashed Lines Show where a Connection Would
Occur if There Were an Inadvertent Short from RUN/SS to an
Adjacent Pin or from BOOST to BD. In These Cases, R3 Protects
Circuitry Tied to the RT or SW Pins, and D2 Shields BOOST from
VOUT. If CSS is Used for Soft Start, RSS Isolates it from SW
3695f
23
LT3695
APPLICATIONS INFORMATION
V isnotcompletelydrawnbyR
, R1+R2, andtheBD
Table 7 shows example values for common applications.
SS
IN
LOAD
pin (if connected to V ). Since this causes V
to rise,
R
must be included as the switch node would otherwise
OUT
OUT
the LT3695 stops switching. The resistive divider formed
by R3, R , and R1 + R2 must be adjusted for V not
have to charge C if the SW pin and the RUN/SS pin are
SS
shorted, which may damage the power switch.
LOAD
OUT
toexceeditsnominalvalueattherequiredmaximuminput
voltage V . R3 must supply sufficient current into
IfRUN/SSiscontrolledbyanexternalcircuitry, thecurrent
this circuitry can supply must be limited. This can be done
as discussed above. In addition, it may be necessary to
protect this external circuitry from the voltage at SW, for
example by using a diode.
IN(MAX)
RUN/SS at the required minimum input voltage V
IN(MIN)
for normal non-fault situations. Based on the maximum
RUN/SS current of 7.5μA at V = 2.5V this gives
RUN/SS
V
IN(MIN) – 2.5V
Table 7. Example Values for R1, R2 and R3 for Common
Combinations of VIN and VOUT. IR1+R2 is the Current Drawn by
R1 + R2 in Normal Operation
R3≤
7.5µA
V
V
V
R3
R1
R2
I
R1+R2
IN(MAX)
IN(MIN)
OUT
ThecurrentthroughR3ismaximalatV
shorted to SW:
withRUN/SS
IN(MAX)
(V)
(V)
(V)
1.8
1.8
2.5
2.5
3.3
3.3
5
(kΩ)
(kΩ)
(kΩ)
(μA)
16
36
16
36
16
36
16
36
16
36
27
36
3.8
3.8
4.5
4.5
5
169
169
261
261
365
365
274
590
200
475
301
442
11.5
4.75
93.1
16.9
432
43.2
536
221
562
280
511
511
9.09
3.74
43.2
7.87
137
87
212
18
101
6
V
IN(MAX) – VOUT
IR3 =
R3
This current must be drawn by R
, R1 + R2, and the
LOAD
BD pin, if connected to V
:
OUT
5
13.7
102
58
8
7
VOUT
IR3 ≤
+IBD
7
5
42.2
61.9
30.9
36.5
36.5
19
13
26
22
22
RLOAD || R1+R2
(
)
10
10
14
14
8
8
Without load (R
= ∞) and assuming the minimum
LOAD
12
12
current of 35μA into the BD pin, this leads to
VOUT
IN(MAX) – VOUT
R1+R2≤
V
The BOOST pin must not be shorted to a low impedance
node like V that clamps its voltage. For best fault toler-
– 35µA
R3
OUT
ance, supply current into the BD pin through the Schottky
diode D2 as shown in Figure 10. Note that this diode must
beabletohandlethemaximumoutputcurrentincasethere
is a short between the BD pin and the GND pin.
as upper limit for the feedback resistors. For V
< 2.5V
OUT
assume no current drawn by the BD pin, which gives
VOUT •R3
R1+R2≤
VIN(MAX) – VOUT
A short between RUN/SS and SW may also increase the
output ripple. To suppress this, connect the soft-start
3695f
24
LT3695
APPLICATIONS INFORMATION
network consisting of R and C to RUN/SS as shown
If the DA pin or the PGND pin are inadvertently left float-
ing, the current path of the catch diode is interrupted
unless a bypass resistor is connected from DA to ground.
Use a 360mΩ (5% tolerance) resistor rated for a power
dissipation of
SS
SS
in Figure 10. C should not be smaller than 0.22μF.
SS
The SYNC pin must not be directly connected to either
ground or V . A short between RT and a SYNC pin that
IN
is connected to V could violate the absolute maximum
IN
2
ratings of the RT pin. A short between the SYNC pin and
P = I
• 0.36 • (1 – DC
)
LOAD(MAX)
MIN
the V pin could damage an external driver circuit which
IN
where I
is the maximum load current and DC
MIN
LOAD(MAX)
may be connected to SYNC or would short V to ground
IN
istheminimumdutycycle.Forexample,thiswouldrequire
a power rating of at least 219mW for an output current of
800mA and a minimum duty cycle of 5%. Make sure not
if SYNC is grounded.
The recommended connection for SYNC is shown in Fig-
ure 11. If SYNC is to be driven by an external circuitry, R
S
to exceed V
(see Input Voltage Range section for
IN(MAX)
may be used to isolate this circuitry from V . C must be
IN
S
details) during start-up or overload conditions.
used in this case to provide a low impedance path for the
synchronization signal. If SYNC is pulled low, R prevents
Other Linear Technology Publications
S
V from being shorted to ground in case of an inadvertent
IN
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing. Design Note 318
shows how to generate a bipolar output supply using a
buck regulator.
shortbetweenSYNCandV . IfSYNCispulledhightoV ,
IN
IN
then R protects the RT pin during an inadvertent short
S
between SYNC and RT.
V
IN
R
S
V
IN
100k
SYNC
SYNC
RT
C
S
100pF
LT3695
R
T
3695 F11
Figure 11. The Dashed Lines Show Where a Connection Would Occur
if There Were an Inadvertent Short from SYNC to an Adjacent Pin. In
This Case, RS Protects Circuitry Connecting to SYNC
3695f
25
LT3695
TYPICAL APPLICATIONS
Fully Tolerant 3.3V Step-Down Converter with Soft-Start
V
V
OUT
IN
5V TO 28.5V
3.3V
D2
TRANSIENT TO 36V
0.9A, V > 5V
1A, V > 6.5V
324k
IN
IN
V
BD
BOOST
IN
B140
L
RUN/SS
10μH
0.22μF
V
SW
C
D1
B140
LT3695
RT
2.2μF
PG
DA
FB
56.2k
47Ω
14k
40.2k
SYNC
0.22μF
470pF 100k
0.36Ω
17.8k
10μF
GND PGND
3695 TA02
f = 800kHz
1.8V Step-Down Converter
V
IN
3.6V TO 25V
V
IN
BD
4.7μF
L1
6.8μH
ON OFF
RUN/SS
BOOST
0.22μF
V
1.8V
1A
OUT
V
SW
C
D1
B140
LT3695
RT
PG
DA
FB
127k
17.4k
71.5k
SYNC
GND PGND
330pF 100k
102k
22μF
3695 TA03
f = 500kHz
5V, 2MHz Step-Down Converter
V
OUT
V
IN
5V
10V TO 16.5V
0.9A
TRANSIENT TO 36V
V
IN
BD
2.2μF
L
ON OFF
RUN/SS
BOOST
4.7μH
0.22μF
V
SW
C
D1
B140
LT3695
RT
PG
DA
FB
536k
13.3k
9.76k
SYNC
GND PGND
680pF 100k
102k
10μF
3695 TA04
f = 2MHz
3695f
26
LT3695
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev A)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 p 0.102
(.112 p .004)
2.845 p 0.102
(.112 p .004)
0.889 p 0.127
(.035 p .005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 p 0.102
(.065 p .004)
1.651 p 0.102
(.065 p .004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 p 0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 p 0.102
(.159 p .004)
(NOTE 3)
(.0120 p .0015)
TYP
0.280 p 0.076
(.011 p .003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0o – 6o TYP
0.254
(.010)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
MSOP (MSE16) 0608 REV A
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3695f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3695
TYPICAL APPLICATION
5V Step-Down Converter
V
V
IN
OUT
6.9V TO 36V
5V
0.9A, V > 6.9V
TRANSIENT TO 60V
IN
IN
V
BD
BOOST
IN
1A, V > 12V
2.2μF
ON OFF
RUN/SS
0.22μF
10μH
V
C
SW
D1
B140
LT3695
RT
PG
DA
FB
536k
16.2k
40.2k
SYNC
GND PGND
470pF 100k
102k
10μF
3695 TA05
f = 800kHz
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
V : 4V to 40V Transient to 60V, V
LT3970
LT3689
LT3685
LT3684
LT3682
LT3508
LT3507
LT3505
LT3500
LT3493
LT3481
LT3480
LT3437
40V, 350mA, 2MHz High Efficiency MicroPower Step-Down DC/DC
Converter
= 1.21V, I = 2μA,
OUT(MAX) Q
IN
I
< 1μA, 3mm × 2mm DFN-10, MSOP-10 Packages
SD
36V, 60V Transient Protection, 800mA, 2.2MHz High Efficiency MicroPower V : 3.6V to 36V Transient to 60V, V
Step-Down DC/DC Converter with POR Reset and Watchdog Timer
= 0.8V,
IN
OUT(MAX)
I = 75μA, I < 1μA, 3mm × 3mm QFN-16 Package
Q SD
36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High Efficiency
Step-Down DC/DC Converter
V : 3.6V to 38V, V
= 0.78V, I = 70μA, I < 1μA,
OUT
IN
OUT(MAX) Q SD
3mm × 3mm DFN-10, MSOP-10E Packages
34V with Transient Protection to 36V, 2A (I ), 2.8MHz, High Efficiency
Step-Down DC/DC Converter
V : 3.6V to 34V, V = 1.26V, I = 850μA, I < 1μA,
OUT
IN
OUT(MAX)
Q
SD
3mm × 3mm DFN-10, MSOP-10E Packages
36V, 60V
, 1A, 2.2MHz High Efficiency Micropower Step-Down DC/DC
MAX
V : 3.6V to 36V, V = 0.8V, I = 75μA, I < 1μA,
IN
OUT(MAX)
Q
SD
Converter
3mm × 3mm DFN-12 Package
36V with Transient Protection to 40V, Dual 1.4A (I ), 3MHz, High
Efficiency Step-Down DC/DC Converter
V : 3.7V to 36V, V = 0.8V, I = 4.6mA, I = 1μA,
OUT
IN
OUT(MAX)
Q
SD
4mm × 4mm QFN-24, TSSOP-16E Packages
36V 2.5MHz, Triple (2.4A + 1.5A + 1.5A (I )) with LDO Controller High
Efficiency Step-Down DC/DC Converter
V : 4V to 36V, V = 0.8V, I = 7mA, I = 1μA,
OUT
IN
OUT(MAX)
Q
SD
5mm × 7mm QFN-38 Package
36V with Transient Protection to 40V, 1.4A (I ), 3MHz, High Efficiency
Step-Down DC/DC Converter
V : 3.6V to 34V, V = 0.78V, I = 2mA, I = 2μA,
OUT
IN
OUT(MAX)
Q
SD
3mm × 3mm DFN-8, MSOP-8E Packages
36V, 40V
, 2A, 2.5MHz High Efficiency Step-Down DC/DC Converter and V : 3.6V to 36V, V
= 0.8V, I = 2.5mA, I < 10μA,
MAX
IN
OUT(MAX) Q SD
LDO Controller
3mm × 3mm DFN-10 Package
36V, 1.4A (I ), 750kHz High Efficiency Step-Down DC/DC Converter
V : 3.6V to 36V, V
= 0.8V, I = 1.9mA, I < 1μA,
Q SD
OUT
IN
OUT(MAX)
2mm × 3mm DFN-6 Package
34V with Transient Protection to 36V, 2A (I ), 2.8MHz, High Efficiency
Step-Down DC/DC Converter with Burst Mode Operation
V : 3.6V to 34V, V = 1.26V, I = 50μA, I < 1μA,
OUT
IN
OUT(MAX)
Q
SD
3mm × 3mm DFN-10, MSOP-10E Packages
36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High Efficiency
Step-Down DC/DC Converter with Burst Mode Operation
V : 3.6V to 38V, V = 0.78V, I = 70μA, I < 1μA,
OUT
IN
OUT(MAX)
Q
SD
3mm × 3mm DFN-10, MSOP-10E Packages
60V, 400mA (I ), MicroPower Step-Down DC/DC Converter with Burst
V : 3.3V to 60V, V = 1.25V, I = 100μA, I < 1μA,
OUT
IN
OUT(MAX)
Q
SD
Mode Operation
3mm × 3mm DFN-10, TSSOP-16E Package
LT3434/LT3435 60V, 2.4A (I ), 200kHz/500kHz, High Efficiency Step-Down DC/DC
V : 3.3V to 60V, V = 1.2V, I = 100μA, I < 1μA,
OUT
IN
OUT(MAX)
Q
SD
Converter with Burst Mode Operation
TSSOP-16E Package
LT1976/LT1977 60V, 1.2A (I ), 200kHz/500kHz, High Efficiency Step-Down DC/DC
V : 3.3V to 60V, V
= 1.2V, I = 100μA, I < 1μA,
Q SD
OUT
IN
OUT(MAX)
Converter with Burst Mode Operation
TSSOP-16E Package
LT1936
LT1766
36V, 1.4A (I ), 500kHz High Efficiency Step-Down DC/DC Converter
V : 3.6V to 36V, V
= 1.2V, I = 1.9mA, I < 1μA,
Q SD
OUT
IN
OUT(MAX)
MS8E Package
60V, 1.2A (I ), 200kHz, High Efficiency Step-Down DC/DC Converter
V : 5.5V to 60V, V
= 1.2V, I = 2.5mA, I = 25μA,
Q SD
OUT
IN
OUT(MAX)
TSSOP-16/E Package
3695f
LT 0709 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
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© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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