LT3742_1 [Linear]
Dual, 2-Phase Step-Down Switching Controller Programmable Soft-Start; 双通道,两相降压型开关控制器可编程软启动型号: | LT3742_1 |
厂家: | Linear |
描述: | Dual, 2-Phase Step-Down Switching Controller Programmable Soft-Start |
文件: | 总26页 (文件大小:307K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT3742
Dual, 2-Phase Step-Down
Switching Controller
FeaTures
DescripTion
TheLT®3742isadualstep-downDC/DCswitchingregulator
controllerthatdriveshighsideN-channelpowerMOSFETs.
A 500kHz fixed frequency current mode architecture pro-
vides fast transient response with simple loop compensa-
tion components and cycle-by-cycle current limiting. The
output stages of the two controllers operate 180° out of
phase to reduce the input ripple current, minimizing the
noise induced on the input supply, and allowing less input
capacitance.
n
Wide Input Voltage Range: 4V to 30V
n
Wide Output Voltage Range: 0.8V to V
IN
n
Low Shutdown I : 20µA
Q
n
Out-of-Phase Controllers Reduce Required Input
Capacitance and Power Supply Induced Noise
0.8V 1.5% Voltage Reference
n
n
n
500kHz Current Mode Fixed Frequency Operation
Internal Boost Converter Provides Bias Rail for
N-channel MOSFET Gate Drive
Power Good Voltage Monitor for Each Output
Programmable Soft-Start
24-Lead 4mm × 4mm × 0.75mm Package
n
n
n
AninternalboostregulatorgeneratesabiasrailofV +7V
IN
to provide gate drive for the N-channel MOSFETs allowing
low dropout and 100% duty cycle operation. The LT3742
can be used for applications where both controllers need
to operate independently, or where both controllers are
used to provide a single higher current output.
applicaTions
n
Satellite and Cable TV Set-Top Boxes
n
n
n
The device is available in a thermally enhanced 4mm ×
4mm QFN package.
Distributed Power Regulation
Automotive Systems
Super Capacitor Charger
L, LT, LTC, LTM, Linear Technology, the Linear logo, PolyPhase and Burst Mode are registered
trademarks and No R
is a trademark of Linear Technology Corporation. All other
SENSE
trademarks are the property of their respective owners.
Typical applicaTion
8V and 5V Dual Step-Down Converter
Efficiency vs Load Current
100
90
80
70
60
50
40
8V
OUT
10µH
V
4.7µF
IN
14V
45.3k
20.0k
5V
OUT
V
SWB BIAS
IN
UVLO
1µF
LT3742
V
V
IN
IN
10µF
10µF
G1
G2
6.5µH
6.5µH
0.010Ω
0.010Ω
V
V
5V
4A
OUT1
8V
OUT2
SW1
SW2
+
–
+
–
4A
SENSE1
SENSE1
FB1
SENSE2
1.8k
1.05k
200Ω
2.5
LOAD CURRENT (A)
3
0
0.5
1
1.5
2
3.5
4
SENSE2
FB2
47µF
47µF
3742 TA01b
200Ω
PG1
PG1
PG2
PG2
RUN/SS1
RUN/SS2
V
V
C2
C1
30k
20k
RUN1
RUN2
GND
1nF
1000pF
1000pF
1nF
3742 TA01a
3742fa
1
LT3742
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
V Voltage................................................................30V
IN
TOP VIEW
UVLO Voltage............................................................30V
PG1, PG2 Voltage......................................................30V
SWB, BIAS Voltage ...................................................40V
24 23 22 21 20 19
+
+
G1
1
2
3
4
5
6
18
17
16
V
C1
SENSE1 , SENSE2 Voltage ......................................30V
–
–
V
PG1
IN
SENSE1 , SENSE2 Voltage......................................30V
RUN/SS1, RUN/SS2 Voltage .......................................6V
FB1, FB2 Voltage.........................................................6V
UVLO
RUN/SS1
25
BIAS
SWB
G2
15 RUN/SS2
14 PG2
V , V Voltage..........................................................6V
C1 C2
13
V
C2
Junction Temperature ........................................... 125°C
7
8
9 10 11 12
Operating Junction Temperature Range
(Note 2).................................................. –40°C to 125°C
Storage Temperature Range .................. –65°C to 125°C
UF PACKAGE
24-LEAD (4mm × 4mm) PLASTIC QFN
T
= 125°C, θ = 36°C/W
JA
JMAX
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
24-Lead (4mm × 4mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 125°C (Note 2)
LT3742EUF#PBF
LT3742EUF#TRPBF
3742
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
3.5
5.0
20
MAX
4.0
7.0
35
UNITS
V
l
Minimum Operating Input Voltage
Quiescent Current
V
V
V
= 1.5V
UVLO
= V
= V
= V = V = 1V
mA
µA
V
RUN/SS1
RUN/SS1
RUN/SS2
RUN/SS2
FB1
FB2
Shutdown Current
= 0V
l
UVLO Pin Threshold
UVLO Pin Voltage Rising
1.20
1.8
1.25
3
1.28
4
UVLO Pin Hysteresis Current
RUN/SS Pin Threshold
RUN/SS Pin Charge Current
FB Pin Voltage
V
V
V
= 1V, Current Flows Into Pin
µA
V
UVLO
0.2
0.5
1
= 0V
0.5
1.5
µA
V
RUN/SS
l
0.788
0.800
0.01
0.812
FB Pin Voltage Line Regulation
= 5V to 30V
%/V
IN
3742fa
2
LT3742
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
50
MAX
200
4
UNITS
nA
FB Pin Bias Current
V
FB
= 0.8V, V = 0.4V
C
FB Pin Voltage Matching
Error Amplifier Transconductance
Error Amplifier Voltage Gain
–4
0
mV
µmho
V/V
µA
250
500
15
V Pin Source Current
C
V
V
= 0.6V
= 1V
FB
V Pin Sink Current
C
15
µA
FB
Controller Switching Frequency
Switching Phase
440
50
500
180
60
560
70
kHz
Deg
mV
%
–
l
Maximum Current Sense Voltage
Current Sense Matching
V
= 3.3V
SENSE
Between Controllers
5
–
–
+
+
Current SENSE Pins Total Current
SENSE , SENSE = 0V
–1.0
40
mA
µA
SENSE , SENSE = 3.3V
Gate Rise Time
Gate Fall Time
C
C
V
V
= 3300pF
= 3300pF
= 12V
40
60
ns
ns
V
LOAD
LOAD
BIAS
BIAS
Gate On Voltage (V – V
)
6.0
6.7
0.4
0.20
–10
–13
10
7.0
0.75
0.5
–13
–16
13
G
SW
Gate Off Voltage (V – V
)
SW
= 12V
V
G
PG Pin Voltage Low
I
= 100µA
V
PG
Lower PG Trip Level (Relative to V
Lower PG Trip Level (Relative to V
)
)
V
FB
V
FB
V
FB
V
FB
V
PG
V
PG
Increasing
Decreasing
Increasing
Decreasing
= 2V
–7
–10
7
%
FB
%
FB
Upper PG Trip Level (Relative to V
Upper PG Trip Level (Relative to V
PG Pin Leakage Current
PG Pin Sink Current
)
%
FB
FB
)
4
7
10
%
0.1
500
µA
µA
V
= 0.5V
200
Bias Pin Voltage
V
+ 6.6
V
+ 7
V + 7.7
IN
IN
IN
SWB Pin Current Limit
250
340
500
1
mA
µA
MHz
SWB Pin Leakage Current
Bias Supply Switching Frequency
V
= 12V
0.01
1.0
SWB
0.88
1.12
Note 2: The LT3742E is guaranteed to meet performance specifications
from 0°C to 125°C operating junction temperature range. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
3742fa
3
LT3742
Typical perForMance characTerisTics
Controller Current Sense Voltage
vs Temperature
IQ-SHDN vs Temperature
IQ-Running vs Temperature
10
9
70
65
60
55
50
40
30
20
8
7
6
5
4
50
3
10
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
75
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
3742 G03
3742 G02
3742 G01
Internal UVLO vs Temperature
UVLO Threshold vs Temperature
VFB vs Temperature
830
820
810
800
5
4
3
2
3.0
2.5
2.0
1.5
790
780
770
1.0
0.5
0
1
50
100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
75
50
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3742 G04
3742 G06
3742 G05
RUN/SS Current vs Temperature
UVLO IHYST vs Temperature
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.2
0.6
0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
3742 G08
3742 G07
3742fa
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LT3742
Typical perForMance characTerisTics
Controller Frequency
vs Temperature
PG Threshold vs Temperature
VBIAS – VIN vs Temperature
10
8
600
550
500
450
1.0
0.9
0.8
0.7
POWER GOOD
6
400
0.6
4
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3742 G09
3742 G10
3742 G11
RUN/SS Threshold
vs Temperature
SWB Current Limit
vs Temperature
1.0
0.7
0.4
0.1
380
360
340
320
300
–50 –25
0
25
50
75 100 125
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
3742 G12
3742 G13
3742fa
5
LT3742
pin FuncTions
G1, G2 (Pins 1, 6): Gate Drives. These pins provide high
current gate drive for the external N-channel MOSFETs.
These pins are the outputs of floating drivers whose volt-
age swings between the BIAS and SW pins.
PG1, PG2 (Pins 17, 14): Power Good. These pins are
open-collectoroutputsofinternalcomparators.PGremains
low until the FB pin is within 90% of the final regulation
voltage. As well as indicating output regulation, the PG
pins can be used to sequence the switching regulators.
V (Pin 2): Input Voltage. This pin supplies current to the
IN
The PG outputs are valid when V is greater than 4V
IN
internal circuitry of the LT3742. This pin must be locally
and either of the RUN/SS pins is high. The power good
comparators are disabled in shutdown. If not used, these
pins should be left unconnected.
bypassed with a capacitor.
UVLO (Pin 3): Undervoltage Lockout. Do not leave this
pin open; connect it to V if not used. A resistor divider
IN
V ,V (Pins18,13):ControlVoltageandCompensation
C1 C2
connected to V is tied to this pin to program the mini-
IN
Pins for Internal Error Amplifiers. Connect a series RC
from these pins to ground to compensate each switching
regulator loop.
muminputvoltageatwhichtheLT3742willoperate. When
this pin is less than 1.25V, the controllers are disabled
(the RUN/SS pins are still used to turn on each switching
regulator). Once this pin drops below 1.25V, a 3µA current
sink draws current into the pin to provide programmable
hysteresis for UVLO.
FB1, FB2 (Pins 19, 12): Feedback Pins. The LT3742
regulates these pins to 800mV. Connect the feedback
resistors to this pin to set the output voltage for each
switching regulator.
BIAS (Pin 4): Bias for Gate Drive. This pin provides a bias
voltage higher than the input voltage to drive the external
N-channel MOSFETs. The voltage on this pin is regulated
–
–
SENSE1 ,SENSE2 (Pins20,11):NegativeCurrentSense
+
Inputs.Thesepins(alongwiththeSENSE pins)areusedto
sense the inductor current for each switching regulator.
to V + 7V.
IN
+
+
SWB (Pin 5): Bias Regulator Switch. This is the collec-
tor of an internal NPN switch used to generate the bias
voltage to provide gate drive for the external N-channel
MOSFETs.
SENSE1 , SENSE2 (Pins21, 10):PositiveCurrentSense
–
Inputs.Thesepins(alongwiththeSENSE pins)areusedto
sense the inductor current for each switching regulator.
SW1,SW2(Pins24,7):SwitchNodes.Thesepinsconnect
to the source of the external N-channel MOSFETs and to
the external inductors and diodes.
RUN/SS1, RUN/SS2 (Pins 16, 15): Run/Soft-Start Pins.
These pins are used to shut down each controller. They
also provide a soft-start function with the addition of an
external capacitor. To shut down any regulator, pull the
RUN/SS pin to ground with an open-drain or open-col-
lector device. If neither feature is used, leave these pins
unconnected.
Exposed Pad (Pin 25): Ground. The Exposed Pad of the
package provides both electrical contact to ground and
good thermal contact to the printed circuit board. The
Exposed Pad must be soldered to the circuit board to
ensure proper operation.
3742fa
6
LT3742
block DiagraM
SWB
BIAS
V
IN
5
4
GND
25
GATE DRIVE BIAS
BOOST REGULATOR
BIAS
UNDERVOLTAGE
LOCKOUT
V
V
2
3
IN
IN
+
–
1.25V
3µA
UVLO
THERMAL
SHUTDOWN
1.25V
0.88V
0.80V
0.72V
UVLO
V
REF
INTERNAL
SUPPLY
ENABLE
COMPARATOR
–
+
ENABLE
≈0.5V
ENABLE
+
1MHz MASTER
OSCILLATOR
D
Q
Q
PHASE SYNC FOR
DC/DC CONTROLLERS
TO
RUN/SS1
RUN/SS2
LT3742 CONTROLLER 1 AND 2
PHASE SYNC
V
IN
BIAS
G
R
S
Q
GATE
DRIVER
SW
V
OUT
500kHz SLAVE
OSCILLATOR
CURRENT
SENSE
TO ENABLE
COMPARATOR
+
AMPLIFIER
SENSE
+
–
–
Σ
SENSE
PWM
COMPARATOR
ERROR
AMPLIFIER
+
–
–
FB
1µA
+
RUN/SS
0.80V
+
SHDN
SS
V
C
–
+
0.88V
0.72V
PG
PGOOD
FB
POWER GOOD
COMPARATORS
–
+
3742 BD1
3742fa
7
LT3742
operaTion
A power good comparator pulls the PG pin low whenever
the FB pin is not within 10% of the 800mV internal
reference voltage. PG is the open-collector output of an
NPN that is off when the FB pin is in regulation, allowing
an external resistor to pull the PG pin high. This power
good indication is valid only when the device is enabled
The LT3742 is a dual, constant frequency, current mode
DC/DC step-down controller. The two controllers in each
device share some common circuitry including protec-
tion circuitry, the internal bias supply, voltage reference,
master oscillator and the gate drive boost regulator. The
Block Diagram shows the shared common circuitry and
the independent circuitry for both DC/DC controllers.
(RUN/SS is high) and V is 4V or greater.
IN
TheLT3742enableseachcontrollerindependentlywhenits
RUN/SS pin is above 0.5V and each controller generates
its own soft-start ramp. During start-up, the error ampli-
fier compares the FB pin to the soft-start ramp instead of
the precision 800mV reference, which slowly raises the
output voltage until it reaches its resistor programmed
regulation point. Control of the inductor current is strictly
maintaineduntiltheoutputvoltageisreached. TheLT3742
isidealforapplicationswherebothDC/DCcontrollersneed
to operate separately.
Important protection features included in the LT3742 are
undervoltage lockout and thermal shutdown. When either
of these conditions exist, the gate drive bias regulator and
bothDC/DCcontrollersaredisabledandbothRUN/SSpins
are discharged to 0.5V to get ready for a new soft-start
cycle. Undervoltagelockout(UVLO)isprogrammedusing
two external resistors. When the UVLO pin drops below
1.25V, a 3µA current sink is activated to provide program-
mable hysteresis for the UVLO function. A separate, less
accurate, internal undervoltage lockout will disable the
LT3742 when V is less than 2.5V.
IN
A pulse from the 500kHz oscillator sets the RS flip-flop
and turns on the external N-channel MOSFET. Current in
the switch and the external inductor begins to increase.
Whenthiscurrentreachesaleveldeterminedbythecontrol
The gate drive boost regulator is enabled when all internal
fault conditions have been cleared. This regulator uses
both an internal NPN power switch and Schottky diode to
generate a voltage at the BIAS pin that is 7V higher than
theinputvoltage.BothDC/DCcontrollersaredisableduntil
the BIAS voltage has reached ~90% of its final regulation
voltage. This ensures that sufficient gate drive to fully
enhancetheexternalMOSFETs is presentbeforethedriver
is allowed to turn on.
voltage (V ), the PWM comparator resets the flip-flop,
C
turning off the MOSFET. The current in the inductor then
flows through the external Schottky diode and begins to
decrease.Thiscyclebeginsagainatthenextsetpulsefrom
the slave oscillator. In this way, the voltage at the V pin
C
controls the current through the inductor to the output.
The internal error amplifier regulates the output voltage
The master oscillator runs at 1MHz and clocks the gate
drive boost regulator at this frequency. The master oscilla-
tor also generates two 500kHz clocks, 180° out of phase,
for the DC/DC controllers.
by continually adjusting the V pin voltage. Direct control
C
of the peak inductor current on a cycle-by-cycle basis is
managedbythecurrentsenseamplifier.Becausetheinduc-
tor current is constantly monitored, the devices inherently
provide excellent output short-circuit protection.
3742fa
8
LT3742
applicaTions inForMaTion
Soft-Start and Shutdown
compares the FB pin to this ramp instead of to the 800mV
reference; this slowly and smoothly increases the output
voltage to its final value, while maintaining control of the
inductor current. Always check the inductor current and
output voltage waveforms to ensure that the programmed
soft-start time is long enough. A new soft-start cycle will
TheRUN/SS(Run/Soft-Start)pinsareusedtoenableeach
controller independently, and to provide a user-program-
mable soft-start function that reduces the peak input
current and prevents output voltage overshoot during
start-up. To disable either controller, pull its RUN/SS pin
to ground with an open-drain or open-collector device.
If both RUN/SS pins are pulled to ground, the LT3742
is placed in shutdown mode, and quiescent current is
reduced to 20µA. Internal 1µA current sources pull up on
each RUN/SS pin, and when either pin reaches 0.5V, that
controller is enabled, along with the internal bias supply,
gate drive boost regulator, voltage reference and master
oscillator. If both outputs are always enabled together,
one soft-start capacitor can be used with both RUN/SS
pins tied together.
be initiated whenever V drops low enough to trigger
IN
undervoltage lockout (programmed using the UVLO pin),
ortheLT3742dietemperatureexceedsthermalshutdown.
A typical value for the soft-start capacitor is 1nF.
Soft-start is strongly recommended for all LT3742 appli-
cations, as it provides the least amount of stress on the
externalpowerMOSFETandcatchdiode.Withoutsoft-start,
both of these components will see the maximum current
limit every start-up cycle. Figures 1a and 1b show start-
up waveforms with and without soft-start for the circuit
on the front page. Notice the large inductor current spike
and the output voltage overshoot when soft-start is not
used. While this may be acceptable for some systems, the
addition of a single capacitor dramatically improves the
start-up behavior of each DC/DC controller.
The Benefits of Soft-Start
When a capacitor is tied from the RUN/SS pin to ground,
the internal 1µA pull-up current source generates a volt-
age ramp on this pin. During start-up, the error amplifier
V
V
OUT
5V/DIV
OUT
5V/DIV
I
L
2A/DIV
I
L
2A/DIV
3742 F01a
3742 F01b
0.5ms/DIV
0.5ms/DIV
Figure 1a. Start-Up Waveforms Without Soft-Start
Figure 1b. Start-Up Waveforms with 1nF Soft-Start Capacitor
3742fa
9
LT3742
applicaTions inForMaTion
Power Good Indicators
Output Sequencing and Tracking
The PG pin is the open-collector output of an internal
window comparator that is pulled low whenever the FB
pin is not within 10% of the 800mV internal reference
voltage. Tie the PG pin to any supply less than 30V with
a pull-up resistor that will supply less than 200µA. This
pin will be open when the LT3742 is placed in shutdown
mode regardless of the voltage at the FB pin. The power
good indication is valid only when the LT3742 is enabled
TheRUN/SSandPGpinscanbeusedtogethertosequence
the two outputs of the LT3742. Figure 3 shows three
circuits to do this. For the first two cases, controller 1
starts first.
In Figure 2a, controller 2 turns on only after controller
1 has reached within 10% of its final regulation voltage.
A larger value for the soft-start capacitor on RUN/SS2
will provide additional delay between the outputs. One
(RUN/SS is high) and V is 4V or greater.
IN
LT3742
RUN/SS1
SHDN (REFERENCE)
4.7nF
4.7nF
SHDN
V
OUT1
5V/DIV
PG1
V
OUT2
RUN/SS2
10V/DIV
3742 F02a
5ms/DIV
Figure 2a. Supply Sequencing with Controller 2 Delayed Until After Controller 1 is in Regulation
LT3742
RUN/SS1
SHDN (REFERENCE)
4.7nF
10nF
SHDN
V
OUT1
5V/DIV
V
OUT2
RUN/SS2
10V/DIV
3742 F02b
5ms/DIV
Figure 2b. Supply Sequencing with Controller 2 Having a Fixed Delay Relative to Controller 1
LT3742
RUN/SS1
SHDN (REFERENCE)
10nF
SHDN
V
OUT1
5V/DIV
V
OUT2
RUN/SS2
10V/DIV
3742 F02c
5ms/DIV
Figure 2c. Both Conditions Start Up Together with Ratiometic Tracking
3742fa
10
LT3742
applicaTions inForMaTion
characteristic to notice about this method is that if the
output of controller 1 goes out of regulation enough
to trip the power good comparator, controller 2 will be
disabled.
tie it to V if not used. A separate, less accurate, internal
IN
undervoltage lockout will disable the LT3742 when V is
IN
less than 2.5V.
The UVLO resistor values are chosen to give the desired
InFigure2b, aslightlylargercapacitoronRUN/SS2delays
the turn-on of controller 2 with respect to controller 1. The
start-up waveforms for this method look very similar to
the one shown in Figure 6a, but here controller 2 is not
disabled if controller 1 goes out of regulation.
minimum operating voltage (V
) and the desired
IN(MIN)
amount of hysteresis (V
). The LT3742 will turn on
HYST
when the input voltage is above (V
+ V
IN(MIN)
), and
IN(MIN)
HYST
onceon,willturnoffwhenV dropsbelowV
.Select
IN
the value for R
first, then select the value for R
.
UV1
UV2
VHYST
3µA
In Figure 2c, both RUN/SS pins share a single capacitor
and start up at the same time. By sharing the same soft-
start signal, this method provides ratiometric tracking of
the two outputs.
RUV1
=
1.25V
IN(MIN) – 1.25V
RUV2 = RUV1
•
V
Undervoltage Lockout (UVLO)
Input Voltage Range
An external resistor divider can be used to accurately
set the minimum input voltage at which the LT3742 will
operate. Figure 3 shows the basic UVLO operation. Once
the UVLO pin drops below 1.25V, an undervoltage lock-
out event is signaled, turning on a 3µA current source to
provide hysteresis.
The minimum input voltage is determined by either the
LT3742’s minimum operating voltage of 4V, UVLO or by
the output voltages of a given application. The LT3742 can
operate at 100% duty cycle, so if the input voltage drops
close to or equal to one of the output voltages, the control-
ler will go into low dropout operation (100% duty cycle).
The duty cycle is the fraction of the time the N-channel
MOSFET is on every switch cycle, and is determined by
the input and output voltages:
During a UVLO event, both controllers and the gate drive
boost regulator are disabled. For the LT3742, all RUN/SS
pins are discharged to get ready for a new soft-start cycle.
For each controller that is enabled, it’s RUN/SS pin will
be held to 500mV until the input voltage rises above the
upper UVLO trip voltage. The UVLO function is only active
when one or more of the controllers are enabled using the
RUN/SS pin. The UVLO pin can not be used to directly
start the part. Do not leave the UVLO pin unconnected;
⎛
⎜
⎝
⎞
⎟
⎠
VOUT + VD
DC =
V – V + V
IN
D
DS
where V is the forward drop of the catch diode (~0.4V)
D
and V is the typical MOSFET voltage drop (~0.1V).
DS
V
IN
V
2
3
1.25V
+
IN
R
R
UVLO
UV1
UVLO
–
3µA
UV2
3742 F03
Figure 3. Undervoltage Lockout
3742fa
11
LT3742
applicaTions inForMaTion
The maximum input voltage is determined by the absolute
The Benefits of 2-Phase Operation
maximumratingsoftheV andBIASpins(30Vand40V,re-
IN
Traditionally, dual controllers operate with a single phase.
This means that both power MOSFETs are turned on at
the same time, causing current pulses of up to twice the
amplitude of those from a single regulator to be drawn
from the input capacitor. These large amplitude pulses
increase the RMS current flowing in the input capacitor,
require the use of larger and more expensive input capaci-
tors, increase EMI, and causes increased power losses in
the input capacitor and input power supply.
spectively)andbytheminimumdutycycle,DC =15%.
MIN
⎛
⎜
⎝
⎞
⎟
⎠
VOUT + VD
DCMIN
V
=
+ V – VD
SW
IN(MAX)
The formula above calculates the maximum input voltage
that allows the part to regulate without pulse-skipping,
and is mainly a concern for applications with output volt-
ages lower than 3.3V. For example, for a 2.5V output, the
maximum input voltage is:
ThetwocontrollersoftheLT3742areguaranteedbydesign
to operate 180° out of phase. This assures that the current
ineachpowerMOSFETwillneveroverlap, alwayspresent-
ing a significantly low peak and RMS current demand to
the input capacitor. This allows the use of a smaller, less
expensive input capacitor, improving EMI performance
and real world operating efficiency.
⎛
⎜
⎝
⎞
⎟
⎠
2.5V + 0.4V
V
=
+ 0.1V – 0.4V = 19V
IN(MAX)
0.15
Ifaninputvoltagehigherthan19Visused, the2.5Voutput
will still regulate correctly, but the part must pulse-skip
to do so. Pulse skipping does not damage the LT3742,
but it will result in erratic inductor current waveforms
and higher peak currents. Note that this is a restriction
on the operating input voltage only for a specific output
voltage; the circuit will tolerate inputs up to the absolute
maximum rating.
Figure4showsexamplewaveformsforasinglephasedual
controller versus a 2-phase LT3742 system. In this case,
5V and 3.3V outputs, each drawing a load current of 2A,
are derived from a 12V supply. In this example, 2-phase
Single Phase
Dual Controller
2-Phase
Dual Controller
SW1 (V)
SW2 (V)
I
I
L1
L2
I
IN
3742 F04
Figure 4. Example Waveforms for a Single Phase Dual Controller vs the 2-Phase LT3742
3742fa
12
LT3742
applicaTions inForMaTion
operation would reduce the RMS input capacitor current
Inductor Value Selection
The inductor value directly affects inductor ripple current,
, and maximum output current, I . Lower
ripple current reduces core losses in the inductor, ESR
losses in the output capacitors and output voltage ripple.
Too large of a value, however, will result in a physically
large inductor. A good trade-off is to choose the inductor
ripple current to be ~30% of the maximum output current.
This will provide a good trade off between the inductor
size, maximum output current, and the amount of ripple
current. Note that the largest ripple current occurs at the
from ~1.8A
to ~0.8A
. While this is an impressive
RMS
RMS
reduction by itself, remember that power losses are pro-
I
2
RIPPLE
OUT(MAX)
portional to I
, meaning that the actual power wasted
RMS
due to the input capacitor is reduced by a factor of ~4.
Figure 5 shows the reduction in RMS ripple current for a
typical application.
The reduced input ripple current also means that less
power is lost in the input power path. Improvements in
both conducted and radiated EMI also directly accrue as
a result of the reduced RMS input current and voltage.
Significant cost and board footprint savings are also real-
ized by being able to use smaller, less expensive, lower
RMS current-rated input capacitors.
highest the input voltage, so applications with a wide V
IN
when
range should consider both V
calculating the inductor value:
and V
IN(TYP)
IN(MAX)
Of course, the improvement afforded by 2-phase opera-
tion is a function of the relative duty cycles of the two
controllers, which in turn, are dependent upon the input
V – V
0.3 •IOUT(MAX)
VOUT
1
IN
OUT
L ≥
•
•
V
500kHz
IN
voltage (DC ≈ V /V ).
OUT IN
This equation provides a good starting point for pick-
ing the inductor value. Most systems can easily tolerate
ripple currents in the range of 10% to 50%, so deviating
slightly from the calculated value is acceptable for most
applications. Pick a standard value inductor close to the
It can be readily seen that the advantages of 2-phase op-
eration are not limited to a narrow operating range, but in
fact extend over a wide region. A good rule of thumb for
mostapplicationsisthat2-phaseoperationwillreducethe
input capacitor requirement to that for just one channel
operating at maximum current and 50% duty cycle.
3.0
2.5
2.0
1.5
SINGLE PHASE
DUAL CONTROLLER
2-PHASE
DUAL CONTROLLER
1.0
0.5
0
V
O1
V
O2
= 5V/3A
= 3.3V/3A
0
10
20
INPUT VOLTAGE (V)
30
40
3742 F05
Figure 5. RMS Input Current Comparison
3742fa
13
LT3742
applicaTions inForMaTion
value calculated above, and then recheck the amount of
ripple current:
Inductor, Catch Diode and MOSFET Current Rating
OncetheinductorandR valueshavebeenchosen,the
current ratings of the inductor, catch diode and MOSFET
can then be determined. The LT3742 current comparator
has a guaranteed maximum threshold of 70mV, and there
is a small amount of current overshoot resulting from
the response time of the current sense comparator. The
components should be rated to handle:
SENSE
V – V
VOUT
1
IN
OUT
IRIPPLE
=
•
•
L
V
500kHz
IN
The DC resistance (DCR) of the inductor can have a sig-
nificant impact on total system efficiency, as it causes an
2
I R
power loss. Consider inductance value, DCR, and
DCR
current rating when choosing an inductor. Table 1 shows
several recommended inductor vendors. Each offers
numerous devices in a wide variety of values, current
ratings, and package sizes.
⎛
⎜
⎝
⎞
⎟
⎠
70mV
RSENSE
V
IN
L
IRATED
≥
+
• 100ns
Schottky Catch Diode Selection
Table 1. Recommended Inductor Manufacturers
Duringoutputshort-circuits,thediodewillconductcurrent
most of the time, so it is important to choose a device
with a sufficient current rating. In addition, the diode must
have a reverse voltage rating greater than the maximum
input voltage. Many surface mount Schottky diodes are
available in very small packages. Read their data sheets
carefully as they typically must be temperature derated.
Basically, excessive heating prevents them from being
used effectively at their rated maximum current. A few
recommended diodes are listed in Table 2.
VENDOR
Sumida
Toko
WEBSITE
www.sumida.com
www.toko.com
Würth
www.we-online.com
www.nec-tokinamerica.com
www.tdk.com
NEC-Tokin
TDK
Maximum Output Current (R
Value Selection)
SENSE
Maximum output current is determined largely by the
values of the current sense resistor, RSENSE (which sets
the inductor peak current), and the inductor (which sets
the inductor ripplecurrent). TheLT3742 currentcompara-
tor has a guaranteed minimum threshold of 50mV, which
does not vary with duty cycle. The maximum output cur-
rent is calculated:
Table 2. Recommended Schottky Diodes
VENDOR
DEVICE
Diodes, Inc.
www.diodes.com
PDS540 (5A, 40V)
SBM1040 (10A, 40V)
Microsemi
www.microsemi.com
UPS340 (3A, 40V)
UPS840 (8A, 40V)
50mV IRIPPLE
RSENSE
On Semiconductor
www.onsemi.com
MBRD320 (3A, 20V)
MBRD340 (3A, 40V)
IOUT(MAX)
=
–
2
Power MOSFET Selection
Rearranging the equation above to solve for RSENSE
gives:
There are several important parameters to consider when
choosing an N-channel power MOSFET: drain current
50mV
RSENSE
=
(maximum I ); breakdown voltage (maximum V and
D
DS
DS(ON)
⎛
⎜
⎝
⎞
⎟
⎠
IRIPPLE
V );thresholdvoltage(V
);on-resistance(R
RSS
);
IOUT(MAX)
+
GS
GS(TH)
2
reverse transfer capacitance (C ); and total gate charge
3742fa
14
LT3742
applicaTions inForMaTion
(Q ). A few simple guidelines will make the selection
provide higher efficiency. The power loss in the MOSFET
can be approximated by:
G
process easier.
The maximum drain current must be higher than the
PLOSS = ohmic loss + transition loss
(
) (
)
maximumratedcurrent,I
,calculatedontheprevious
RATED
⎛
⎞
⎟
⎟
⎠
VOUT + VD
VIN + VD
2
page. Note that the I specification is largely temperature
D
2
⎜
⎜
⎝
PLOSS
≈
•IOUT RDS(ON) • ρT
dependent (lower I at higher ambient temperatures), so
D
most data sheets provide a graph or table of I versus
D
temperature to show this.
2 • V •IOUT • CRSS • f
IN
(
)
Ensure that the V breakdown voltage is greater than the
DS
maximum input voltage and that the V breakdown volt-
GS
where f is the switching frequency (500kHz) and ρ is a
T
age is 8V or greater. The peak-to-peak gate drive for each
normalizing term to account for the on-resistance change
due to temperature. For a maximum ambient temperature
MOSFET is ~7V, so also ensure that the device chosen will
be fully enhanced with a V of 7V. This may preclude the
GS
of 70°C, using ρ ≈ 1.3 is a reasonable choice.
T
useofsomeMOSFETswitha20VV rating,assomehave
GS
The trade-off in R
and C
can easily be seen in an
RSS
DS(ON)
toohighofathresholdvoltage.Agoodruleofthumbisthat
example using real MOSFET values. To generate a 3.3V,
3A (10W) output, consider two typical N-channel power
the maximum threshold voltage should be V
3V. 4.5V MOSFETs will work as well.
≤
GS(TH)(MAX)
MOSFETs, both rated at V = 30V and both available in
DS
Power losses in the N-channel MOSFET come from two
the same SO-8 package, but having ~5x differences in
main sources: the on-resistance, R
, and the reverse
DS(ON)
on-resistance and reverse transfer capacitance:
transfer capacitance, C . The on-resistance causes
RSS
M1:I =11.5A,V =12V,R
=10mΩ,C
=230pF
RSS
2
D
GS
DS(ON)
ohmic losses (I R
) which typically dominate at
DS(ON)
input voltages below ~15V. The reverse transfer capaci-
tance results in transition losses which typically dominate
for input voltages above ~15V. At higher input voltages,
transition losses rapidly increase to the point that the use
M2:I =6.5A,V =20V,R
=50mΩ,C
= 45pF
RSS
D
GS
DS(ON)
Power loss is calculated for both devices over a wide input
voltage range (4V ≤ V ≤ 30V), and shown in Figure 6 (as
IN
a percentage of the 10W total power). Note that while the
of a higher R
device with lower C
will actually
DS(ON)
RSS
low R
device power loss is 5× lower at low input
DS(ON)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
TOTAL =
OHMIC + TRANSITION
TOTAL =
TRANSITION
OHMIC + TRANSITION
OHMIC
OHMIC
TRANSITION
20
INPUT VOLTAGE (V)
30
0
5
10
15
25
20
INPUT VOLTAGE (V)
30
0
5
10
15
25
3742 F06a
3742 F06b
Figure 6b. Power Loss Example for M2 (50m, 45pF)
Figure 6a. Power Loss Example for M1 (10mΩ, 230pF)
3742fa
15
LT3742
applicaTions inForMaTion
voltages, it is also 3× higher at high input voltages when
The combination of small size and low impedance (low
equivalentseriesresistance,orESR)ofceramiccapacitors
make them the preferred choice. The low ESR results in
verylowinputvoltagerippleandthecapacitorscanhandle
plentyofRMScurrent. Theyarealsocomparativelyrobust
and can be used at their rated voltage. Use only X5R or
X7Rtypesbecausetheyretaintheircapacitanceoverwider
voltage and temperature ranges than other ceramics.
compared to the low C
device.
RSS
Total gate charge, Q , is closely related to C . Low
G
RSS
gate charge corresponds to a small value of C . Many
RSS
manufacturers have MOSFETs advertised as “low gate
charge” devices (which means they are low C
devices)
RSS
that are specifically designed for low transition loss, and
are ideal for high input voltage applications.
An alternative to a high value ceramic capacitor is a lower
value (1µF) along with a larger value (10µF to 22µF) elec-
trolytic or tantalum capacitor. Because the input capacitor
is likely to see high surge currents when the input source
is applied, tantalum capacitors should always be surge
rated. The manufacturer may also recommend operation
below the rated voltage of the capacitor. Be sure to place
the 1µF ceramic as close as possible to the N-channel
power MOSFET.
Input Capacitor Selection
For most applications, 10µF to 22µF of input capacitance
perchannelwillbesufficient.Asmall1µFbypasscapacitor
between the V and ground pins of the LT3742, placed
IN
close to the device, is also suggested for optimal noise
immunity. Step-down regulators draw current from the
input supply in pulses with very fast rise and fall times.
The input capacitor is required to reduce the resulting
voltage ripple at the LT3742 and to force this very high
frequencyswitchingcurrentintoatightlocalloop,minimiz-
ing EMI. The input capacitor must have low impedance at
the switching frequency to do this effectively, and it must
have an adequate ripple current rating. With two control-
lers operating at the same frequency but with different
phases and duty cycles, calculating the input capacitor
RMS current is not simple. However, a conservative value
is the RMS input current for the channel that is delivering
Output Capacitor Selection
A good starting value for output capacitance is to provide
10µF of C
for every 1A of output current. For lower
OUT
output voltages (under 3.3V) and for applications needing
the best possible transient performance, the ratio should
be 20µF to 30µF of C
for every 1A of output current.
OUT
X5R and X7R ceramics are an excellent choice for the
output capacitance. Aluminum electrolytics can be used,
but typically the ESR is too large to deliver low output
voltage ripple. Tantalum and newer, lower ESR organic
electrolytic capacitors are also possible choices, and the
manufactures will specify the ESR. Because the volume of
the capacitor determines the ESR, both the size and value
will be larger than a ceramic capacitor that would give you
similar output ripple voltage performance.
the most power (V
• I ):
OUT OUT
IOUT
IRMS(CIN)
=
• VOUT • V – V
(
)
IN
OUT
V
IN
I
is largest (I /2) when V = 2V
(at DC =
RMS(CIN)
OUT
IN
OUT
50%). As the second, lower power channel draws input
current, the input capacitor’s RMS current actually de-
creases as the out-of-phase current cancels the current
drawn by the higher power channel, so choosing an input
The output capacitor filters the inductor ripple current to
generate an output with low ripple. It also stores energy
in order to satisfy transient loads and to stabilize the
capacitor with an RMS ripple current rating of I
is sufficient.
/2
OUT,MAX
3742fa
16
LT3742
applicaTions inForMaTion
LT3742’s control loop. Output ripple can be estimated
with the following equation:
The output voltage for each controller is programmed
with a resistor divider between the output and the FB pin.
Always use 1% resistors (or better) for the best output
⎛
⎜
⎝
⎞
⎟
⎠
1
voltage accuracy. The value of R should be 8k or less,
VRIPPLE = ΔIL
+ESR
A
8 • fSW • COUT
and the value of R1 should be chosen according to:
⎛
⎞
VOUT
0.8V
where ΔI is the inductor ripple current and f is the
L
SW
R = R •
– 1
⎟
⎜
⎝
B
A
switching frequency (500kHz). The ESR is so low for
ceramic capacitors that it can be left out of the above
calculation. The output voltage ripple will be highest at
⎠
Output Short-Circuit Protection
maximuminputvoltage(ΔI increaseswithinputvoltage).
L
Because the LT3742 constantly monitors the inductor cur-
rent, both devices inherently providing excellent output
short-circuit protection. The N-channel MOSFET is not
allowed to turn on unless the inductor current is below the
threshold of the current sense comparator. This guaran-
tees that the inductor current will not “run away” and the
controller will skip cycles until the inductor current has
dropped below the current sense threshold.
Table 3 shows several low-ESR capacitor manufacturers.
Table 3. Low ESR Surface Mount Capacitors
VENDOR
TYPE
SERIES
Taiyo Yuden
www.t-yuden.com
Ceramic X5R, X7R
Murata
www.murata.com
Ceramic X5R, X7R
Kemet
www.kemet.com
Tantalum
Ta Organic
Al Organic
T491, T494, T495
T520
A700
Loop Compensation
Sanyo
Ta or Al Organic
POSCAP
SP CAP
Anexternalresistorandcapacitorconnectedinseriesfrom
www.sanyo.com
the V pin to ground provides loop compensation for each
C
Panasonic
www.panasonic.com
Al Organic
controller. Sometimes a second, smaller valued capacitor
isplacedinparalleltofilterswitchingfrequencynoisefrom
TDK
www.tdk.com
Ceramic X5R, X7R
Ceramic X5R, X7R
the V pin. Loop compensation determines the stability
C
Nippon Chemicon
www.chemi-con.co.jp
and transient performance of each controller.
A practical approach is to start with values of R = 10k
C
Setting Output Voltage
and C = 330pF, then tune the compensation network to
C
optimize the performance. When adjusting these values,
Theoutputofabipolarcontrollerrequiresaminimumload
to prevent current sourced from the switch pin charging
the output capacitor above the desired output voltage.
This current, approximately 5mA, may be accounted for
in the feedback string or the user may choose to force a
minimum load in their application.
change only one value at a time (R or C ), then see how
C
C
the transient response is affected. The simplest way to
check loop stability is to apply a load current step while
observing the transient response at the output. Stability
should then be checked across all operating conditions,
including load current, input voltage, and temperature to
ensure a robust design.
V
OUT1
V
OUT2
LT3742
R1B
R2B
V
V
FB2
FB1
R1A
R2A
3742 F07
Figure 7. Setting Output Voltage with the FB Pin
3742fa
17
LT3742
applicaTions inForMaTion
Bias Supply Considerations
• Similar attention should be paid to the power compo-
nentsthatmakeuptheboostconverter.Theyshouldalso
be placed close together with short and wide traces.
The LT3742 uses an internal boost regulator to provide a
bias rail for enhancement of the external MOSFETs. This
bias rail is regulated to V + 7V and must be in regula-
IN
• Alwaysuseagroundplaneundertheswitchingregulator
tion before either controller is allowed to start switching.
As this is a high speed switching regulator, standard
procedures must be followed regarding placement of the
externalcomponents. TheSWBnodeshouldbekeptsmall
to reduce EMI effects and the bias decoupling capacitor
to minimize interplane coupling.
• Minimize the parasitic inductance in the loop of C ,
IN
MOSFET and catch diode, which carry large switching
currents.
(C
) should be kept close to the BIAS pin and V . A
• Use compact plane for switch node (SW) to improve
BIAS
IN
slight surplus of power is available from this supply and
cooling of the MOSFETs and to keep EMI low.
it can be tapped after stringent engineering evaluation.
• Use planes for V and V
to maintain good voltage
OUT
IN
filtering and to keep power losses low. Unused areas
PC Board Layout Considerations
can be filled with copper and connect to any DC node
As with all switching regulators, careful attention must be
paid to the PCB board layout and component placement.
(V , V , GND).
IN OUT
• Place CB close to BIAS pin and input capacitor.
• Place the power components close together with short
and wide interconnecting traces. The power compo-
nents consist of the top MOSFETs, catch diodes and
the inductors C and C . One way to approach this
• Keep the high dv/dt nodes (SW1, SW2, G1, G2, C
,
IN1
C
, SWB) away from sensitive small-signal nodes.
IN2
Demo board gerber files are available to assist with a
reliable layout. It will be difficult to achieve data sheet
performance specifications with improper layout.
IN
OUT
is to simply place them on the board first.
3742fa
18
LT3742
applicaTions inForMaTion
V
IN
V
OUT1
V
IN
RUN1
SHDN
SYSTEM
GROUND
RUN2
SHDN
V
V
OUT2
IN
3742 F08
VIAS TO LOCAL GROUND PLANE
OUTLINE OF LOCAL GROUND PLANE
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
3742fa
19
LT3742
Typical applicaTions
Supercap Charger Plus a DC/DC Buck Converter
L3
22µH
C6
4.7µF
V
IN
5.5V TO 30V
2
5
4
R7
V
SWB BIAS
357k
IN
UVLO
3
1
C5
1µF
R8
124k
LT3742
V
V
IN
IN
6
C3
6.8µF
C1
M1
G1
G2
M2
SUPERCAP
CHARGER
OUTPUT
6.8µF
L1
L2
R
R
S2
0.030Ω
S1
0.010Ω
4.7µH
47µH
V
OUT1
5V
4A
24
21
20
19
7
SW1
SW2
10
11
12
+
+
SENSE1
SENSE1
FB1
SENSE2
R1
1.05k
–
–
SENSE2
C4
47µF
C2
150µF
150mF
FB2
R2
200Ω
D1
D2
17
16
18
14
15
13
PG1
PG1
PG2
PG2
RUN/SS1
RUN/SS2
C7
1nF
C
C8
1nF
V
C1
V
C2
RUN1
M3
M4
RUN2
GND
25
R
C1
C1
C
C2
1000pF
51k
680pF
3742 TA02
D1, D2: DIODES INC. PDS1040
M1, M2: SILICONIX Si7884DP
3742fa
20
LT3742
Typical applicaTions
8V and 5V Dual Step-Down Converter
L3
22µH
C6
2.2µF
V
IN
14V
2
5
4
R1
V
SWB BIAS
45.3k
IN
UVLO
3
1
C5
1µF
R1
20k
LT3742
V
IN
V
IN
6
C3
10µF
C1
10µF
M1
G1
G2
M2
L1
L2
6.5µH
R
R
S2
0.01Ω
S1
6.5µH
0.01Ω
V
V
5V
4A
OUT1
8V
4A
OUT2
24
21
20
19
7
SW1
SW2
10
11
12
+
+
SENSE1
SENSE1
FB1
SENSE2
R1
R3
–
–
1.8k
1.05k
SENSE2
C4
C2
47µF
47µF
FB2
R4
200Ω
R2
200Ω
D1
D2
17
16
18
14
15
13
PG1
PG1
PG2
PG2
RUN/SS1
RUN/SS2
C7
1nF
C
C8
1nF
V
C1
V
C2
RUN1
M3
M4
RUN2
GND
25
R
R
C2
C1
C1
C
20k
C2
1000pF
30k
1000pF
3742 TA03
C2, C4: MURATA GRM32ER71A476K
D1, D2: DIODES INC. PDS1040
L1, L2: WÜRTH ELEKTRONIK 744314650
M1, M2: FAIRCHILD FDS4470
3742fa
21
LT3742
Typical applicaTions
5V and 3.3V Dual Step-Down Converter
L3
22µH
V
2.2µF
IN
14V
348k
V
SWB BIAS
IN
1µF
UVLO
130k
LT3742
V
IN
V
IN
10µF
10µF
G1
G2
L1
3.3µH
L2
4.7µH
10mΩ
10mΩ
V
V
5V
4A
OUT1
3.3V
OUT2
SW1
SW2
+
–
+
4A
SENSE1
SENSE1
FB1
SENSE2
619Ω
200Ω
1.05k
200Ω
–
SENSE2
150µF
220µF
FB2
D2
PG1
PG1
PG2
PG2
51k
RUN/SS1
RUN/SS2
V
C1
V
C2
1nF
680pF
1nF
51k
GND
68pF
680pF
3742 TA04a
D1, D2: DIODES INC. PDS1040
L1: VISHAY IHLP2525CZER3R3
L2: VISHAY IHLP2525CZER4R7
L3: COILCRAFT: ME3220-223KL
M1, M2: VISHAY Si7848DP-T1-E3
Efficiency vs Load Current
90
80
70
60
50
5V
OUT
3.3V
OUT
2
3
0
4
1
LOAD CURRENT (A)
3742 TA04b
3742fa
22
LT3742
Typical applicaTions
High Current, Low Ripple 12V Step-Down Converter
L3 10µH
C6
4.7µF
V
IN
24V
R7
124k
V
SWB BIAS
IN
C5
1µF
UVLO
R8
20.0k
LT3742
V
V
IN
IN
C1
10µF
C3
10µF
M1
G1
G2
M2
L1
L2
R
R
S1
S2
8.2µH
8.2µH
V
0.010Ω
0.010Ω
OUT1
12V
8A
SW1
SENSE1
SENSE1
SW2
+
–
+
SENSE2
–
SENSE2
FB2
D1
D2
R1
PG1
FB1
2.8k
PG1
C1
PG2
PG2
R2
200Ω
RUN/SS1
RUN/SS2
V
C1
V
C2
C7
R
1nF
C
GND
C1
51k
680pF
3742 TA05a
C
C
C
C
OUTD
100µF
20V
OUTA
OUTB
OUTC
C
-C
: KEMET T495E107K020E060
OUTA OUTD
100µF
100µF
20V
100µF
20V
D1, D2: DIODES INC. PDS1040
L1, L2: NEC/TOKIN PLC12458R2
M1, M2: ROHM RSS065N03
20V
12VOUT Efficiency vs Load Current
100
90
85
70
60
0
1
2
3
4
5
6
7
8
LOAD CURRENT (A)
3742 TA05b
3742fa
23
LT3742
package DescripTion
UF Package
24-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1697)
0.70 0.05
4.50 0.05
3.10 0.05
2.45 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
R = 0.115
PIN 1 NOTCH
R = 0.20 TYP OR
0.35 × 45° CHAMFER
0.75 0.05
4.00 0.10
(4 SIDES)
TYP
23 24
PIN 1
TOP MARK
(NOTE 6)
0.40 0.10
1
2
2.45 0.10
(4-SIDES)
(UF24) QFN 0105
0.200 REF
0.25 0.05
0.00 – 0.05
0.50 BSC
NOTE:
1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
3742fa
24
LT3742
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
5/11
Revised Conditions in the Electrical Characteristics section.
Revised the title of curve G04 in the Typical Performance Characteristics section.
Updated the PG1, PG2 pin description in the Pin Functions section.
Updated values in the Block Diagram, Operation, and Applications Information sections.
2, 3
4
6
7-12
3742fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
25
LT3742
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
LTC1625/LTC1775
No R ™ Current Mode Synchronous Step-Down
97% Efficiency, No Sense Resistor, 16-Pin SSOP
SENSE
Controllers
LTC1735
High Efficiency Synchronous Step-Down Switching
Regulator
Output Fault Protection, 16-Pin SSOP
LTC1778
No R
Wide Input Range Synchronous Step-Down
Up to 97% Efficiency, 4V ≤ V ≤ 36V, 0.8V ≤ V
≤ (0.9)(V ),
OUT IN
SENSE
IN
Controller
I
Up to 20A
OUT
LT3430/LT3431
Monolithic 3A, 200kHz/500kHz Step-Down Regulators
5.5V = <V = <60V, 0.1 Saturation Switch, 16-Lead SSOP Package
IN
LTC3703/LTC3703-5 100V Synchronous Switching Regulator Controllers
No R , Voltage Mode Control, GN16 Package
SENSE
LT3724
LT3800
LT3844
High Voltage Current Mode Switching Regulator Controllers
V
Up to 60V, I
≤ 5A, 16-Lead TSSOP Package, Onboard Bias
IN
OUT
Regulator, Burst Mode® Operation, I < 100µA, 200kHz Operation
Q
High Voltage Synchronous Controller
V
Up to 60V, I
≤ 20A, Current Mode, Onboard Bias Regulator,
IN
OUT
Burst Mode Operation, I = 100µA, 16-Lead TSSOP Package
Q
High Voltage Current Mode Controller with Programmable
Operating Frequency
V
Up to 60V, I
≤ 5A, Onboard Bias Regulator, Burst Mode
IN
OUT
Operation, Sync Capability, I = 120µA, 16-Lead TSSOP Package
Q
LTC3727A-1
LTC3728
Dual, 2-Phase Synchronous Controller
Very Low Dropout; V
≤ 14V
OUT
2-Phase 550kHz, Dual Synchronous Step-Down Controller
20A to 200A PolyPhase® Synchronous Controllers
QFN and SSOP Packages, High Frequency for Smaller L and C
LTC3729
Expandable from 2-Phase to 12-Phase, Uses All Surface Mount
Components, No Heat Sink
LTC3731
LTC3773
3-Phase, 600kHz Synchronous Step-Down Controller
Triple Output DC/DC Synchronous Controller
0.6V ≤ V
≤ 6V, 4.5V ≤ V ≤ 32V, I
≤ 60A,
OUT
OUT
IN
Integrated MOSFET Drivers
3-Phase Step-Down DC/DC Controller, 3.3V ≤ V ≤ 36V,
Fixed Frequency 160kHz to 700kHz
IN
LTC3826/LTC3826-1 30µA I , Dual, 2-Phase Synchronous Step-Down Controllers 2-Phase Operation, 30µA One Channel No Load I (50µA Total),
Q
Q
4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V
IN
OUT
LTC3827/LTC3827-1 Low I Dual Synchronous Controllers
2-Phase Operation, 115µA Total No Load I , 4V ≤ V ≤ 36V,
Q IN
Q
80µA No Load I with One Channel On
Q
LTC3834/LTC3834-1 Low I Synchronous Step-Down Controllers
30µA No Load I , 4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V
Q
Q
IN
OUT
LTC3835/LTC3835-1 Low I Synchronous Step-Down Controllers
80µA No Load I , 4V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V
Q
Q
IN
OUT
LTC3850
Dual, 2-Phase Synchronous Step-Down DC/DC Controller
2-Phase Operation, 4V ≤ V ≤ 24V, 95% Efficiency,
IN
No R
Option, I
Up to 20A, 4mm 4mm QFN
SENSE
OUT
LT3845
High Voltage Synchronous Step-Down Single Output
Controller
Very Low Quiescent Current (120µA), V Up to 60V, Fixed Frequency
IN
100kHz to 500kHz, Synchronizable Up to 600kHz
3742fa
LT 0511 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
26
l
l
LINEAR TECHNOLOGY CORPORATION 2007
(408)432-1900 FAX: (408) 434-0507 www.linear.com
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