LT4180IGN-TRPBF [Linear]
Virtual Remote Sense Controller; 虚拟远端采样器
| 型号： | LT4180IGN-TRPBF |
| 厂家： | 
Linear |
| 描述： | Virtual Remote Sense Controller |
| 文件： | 总16页 (文件大小：341K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Electrical Specifications Subject to Change
LT4180
Virtual Remote Sense
Controller
FEATURES
DESCRIPTION
The LT®4180 solves the problem of providing tight load
regulation over long, highly resistive cables without
requiring an additional pair of remote sense wires. This
Virtual Remote Sense™ device continuously interrogates
the line impedance and corrects the power supply output
voltage via its feedback loop to maintain a steady voltage
at the load regardless of current changes.
n
Tight Load Regulation with Highly Resistive Cables
without Requiring Remote Sense Wiring
n
Compatible with Isolated and Nonisolated Power
Supplies
n
1ꢀ Internal Voltage Reference
n
5mA Sink Current Capability
n
Soft-Correct Reduces Turn-On Transients
n
Undervoltage and Overvoltage Protection
The LT4180 is a full-featured controller with 5mA opto-
isolator sink capability, under/overvoltage lockout,
soft-start and a 1ꢀ internal voltage reference. The
Virtual Remote Sense feature set includes user-program-
mable dither frequency and optional spread spectrum
dither.
n
Pin-Programmable Dither Frequency
n
Optional Spread Spectrum Dither
n
Wide V Range: 3.1V to 50V
IN
n
24-Pin SSOP Package
APPLICATIONS
The LT4180 works with any topology and type of isolated
or nonisolated power supply, including DC/DC converters
and adjustable linear regulators.
n
12V High Intensity Lamps
n
28V Industrial Systems
n
High Power (>40 Watts) CAT5 Cable Systems
Wiring Drop Cancellation for Notebook Computer
Battery Charging
AC and DC Adaptors
Well-Logging and Other Remote Instrumentation
Surveillance Equipment
n
The LT4180 is available in a 24-pin, SSOP package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Virtual Remote Sense is a trademark of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
n
n
n
TYPICAL APPLICATION
Isolated Power Supply with Virtual Remote Sense
VLOAD vs VWIRE
5.00
4.99
4.98
4.97
4.96
4.95
CAT5E CABLE
R
SENSE
LINE
LINE
+
C
L
R
L
SWITCHING
REGULATOR
V
C
V
SENSE DIV0 DIV1 DIV2 SPREAD CHOLD1 CHOLD2 CHOLD3 CHOLD4
LT4180
IN
4.94
4.93
4.92
4.91
–
DRAIN
COMP
R
OSC
C
OSC
VIRTUAL REMOTE SENSE
OV
RUN FB
4180 TA01a
0
0.5
1
1.5
2
2.5
3
V
(V)
WIRING
4180 TAO1b
4180fp
1
LT4180
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V ............................................................. –0.3V to 52V
IN
SENSE.......................................................V – 0.3V to V
1
2
V
V
24
23
22
21
20
19
18
17
16
15
14
13
INTV
CC
IN
IN
IN
DRAIN
COMP
INTVCC, RUN, FB, OV, ROSC, OSC,
DIV0, DIV1, DIV2, SPREAD, CHOLD1,
PP
3
SENSE
RUN
4
CHOLD1
GUARD2
CHOLD2
GUARD3
CHOLD3
GUARD4
CHOLD4
FB
CHOLD2, CHOLD3, CHOLD4, DRAIN, COMP,
5
OV
GUARD2, GUARD3, GUARD4, V ............ –0.3V to 5.5V
PP
6
SPREAD
DIV0
DIV1
DIV2
OSC
V Pin Current.......................................................10mA
IN
7
INTVCC Pin Current .............................................–10mA
COSC Pin Current..................................................3.3mA
Maximum Junction Temperature .......................... 125°C
Operating Junction Temperature Range (Note 2)
E-, I-Grades ....................................... –40°C to 125°C
MP-Grade .......................................... –55°C to 125°C
Storage Temperature Range .................. –65°C to 125°C
8
9
10
11
12
ROSC
COSC
GND
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
T
= 150°C, θ = 85°C/W
JA
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LT4180EGN#PBF
LT4180IGN#PBF
LT4180MPGN#PBF
TAPE AND REEL
PART MARKING*
LT4180GN
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LT4180EGN#TRPBF
LT4180IGN#TRPBF
LT4180MPGN#TRPBF
24-Lead Narrow Plastic SSOP
24-Lead Narrow Plastic SSOP
24-Lead Narrow Plastic SSOP
LT4180GN
–40°C to 125°C
LT4180GN
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
50
UNITS
V
l
l
V
Operating Supply Voltage
Input Quiescent Current
Reference Voltage
3.10
IN
IV
ROSC Open, COSC Open, SENSE = V
1
2
mA
IN
IN
V
V
= V
= 1.2V, Measured at C
HOLD4
1.209
1.197
1.221
1.221
1.233
1.245
V
V
REF
CHOLD2
CHOLD3
l
During Track ΔV
Clock Phase
OUT
I
Open-Drain Current Limit
With FB = V + 200mV, OSC Stopped with Voltage
5
10
15
mA
LIM
REF
Feedback Loop Closed
V
V
DRAIN Low Voltage
V
V
= 3V
= 5V
0.3
V
V
OL
IN
IN
LDO Regulator Output Voltage
3.15
INTVCC
4180fp
2
LT4180
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
= 2.5V
MIN
TYP
MAX
UNITS
V
LDO Regulator Output Voltage in
Dropout
V
2.2
V
INTVCC
IN
V
V
V
V
Overvoltage Threshold
Overvoltage Input Hysteresis
Run Threshold
Rising
1.21
1.21
V
mV
V
OV
V
– V
– V
20
80
OHYST
RUN
RISING
FALLING
FALLING
Falling
Run Input Hysteresis
Input Bias Current
V
20
80
mV
μA
RHYST
RISING
I
–0.2
0.2
FB
V
Current Amplifier Offset Voltage
V
IN
V
IN
V
IN
= 3.5V
= 5V
= 48V
–4
–3
–4
4
3
4
mV
mV
mV
OS
A
Current Amplifier Gain Ratio
A
/A , A Measured in V/V
0.891
–1
0.9
0.909
1
V(RATIO)
SENSE
VL VH
V
I
Current Amplifier Input Bias Current
Measured at SENSE with SENSE = V
μA
V/V
μA
IN
A
ΔV Amplifier Gain
9.7
10
60
25
25
10
10.3
V
FB
I
I
I
I
Track/Hold Charging Current
Track/Hold Charging Current
Track/Hold Charging Current
Track/Hold Charging Current
Measured at CHOLD1 with V
Measured at CHOLD2 with V
Measured at CHOLD3 with V
Measured at CHOLD4 with V
= 1.2V
= 1.2V
= 1.2V
= 1.5V,
CHOLD1
CHOLD2
CHOLD3
CHOLD4
CHOLD1
CHOLD2
CHOLD3
CHOLD4
μA
μA
μA
V
= 1V, V
= 1.2V
CHOLD3
CHOLD2
Measured at CHOLD4 with V
CHOLD2
= 1.5V,
–200
μA
CHOLD4
V
= 1.4V, V
= 1.2V
CHOLD3
I
I
I
I
I
f
Soft-Correct Current
Measured at CHOLD4
1.5
1
μA
μA
SC
Track/Hold Leakage Current
Track/Hold Leakage Current
Track/Hold Leakage Current
Track/Hold Leakage Current
Oscillator Frequency
Measured at CHOLD1 with V
Measured at CHOLD2 with V
Measured at CHOLD3 with V
Measured at CHOLD4 with V
= 1.2V
= 1.2V
= 1.2V
= 1.2V
LKG1
LKG2
LKG3
LKG4
OSC
CHOLD1
CHOLD2
CHOLD3
CHOLD4
1
μA
1
μA
1
μA
R
= 20k, C
= 1nF
170
200
110
230
kHz
μmho
OSC
OSC
g
Voltage Error Amplifier
Transconductance
Measured from FB to COMP, V
OSC Stopped with Voltage Feedback Loop Closed
= 2V,
mFB
COMP
g
Current Amplifier Transconductance
Measured from SENSE to COMP, V
= 2V,
750
μmho
mIAMP
COMP
OSC Stopped with Current Feedback Loop Closed
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT4180I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT4180MP is guaranteed over the full –55°C to
125°C operating junction temperature range.
Note 2. The LT4180E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
Note 3. Positive current is defined as flowing into a pin.
4180fp
3
LT4180
TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency
vs Temperature
VREF vs Temperature
INTVCC vs Temperature
204.0
203.5
203.0
202.5
202.0
201.5
1.2215
1.2210
1.2205
3.165
3.160
3.155
3.150
3.145
3.140
3.135
R
= 20k
= 1nF
OSC
OSC
C
1.2200
1.2195
1.2190
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4108 G03
4108 G01
4108 G02
IDRAIN vs VDRAIN
Normal Timing
Spread Spectrum Timing
14
12
500mV/DIV
500mV/DIV
C
C
HOLD1
HOLD1
WITH 15k
WITH 15k
10
PULL-DOWN
PULL-DOWN
8
6
4
2
2V/DIV
OSC
2V/DIV
OSC
4180 G05
4180 G06
5μs/DIV
1μs/DIV
TRIGGERED ON C
TRIGGERED ON OSC
HOLD1
0
0.2 0.3 0.4 0.5 0.6
0.7 0.8 0.9
1
0
0.1
V
(V)
DRAIN
4180 G04
VLOAD vs VWIRE
Load Step in Buck Application
Load Step in 12V Linear Application
5.00
4.99
4.98
4.97
4.96
4.95
4.94
4.93
4.92
4.91
R
L
= 4Ω
WIRE
C = 100μF
V
OUT
V
SENSE
2V/DIV
2V/DIV
V
LOAD
2V/DIV
V
LOAD
2V/DIV
1.2A
I
LOAD
500mA/DIV
200mA
I
LOAD
200mA/DIV
4180 G09
4180 G08
5ms/DIV
2ms/DIV
200mA TO 700mA LOAD TRANSIENT
100μF LOAD CAP
0
0.5
1
1.5
2
2.5
3
V
(V)
WIRING
4180 G07
4180fp
4
LT4180
PIN FUNCTIONS
INTVCC (Pin 1): The LDO Output. A low ESR ceramic
capacitor provides decoupling and output compensation.
1μF or more should be used.
VirtualRemoteSense.Thisisahighcurrentoutputcapable
of driving opto-isolators. Other isolation methods may
also be used with this output.
DRAIN (Pin 2): Open-Drain of the Output Transistor. This
pin drives either the LED in an opto-isolator, or pulls down
on the regulator control pin.
DIV2 (Pin 16): Dither Division Ratio Programming Pin.
DIV1 (Pin 17): Dither Division Ratio Programming Pin.
DIV0 (Pin 18): Dither Division Ratio Programming Pin.
Use the following table to program the dither division
COMP(Pin3):GateoftheOutputTransistor.Thispinallows
additional compensation. It must be left open if unused.
ratio (f /f
)
OSC DITHER
CHOLD1 (Pin 4): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
Table 1. Programming the Dither Division Ratio (fOSC/fDITHER
)
DIV2
DIV1
DIV0
DIVISION RATIO
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
8
16
GUARD2 (Pin 5): Guard Ring Drive for CHOLD2.
CHOLD2 (Pin 6): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
32
64
128
256
512
1024
GUARD3 (Pin 7): Guard Ring Drive for CHOLD3.
CHOLD3 (Pin 8): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
For example, f
= DIV0 = 0.
= f /128 with DIV2 = 1 and DIV1
OSC
DITHER
GUARD4 (Pin 9): Guard Ring Drive for CHOLD4.
CHOLD4 (Pin 10): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
SPREAD (Pin 19): Spread Spectrum Enable Input. Dither
phasing is pseudo-randomly adjusted when SPREAD is
tied high.
FB (Pin 11): Receives the feedback voltage from an exter-
nal resistor divider across the main output. An (optional)
capacitor to ground may be added to eliminate high
frequency noise. The time constant for this RC network
should be no greater than 0.1 times the dither frequency.
OV(Pin20):OvervoltageComparatorInput.Thisprevents
line drop correction when wiring drops would cause ex-
cessive switching power supply output voltage. Set OV
so V
≤ 1.50V
.
REG(MAX)
LOAD
For example, with f
= 1kHz, τ = 0.1ms.
DITHER
RUN(Pin21):TheRUNpinprovidestheuserwithanaccu-
ratemeansforsensingtheinputvoltageandprogramming
the start-up threshold for the line drop corrector.
GND (Pin 12): Ground.
COSC (Pin 13): Oscillator Timing Capacitor. Oscillator fre-
quencyissetbythiscapacitorandROSC.Forbestaccuracy,
the minimum recommended capacitance is 100pF.
SENSE (Pin 22): Current Sense Input. This input connects
to the current sense resistor. Kelvin connect to R
.
SENSE
V
(Pin 23): Connect this pin to INTVCC.
ROSC (Pin 14): Oscillator Timing Resistor. Oscillator
frequency is set by this resistor and COSC.
PP
V (Pin24):MainSupplyPin.V mustbelocallybypassed
IN
IN
to ground. Kelvin connect the current sense resistor to
this pin and minimize interconnect resistance.
OSC (Pin 15): Oscillator Output. This output may be
used to synchronize the switching regulator to the
4180fp
5
LT4180
BLOCK DIAGRAM
1
22
SENSE
23
V
PP
V
INTV
IN
CC
24
12
4
–
AMP
+
HI_GAIN
I
TRIM
CIRCUIT
LDO
REF_OK
GND
BANDGAP
REF
TRACK/
HOLD
TRACK_HI_I
CHOLD1
–
+
SPREAD
DIV0
19
18
17
16
GM1
FB
+
11
5
SPREAD
SPECTRUM
CLOCK
DIV1
GM2
–
INST
AMP
GUARD2
FB_SELECT
DIV2
TRACK/
HOLD
GENERATOR
+
–
CORRECTED _REF
TRACK_DELTA_FB
TRACK/
HOLD
CHOLD2
CHOLD3
GUARD3
TRACK/
HOLD
6
8
7
REF
TRACK_LOW_FB
TRACK_HI_FB
CHOLD4
COMP
10
3
CLK
MOD
GUARD4
9
OSC
OSC
15
DRAIN
OV
2
R
LIM
20
+
OVERVOLTAGE
OV
–
RUN
21
–
UNDERVOLTAGE
UV
+
COSC
14 13
ROSC
4180 BD
4180fp
6
LT4180
OPERATION
Voltage drops in wiring can produce considerable load
pin (VFB) of the power supply maintaining tight regulation
regulation errors in electrical systems (Figure 1). As
of load voltage, V .
L
load current, I , increases the voltage drop in the wiring
L
Figure3showsthetimingdiagramforvirtualremotesens-
ing (VRS). A new cycle begins when the power supply and
(I •RW)increasesandthevoltagedeliveredtothesystem
L
(V )drops.Thetraditionalapproachtosolvingthisproblem,
L
VRS close the loop around V
(regulate V
= H). Both
OUT
OUT
remote sensing, regulates the voltage at the load, increas-
V
and I
slew and settle to a new value, and these
OUT
OUT
ing the power supply voltage (V ) to compensate for
OUT
values are stored in the Virtual Remote Sense (track V
OUT
voltage drops in the wiring. While remote sensing works
well, it does require an additional pair of wires to measure
at the load, which may not always be practical.
high = L and track I
= L). The V
feedback loop is
OUT
OUT
openedandanewfeedbackloopissetupcommandingthe
power supply to deliver 90ꢀ of the previously measured
The LT4180 eliminates the need for a pair of remote sense
wires by creating a Virtual Remote Sense. Virtual remote
sensing is achieved by measuring the incremental change
involtagethatoccurswithanincrementalchangeincurrent
in the wiring (Figure 2). This measurement can then be
used to infer the total DC voltage drop in the wiring, which
can then be compensated for. The Virtual Remote Sense
takes over control of the power supply via the feedback
current (0.9I ). V
drops to a new value as the power
OUT
OUT
supply reaches a new steady state, and this information
is also stored in the Virtual Remote Sense. At this point,
the change in output voltage (ΔV ) for a –10ꢀ change
OUT
in output current has been measured and is stored in the
Virtual Remote Sense. This voltage is used during the
next VRS cycle to compensate for voltage drops due to
wiring resistance.
I
L
I
L
RW
RW
POWER SUPPLY
V
SYSTEM
POWER SUPPLY
V
SYSTEM
+
OUT
+
L
+
OUT
+
L
V
V
POWER WIRING
POWER WIRING
–
–
–
–
V
FB
4180 F01
REMOTE SENSE WIRING
VIRTUAL REMOTE
SENSE
4180 F02
Figure 1. Traditional Remote Sensing
Figure 2. Virtual Remote Sensing
V
OUT
OUT
REGULATE V
TRACK V
HIGH
OUT
TRACK I
OUT
REGULATE I
TRACK V
LOW
LOW
OUT
OUT
TRACK ΔV
OUT
4180 F03
Figure 3. Simplified Timing Diagram, Virtual Remote Sense
4180fp
7
LT4180
APPLICATIONS INFORMATION
INTRODUCTION
DESIGN PROCEDURE
TheLT4180isdesignedtointerfacewithavarietyofpower
suppliesandregulatorshavingeitheranexternalfeedback
or control pin. In Figure 4, the regulator error amplifier
The first step in the design procedure is to determine
whether the LT4180 will control a linear or switching sup-
ply/regulator.Ifusingaswitchingpowersupplyorregulator,
it is recommended that the supply be synchronized to the
LT4180 by connecting the OSC pin to the SYNC pin (or
equivalent) of the supply.
(which is a g amplifier) is disabled by tying its inverting
m
input to ground. This converts the error amplifier into a
constant-current source which is then controlled by the
drain pin of the LT4180. This is the preferred method of
interfacingbecauseiteliminatestheregulatorerrorampli-
fier from the control loop which simplifies compensation
and provides best control loop response.
If the power supply is synchronized to the LT4180, the
power supply switching frequency is determined by:
4
fOSC
=
R
OSC • COSC
REGULATOR
LT4180
Recommended values for R
are between 20k and 100k
OSC
I
OR
TH
V
C
+
–
(with 30.1k the optimum for best accuracy) and greater
than 100pF for C . C may be reduced to as low as
DRAIN
OSC OSC
50pF, but oscillator frequency accuracy will be somewhat
degraded.
4180 F04
Figure 4. Nonisolated Regulator Interface
The following example synchronizes a 250kHz switching
power supply to the LT4180. In this example, start with
OSC
For proper operation, increasing control voltage should
correspond to increasing regulator output. For example,
in the case of a current mode switching power supply, the
control pin ITH should produce higher peak currents as
the ITH pin voltage is made more positive.
R
= 30.1k:
4
COSC
=
= 531pF
250kHz • 30.1k
This example uses 470pF. For 250kHz:
Isolated power supplies and regulators may also be used
by adding an opto-coupler (Figure 5). LT4180 output volt-
4
ROSC
=
= 34.04k
250kHz • 470pF
age INTV supplies power to the opto-coupler LED. In
CC
situations where the control pin V of the regulator may
C
The closest standard 1ꢀ value is 34k.
exceed 5V, a cascode may be added to keep the DRAIN
pin of the LT4180 below 5V (Figure 6). Use a Low VT
MOSFET for the cascode transistor.
The next step is to determine the highest practical dither
frequency. This may be limited either by the response
time of the power supply or regulator, or by the propaga-
tion time of the wiring connecting the load to the power
supply or regulator.
INTV
REGULATOR
CC
OPTO-COUPLER
+
V
C
LT4180
–
TO V > 5V
C
DRAIN
COMP
LT4180
INTV
4180 F05
CC
Figure 5. Isolated Power Supply Interface
DRAIN
4180 F06
Figure 6. Cascoded DRAIN Pin for Isolated Supplies
4180fp
8
LT4180
APPLICATIONS INFORMATION
First determine the settling time (to 1ꢀ of final value)
Continuing this example, the dither frequency should be
less than 500Hz (limited by the power supply).
of the power supply. The settling time should be the
worst-case value (over the whole operating envelope: V ,
IN
With the dither frequency known, the division ratio can
be determined:
I
, etc.).
LOAD
1
fOSC
fDITHER
250,000
500
F1 =
Hz
DRATIO
=
=
= 500
2 • tSETTLING
For example, if the power supply takes 1ms to settle
(worst-case) to within 1ꢀ of final value:
The nearest division ratio is 512 (set DIV0 = L, DIV1 =
DIV2 = H). Based on this division ratio, nominal dither
frequency will be:
1
F1 =
= 500Hz
2 • 1e –3
fOSC
DRATIO
250,000
512
fDITHER
=
=
= 488Hz
Next, determine the propagation time of the wiring. In
order to ignore transmission line effects, the dither period
should be approximately twenty times longer than this.
This will limit dither frequency to:
After the dither frequency is determined, the minimum
load decoupling capacitor can be determined. This load
capacitor must be sufficiently large to filter out the dither
signal at the load.
VF
F2 =
Hz
2.2
20 • 1.017ns/ft • L
CLOAD
=
RWIRE • 2 • fDITHER
WhereV isthevelocityfactor(orvelocityofpropagation),
F
and L is the length of the wiring (in feet).
WhereC
WIRE
tor of the wiring pair, and f
frequency.
istheminimumloaddecouplingcapacitance,
LOAD
For example, assume the load is connected to a power
supply with 1000ft of CAT5 cable. Nominal velocity of
propagation is approximately 70ꢀ.
R
is the minimum wiring resistance of one conduc-
is the minimum dither
DITHER
0.7
Continuing the example, our CAT5 cable has a maximum
9.38ꢁ/100m conductor resistance.
F2 =
= 34.4kHz
20 • 1.017e–9 • 1000
Maximum wiring resistance is:
The maximum dither frequency should not exceed F1 or
F2 (whichever is less):
R
WIRE
= 2 • 1000ft • 0.305m/ft • 0.0938ꢁ/m
= 57.2ꢁ
f
< min (F1, F2).
R
WIRE
DITHER
4180fp
9
LT4180
APPLICATIONS INFORMATION
With an oscillator tolerance of 15ꢀ, the minimum
dither frequency is 414.8Hz, so the minimum decoupling
capacitance is:
is observed, decrease the value of the resistor until it
just disappears. If overshoot or ringing is not observed,
increase the value of the resistor until it is observed, then
slightlydecreasethevalueoftheresistorsothatovershoot
and ringing disappear. Check for proper voltage drop cor-
rection and converter behavior (start-up, regulation etc.),
overtheloadrange, andrepeattheaboveprocedurewitha
smaller value of the compensation capacitor, if necessary.
2.2
CLOAD
=
= 46.36µF
57.2Ω • 2 • 414.8Hz
This is the minimum value. Select a nominal value to ac-
count for all factors which could reduce the nominal, such
as initial tolerance, voltage and temperature coefficients
and aging.
Decrease C
capacitance until V
exhibits slight
HOLD4
OUT
low frequency instability, then increase C
from this value.
slightly
HOLD4
CHOLD Capacitor Selection and Compensation
Setting Output Voltage, Undervoltage and Overvoltage
Thresholds
Withditherfrequencydetermined, usethefollowingequa-
tions to determine CHOLD values:
The RUN pin has accurate rising and falling thresholds
whichmaybeusedtodeterminewhenVirtualRemoteSense
operation begins. Undervoltage threshold should never
be set lower than the minimum operating voltage of the
LT4180 (3.1V).
11.9nF
DITHER(kHz)
CHOLD1
=
f
and
CHOLD2 = CHOLD3
2.5nF
DITHER(kHz)
=
The overvoltage threshold should be set slightly greater
than the highest voltage which will be produced by the
power supply or regulator:
f
So, with a dither frequency of 488Hz:
V
= V
+ V
LOAD(MAX) WIRE(MAX)
OUT(MAX)
11.9nF
0.488kHz
CHOLD1
=
= 24.4nF
V
should never exceed 1.5 • V
LOAD
OUT(MAX)
Since the RUN and OV pins connect to MOSFET input
comparators,inputbiascurrentsarenegligibleandacom-
mon voltage divider can be used to set both thresholds
(Figure 7).
and
CHOLD2 = CHOLD3
2.5nF
0.488(kHz)
=
= 5.12nF
NPO ceramic or other capacitors with low leakage and
dielectric absorption should be used for all hold capa-
citors.
V
IN
R1
R2
R3
R4
LT4180
RUN
Set C
to 1μF.
HOLD4
FB
Start with a 47pF capacitor between the COMP and DRAIN
pins of the LT4180. Add an RC network in parallel with the
47pF capacitor. 10k and 10nF are good starting values.
Connect a DC load corresponding to full-scale load cur-
OV
4180 F07
rent and verify that V
produces a rounded squarewave
OUT
Figure 7. Voltage Divider for Output Voltage, UVL and OVL
without any noticeable overshoot or ringing (similar to
the V waveform in Figure 3). If overshoot or ringing
OUT
4180fp
10
LT4180
APPLICATIONS INFORMATION
The voltage divider resistors can be calculated from the
following equations:
R
SELECTION
SENSE
SelectthevalueofR
sothatitproducesa100mVvolt-
SENSE
VOV
200μA
1.22V
200μA
age drop at maximum load current. For best accuracy, V
IN
RT =
, R4 =
and SENSE should be Kelvin connected to this resistor.
Soft-Correct Operation
Where R is the total divider resistance and V is the
T
OV
overvoltage set point.
The LT4180 has a soft-correct function which insures
orderly start-up. When the RUN pin rising threshold is
firstexceeded(indicatingV hascrosseditsundervoltage
lockout threshold), power supply output voltage is set to a
value corresponding to zero wiring voltage drop (no cor-
rection for wiring). Over a period of time (determined by
CHOLD4), the power supply output voltage ramps up to
account for wiring voltage drops, providing best load-end
voltageregulation.Anewsoft-correctcycleisalsoinitiated
whenever an overvoltage condition occurs.
FindtheequivalentseriesresistanceforR2andR3(R
).
SERIES
IN
This resistance will determine the RUN voltage level.
⎛
⎞
1.22 • RT
VUVL
RSERIES
=
− R4
⎜
⎟
⎝
⎠
R1= RT − RSERIES − R4
⎛
⎞
R4
RT
1.22V − VOUT(NOM)
•
⎜
⎟
⎝
⎠
R3 =
VOUT(NOM)
RT
5V
POWER SUPPLY
OUTPUT VOLTAGE
R2 = RSERIES − R3
Where V is the RUN voltage and V
10Vw
POWER SUPPLY
INPUT VOLTAGE
is the
OUT(NOM)
UVL
nominal output voltage desired.
4180 F08
200ms/DIV
For example, with V = 4V, V = 7.5V and V
= 5V,
UVL
OV
OUT(NOM)
7.5V
200μA
RT =
= 37.5k
Figure 8. Soft-Correct Operation, CHOLD4 = 1μF
1.22V
200μA
R4 =
= 6.1k
⎛
⎜
⎝
⎞
⎟
⎠
1.22V • 37.5k
4V
RSERIES
=
− 6.1k = 5.34k
R1 = 37.5k − 5.34k − 6.1k = 26.06k
⎛
⎝
⎞
⎟
⎠
5V • 6.1k
37.5k
1.22V −
⎜
R3 =
= 3.05k
5V
37.5k
R2 = RSERIES − R3 = 2.29k
4180fp
11
LT4180
APPLICATIONS INFORMATION
Using Guard Rings
switching supplies may be synchronized to the LT4180
(Figure 10). The OSC pin was designed so that it may
directlyconnecttomostregulators,ordriveopto-isolators
(for isolated power supplies).
The LT4180 includes a total of four track/holds in the
Virtual Remote Sense path. For best accuracy, all leakage
sources on the CHOLD pins should be minimized.
At very low dither frequencies, the circuit board layout
may include guard rings which should be tied to their
respective guard ring drivers.
Spread Spectrum Operation
Virtual remote sensing relies on sampling techniques.
Because switching power supplies are commonly used,
the LT4180 uses a variety of techniques to minimize
potential interference (in the form of beat notes which
may occur between the dither frequency and power
supply switching frequency). Besides several types of
internal filtering, and the option for VRS/power sup-
ply synchronization, the LT4180 also provides spread
spectrum operation.
To better understand the purpose of guard rings, a sim-
plified model of hold capacitor leakage (with and without
guard rings) is shown in Figure 9. Without guard rings,
a large difference voltage may exist between the hold
capacitor (Pin 1) node and adjacent conductors (Pin 2)
producing substantial leakage current through the leak-
age resistance (R ). By adding a guard ring driver with
LKG
approximately the same voltage as the voltage on the
By enabling spread spectrum operation, low modu-
lation index pseudo-random phasing is applied to
Virtual Remote Sense timing. This has the effect of
converting any remaining narrow-band interference into
broadband noise, reducing its effect.
hold capacitor node, the difference voltage across R
LKG1
is reduced substantially thereby reducing leakage current
on the hold capacitor.
Synchronization
Linear and switching power supplies and regulators may
be used with the LT4180. In most applications regulator
interference should be negligible. For those applications
where accurate control of interference spectrum is de-
sirable, an oscillator output has been provided so that
Increasing Voltage Correction Range
Correction range may be slightly improved by regulating
INTV to5V.ThismaybedonebyplacinganLDObetween
CC
V and INTV . Contact Linear Technology Applications
IN
CC
for more information.
R
R
R
LKG2
LKG
LKG1
1
2
1
2
WITHOUT
GUARD RING
WITH
GUARD RING
4180 F09
Figure 9. Simplified Leakage Models (with and without Guard Rings)
REGULATOR
SYNC
LT4180
OSC
4180 F10
Figure 10. Clock Interface for Synchronization
4180fp
12
LT4180
TYPICAL APPLICATIONS
12V, 500mA Linear Regulator
R1
0.1Ω
1ꢀ
Q1
IRLZ440
OUTPUT TO WIRING AND LOAD
500mA
V
IN
INTV
CC
20V
R2
63.4k
1ꢀ
C1
4.7μF
25V
8Ω MAX R
WIRE
330μF LOAD CAPACITANCE
C3
1μF
C2
1μF
R3
27k
R4
3.74k
1ꢀ
FB
RUN
V
SENSE
DIV2 DIV1 DIV0
V
INTV
PP
CC
IN
R5
5.36k
1ꢀ
R6
C4
10μF
25V
2.2k
1ꢀ
U2
LT4180EGN
SPREAD
OSC
OV
R7
10k
INTV
CC
GND
DRAIN
Q2
VN2222
C5
22pF
COMP GND CHOLD1GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
C
R
OSC
OSC
C10
10nF
R9
C7
4.7nF
C8
C9
470pF
41.7k
1ꢀ
C6
1nF
C11
470pF
470pF
R8
20k
4180 TA02
12V, 600mA Boost Regulator
R1
0.05
1ꢀ
D1
DFLS220
L1
OUTPUT TO WIRING AND LOAD
(100mA MINIMUM)
WIRE
470μF LOAD CAPACITANCE
4.7μH
V
IN
5V
600mA, 6Ω MAX R
INTV
CC
VISHAY
IHLP2525CZ-11
C2
10μF
25V
R13
1.5k
R3
61.9k
1ꢀ
C1
4.7μF
16V
R2
191k
C4
1μF
C3
1μF
R5
3.65k
1ꢀ
R4
100k
GATE SW1 SW1 SW1 SW2 SW2 SW2
V
SENSE
INTV
C
FB RUN
DIV2 DIV1 DIV0
V
IN
PP
CC
R6
24.3k
R7
2k
1ꢀ
V
CC
SPREAD
U2
U1
SHDN
FB
LT4180EGN
LT3581EMSE
OV
DRAIN
FAULT
VC
R9
5.36k
1ꢀ
OSC
R
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
R8
10k
SYNC RT
SS CLKOUT GND
OSC OSC
C7
47pF
C12
R12
41.7k
1ꢀ
C6
0.1μF
R10
84.5k
10nF
C9
C10
470pF
C11
GND
C13
470pF
4.7nF
470pF
4180 TA03
C8
1nF
R11
10k 1ꢀ
4180fp
13
LT4180
TYPICAL APPLICATIONS
4180fp
14
LT4180
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
.033
(0.838)
REF
24 23 22 21 20 19 18 17 16 15 14 13
.045 ±.005
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.254 MIN
.150 – .165
1
2
3
4
5
6
7
8
9 10 11 12
.0165 ± .0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
(0.38 ± 0.10)
.0532 – .0688
(1.35 – 1.75)
× 45°
.004 – .0098
(0.102 – 0.249)
.0075 – .0098
(0.19 – 0.25)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.008 – .012
.0250
(0.635)
BSC
GN24 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
4180fp
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT4180
TYPICAL APPLICATION
12V 1.5A Buck Regulator
E1
V
IN
C2
1μF
50V
+
C1
22μF
50V
22V TO 36V
R1
0.033 1ꢀ
E3
OUTPUT TO WIRING AND LOAD
12V, 1.5A
GND
C6
C4
1μF
R4
61.9k
1ꢀ
VISHAY
1HLP2020CZ-11
L1, 10μH
2.5Ω MAX R
WIRE
INTV
0.47μF
CC
R3
100k
470μF LOAD CAPACITANCE
V
BD BOOST
IN
C8
1μF
RUN/SD
SW
INTV
CC
R6
3.65k
1ꢀ
C5
0.1μF
50V
C7
R5
30.1k
22μF
UI
PG
25V
D1
DFLS240
FB
RUN
V
SENSE
DIV2 DIV1 DIV0
LT4180EGN
V
INTV
IN
PP
CC
LT3685EDD
R9
2.01k
1ꢀ
FB
RT
SPREAD
INTV
CC
R8
68.1k
1ꢀ
R7
10k
OV
DRAIN
SYNC
VC
R10
5.36k
1ꢀ
OSC
R
D2
CMDSH-3
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
C
OSC
OSC
C9
47pF
C13
R11
1k
R12
22.1k
1ꢀ
10nF
C10
C11
470pF
C12
C14
330pF
4.7nF
470pF
R13
17.4k
1ꢀ
4180 TA05
C15
1.5nF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3581
Boost/Inverting DC/DC Converter with 3.3A Switch,
Soft-Start and Synchronization
2.5V ≤ V ≤ 22V, Current Mode Control, 200kHz to 2.5MHz, MSOP-16E and
IN
3mm × 4mm DFN-14 Packages
LT3685
LT3573
LT3757
LT3758
36V, 2A, 2.4MHz Step-Down Switching Regulator
3.6V≤ V ≤ 36V (60V ), Integrated Boost Diode, MSOP-10E and
IN PK
3mm × 3mm DFN Packages
Isolated Flyback Switching Regulator with 60V
Integrated Switch
3V ≤ V ≤ 40V, Up to 7W, No Opto-Isolator or Third Winding Required,
IN
MSOP-16E Package
Boost, Flyback, SEPIC and Inverting Controller
2.9V ≤ V ≤ 40V, Current Mode Control, 100kHz to 1MHz Programmable
IN
Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages
Boost, Flyback, SEPIC and Inverting Controller
5.5V ≤ V ≤ 100V, Current Mode Control, 100kHz to 1MHz Programmable
IN
Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages
LTC3805/
LTC3805-5
Adjustable Fixed 70kHz to 700kHz Operating
Frequency Flyback Controller
V
and V
Limited Only by External Components, MSOP-10E and
OUT
IN
3mm × 3mm DFN-10 Packages
4180fp
LT 0310 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
© LINEAR TECHNOLOGY CORPORATION 2010
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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