LT6656AIS6-4.096#TRMPBF [Linear]
LT6656 - 1µA Precision Series Voltage Reference; Package: SOT; Pins: 6; Temperature Range: -40°C to 85°C;
| 型号： | LT6656AIS6-4.096#TRMPBF |
| 厂家： | 
Linear |
| 描述： | LT6656 - 1µA Precision Series Voltage Reference; Package: SOT; Pins: 6; Temperature Range: -40°C to 85°C 光电二极管 |
| 文件： | 总24页 (文件大小：589K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT6656
1µA Precision Series
Voltage Reference
FEATURES
DESCRIPTION
The LT®6656 is a tiny precision voltage reference that
draws less than 1µA of supply current and can operate
with a supply voltage within 10mV of the output voltage.
The LT6656 offers an initial accuracy of 0.05% and tem-
perature drift of 10ppm/°C. The combined low power and
precision characteristics are ideal for portable and battery
powered instrumentation.
n
Ultralow Supply Current: 850nA
Low Drift
n
A Grade: 10 ppm/°C Max
B Grade: 20 ppm/°C Max
High Accuracy
n
A Grade: 0.05% Max
B Grade: 0.1% Max
n
Long-Term Drift: 15ppm/√kHr (LS8 Package)
The LT6656 can supply up to 5mA of output drive with
65ppm/mA of load regulation, allowing it to be used as
the supply voltage and the reference input to a low power
ADC. The LT6656 can accept a supply voltage up to 18V
and withstand the reversal of the input connections.
n
No Humidity Sensitivity (LS8 Package)
n
High Output Drive Current: 5mA Min
n
Low Dropout Voltage: 10mV Max
n
Fully Specified from –40°C to 85°C
n
Operational from –55°C to 125°C
n
The LT6656 output is stable with 1µF or larger output
capacitance and operates with a wide range of output
capacitor ESR.
Wide Supply Range to 18V
n
Reverse Input/Output Protection
n
Available Output Voltage Options:
1.25V, 2.048V, 2.5V, 3V, 3.3V, 4.096V and 5V
This reference is fully specified for operation from –40°C
to 85°C, and is functional over the extreme temperature
range of –55°C to 125°C. Low hysteresis and a consistent
temperature drift are obtained through advanced design,
processing and packaging techniques.
n
Available in Low Profile (1mm) ThinSOT™,
(2mm × 2mm) DFN and High Stability Hermetic
(5mm × 5mm) LS8 Packages
APPLICATIONS
The LT6656 is offered in the 6-lead SOT-23, (2mm ×
2mm) DFN, and 8-lead LS8 Packages. The LS8 is a 5mm
× 5mm surface mount hermetic package that provides
outstanding stability.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
n
Precision A/D and D/A Converters
n
Portable Gas Monitors
n
Battery- or Solar-Powered Systems
n
Precision Regulators
n
Low Voltage Signal Processing
n
Micropower Remote Sensing
Output Voltage Temperature Drift
TYPICAL APPLICATION
2.503
38 TYPICAL UNITS
LT6656-2.5
Basic Connection
2.502
LT6656-2.5
V
OUT
2.51V ≤ V ≤ 18V
V
V
OUT
IN
IN
2.5V
2.501
2.500
2.499
2.498
GND
0.1µF
1µF
6656 TA01a
–40 –20
0
20
40
60
80
6652 TA01b
TEMPERATURE (°C)
6656fc
1
For more information www.linear.com/LT6656
LT6656
(Note 1)
ABSOLUTE MAXIMUM RATINGS
Input Voltage........................................................... 20V
Output Voltage........................................... –0.3V to 20V
Output Voltage Above Input Voltage .........................20V
Specified Temperature Range (Note 2)
Operating Temperature Range (Note 2).. –55°C to 125°C
Output Short Circuit Duration ......................... Indefinite
Junction Temperature .......................................... 150°C
Storage Temperature Range (Note 3)..... –65°C to 150°C
Lead Temperature (Soldering, 10 sec.)
Commercial ............................................. 0°C to 70°C
Industrial .............................................–40°C to 85°C
TSOT-23 (Note 4)..............................................300°C
PIN CONFIGURATION
TOP VIEW
V
IN
TOP VIEW
TOP VIEW
8
NC
NC
1
2
3
7
6
5
NC
6
5
4
V
IN
NC
GND
1
2
3
GND* 1
GND 2
NC 3
6 V
OUT
7
5 NC
4 V
NC
V
V
OUT
V
OUT
GND*
IN
GND*
OUT
GND*
4
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
= 150°C, θ = 230°C/W
JA
*CONNECT PIN TO DEVICE GND (PIN 2)
DC PACKAGE
GND
LS8 PACKAGE
8-PIN LEADLESS CHIP CARRIER (5mm × 5mm)
6-LEAD (2mm × 2mm) PLASTIC DFN
= 125°C, θ = 102°C/W
JA
EXPOSED PAD (PIN 7) MUST BE CONNECTED TO GND
T
JMAX
T
JMAX
T
= 150°C, θ = 125°C/W
JA
*CONNECT PIN TO DEVICE GND (PIN 4)
JMAX
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL (MINI)
LT6656ACS6-1.25#TRMPBF LT6656ACS6-1.25#TRPBF
LT6656BCS6-1.25#TRMPBF LT6656BCS6-1.25#TRPBF
LT6656AIS6-1.25#TRMPBF
LT6656BIS6-1.25#TRMPBF
LT6656ACS6-2.048#TRMPBF LT6656ACS6-2.048#TRPBF LTFNN
LT6656BCS6-2.048#TRMPBF LT6656BCS6-2.048#TRPBF LTFNN
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
LTFNK
LTFNK
LTFNK
LTFNK
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
LT6656AIS6-1.25#TRPBF
LT6656BIS6-1.25#TRPBF
0°C to 70°C
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
0°C to 70°C
LT6656AIS6-2.048#TRMPBF LT6656AIS6-2.048#TRPBF
LT6656BIS6-2.048#TRMPBF LT6656BIS6-2.048#TRPBF
LTFNN
LTFNN
LTFGW
LTFGW
LTFGW
LTFGW
LTFNQ
LTFNQ
LTFNQ
LTFNQ
LTFNS
LTFNS
LTFNS
LTFNS
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACS6-2.5#TRMPBF
LT6656BCS6-2.5#TRMPBF
LT6656AIS6-2.5#TRMPBF
LT6656BIS6-2.5#TRMPBF
LT6656ACS6-3#TRMPBF
LT6656BCS6-3#TRMPBF
LT6656AIS6-3#TRMPBF
LT6656BIS6-3#TRMPBF
LT6656ACS6-3.3#TRMPBF
LT6656BCS6-3.3#TRMPBF
LT6656AIS6-3.3#TRMPBF
LT6656BIS6-3.3#TRMPBF
LT6656ACS6-2.5#TRPBF
LT6656BCS6-2.5#TRPBF
LT6656AIS6-2.5#TRPBF
LT6656BIS6-2.5#TRPBF
LT6656ACS6-3#TRPBF
LT6656BCS6-3#TRPBF
LT6656AIS6-3#TRPBF
LT6656BIS6-3#TRPBF
LT6656ACS6-3.3#TRPBF
LT6656BCS6-3.3#TRPBF
LT6656AIS6-3.3#TRPBF
LT6656BIS6-3.3#TRPBF
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
6656fc
2
For more information www.linear.com/LT6656
LT6656
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL (MINI)
LT6656ACS6-4.096#TRMPBF LT6656ACS6-4.096#TRPBF LTFNV
LT6656BCS6-4.096#TRMPBF LT6656BCS6-4.096#TRPBF LTFNV
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
0°C to 70°C
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
LT6656AIS6-4.096#TRMPBF LT6656AIS6-4.096#TRPBF
LT6656BIS6-4.096#TRMPBF LT6656BIS6-4.096#TRPBF
LTFNV
LTFNV
LTFNX
LTFNX
LTFNX
LTFNX
LFNM
LFNM
LFNM
LFNM
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACS6-5#TRMPBF
LT6656BCS6-5#TRMPBF
LT6656AIS6-5#TRMPBF
LT6656BIS6-5#TRMPBF
LT6656ACS6-5#TRPBF
LT6656BCS6-5#TRPBF
LT6656AIS6-5#TRPBF
LT6656BIS6-5#TRPBF
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACDC-1.25#TRMPBF LT6656ACDC-1.25#TRPBF
LT6656BCDC-1.25#TRMPBF LT6656BCDC-1.25#TRPBF
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
0°C to 70°C
LT6656AIDC-1.25#TRMPBF
LT6656BIDC-1.25#TRMPBF
LT6656AIDC-1.25#TRPBF
LT6656BIDC-1.25#TRPBF
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACDC-2.048#TRMPBF LT6656ACDC-2.048#TRPBF LFNP
LT6656BCDC-2.048#TRMPBF LT6656BCDC-2.048#TRPBF LFNP
LT6656AIDC-2.048#TRMPBF LT6656AIDC-2.048#TRPBF LFNP
LT6656BIDC-2.048#TRMPBF LT6656BIDC-2.048#TRPBF LFNP
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACDC-2.5#TRMPBF
LT6656BCDC-2.5#TRMPBF
LT6656AIDC-2.5#TRMPBF
LT6656BIDC-2.5#TRMPBF
LT6656ACDC-3#TRMPBF
LT6656BCDC-3#TRMPBF
LT6656AIDC-3#TRMPBF
LT6656BIDC-3#TRMPBF
LT6656ACDC-3.3#TRMPBF
LT6656BCDC-3.3#TRMPBF
LT6656AIDC-3.3#TRMPBF
LT6656BIDC-3.3#TRMPBF
LT6656ACDC-2.5#TRPBF
LT6656BCDC-2.5#TRPBF
LT6656AIDC-2.5#TRPBF
LT6656BIDC-2.5#TRPBF
LT6656ACDC-3#TRPBF
LT6656BCDC-3#TRPBF
LT6656AIDC-3#TRPBF
LT6656BIDC-3#TRPBF
LT6656ACDC-3.3#TRPBF
LT6656BCDC-3.3#TRPBF
LT6656AIDC-3.3#TRPBF
LT6656BIDC-3.3#TRPBF
LFGX
LFGX
LFGX
LFGX
LFNR
LFNR
LFNR
LFNR
LFNT
LFNT
LFNT
LFNT
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACDC-4.096#TRMPBF LT6656ACDC-4.096#TRPBF LFNW
LT6656BCDC-4.096#TRMPBF LT6656BCDC-4.096#TRPBF LFNW
LT6656AIDC-4.096#TRMPBF LT6656AIDC-4.096#TRPBF LFNW
LT6656BIDC-4.096#TRMPBF LT6656BIDC-4.096#TRPBF LFNW
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
LT6656ACDC-5#TRMPBF
LT6656BCDC-5#TRMPBF
LT6656AIDC-5#TRMPBF
LT6656BIDC-5#TRMPBF
LEAD FREE FINISH
LT6656ACDC-5#TRPBF
LT6656BCDC-5#TRPBF
LT6656AIDC-5#TRPBF
LT6656BIDC-5#TRPBF
PART MARKING*
656125
LFNY
LFNY
LFNY
LFNY
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
SPECIFIED TEMPERATURE RANGE
–40°C to 85°C
–40°C to 85°C
PACKAGE DESCRIPTION
8-Lead (5mm × 5mm) Ceramic LCC
8-Lead (5mm × 5mm) Ceramic LCC
†
LT6656AILS8-1.25#PBF
†
LT6656BILS8-1.25#PBF
656125
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
†
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
6656fc
3
For more information www.linear.com/LT6656
LT6656
AVAILABLE OPTIONS
SPECIFIED TEMPERATURE RANGE
0°C TO 70°C
–40°C TO 85°C
ORDER PART NUMBER*
LT6656AIS6-1.25
LT6656AILS8-1.25
LT6656BIS6-1.25
LT6656AIDC-1.25
LT6656BILS8-1.25
LT6656BIDC-1.25
LT6656AIS6-2.048
LT6656BIS6-2.048
LT6656AIDC-2.048
LT6656BIDC-2.048
LT6656AIS6-2.5
LT6656BIS6-2.5
LT6656AIDC-2.5
LT6656BIDC-2.5
LT6656AIS6-3
TEMPERATURE
COEFFICIENT
OUTPUT VOLTAGE
INITIAL ACCURACY
ORDER PART NUMBER*
LT6656ACS6-1.25
N/A
1.250V
0.05%
0.05%
0.10%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
0.05%
0.10%
0.10%
0.20%
10ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
15ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
10ppm/°C
20ppm/°C
LT6656BCS6-1.25
LT6656ACDC-1.25
N/A
LT6656BCDC-1.25
LT6656ACS6-2.048
LT6656BCS6-2.048
LT6656ACDC-2.048
LT6656BCDC-2.048
LT6656ACS6-2.5
LT6656BCS6-2.5
LT6656ACDC-2.5
LT6656BCDC-2.5
LT6656ACS6-3
2.048V
2.500V
3.000V
3.300V
4.096V
5.000V
LT6656BCS6-3
LT6656BIS6-3
LT6656ACDC-3
LT6656BCDC-3
LT6656ACS6-3.3
LT6656BCS6-3.3
LT6656ACDC-3.3
LT6656BCDC-3.3
LT6656ACS6-4.096
LT6656BCS6-4.096
LT6656ACDC-4.096
LT6656BCDC-4.096
LT6656ACS6-5
LT6656AIDC-3
LT6656BIDC-3
LT6656AIS6-3.3
LT6656BIS6-3.3
LT6656AIDC-3.3
LT6656BIDC-3.3
LT6656AIS6-4.096
LT6656BIS6-4.096
LT6656AIDC-4.096
LT6656BIDC-4.096
LT6656AIS6-5
LT6656BCS6-5
LT6656BIS6-5
LT6656ACDC-5
LT6656BCDC-5
LT6656AIDC-5
LT6656BIDC-5
*See Order Information section for complete part number listing.
6656fc
4
For more information www.linear.com/LT6656
LT6656
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified
temperature range, otherwise specifications are at TA = 25°C. VIN = VOUT + 0.5V (for LT6656-1.25, VIN = 2.2V), CL = 1μF, IL = 0,unless
otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Voltage Error
LT6656ACS6, LT6656AIS6, LT6656AILS8
LT6656BCS6, LT6656BIS6, LT6656BILS8
LT6656ACDC, LT6656AIDC
–0.05
–0.1
–0.1
–0.2
0.05
0.1
0.1
0.2
%
%
%
%
LT6656BCDC, LT6656BIDC
l
l
Output Voltage Temperature Coefficient (Note 5)
Line Regulation
LT6656A
LT6656B
5
10
20
ppm/°C
ppm/°C
12
V
IN
= (V
+ 0.5V) to 18V
2
25
40
ppm/V
ppm/V
OUT
l
LT6656-2.048, LT6656-2.5, LT6656-3,
LT6656-3.3, LT6656-4.096, LT6656-5
V
= 2.2V to 18V
2
25
40
ppm/V
ppm/V
IN
l
l
LT6656-1.25
Load Regulation (Note 6)
I = 5mA, Sourcing
65
150
375
ppm/mA
ppm/mA
L
LT6656-2.048, LT6656-2.5, LT6656-3,
LT6656-3.3, LT6656-4.096, LT6656-5
I = 5mA, Sourcing
80
175
425
ppm/mA
ppm/mA
L
l
l
LT6656S6-1.25, LT6656DC-1.25
I = 5mA, Sourcing
135
250
500
ppm/mA
ppm/mA
L
LT6656LS8-1.25
Dropout Voltage (Note 7)
Minimum Input Voltage
V
L
– V , ∆V
Error ≤ 0.1%
IN
I = 0
OUT
OUT
3
10
40
mV
mV
l
l
LT6656-2.048, LT6656-2.5, LT6656-3,
LT6656-3.3, LT6656-4.096, LT6656-5
I = 5mA, Sourcing
250
370
500
mV
mV
L
LT6656-2.048, LT6656-2.5, LT6656-3,
LT6656-3.3, LT6656-4.096, LT6656-5
I = 0, ∆V
Error ≤ 0.1%
L
OUT
LT6656-1.25
0°C ≤ T ≤ 70°C
1.35
0.85
1.5
1.6
1.8
V
V
V
l
l
A
–40°C ≤ T ≤ 85°C
A
Supply Current
1.0
1.5
µA
µA
l
Output Short Circuit Current
Short V
Short V
to GND
18
4
mA
mA
OUT
OUT
to V
IN
Input Reverse Leakage Current
Reverse Output Current
V
IN
V
IN
= –18V, V
= GND, V
= GND
80
30
µA
µA
OUT
OUT
= 18V
Output Voltage Noise (Note 8)
0.1Hz to 10Hz
30
50
ppm
P-P
RMS
RMS
RMS
10Hz to 1kHz, LT6656-1.25
10Hz to 1kHz, LT6656-2.5
10Hz to 1kHz, LT6656-5
µV
µV
µV
80
140
Turn-On Time
LT6656-1.25, 0.1% Settling
LT6656-2.5, 0.1% Settling
LT6656-5, 0.1% Settling
15
30
60
ms
ms
ms
Long Term Drift of Output Voltage (Note 9)
Hysteresis (Note 10)
LT6656S6, LT6656DC
LT6656LS8
50
15
ppm/√kHr
ppm/√kHr
LT6656S6, LT6656DC
∆T = 0°C to 70°C
∆T = –40°C to 85°C
25
70
ppm
ppm
LT6656LS8
∆T = 0°C to 70°C
∆T = –40°C to 85°C
15
55
ppm
ppm
6656fc
5
For more information www.linear.com/LT6656
LT6656
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 7: Excludes load regulation errors.
Note 8: Peak-to-peak noise is measured with a 3-pole highpass filter at
0.1Hz and a 4-pole lowpass filter at 10Hz. The unit is enclosed in a still-air
environment to eliminate thermocouple effects on the leads. The test
time is 10 seconds. RMS noise is measured on a spectrum analyzer in a
shielded environment.
Note 9: Long term stability typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the first thousand hours with a continuing trend toward
reduced drift with time. Long-term stability will also be affected by
differential stresses between the IC and the board material created during
board assembly.
Note 2: The LT6656C is guaranteed to meet specified performance from
0°C to 70°C. The LT6656C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT6656I is guaranteed to meet
specified performance from –40°C to 85°C. By design, the LT6656 is
guaranteed functional over the operating temperature range of –55°C to
125°C.
Note 3: If the LT6656 is stored outside of the specified temperature range,
the output may shift due to hysteresis.
Note 4: The stated temperature is typical for soldering of the leads during
manual rework. For detailed IR reflow recommendations, refer to the
Applications section.
Note 5: Temperature coefficient is measured by dividing the maximum
change in output voltage by the specified temperature range.
Note 6: Load regulation is measured with a pulse from no load to the
specified load current. Output changes due to die temperature change
must be taken into account separately.
Note 10: Hysteresis in output voltage is created by mechanical stress
that differs depending on whether the IC was previously at a higher or
lower temperature. Output voltage is always measured at 25°C, but
the IC is cycled to the hot or cold temperature limit before successive
measurements. For instruments that are stored at well controlled
temperatures (within 20 or 30 degrees of operational temperature)
hysteresis is usually not a dominant error source. Typical hysteresis is the
worst-case of 25°C to cold to 25°C or 25°C to hot to 25°C, preconditioned
by one thermal cycle.
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Temperature Drift
Typical VOUT Distribution
Supply Current vs Input Voltage
100
10
1
200
180
160
140
120
100
80
10000
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
T
T
T
T
T
= 125°C
= 85°C
1.25V OPTION
ALL OPTIONS
25 TYPICAL UNITS
NORMALIZED AT 25°C
ALL OPTIONS
A
A
A
A
A
C
I
= 1µF
L
L
= 25°C
= 0
= –40°C
= –55°C
C
I
= 1µF
= 0
T
= 25°C
A
L
L
60
40
20
0.1
–1000
0
0
2
4
6
8
10 12 14 16 18 20
–0.10
–0.06
–0.02 0 0.02
0.06
0.10
–60 –40 –20
0
20 40 60 80 100 120
INPUT VOLTAGE (V)
TEMPERATURE (°C)
OUTPUT VOLTAGE ERROR (%)
6652 G01
6656 G17
6656 G02
6656fc
6
For more information www.linear.com/LT6656
LT6656
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Supply Voltage
vs Load Current
Dropout Voltage vs Load Current
Supply Current vs Input Voltage
100
10
1
2.0
1.8
1.6
1.4
1.2
1.0
0.8
1000
100
10
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
2.048V TO 5V OPTIONS
1.25V OPTION
2.048V TO 5V OPTIONS
A
A
A
A
INITIAL V = 2.2V
V
– V
IN
= 0.1%
IN OUT
∆V
INITIAL V = V
+ 0.5V
OUT
OUT
IN
∆V
= 0.1%
OUT
V
ON
T
T
T
T
T
= 125°C
= 85°C
A
A
A
A
A
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
A
A
A
A
2.5V OPTION SHOWN
MOVES WITH VOLTAGE OPTION
= 25°C
V
= –40°C
= –55°C
ON
0.1
1
0
2
4
6
8
10 12 14 16 18 20
0.1µ
1µ
10µ
100µ
1m
10m
0.1µ
1µ
10µ
100µ
1m
10m
INPUT VOLTAGE (V)
LOAD CURRENT (A)
LOAD CURRENT (A)
6656 G03
6656 G18
6656 G04
Load Regulation (Sourcing)
Load Regulation (Sourcing)
Load Regulation (Sinking)
500
250
750
500
250
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.25V OPTION
2.048V TO 5V OPTIONS
ALL OPTIONS
V
C
= 1.75V
V
C
= V
+ 0.5V
V
C
= V + 0.5V
IN
L
IN
L
OUT
IN
OUT
= 1µF
= 1µF
= 1µF
L
0
T
T
T
T
= 85°C, 125°C
= 25°C
A
A
A
A
–250
–500
–750
–1000
= –40°C
= –55°C
–250
–500
–750
T
T
T
T
T
= 125°C
= 85°C
A
A
A
A
A
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
A
A
A
A
= 25°C
= –40°C
= –55°C
–0.5
0.1µ
1µ
10µ
100µ
1m
10m
0.1µ
1µ
10µ
100µ
1m
10m
10µ
100µ
1m
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
6656 G19
6656 G05
6656 G06
Power Supply Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
Line Regulation
1000
900
800
700
600
500
400
300
200
100
0
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
ALL OPTIONS
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
V
C
I
= V + 0.5V
OUT
2.5V OPTION
V = 3V
IN
A
A
A
A
IN
L
L
I
= 0
L
= 1µF
L
C
= 1µF
= 0
2.5V OPTION SHOWN
MOVES WITH
V
ON
VOLTAGE OPTION
V
ON
I
L
I
L
I
L
I
L
= 0, C = 1µF
L
= 0, C = 10µF
L
1.25V OPTION
2.5V OPTION
5V OPTION
= 1mA, C = 1µF
L
= 1mA, C = 10µF
L
–100
–200
–10
0
2
4
6
8
10 12 14 16 18 20
10
100
1k
10k
10
100
1k
10k
INPUT VOLTAGE (V)
FREQUENCY (Hz)
FREQUENCY (Hz)
6656 G08
6656 G09
6656 G20
6656fc
7
For more information www.linear.com/LT6656
LT6656
TYPICAL PERFORMANCE CHARACTERISTICS
Ground Current vs Load Current
Output Impedance vs Frequency
Output Impedance vs Frequency
10k
1k
10k
1k
1000
100
10
V
C
I
= V
+ 0.5V
OUT
2.5V OPTION
ALL OPTIONS
IN
L
L
= 1µF
V
= 3V
V
C
= V
+ 0.5V
IN
IN
L
OUT
= 0
= 1µF
100
10
1
100
10
1
I
L
I
L
I
L
I
L
= 0, C = 1µF
L
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
A
A
A
A
= 0, C = 10µF
L
1.25V OPTION
2.5V OPTION
5V OPTION
= 100µA, C = 1µF
L
= 100µA, C = 10µF
L
1
10
100
1k
10k
10
100
1k
10k
10µ
100µ
1m
10m
FREQUENCY (Hz)
FREQUENCY (Hz)
LOAD CURRENT (A)
6656 G21
6656 G22
6656 G07
Reverse Output Current
Output Noise 0.1Hz to 10Hz
Reverse Input Current
1000
100
10
100
10
1
ALL OPTIONS
ALL OPTIONS
ALL OPTIONS
V
= GND
V
= GND
V
C
L
= V
+ 0.5V
OUT
IN
IN
L
OUT
= 1µF
I
= 0
1
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
T
T
T
T
= 125°C
= 85°C
= 25°C
= –55°C
A
A
A
A
A
A
A
A
0
0
–2 –4 –6 –8 –10 –12 –14 –16 –18 –20
0
5
10
15
20
TIME (1s/DIV)
6656 G13
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
6656 G11
6656 G12
Output Voltage Noise Spectrum
vs Load Current
Output Noise Voltage Spectrum
vs Load Capacitance
Output Voltage Noise Spectrum
30
25
20
15
10
5
16
14
12
10
8
40
35
30
25
20
15
10
5
V
C
I
= V
+ 5V
OUT
2.5V OPTION
2.5V OPTION
I
L
I
L
I
L
I
L
= 0
IN
L
L
= 1µF
V
C
= 3V
V
I
= 3V
= 10µA
= 250µA
= 1mA
IN
L
IN
L
C = 47µF
L
= 0
= 1µF
= 0
5V OPTION
C
= 4.7µF
C
L
6
= 0.47µF
4
L
2.5V OPTION
2
1.25V OPTION
1k
0
0
0
10
100
10k
10
100
1k
10k
1
10
100
1k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
6656 G24
6656 G14
6656 G15
6656fc
8
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LT6656
TYPICAL PERFORMANCE CHARACTERISTICS
Integrated 10Hz to 1kHz Noise
vs Load Current
Integrated 10Hz to 1kHz Noise
vs Load Current
500
400
300
200
100
0
250
V
C
= V
+ 0.5V
OUT
2.5V OPTION
IN
L
= 1µF
200
150
100
50
5V OPTION
2.5V OPTION
C
C
C
C
= 0.47µF
= 1µF
= 10µF
= 47µF
L
L
L
L
1.25V OPTION
0
0.1µ
1µ
10µ
100µ
1m
10m
0.1µ
1µ
10µ
100µ
1m
10m
LOAD CURRENT (A)
LOAD CURRENT (A)
6656 G25
6656 G23
Long-Term Drift
Long-Term Drift (LS8)
200
150
100
50
200
150
100
50
ALL OPTIONS
1.25V OPTION
35 TYPICAL PARTS
SOLDERED ONTO PCB
C
I
= 1µF
= 0
V
C
= 2V
L
L
IN
=1µF
= 0
LOAD
LOAD
I
0
0
–50
–100
–150
–200
–50
–100
–150
–200
5 TYPICAL PARTS
SOLDERED ONTO PCB
0
100 200 300 400 500 600 700 800 900 1000
400 500
100 200 300
0
600 700 800 9001000
HOURS
TIME (HOURS)
6656 G16
6656 G26
6656fc
9
For more information www.linear.com/LT6656
LT6656
PIN FUNCTIONS
(TSOT-23/DFN)
(LS8)
GND* (Pin 1/Pin 3): Internal Function. This pin must be
tied to ground.
NC (Pins 1, 2, 7): Not Internally Connected. May be tied
to V , V , GND or floated.
IN OUT
GND (Pin 2/Pin 2): Device Ground.
GND* (Pin 3): Internal Function. This pin must be tied
to ground.
NC (Pins 3, 5/Pins 1, 5): Not Internally Connected. May
be tied to V , V , GND or floated.
GND (Pin 4): Device Ground.
IN OUT
V
(Pin 4/Pin 6): Power Supply. The minimum supply
V
(Pin5):OutputVoltage.Aminimumoutputcapacitor
OUT
IN
varieswithoutputloadandvoltageoption,seetheDropout
Voltage specification in the Electrical Characteristics table
for further details. The maximum input voltage is 18V.
of 1µF is required for stable operation.
V
(Pin 6): Output Voltage. Tie to pin 5 for best load
OUT
regulation.
Bypass V with a 0.1µF capacitor to ground.
IN
V
(Pin 8): Power Supply. Bypass V with a 0.1µF
IN
IN
V
(Pin 6/Pin 4): Output Voltage. A minimum output
OUT
capacitor to ground.
capacitor of 1µF is required for stable operation.
GND*(Exposed Pad Pin 7, DFN Only): This pin must be
tied to ground.
BLOCK DIAGRAM
8
LS8
V
IN
TSOT-23/DFN
V
IN
1
2
NC
NC
NC
7
6
5
NC
V
OUT
V
V
OUT
OUT
ERROR
AMP
ERROR
AMP
BANDGAP
BANDGAP
NC
GND*
3
GND
GND*
GND
4
6656 BD (LS8)
6656 BD
6656fc
10
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LT6656
APPLICATIONS INFORMATION
Long Battery Life
Output Voltage Options
Series references have a large advantage over shunt style
references. Shunt references require a resistor from the
power supply to operate. This resistor must be chosen
to supply the maximum current that can be demanded by
the load. When the load is not operating at this maximum
current, theshuntreferencemustalwayssinkthiscurrent,
resulting in high dissipation and shortened battery life.
TheperformanceoftheLT6656isconsistentforthe2.048V
to 5V options. The 1.25V option has slightly reduced load
regulation, and unlike the higher voltage options, the
minimum operating supply voltage is limited by internal
circuitry rather than the output voltage.
Parametersthatarebasedonchangesintheoutputvoltage,
suchasloadregulationandhysteresis,remainproportional
to the output voltage and are specified in relative units,
for example, parts per million (ppm). Parameters that
are not based on changes in the output voltage, such as
supply current and reverse input current, are the same
for all options.
The LT6656 series reference does not require a current
setting resistor and is specified to operate with any supply
from 1.5V to 18V, depending on the output voltage option,
load current and operating temperature (see Dropout
Voltage and Minimum Input Voltage in the Typical Perfor-
mance Characteristics). When the load does not demand
current, the LT6656 reduces its dissipation and battery life
is extended. If the reference is not delivering load current,
it dissipates only a few µW, yet the same connection can
deliver 5mA of load current when required.
ThebandwidthoftheLT6656decreaseswithhigheroutput
voltage. This causes parameters that are affected by both
bandwidth and output voltage, such as wideband noise
and output impedance, to increase less with higher output
voltage.
Start-Up
Bypass and Load Capacitance
To ensure proper start-up, the output voltage should be
between –0.3V and the rated output voltage. If the output
load may be driven more than 0.3V below ground, a low
forward voltage schottky diode from the output to ground
is required. The turn-on characteristics can be seen in
Figure 1.
The LT6656 voltage reference needs a 0.1μF input bypass
capacitor placed within an inch of the input pin. An ad-
ditional 2.2μF capacitor should be used when the source
impedance of the input supply is high or when driving
heavy loads. The bypassing of other local devices may
serve as the required components. The output of the
LT6656requiresacapacitanceof1µForlarger. TheLT6656
is stable with a wide variety of capacitor types including
ceramic,tantalumandelectrolyticduetoitslowsensitivity
to ESR (5Ω or less).
V
IN
1V/DIV
The test circuit in Figure 2 was used to test the response
and stability of the LT6656 to various load currents. The
resultant transient responses can be seen in Figure 3 and
Figure4.Thelargescaleoutputresponsetoa500mVinput
step is shown in Figure 5 with a more detailed photo and
description in the Output Settling section.
V
OUT
6656 F01
1ms/DIV
Figure 1. LT6656-2.5 Turn-On Characteristics, CL = 1µF
R2
V
IN
LT6656-2.5
3V
V
GEN
3V
C
IN
C
L
1µF
R1
0.1µF
2N7000
6656 F02
Figure 2. Transient Load Test Circuit
6656fc
11
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LT6656
APPLICATIONS INFORMATION
Thesettlingtimeistypicallylessthan8msforoutputloads
up to 5mA, however the time required to settle when the
loadisturnedofforinresponsetoaninputtransientcanbe
significantly longer due to the dead band (shown in Figure
7). Duringthisintervaltheoutputstageisneithersourcing
nor sinking current so the settling time is dominated by
the ability of the application circuit to discharge the output
capacitor to the voltage at which the sourcing circuitry
in the output stage reactivates. Larger load currents will
decrease the settling time and higher output capacitance
will increase the settling time.
0µA
I
OUT
100µA
2.52V
2.50V
2.48V
V
OUT
6656 F03
5ms/DIV
Figure 3. Transient Response, 0µA to 100µA Load Step
(R2 = 24.9k, R1 = Open)
In application circuits where the LT6656 is experiencing
a load step greater than 5µA, such as an ADC reference
and supply implementation, the settling time will typically
remain less than 8ms, regardless of the output settling
from a previous load step.
1mA
I
OUT
2mA
The settling time can be estimated by the following
equation:
2.52V
2.50V
2.48V
V
OUT
2(Deadband)(CL )
Settling time≈
+ (VOUT )(0.8ms/V)
IL
6656 F04
5ms/DIV
The deadband is ≈7mV for the 2.5V option, is proportional
to the voltage option (i.e., ≈14mV for the 5V option) and
can double due to variations in processing.
Figure 4. Transient Response, 1mA to 2mA Load Step
(R1 = R2 = 2.49k)
The graph in Figure 6 shows the settling time versus load
step with no load and with a constant 2µA load applied.
Note the settling time can be longer with load steps that
are not large enough to activate the sinking side of the
output stage.
3.25V
V
IN
2.75V
2.7V
2.5V
2.3V
30
2.5V OPTION
V
OUT
V
C
= 3V
IN
L
= 1µF
25
20
15
10
5
∆I = LOAD
L
STEP TO ZERO
6656 F05
5ms/DIV
Figure 5. Output Response to 0.5VP-P Step on VIN, CL = 1µF, IL = 0
∆I = LOAD
L
STEP TO 2µA
Output Settling
The output of the LT6656 is primarily designed to source
current into a load, but is capable of sinking current to
aid in output transient recovery. The output stage uses a
class B architecture to minimize quiescent current and
has a crossover dead band as the output transitions from
sourcing to sinking current.
∆I = ZERO TO
L
LOAD STEP
0
0.001
0.01
0.1
LOAD STEP (mA)
1
10
6656 F06
Figure 6. Output Settling Time to 0.05% vs Load Step
6656fc
12
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LT6656
APPLICATIONS INFORMATION
the output can be held up by a backup battery with the
input pulled to ground, the reverse output protection of
the LT6656 limits the output current to typically less than
30µA. The current versus reverse voltage is shown in the
Typical Performance Characteristics section.
3.25V
V
IN
2.75V
I
= 0
L
V
OUT
10mV/DIV
Long-Term Drift
I
= 5µA
L
Long-term drift cannot be extrapolated from accelerated
high temperature testing. This erroneous technique gives
drift numbers that are wildly optimistic. A more realistic
way to determine long-term drift is to measure it over the
time interval of interest. The LT6656 drift data was taken
over 100 parts that were soldered onto PC boards in a
typical application configuration. The boards were then
6656 F07
5ms/DIV
Figure 7. Detailed Output Response to a 0.5V Input Step,
CIN = CL = 1µF
The photo in Figure 7 shows the output response to a 0.5V
input step in both a no-load and 5µA load condition. In
the no-load condition only the bias current of the internal
bandgapreference(about400nA)isavailabletodischarge
the output capacitor.
placed into a constant temperature oven with T = 30°C,
A
their outputs scanned regularly and measured with an
8.5 digit DVM. The parts chosen in the Long Term Drift
curves in the Typical Performance Characteristics section
represent high, low and typical units.
Output Noise
Hysteresis
Low frequency noise is proportional to the output voltage
and is insensitive to output current and moderate levels
of output capacitance.
Hysteresis on the LT6656 is measured in two steps, for
example, from 25°C to –40°C to 25°C, then from 25°C to
85°C to 25°C, for the industrial temperature range. After
preconditioning by one thermal cycle, this two-step cycle
is repeated several times and the maximum hysteresis
from all the partial cycles is noted.
Wideband noise increases less with higher output voltage
and is proportional to the bandwidth of the output stage,
increasing with higher load current and lower output
capacitance.
Results over both commercial and industrial temperature
rangesareshowninFigure8andFigure9.Thepartscycled
overthehighertemperaturerangehaveahigherhysteresis
than those cycled over the lower range.
Peaking in the noise response is another factor contribut-
ing to the output noise level for a given frequency range.
Noise peaking can be reduced by increasing the size of the
outputcapacitorwhendrivingheavierloads,orconversely,
reducing the size of the output capacitor when driving
lighterloads.NoiseplotsintheTypicalPerformanceCurves
section show noise spectrum with various load currents
and output capacitances.
Power Dissipation
The LT6656 will not exceed the maximum junction tem-
perature when operating within its specified temperature
range of –40°C to 85°C, maximum input voltage of 18V
and specified load current of 5mA.
Internal Protection
The LT6656 incorporates several internal protection
features that make it ideal for use in battery powered
systems. Reverse input protection limits the input cur-
rent to typically less than 40µA when either the LT6656
or the battery is installed backwards. In systems where
IR Reflow Shift
The different expansion and contraction rates of the mate-
rials that make up the LT6656 package may induce small
stressesonthediethatcancausetheoutputtoshiftduring
6656fc
13
For more information www.linear.com/LT6656
LT6656
APPLICATIONS INFORMATION
30
20
15
10
5
2.5V OPTION
0°C TO 25°C
70°C TO 25°C
1.25V OPTION
–40°C TO 25°C
85°C TO 25°C
V
C
I
= 3V
V
C
I
= 2V
IN
IN
= 1µF
25
20
15
10
5
= 1µF
L
= 0
L
= 0
L
L
0
0
–60 –40 –20
0
20
40
60
–160 –120 –80 –40
0
40 80 120 160
HYSTERESIS (ppm)
HYSTERESIS (ppm)
6656 F08
6656 F11
Figure 8. LT6656 S6, DC 0°C to 70°C Hysteresis
Figure 11. LT6656 LS8 –40°C to 85°C Hysteresis
20
2.5V OPTION
–40°C TO 25°C
85°C TO 25°C
IR reflow. Common lead free IR reflow profiles reach over
250°C, considerably more than lead solder profiles. The
higherreflowtemperatureoftheleadfreepartsexacerbates
the issue of thermal expansion and contraction causing
the output shift to generally be greater than with a leaded
reflow process.
18
16
14
12
10
8
V
C
= 3V
IN
= 1µF
L
= 0
I
L
6
The lead free IR reflow profile used to experimentally
measure the output voltage shift in the LT6656-2.5 is
shown in Figure 12. Similar results can be expected us-
ing a convection reflow oven. Figures 13 and 14 show the
change in output voltage that was measured for parts that
were run through the reflow process for 1 cycle and also 3
cycles. Additional drift of the LT6656 after IR reflow does
not vary significantly.
4
2
0
–160 –120 –80 –40
0
40 80 120 160
HYSTERESIS (ppm)
6656 F09
Figure 9. LT6656 S6, DC –40°C to 85°C Hysteresis
20
1.25V OPTION
V
C
L
= 2V
IN
L
= 1µF
300
I
= 0
15
10
5
380s
0°C TO 25°C
70°C TO 25°C
T = 260°C
P
RAMP
DOWN
T
= 217°C
L
225
150
75
T
= 200°C
S(MAX)
t
T
= 190°C
P
S
30s
T = 150°C
t
L
RAMP TO
150°C
130s
0
40s
–60 –40 –20
0
20
40
60
HYSTERESIS (ppm)
120s
4
6656 F10
0
0
2
6
8
10
Figure 10. LT6656 LS8 0°C to 70°C Hysteresis
MINUTES
6656 F12
Figure 12. Lead Free Reflow Profile Due to IR Reflow
6656fc
14
For more information www.linear.com/LT6656
LT6656
APPLICATIONS INFORMATION
7
short as possible to minimize the voltage drops caused
by load and ground currents. Excessive trace resistance
directly impacts load regulation.
2.5V OPTION
SOT-23
3 CYCLES
1 CYCLE
V
C
= 3V
IN
6
5
4
3
2
1
0
= 1µF
L
= 0
I
L
Humidity Sensitivity
Plastic mold compounds absorb water. With changes in
relative humidity, plastic packaging materials change the
amount of pressure they apply to the die inside, which
can cause slight changes in the output of a voltage refer-
ence, usually on the order of 100ppm. The LS8 package is
hermetic, so it is not affected by humidity, and is therefore
more stable in environments where humidity may be a
concern. However, PC board material may absorb water
and apply mechanical stress to the LT6656LS8. Proper
board materials and layout are essential.
0
20
60
100
140
180
220
CHANGE IN OUTPUT VOLTAGE (ppm)
6656 F13
Figure 13. ∆VOUT Due to IR Reflow,
Peak Temperature = 260°C, SOT-23
10
2.5V OPTION
DFN
3 CYCLES
1 CYCLE
9
8
7
6
5
4
3
2
1
0
V
C
L
= 3V
For best stability, the PC board layout is critical. Change
in temperature and position of the PC board, as well as
aging, can alter the mechanical stress applied to compo-
nentssolderedtotheboard.FR4andsimilarmaterialsalso
absorb water, causing the board to swell. Even conformal
coating or potting of the board does not always eliminate
this effect, though it may delay the symptoms by reduc-
ing the rate of absorption. Removing power and ground
planes in the PC board under the voltage reference can
improve the stability significantly.
IN
= 1µF
L
= 0
I
80
160
240
–160 –80
0
CHANGE IN OUTPUT VOLTAGE (ppm)
6656 F14
Figure 15a shows a tab cut through the PC board on three
sides of an LT6656, which significantly reduces stress
on the IC, as described in Application Note 82. For even
better performance, Figure 15b shows slots cut through
the PC board on all four sides. The slots should be as
long as possible, and the corners just large enough to
accommodate routing of traces. It has been shown that
for PC boards designed in this way, humidity sensitivity
can be reduced to less than 35ppm for a change in relative
humidity of approximately 60%. Mounting the reference
near the center of the board, with slots on four sides, can
further reduce the sensitivity to less than 10ppm.
Figure 14. ∆VOUT Due to IR Reflow,
Peak Temperature = 260°C, DFN
PC Board Layout
The mechanical stress of soldering a surface mount volt-
age reference to a PC board can cause the output voltage
to shift and temperature coefficient to change.
To reduce the effects of stress-related shifts, position
the reference near the short edge of the PC board or in a
corner. In addition, slots can be cut into the board on two
sides of the device. See Application Note AN82 for more
information. http://www.linear.com
An additionaladvantageofslotting the PC boardis that the
LT6656 is thermally isolated from surrounding circuitry.
This can help reduce thermocouple effects and improve
accuracy.
The input and output capacitors should be mounted close
to the package. The GND and V
traces should be as
OUT
6656fc
15
For more information www.linear.com/LT6656
LT6656
APPLICATIONS INFORMATION
LS8
6656 F15a
Figure 15a. 3-Sided PCB Cutout
LS8
6656 F12b
Figure 15b. 4-Sided PCB Cutout
6656fc
16
For more information www.linear.com/LT6656
LT6656
TYPICAL APPLICATIONS
Regulator Reference
only 27.4µA. This system is greatly simplified because
the precision reference does not need to be cycled on and
off to save power. Furthermore, leaving the reference on
continuously eliminates concern for turn-on settling time.
The robust input and output of the LT6656 along with its
high output current make it an excellent precision low
power regulator as well as a reference. The LT6656 would
be a good match with a small, low power microcontroller.
Using the LT6656 as a regulator reduces power consump-
tion, decreases solution size and increases the accuracy
of the microcontroller’s on board ADC.
LT6656-2.5
3V ≤ V ≤ 18V
IN
OUT
IN
MCU
V /V
CC REF
0.1µF
10µF
5
6
7
2
3
1
PB0/AIN0/A /MOSI
REF
PB1/INT0/A /MISO/OC1A
IN1
Low Power ADC Reference
PB2/ADC1/SCK/T0/INT0
PB3/ADC2
Low power ADCs draw only a few µAs during their idle
period and well over 100µA during conversions. Despite
these surges of current, the ADC in reality can have very
low power consumption. Figure 17 shows the LTC2480,
a low power delta sigma ADC. When the ADC is disabled
PB4/ADC3
PB5/RESET/ADC0
GND
6656 F16
its quiescent current (I ) is roughly 1µA, during conver-
Figure 16. Microcontroller Reference and Regulator
Q
sion the I jumps up to 160µA. In reality, the power con-
Q
sumption is not only based on the I during conversion,
Q
LT6656-5
but the real power consumption of the ADC is set by the
conversion time and the sample rate. The LTC2480 shown
in Figure 17 has a conversion time of 160ms which sets
the maximum sample rate of 6 samples per second. The
maximum sample rate also sets the maximum current
consumption to 160µA, but at slower sample rates the
ADC will have significantly lower average current draw.
If the ADC is sampled at 1 sample per second the aver-
age current drawn by the ADC during a 1 second interval
would only be 26.4µA. When taking into consideration the
current drawn by the reference, the total current draw is
5.1V ≤ V ≤ 18V
IN
IN
OUT
4.7µF
0.1µF
REF
V
CC
+
IN
CS
SCK
SDO
DIFFERENTIAL INPUT
LTC±480
±V
• 0.5 (±±.5Vꢀ
REF
–
IN
6656 F17
AT 1sps, I = ±7.4µA
Q
Figure 17. Low Power ADC Reference
6656fc
17
For more information www.linear.com/LT6656
LT6656
TYPICAL APPLICATIONS
Extended Supply Range Reference
V
CC
UP TO 160V
330k
MMBT5551
IN
BZX584C12
0.1µF
V
OUT
OUT
LT6656-2.5
2.2µF
1µF
6656 TA03
Boosted Output Current Reference
3.6V ≤ V ≤ 18V
CC
+
220Ω
10µF
2N2905
1µF
0.1µF
IN
V
OUT
OUT
LT6656-2.5
40mA MAX
6656 TA04
Micropower Regulator, IQ = 2µA, Sink Up to 8mA
3V ≤ V ≤ 18V
CC
LT6656-2.5
IN
OUT
+
–
0.1µF
1µF
LT6003
2.5V
6656 TA06
ADC Reference and Bridge Excitation Supply
3.3V ≤ V ≤ 5.5V
CC
LT6656-3.3
3.8V ≤ V ≤ 18V
IN
OUT
IN
0.1µF
1µF
0.1µF
10µF
10k
10k
10k
V
V
CC
REF
–
+
IN
CS
SCK
SDO
0.1µF
0.1µF
LTC2452
IN
6656fc
18
For more information www.linear.com/LT6656
LT6656
TYPICAL APPLICATIONS
Low Power Precision High Voltage Supply Monitor, IQ = 1.4µA, High Voltage Supply Load = 10µA
100V
105V OVERVOLTAGE THRESHOLD
V
CC
9.53M
3
4
7
+
6.5V ≤ V ≤ 10V
CC
OVERVOLTAGE FLAG
LTC1540
LT6656-5
6
IN
OUT
–
5
0.1µF
1µF 475k
1, 2
6656 TA08
2-Terminal Current Source
+
+
–
LT6003
R3
V
REF
R1
1µF
LT6656-1.25
GND
IN
OUT
0.1µF
R2
–
6656 TA09
V
R2
REF
IOUT
=
+1
R1 R3
Precision Current and Boosted Reference, IQ = 5.5µA
249k
V
CC
+
–
+
–
1k
2.75V
200k
2N5086
LT6004
LT6004
1µA OUT
3V ≤ V ≤ 16V
CC
2M
LT6656-2.5
IN
OUT
2.5V
0.1µF
1µF
6656 TA10
6656fc
19
For more information www.linear.com/LT6656
LT6656
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC
(NOTE 4)
0.62
MAX
0.95
REF
1.22 REF
1.4 MIN
1.50 – 1.75
(NOTE 4)
2.80 BSC
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.45
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.90 BSC
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
6656fc
20
For more information www.linear.com/LT6656
LT6656
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DC6 Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
0.70 ±0.05
2.55 ±0.05
0.61 ±0.05
1.15 ±0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
1.42 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
0.40 ±0.10
TYP
4
6
0.56 ±0.05
(2 SIDES)
2.00 ±0.10
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
(DC6) DFN REV B 1309
R = 0.05
TYP
3
1
0.25 ±0.05
0.50 BSC
0.75 ±0.05
0.200 REF
1.37 ±0.05
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
0.00 – 0.05
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6656fc
21
For more information www.linear.com/LT6656
LT6656
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LS8 Package
8-Pin Leadless Chip Carrier (5mm × 5mm)
(Reference LTC DWG # 05-08-1852 Rev B)
8
2.50 0.15
PACKAGE OUTLINE
7
1
0.5
2
3
6
2.54 0.15
1.4
1.50 0.15
XYY ZZ
ABCDEF
4
Q12345
0.70 0.05 × 8
COMPONENT
PIN “A1”
5.00 SQ 0.15
5.80 SQ 0.15
TRAY PIN 1
BEVEL
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
PACKAGE IN TRAY LOADING ORIENTATION
5.00 SQ 0.15
4.20 SQ 0.10
8
1.45 0.10
0.95 0.10
5.00 SQ 0.15
8
R0.20 REF
2.00 REF
PIN 1
1
2
1
2
7
6
7
6
TOP MARK
(SEE NOTE 5)
0.5
2.54 0.15
4.20 0.10
1.4
5
3
3
5
R0.20 REF
1.00 × 7 TYP
LS8 0113 REV B
4
4
0.70 TYP
0.10 TYP
0.64 × 8 TYP
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS
PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE
4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM
5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6656fc
22
For more information www.linear.com/LT6656
LT6656
REVISION HISTORY
REV
DATE
7/10
5/11
DESCRIPTION
PAGE NUMBER
1 to 18
A
Voltage options added (1.25, 2.048, 3, 3.3), reflected throughout the data sheet
Added 6-lead DFN package reflected throughout the data sheet
B
1 to 20
C
11/13 Addition of 1.25V option in the LS8 package
Note 10 updated with additional explanation of hysteresis
Pin Functions updated to show pin numbers and LS8 package
Block Diagram updated to show pin numbers and LS8 package
Hysteresis section updated with additional explanation
Hysteresis graphs updated for SOT23 and LS8 packages
New section added for Humidity Sensitivity
1 to 4
6
10
10
13
14
15, 16
6656fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LT6656
TYPICAL APPLICATION
Reference Regulator for Micropower DAC, Total IQ = 4.8µA
LT6656-5
5V
5.1V ≤ V ≤ 18V
IN
OUT
IN
0.1µF
10µF
V
V
CC
REF
0V TO 5V OUTPUT
0V TO 5V OUTPUT
DAC A
DAC B
CS
SCK LTC1662
SDI
GND
6656 TA07
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LT1389
LTC1440
LT1460
Nanopower Precision Shunt Voltage Reference 0.05% Max 10ppm/°C Max, 800nA Supply
Micropower Comparator with Reference
Micropower Series Reference
3.7µA Max Supply Current, 1% 1.182V Reference, MSOP, PDIP and SO-8 Packages
0.075% Max, 10ppm/°C Max Drift, 2.5V, 5V and 10V Versions,MSOP, PDIP, SO-8,
SOT-23 and TO-92 Packages
LT1461
LT1495
LTC1540
LT1634
Micropower Precision LDO Series Reference
1.5µA Precision Rail-to-Rail Dual Op Amp
Nanopower Comparator with Reference
3ppm/°C Max Drift, 0°C to 70°C, –40°C to 85°C, –40°C to 125°C Options in SO-8
1.5µA Max Supply Current, 100pA Max IOS
600nA Max Supply Current, 2% 1.182V Reference, MSOP and SO-8 Packages
Micropower Precision Shunt Voltage
Reference
0.05% Max, 10ppm/°C Max Drift, 1.25V, 2.5V, 4.096V, 5V, 10µA Maximum Supply
Current
LT1790
LTC1798
LT6003
LT6650
LT6660
LT6700
Micropower Precision Series Reference
6µA Low Dropout Series Reference
1.6V, 1µA Precision Rail-to-Rail Op Amp
Micropower Reference with Buffer Amplifier
Tiny Micropower Series Reference
0.05% Max, 10ppm/°C Max, 60µA Supply, SOT23 Package
Available in Adjustable, 2.5V, 3V, 4.096V and 5V
1µA Max Supply Current, 1.6V Minimum Operating Voltage, SOT-23 and DFN Packages
0.05% Max, 5.6µA Supply, SOT-23 Package
0.2% Max, 20ppm/°C Max, 20mA Output Current, 2mm × 2mm DFN
6.5µA Supply Current, 1.4V Minimum Operating Voltage
Micropower, Low Voltage Dual Comparator
with 40mV Reference
6656fc
LT 1113 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LT6656
LINEAR TECHNOLOGY CORPORATION 2010
相关型号：
LT6656BCS6-2.048#TRMPBF
LT6656 - 1µA Precision Series Voltage Reference; Package: SOT; Pins: 6; Temperature Range: 0°C to 70°C
Linear
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