LTC1053CSW [Linear]
Dual/Quad Precision Zero-Drift Operational Amplifiers With Internal Capacitors; 双/四路精密零漂移运算放大器，具有内部电容
| 型号： | LTC1053CSW |
| 厂家： | 
Linear |
| 描述： | Dual/Quad Precision Zero-Drift Operational Amplifiers With Internal Capacitors |
| 文件： | 总16页 (文件大小：295K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1051/LTC1053
Dual/Quad Precision
Zero-Drift Operational Amplifiers
With Internal Capacitors
U
FEATURES
DESCRIPTIO
■
Dual/Quad Low Cost Precision Op Amp
The LTC®1051/LTC1053 are high performance, low cost
dual/quad zero-drift operational amplifiers. The unique
achievementoftheLTC1051/LTC1053isthattheyintegrate
on chip the sample-and-hold capacitors usually required
externally by other chopper amplifiers. Further, the
LTC1051/LTC1053 offer better combined overall DC and
AC performance than is available from other chopper
stabilized amplifiers with or without internal sample/hold
capacitors.
■
No External Components Required
■
Maximum Offset Voltage: 5µV
■
Maximum Offset Voltage Drift: 0.05µV/°C
■
Low Noise 1.5µVP-P (0.1Hz to 10Hz)
■
Minimum Voltage Gain: 120dB
■
Minimum PSRR: 120dB
■
Minimum CMRR: 114dB
■
Low Supply Current: 1mA/Op Amp
■
Single Supply Operation: 4.75V to 16V
The LTC1051/LTC1053 have an offset voltage of 0.5µV,
driftof0.01µV/°C,DCto10Hz,inputnoisevoltagetypically
1.5µVP-P and typical voltage gain of 140dB. The slew rate
of 4V/µs and gain bandwidth product of 2.5MHz are
achieved with only 1mA of supply current per op amp.
■
Input Common Mode Range Includes Ground
■
Output Swings to Ground
Typical Overload Recovery Time: 3ms
■
■
Pin Compatible with Industry Standard Dual and
Quad Op Amps
U
Overload recover times from positive and negative
saturation conditions are 1.5ms and 3ms respectively,
about a 100 or more times improvement over chopper
amplifiers using external capacitors.
APPLICATIO S
■
Thermocouple Amplifiers
■
Electronic Scales
■
The LTC1051 is available in an 8-lead standard plastic
dual-in-line package as well as a 16-pin SW package. The
LTC1053 is available in a standard 14-pin plastic package
and an 18-pin SO. The LTC1051/LTC1053 are plug in
replacements for most standard dual/quad op amps with
improved performance.
Medical Instrumentation
Strain Gauge Amplifiers
High Resolution Data Acquisition
DC Accurate R C Active Filters
■
■
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
High Performance Low Cost Instrumentation Amplifier
LTC1051 Noise Spectrum
120
R2
R1
5V
100
80
60
40
20
R2
2
3
8
–
R1
6
5
1/2
LTC1051
1
–
1/2
LTC1051
7
V
+
IN
V
+
IN
4
R1 = 499Ω, 0.1%
R2 = 100k, 0.1%
GAIN = 201
–5V
MEASURED CMRR ~ 120dB AT DC
MEASURED INPUT V 3µV
OS
1051/53 TA01a
MEASURED INPUT NOISE 2µV (DC – 10Hz)
10
100
1k
10k
P-P
FREQUENCY (Hz)
1051/53 TA01b
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1
LTC1051/LTC1053
W W U W
ABSOLUTE AXI U RATI GS
(Note 1)
Total Supply Voltage (V+ to V–)............................ 16.5V
Input Voltage ........................ (V+ + 0.3V) to (V– – 0.3V)
Output Short-Circuit Duration.......................... Indefinite
Operating Temperature Range
LTC1051M, LTC1051AM (OBSOLETE) .. –55°C to 125°C
LTC1051C/LTC1053C ......................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
U W
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
ORDER PART
ORDER PART
+
OUT A
–IN A
+IN A
1
2
3
4
V
8
7
6
5
1
2
3
4
5
6
7
14 OUT D
13 –IN D
OUT A
–IN A
+IN A
NUMBER
NUMBER
OUT B
–IN B
+IN B
12 +IN D
–
–
V
+
11
V
V
LTC1051CN8
LTC1051MJ8
LTC1051CJ8
LTC1051AMJ8
LTC1051ACJ8
LTC1053CN
10 +IN C
+IN B
–IN B
OUT B
N8 PACKAGE
8-LEAD PDIP
TJMAX = 150°C, θJA = 110°C/W
9
8
–IN C
OUT C
J8 PACKAGE
8-LEAD CERDIP
N PACKAGE
14-LEAD PDIP
OBSOLETE PACKAGE
TJMAX = 150°C, θJA = 65°C/W
Consider the N8 Package as an Alternate Source
TOP VIEW
TOP VIEW
ORDER PART
NUMBER
ORDER PART
NUMBER
NC
OUT A
–IN A
+IN A
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
NC
NC
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
NC
OUT D
–IN D
+IN D
+
OUT A
–IN A
+IN A
V
OUT B
–IN B
+IN B
NC
LTC1051CSW
LTC1053CSW
+
–
V
V
–
+IN B
–IN B
OUT B
NC
+IN C
–IN C
OUT C
NC
V
NC
NC
NC
SW PACKAGE
16-LEAD PLASTIC SO
SW PACKAGE
18-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 85°C/W
T
JMAX = 150°C, θJA = 90°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ■ denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V unless otherwise noted.
LTC1051/LTC1053
MIN TYP MAX
LTC1051A
TYP
PARAMETER
CONDITIONS
MIN
MAX
±5
UNITS
µV
Input Offset Voltage
Average Input Offset Drift
Long Term Offset Drift
Input Bias Current
±0.5
±0.0
50
±5
±0.5
±0.0
50
■
±0.05
±0.05
µV/°C
nV/√Mo
±15
±65
±135
±15
±50
±100
pA
pA
LTC1051C/LTC1053C
(All Grades)
■
■
Input Offset Current
±30
±125
±175
±30
±100
±150
pA
pA
Input Noise Voltage (Note 2)
R = 100Ω, DC to 10Hz
R = 100Ω, DC to 1Hz
S
1.5
0.4
1.5
0.4
2
µV
P-P
µV
P-P
S
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2
LTC1051/LTC1053
ELECTRICAL CHARACTERISTICS
The ■ denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V unless otherwise noted.
LTC1051/LTC1053
LTC1051A
TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
Input Noise Current
f = 10Hz
2.2
2.2
fA/√Hz
–
Common Mode Rejection Ratio, CMRR
V
= V to 2.7V
106
100
130
114
110
130
dB
dB
CM
■
–
Differential CMRR
V
= V to 2.7V
112
112
dB
CM
LTC1051, LTC1053 (Note 3)
Power Supply Rejection Ratio
Large Signal Voltage Gain
V = ±2.375V to ±8V
■
■
■
116
116
140
160
120
120
140
160
dB
dB
S
R = 10k, V
= ±4V
L
OUT
Maximum Output Voltage Swing
R = 10k
±4.5
±4.5
±4.85
±4.95
±4.7
±4.85
±4.95
V
V
L
R = 100k
L
Slew Rate
R = 10k, C = 50pF
4
2.5
1
4
2.5
1
V/µs
L
L
Gain Bandwidth Product
Supply Current/Op Amp
MHz
No Load
2
2.5
2
2.5
mA
mA
■
Internal Sampling Frequency
3.3
3.3
kHz
The ■ denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±5V unless otherwise noted.VS = 5V, GND unless otherwise noted.
LTC1051A/LTC1051/LTC1053
PARAMETER
CONDITIONS
MIN
TYP
±0.5
±0.01
±10
MAX
UNITS
µV
Input Offset Voltage
Input Offset Drift
±5
±0.05
±50
±80
µV/°C
pA
Input Bias Current
Input Offset Current
Input Noise Voltage
Supply Current/Op Amp
±20
pA
DC to 10Hz
No Load
1.8
µV
P-P
■
1.5
mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 3: Differential CMRR for the LTC1053 is measured between
amplifiers A and D, and amplifiers B and C.
Note 2: For guaranteed noise specification contact LTC Marketing.
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LTC1051/LTC1053
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TYPICAL PERFOR A CE CHARACTERISTICS
Common Mode Input Range vs
Supply Voltage
Sampling Frequency vs Supply
Voltage
Sampling Frequency vs
Temperature
4.0
3.5
3.0
2.5
2.0
8
6
T
= 25°C
V
= ±5V
A
S
5
4
3
2
1
4
2
0
–2
–4
–6
–8
–
V
= V
CM
4
6
8
10
12
14
–
16
50
125
0
1
2
3
4
5
6
7
8
–50
0
25
75 100
–25
+
TOTAL SUPPLY VOLTAGE, V TO V (V)
AMBIENT TEMPERATURE, T (°C)
SUPPLY VOLTAGE (±V)
A
1051/53 G02
1051/53 G01
1051/53 G03
Supply Current vs Supply Voltage
Per Op Amp
Supply Current vs Temperature
Per Op Amp
Gain/Phase vs Frequency
60
1.50
1.25
1.00
0.75
0.50
0.25
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
120
100
80
V
C
= ±5V
= 100pF
≥ 1k
T
= 25°C
V
= ±5V
S
L
L
A
S
80
R
T
= 25°C
A
100
120
140
160
180
200
220
60
40
20
0
–20
–40
4
8
10
12
+
14
–
16
6
100
1k
10k
100k
1M
10M
–50
0
25
50
75 100 125
–25
TOTAL SUPPLY VOLTAGE V TO V (V)
FREQUENCY (Hz)
AMBIENT TEMPERATURE, T (°C)
A
1051/53 G06
1051/53 G04
1051/53 G05
Output Short-Circuit Current vs
Supply Voltage
CMRR vs Frequency
Gain/Phase vs Frequency
6
4
–60
160
140
120
100
80
120
100
80
V
C
= ±2.5V
= 100pF
≥ 1k
–
S
L
L
V
= V
OUT
–80
R
T
= 25°C
A
–100
–120
–140
–160
–180
–200
–220
I
SOURCE
2
60
0
40
60
20
–10
–20
–30
40
0
+
V
= ±5V
V
= V
S
A
OUT
20
T
= 25°C
–20
I
SINK
AC COMMON MODE IN = 0.5V
P-P
0
–40
4
8
10
12
14
–
16
6
1
10
100
1k
10k
100k
100
1k
10k
100k
1M
10M
+
TOTAL SUPPLY VOLTAGE, V TO V (V)
FREQUENCY (Hz)
FREQUENCY (Hz)
1051/53 G08
1051/53 G09
1051/53 G07
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4
LTC1051/LTC1053
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TYPICAL PERFOR A CE CHARACTERISTICS
Small Signal Transient Response
Large Signal Transient Response
Overload Recovery
400mV
0
OUTPUT
50mV
/DIV
OUTPUT
2V/DIV
INPUT
0
OUTPUT
INPUT
6V
INPUT
100mV
–5V
2µs/DIV
2µs/DIV
0.5ms
A
V
V
S
= 1, R = 10k, C = 100pF
A
V
V
S
= 1, R = 10k, C = 100pF
A
V
V
S
= –100
= ±5V
L L
L
L
1051/53 G12
= ±5V, T = 25°C
1051/53 G11
= ±5V, T = 25°C
1051/53 G10
A
A
LTC1051/LTC1053 DC to 10Hz Noise
V
= ±5V
= 25°C
S
A
T
1.4µV
P-P
1µV
10 SEC
1 SEC
TEST CIRCUITS
Electrical Characteristics Test Circuit
DC 10Hz Noise Test Circuit
475k
1M
100k
0.01µF
+
V
1k
10Ω
2
3
2
8
–
–
158k
316k
475k
1/2
LTC1051
1/2
LTC1051
6
6
OUTPUT
–
+
3
TO X-Y
RECORDER
LT1012
+
+
R
4
0.1µF
0.01µF
L
–
V
1051/53 TC01
FOR 1Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF 10.
10513fa
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LTC1051/LTC1053
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APPLICATIO S I FOR ATIO
ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE Avoid connectors, sockets, switches and relays where
possible. In instances where this is not possible, attempt
Picoamperes
to balance the number and type of junctions so that
differential cancellation occurs. Doing this may involve
deliberately introducing junctions to offset unavoidable
junctions.
In order to realize the picoampere level of accuracy of the
LTC1051/LTC1053, proper care must be exercised. Leak-
age currents in circuitry external to the amplifier can
significantly degrade performance. High quality insulation
should be used (e.g., Teflon, Kel-F); cleaning of all insulat-
ing surfaces to remove fluxes and other residues will
probably be necessary —particularly for high temperature
performance.Surfacecoatingmaybenecessarytoprovide
a moisture barrier in high humidity environments.
When connectors, switches, relays and/or sockets are
necessary, they should be selected for low thermal EMF
activity. The same techniques of thermally balancing and
coupling the matching junctions are effective in reducing
the thermal EMF errors of these components.
Resistors are another source of thermal EMF errors.
Table 1 shows the thermal EMF generated for different
resistors. The temperature gradient across the resistor is
important, not the ambient temperature. There are two
junctions formed at each end of the resistor and if these
junctions are at the same temperature, their thermal EMFs
will cancel each other. The thermal EMF numbers are
approximate and vary with resistor value. High values give
higher thermal EMF.
Board leakage can be minimized by encircling the input
connections with a guard ring operated at a potential close
to that of the inputs: in inverting configurations, the guard
ringshouldbetiedtoground;innoninvertingconnections,
to the inverting input. Guarding both sides of the printed
circuit board is required. Bulk leakage reduction depends
on the guard ring width.
Microvolts
Table 1. Resistor Thermal EMF
Thermocouple effects must be considered if the LTC1051/
LTC1053’s ultra low drift op amps are to be fully utilized.
Any connection of dissimilar metals forms a thermoelec-
tric junction producing an electric potential which varies
with temperature (Seebeck effect.) As temperature sen-
sors, thermocouples exploit this phenomenon to produce
usefulinformation. Inlowdriftamplifiercircuits, thiseffect
is a primary source of error.
RESISTOR TYPE
Tin Oxide
THERMAL EMF/°C GRADIENT
~mV/°C
Carbon Composition
Metal Film
~450µV/°C
~20µV/°C
Wire Wound
Evenohm
Manganin
~2µV/°C
~2µV/°C
Connectors, switches, relay contacts, sockets, resistors,
solder, and even copper wire are all candidates for thermal
EMF generation. Junctions of copper wire from different
manufacturers can generate thermal EMFs of 200nV/°C—
4 times the maximum drift specification of the LTC1051/
LTC1053. Thecopper/kovarjunction, formedwhenwireor
printed circuit traces contact a package lead, has a thermal
EMF of approximately 35µV/°C—700 times the maximum
drift specification of the LTC1051/LTC1053.
Input Bias Current, Clock Feedthrough
At ambient temperatures below 60°C, the input bias cur-
rent of the LTC1051/LTC1053 op amps’ is dominated by
the small amount of charge injection occurring during the
sampling and holding of the op amps’ input offset voltage.
The average value of the resulting current pulses is 10pA
to 15pA with sign convention shown in Figure 1.
+
+
I
B
I
B
T
< 60°C
T > 85°C
A
A
+
+
–
1/2
1/2
–
–
Minimizing thermal EMF-induced errors is possible if
judicious attention is given to circuit board layout and
component selection. It is good practice to minimize the
number of junctions in the amplifier’s input signal path.
I
I
B
B
LTC1051
LTC1051
–
(a)
(b)
1051/53 F01
Figure 1. LTC1051 Bias Current
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6
LTC1051/LTC1053
W U U
APPLICATIO S I FOR ATIO
U
R2
100k
R
= 0,
S
R
= 100k,
A =11V/V
V
S
A
=11V/V
V
R1
1k
–
20mV/DIV
20mV/DIV
1/2
LTC1051
R
S
R
= 0,
S
R = 100k,
S
+
A
V
=101V/V
A =101V/V
V
20mV/DIV
20mV/DIV
100µs/DIV
100µs/DIV
1051/53 F02
(c)
(a)
(b)
Figure 2. Clock Feedthrough
As the ambient temperature rises, the leakage current of
the input protection devices increases, while the charge
injection component of the bias current, for all practical
purposes,staysconstant.Atelevatedtemperatures(above
85°C) the leakage current dominates and the bias current
of both inputs assumes the same sign.
the feedback resistor value should not exceed 7k for
industrial temperature range and 5k for military tempera-
ture range. If a higher feedback resistor value is required,
a feedback capacitor of 20pF should be placed across the
feedback resistor. Note that the most common circuits
with feedback factors approaching unity are unity gain
followers and instrumentation amplifier front ends.
(See Figure 4.)
The charge injection at the op amp input pins will cause
small output spikes. This phenomenon is often referred to
as “clock feedthrough” and can be easily observed when
the closed-loop gain exceeds 10V/V (Figure 2). The mag-
nitude of the clock feedthrough is temperature indepen-
dent but it increases when the closed-loop gain goes up,
when the source resistance increases and when the gain
settingresistorsincrease(Figure2a, 2b). Itisimportantto
note that the output small spikes are centered at 0V level
and do not add to the output offset error budget. For
instance, with RS = 1MΩ, the typical output offset voltage
of Figure 2c is:
R
V
= 100k
S
A
=101V/V
R
V
= 1MΩ
S
A
=101V/V
100µs/DIV
C
1000pF
V
OS(OUT) ≈ 108 • IB+ + 101VOS(IN)
R1
1k
R2
2
100k
–
+
A 10pA bias current will yield an output of 1mV ±100µV.
The output clock feedthrough can be attenuated by lower-
ing the value of the gain setting resistors, i.e. R2 = 10k,
R1 = 100Ω, instead of 100k and 1k (Figure 2).
1/2
LTC1051
1
R
S
3
1051/53 F03
Figure 3. Adding a Feedback Capacitor to
Eliminate Clock Feedthrough
Clock feedthrough can also be attenuated by adding a
capacitor across the feedback resistor to limit the circuit
bandwidth below the internal sampling frequency
(Figure 3).
R2 < 7k, IF R1 > >R2
R1
2
3
–
+
1
1/2
LTC1051
Input Capacitance
The input capacitance of the LTC1051/LTC1053 op amps
is approximately 12pF. When the LTC1051/LTC1053 op
amps are used with feedback factors approaching unity,
1051/53 F04
Figure 4. Operating the LTC1051
with Feedback Factors Approaching Unity
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LTC1051/LTC1053
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APPLICATIO S I FOR ATIO
LTC1051/LTC1053 as AC Amplifiers
Aliasing
Although initially chopper stabilized op amps were de-
signed to minimize DC offsets and offset drifts, the
LTC1051/LTC1053 family, on top of its outstanding DC
characteristics, presents efficient AC performance. For
instance, at single 5V supply, each op amp typically
consumes 0.5mA and still provides 1.8MHz gain band-
width product and 3V/µs slew rate. This, combined with
almost distortionless swing to the supply rails (Figure 8),
makes the LTC1051/LTC1053 op amps nearly general
purpose. To further expand this idea (the “aliasing” phe-
nomenon) which can occur under AC conditions, should
be described and properly evaluated.
The LTC1051/LTC1053 are equipped with internal cir-
cuitry to minimize aliasing. Aliasing, no matter how small,
occurs when the input signal approaches and exceeds the
internal sampling rate. Aliasing is caused by the sampled
data nature of the chopper op amps. A generalized study
of this phenomenon is beyond the scope of a data sheet;
however, a set of rules of thumb can answer many
questions:
1. Alias signals can be generally defined as output AC
signalsatafrequencyofnfCLK ±mfIN. ThenfCLK termisthe
internal sampling frequency of the chopper stabilized op
amps and its harmonics; mfIN is the frequency of the input
signal and its harmonics, if any.
B: MAG
RANGE: 9dBV
STATUS: PAUSED
RMS: 25
20dBV
R2
10k
5V
80dB
15dB
/DIV
0.1µF
R1
1k
2
3
–
+
1
1/2
LTC1051
V
OUT
f
IN
0.8V
P-P
50pF
–100
START: 100Hz
X: 1825Hz
BW: 47.742Hz
Y: –70.72dBV
STOP: 5 100Hz
0.1µF
–5V
1051/53 F05a
f
IN
= 750Hz
f
– f
CLK IN
2f
IN
2f – f
CLK IN
Figure 5a. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with Gain of 10,
and Amplifying a 750Hz/800mV, Input AC Signal
A: MAG
RANGE: 11dBV
STATUS: PAUSED
RMS: 25
20dBV
74dB
15dB
/DIV
–100
CENTER: 10 000Hz
X: 5550Hz
BW: 95.485Hz
Y: –63.91dBV
SPAN: 10 000Hz
6f – f
CLK IN
f
IN
= 10kHz
Figure 5b. Same as Figure 5a, but the AC Input Signal is 900mV, 10kHz
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LTC1051/LTC1053
W U U
APPLICATIO S I FOR ATIO
U
2. If we arbitrarily accept that “aliasing” occurs when
output alias signals reach an amplitude of 0.01% or more
of the output signal, then: the approximate minimum
frequency of an AC input signal which will cause aliasing
is equal to the internal clock frequency multiplied by the
square root of the op amp feedback factor. For instance,
with closed-loop gain of –10, the feedback factor is 1/11
and if fCLK = 2.6kHz, alias signals can be detected when
the frequency of the input signal exceeds 750Hz to 800Hz
(Figure 5a).
4. When the frequency, fIN, of the input signal is less than
fCLOCK, the alias signal(s) amplitude(s) directly scale with
theamplitudeoftheincomingsignal.Theoutput“signal to
alias ratio” cannot be increased by just boosting the input
signal amplitude. However, when the input AC signal
frequencywellexceedstheclockfrequency, theamplitude
of the alias signals does not directly scale with the input
amplitude. The “signal to alias ratio” increases when the
output swings closely to the rails. (See Figure 5b and
Figure 7.) It is important to note that the LTC1051/
LTC1053 op amps, under light loads (RL ≥ 10k), swing
closely to the supply rails without generating harmonic
distortion (Figure 8).
3. The number of alias signals increases when the input
signal frequency increases (Figure 5b).
B: MAG
RANGE: 9dBV
STATUS: PAUSED
RMS: 25
13dBV
10k
5V
83.5dB
15dB
/DIV
0.1µF
0.1µF
10k
–
+
1/2
LTC1051
50pF
–107
CENTER: 2 625Hz
X: 2535Hz
BW: 19.097Hz
Y: –74.16dBV
SPAN: 2 000Hz
V
= 10kHz
IN
8V
P-P
–5V
1051/53 F05a
NOTE: THE f
– f = 85Hz
CLK IN
ALIAS FREQUENCY IS 95dB
2f – f
CLK IN
f
= 2.685kHz
IN
f
DOWN FROM THE OUTPUT LEVEL
CLK
Figure 6a. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier.
VS = ±5V, RL = 10k, CL = 50pF, VIN = 8VP-P, 2.685kHz
B: MAG
RANGE: 9dBV
STATUS: PAUSED
RMS: 50
13dBV
15dB
80dB
15dB
/DIV
–107
CENTER: 10 000Hz
X: 10000Hz
BW: 95.485Hz
Y: 7.98dBV
SPAN: 10 000Hz
1kHz
5f
– f
CLK IN
f
IN
– 2f
CLK
2 • f
CLK IN
f – f
IN CLK
f
IN
= 10kHz
CLK
6f
– f
NOTE: ALL ALIAS FREQUENCY
80dB TO 84dB DOWN FROM OUTPUT
Figure 6b. Output Voltage Spectrum of 1/2 LTC1051 Operating as a Unity-Gain Inverting Amplifier.
VS = ±5V, RL = 10k, CL = 50pF, VIN = 8VP-P, 10kHz
10513fa
9
LTC1051/LTC1053
W U U
U
APPLICATIO S I FOR ATIO
5. For unity-gain inverting configuration, all the alias
frequenciesare80dBto84dBdownfromtheoutputsignal
(Figures6a, 6b). CombinedwithexcellentTHDunderwide
swing, the LTC1051/LTC1053 op amps make efficient
unity gain inverters.
68dB value of Figure 7 decreases to 56dB if a (1k, 100k)
resistor set is used to set the gain of –100.
7. When the LTC1051/LTC1053 are used as noninverting
amplifiers, all the previous approximate rules of thumb
apply with the following exceptions: when the closed-loop
gain is 10(V/V) and below, the “signal to alias” ratio is 1dB
to 3dB less than the inverting case; when the closed-loop
gain is 100(V/V), the degradation can be up to 9dB,
especially when the input signal is much higher than the
clock frequency (i.e. fIN = 10kHz).
For gain higher than –1, the “signal to alias” ratio de-
creases at an approximate rate of –6dB per decade of
closed-loop gain (Figure 9).
6. For closed-loop gains of –10 or higher, the “signal to
alias” ratio degrades when the value of the feedback gain
setting resistor increases beyond 50k. For instance, the
8. The signal/alias ratio performance improves when the
op amp has bandlimited loop gain.
SYSTEM BUSY, ONLY ABORT COMMANDS ALLOWED
RANGE: 11dBV
STATUS: PAUSED
20dBV
R2
10k
5V
68dB
15dB
/DIV
0.1µF
R1
100Ω
–
1/2
LTC1051
V
OUT
90mV
10kHz
P-P
50pF
+
–100
0.1µF
CENTER: 10 000Hz
X: 5475Hz
BW: 95.485Hz
Y: –58.05dBV
SPAN: 10 000Hz
–5V
1051/53 F07
6f – f
CLK IN
f
IN
=10kHz
Figure 7. Output Voltage Spectrum of 1/2 LTC1051 Operating as an Inverting Amplifier with a Gain of –100 and
Amplifiying a 90mVP-P, 10kHz Input Signal. With a 9VP-P Output Swing the Measured 2nd Harmonic (20kHz)
was 75 Down from the 10kHz Input Signal
10
9
8
7
6
5
4
3
2
1
0
90
80
70
60
50
40
30
20
10
V
IN
= ±5V
S
f
≤10kHz
V
= ±8V, T ≤85°C
A
S
V
V
= ±5V, T ≤85°C
S
S
A
= ±2.5V, T ≤85°C
A
NEGATIVE SWING
POSITIVE SWING
4k
5k 6k 7k 8k 9k 10k
(LOAD RESISTANCE,Ω)
1
10
INVERTING CLOSED-LOOP GAIN
100
0
1k 2k 3k
R
L
1051/53 G08
1051/53 G09
Figure 8. Output Voltage Swing vs Load
Figure 9. Signal to Alias Ratio vs
Closed-Loop Gain
10513fa
10
LTC1051/LTC1053
U
TYPICAL APPLICATIO S
Obtaining Ultralow VOS Drift and Low Noise
The dual chopper op amp buffers the inputs of A1 and
corrects its offset voltage and offset voltage drift. With the
R, C values shown, the power-up warm up time is typically
20 seconds. The step response of the composite amplifier
doesnotpresentsettlingtails. TheLT1007shouldbeused
when extremely low noise; VOS and VOS drift are sought
when the input source resistance is low—for instance a
350Ω strain gauge bridge. The LT1012 or equivalent
should be used when low bias current (100pA) is also
required in conjunction with DC to 10Hz low noise and low
VOS and VOS drift. The measured typical input offset
voltages were less than 2µV.
B
+
5
+
2
3
1/2
LTC1051
7
–
R4
1/2
LTC1051
6
1
–
C1
+
5V
R5
OUT
C2
R2
R1
1
R3
3
2
+
–
8
6
OUT
A1
–
A
1051/53 AC01a
A1
R1
R2
R3
R4
10k
10k
R5
C1
C2
e
(DC – 1Hz)**
e
(DC – 10Hz)**
OUT
OUT
LT1007
3k
2k
340k
250k
100k
100k
0.01µF
0.01µF
0.001µF
0.001µF
0.1µV
0.3µV
0.15µV
P-P
P-P
P-P
P-P
LT1012*
750Ω
57Ω
0.4µV
* Interchange connections
A and B .
** Noise measured in a 10 sec window. Peak-to-peak noise was also measured for 10 continuous minutes: With the LT1007 op amp the recorded noise was less than 0.2µVP-P for both DC-1Hz
and DC-10Hz.
LTC1051/LT1007 Peak-to-Peak Noise
V
S
= ±5V
DCTO1Hz
NOISE
DCTO10Hz
NOISE
1051/53 AC01b
1 SEC/DIV
10513fa
11
LTC1051/LTC1053
U
TYPICAL APPLICATIO S
Paralleling Choppers to Improve Noise
Differential Voltage to Current Converter
NOTE: THIS CIRCUIT CAN ALSO BE USED AS A
R2
0.1µF
DIFFERENCE AMPLIFIER FOR STRAIN GAUGES.
CONNECT R2/3 AND R1/3 FROM NONINVERTING
INPUTS, SHORTED TOGETHER, TO GROUND AND
TO SOURCE RESPECTIVELY.
3
2
V1
+
R1
R1
R1
2
3
1
1/4
LTC1053
20k
5V
V
IN
–
+
R
R
1/4
LTC1053
1
7
8
–
5V
10k
10k
10k
10k
R2
0.1µF
R
G
20k
20k
4
9
0.1µF
–
+
5
6
8
1/4
LTC1053
4
6
5
13
12
–
+
–
+
–
+
R
13
12
7
10
1/4
LTC1053
1/4
LTC1053
1/4
LTC1053
14
–
V
OUT
10k
11
14
1/4
LTC1053
11
V2
+
0.1µF
–5V
R2
10k
• I
OUT
= 2(V2 – V1)/R
G
• BW = 100Hz
• I = 1mA
0.1µF
–5V
10k
10k
OUTMAX
9
–
+
R
1/4
LTC1053
I
OUT
0.1µF
R
LOAD
10
V
/V = 3(R2/R1); INPUT DC – 10Hz NOISE
P-P
OUT IN
≅ 0.8µV = NOISE OF EACH PARALLELED OP AMP/√3
1051/53 AC03
1051/53 AC02
Multiplexed Differential Thermometer
100Ω
255k
1k
0.068µF
2
3
–
+
1
7
8
T2
1/4
ABSOLUTE
LTC1053
TEMPERATURE
TYPE K
–
–
–
+
+
+
ABSOLUTE
TEMPERATURE
0.1µF
100Ω
10k
255k
1k
5V
5V
2
0.068µF
6
5
10k
13
–
+
4
S1
–
+
1/4
LTC1053
T1
7
1/4
LTC1053
14
K
OUTPUT
(DIFFERENTIAL
TEMPERATURE)
TYPE K
10k
12
LT1025A
11
0.1µF
100Ω
10k
–
255k
R
GND
4
5
1k
0.068µF
9
–
+
T
REF
1/4
LTC1053
ALL FIXED RESISTORS ARE 1% METAL FILM
OUTPUT = T – T1 OR T – T2(10mV PER °C)
ACCURACY = (±0.1% FROM 25°C TO 150°C)
TYPE K
10
REF
REF
0.1µF
1051/53 AC04
10513fa
12
LTC1051/LTC1053
U
TYPICAL APPLICATIO S
Dual Instrumentation Amplifier
5V
LTC1043
+
3
8
8
7
+
Six Decade Log Amplifier
1
1/2
LTC1051
1µF
V
OUT1
2
11
12
–
5V
INPUT 1
1µF
0.0022µF
Q1
Q1
22pF
0.1µF
2.5V
2.5M
0.1%
100k
8
–
6
1k
3k
0.1%
5V
–
+
13
6
14
5
7
1/2
LTC1051
10k
GAIN = 101V/DIV
7
0.22µF
0.1%
+
2
5
15.8k
0.1%
5
6
V
LT1009
IN
–
1N4148
2M
4
+
1
1/2
LTC1051
1/2
LTC1051
1nA < I <1mA
IN
1µF
V
OUT2
3
+
–5V
0.1µF
1k
2
3
–
4
V
= LOG V –2V
IN
OUT
0.1%
INPUT 2
1µF
1051/53 AC05
Q1: TEL LAB TYPE Q81
ADJUST 2M POR. FOR NONLINEARITIES
100k
1k
–
18
16
15
4
0.22µF
17
CMRR >100dB
V ≅ 3µV
5V
OS
INPUT REFERRED NOISE ≅ 2µV
P-P
0.0047µF
1051/53 AC06
Linearized Platinum Signal Conditioner
250k*
(LINEARITY CORRECTION LOOP)
5V
10k*
3
2
8
5V
+
1
1/2
2.4k
LTC1051
274k*
–
4
50k
ZERO
ADJUST
8.25k*
LT1009
2.5V
0.1µF
2k
4
0V TO 4V =
0°C TO 400°C
±0.05°C
5
8
6
7
5
+
7
1/2
1µF
6
LTC1051
–
1k
GAIN
ADJUST
11
12
2
887Ω
1µF
1µF
1µF
5k
3
8.06k*
1k
13
14
15
16
18
17
R
P
1/2 LTC1043
1/2 LTC1043
I
100Ω
K
AT 0°C
0.01µF
RP = ROSEMOUNT 118MFRTD
*1% FILM RESISTOR
TRIM SEQUENCE:
SET SENSOR TO 0°C VALUE. ADJUST ZERO FOR 0V OUT
SET SENSOR TO 100°C VALUE. ADJUST GAIN FOR 1.000V OUT
SET SENSOR TO 400°C VALUE. ADJUST LINEARITY FOR 4.000V OUT
REPEAT AS REQUIRED. FOR MORE INFORMATION REFER TO AN3
1051/53 AC07
10513fa
13
LTC1051/LTC1053
U
PACKAGE DESCRIPTIO
J Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
.405
(10.287)
MAX
.200
(5.080)
MAX
.005
(0.127)
MIN
.300 BSC
(7.62 BSC)
CORNER LEADS OPTION
(4 PLCS)
6
5
4
8
7
.015 – .060
(0.381 – 1.524)
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
.025
(0.635)
RAD TYP
.220 – .310
(5.588 – 7.874)
.008 – .018
(0.203 – 0.457)
0° – 15°
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
1
2
3
.045 – .065
(1.143 – 1.651)
.125
3.175
MIN
NOTE: LEAD DIMENSIONS APPLY TO SOLDER
DIP/PLATE OR TIN PLATE LEADS
.014 – .026
(0.360 – 0.660)
.100
(2.54)
BSC
J8 0801
OBSOLETE PACKAGE
N Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.130 ± .005
(3.302 ± 0.127)
.300 – .325
(7.620 – 8.255)
.045 – .065
(1.143 – 1.651)
.400*
(10.160)
MAX
8
1
7
6
5
4
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.120
(3.048)
MIN
.255 ± .015*
(6.477 ± 0.381)
.020
(0.508)
MIN
+.035
–.015
.325
.018 ± .003
(0.457 ± 0.076)
.100
(2.54)
BSC
+0.889
8.255
(
)
N8 1002
–0.381
2
3
NOTE:
1. DIMENSIONS ARE
INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
.770*
(19.558)
MAX
.300 – .325
(7.620 – 8.255)
.045 – .065
(1.143 – 1.651)
.130 ± .005
(3.302 ± 0.127)
14
13
12
11
10
9
8
7
.020
(0.508)
MIN
.065
(1.651)
TYP
.008 – .015
(0.203 – 0.381)
.255 ± .015*
(6.477 ± 0.381)
+.035
–.015
.325
.005
(0.125)
MIN
.120
(3.048)
MIN
.018 ± .003
(0.457 ± 0.076)
+0.889
8.255
.100
(2.54)
BSC
1
2
3
5
6
4
(
)
–0.381
NOTE:
INCHES
1. DIMENSIONS ARE
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
N14 1002
10513fa
14
LTC1051/LTC1053
U
PACKAGE DESCRIPTIO
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
.050 BSC .045 ±.005
.030 ±.005
.398 – .413
(10.109 – 10.490)
NOTE 4
TYP
15 14
12
10
9
N
16
N
13
11
.325 ±.005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
NOTE:
1. DIMENSIONS IN
N/2
8
INCHES
1
2
3
N/2
(MILLIMETERS)
2. DRAWING NOT TO SCALE
RECOMMENDED SOLDER PAD LAYOUT
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGES ARE THE
MANUFACTURING OPTIONS.
2
3
5
7
1
4
6
.291 – .299
(7.391 – 7.595)
NOTE 4
THE PART MAY BE SUPPLIED WITH OR
WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT
EXCEED .006" (0.15mm)
.037 – .045
.093 – .104
(2.362 – 2.642)
.010 – .029
(0.254 – 0.737)
(0.940 – 1.143)
× 45°
.005
(0.127)
RAD MIN
0° – 8° TYP
.050
(1.270)
BSC
.004 – .012
(0.102 – 0.305)
.009 – .013
(0.229 – 0.330)
NOTE 3
.014 – .019
.016 – .050
(0.356 – 0.482)
TYP
S16 (WIDE) 0502
(0.406 – 1.270)
SW Package
18-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
.050 BSC .045 ±.005
.030 ±.005
TYP
.447 – .463
(11.354 – 11.760)
NOTE 4
N
14 13
11
15
12
10
18 17 16
N
.325 ±.005
.420
MIN
.394 – .419
(10.007 – 10.643)
NOTE 3
1
2
3
N/2
NOTE:
1. DIMENSIONS IN
N/2
9
INCHES
(MILLIMETERS)
RECOMMENDED SOLDER PAD LAYOUT
2. DRAWING NOT TO SCALE
3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES
ON THE BOTTOM OF PACKAGES ARE THE
MANUFACTURING OPTIONS.
.291 – .299
(7.391 – 7.595)
NOTE 4
2
3
5
7
8
1
4
6
.037 – .045
THE PART MAY BE SUPPLIED WITH OR
WITHOUT ANY OF THE OPTIONS
4. THESE DIMENSIONS DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT
EXCEED .006" (0.15mm)
.093 – .104
.010 – .029
(0.254 – 0.737)
(0.940 – 1.143)
× 45°
(2.362 – 2.642)
.005
(0.127)
RAD MIN
0° – 8° TYP
.050
(1.270)
BSC
.004 – .012
(0.102 – 0.305)
.009 – .013
(0.229 – 0.330)
NOTE 3
.014 – .019
.016 – .050
(0.356 – 0.482)
TYP
(0.406 – 1.270)
S18 (WIDE) 0502
10513fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1051/LTC1053
U
TYPICAL APPLICATIO S
DC Accurate, 3rd Order, 100Hz, Butterworth Antialiasing Filter
Dynamic Range
60dB
80dB
0.1
0.01
C1
0.1µF
8V
V
S
= ±5V
0.1µF
R1
16.5k
R2
118k
R3
21k
2
3
V
IN
+
1
V
S
= ±8V 100dB
0.001
0.0001
1/2
LTC1051
V
OUT
C
C2
0.1µF
0.1µF
–
0.1µF
120dB
5.0
–8V
, V = ±8V
0.1
1.0
), f = 30Hz
WIDEBAND NOISE 9µV
RMS
V
(V
IN RMS IN
THD + NOISE ≅ 0.0012%, 1V
< V < 2V
IN RMS
RMS
S
1051/53 AC08
1051/53 AC09
V
(OUT) < 5µV
OS
DC Accurate, 18-Bit, 4th Order Antialiasing Bessel (Linear Phase),
100Hz, Lowpass Filter
Dynamic Range
60dB
0.1
0.01
R2A
10k
R2B
50k
C1A
0.022µF
C1B
0.0022µF
R1A
10k
V
= ±5V
S
80dB
V
IN
R3A
26.7k
R1B
50k
R3B
412k
–
1/2
V = ±8V
S
–
100dB
0.001
0.0001
LTC1051
CA
1/2
0.22µF
V
+
OUT
LTC1051
CB
0.022µF
+
120dB
WIDEBAND RMS NOISE 4.5µV
0.1
1.0
), f = 30Hz
5.0
RMS
THD + NOISE ≅ 0.0005% (= 106dB DYNAMIC RANGE), 2V
≤ V ≤ 3V
IN RMS
RMS
V
(V
IN RMS IN
1051/53 AC10
V
OS
OUT < 10µV
1051/53 AC11
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
I = 80µA/0p Amp, 16-Lead SW Package
LTC1047
Dual µPower Zero-Drift 0p Amp
S
LTC1049
Low Power Zero-Drift 0p Amp
I = 200µA, SO-8 Package
S
LTC1050
Precision Zero-Drift Op Amp with Internal
Capacitors
V
(Max) = 5µV, V
(Max) = 16.5V
SUPPLY
OS
LTC2050/LTC2051/LTC2052 Single/Dual/Quad Zero-Drift 0p Amps
SOT-23/MS8/GN16 Packages
LTC2053
Zero-Drift Instrumentation Amp
Resistor Programmable Gain, R-R
10513fa
LW/TP 1202 1K REV A • PRINTED IN USA
16 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
■
■
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 1990
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