LTC1100CS [Linear]
Precision, Chopper-Stabilized Instrumentation Amplifier; 精密，稳定斩波型仪表放大器
| 型号： | LTC1100CS |
| 厂家： | 
Linear |
| 描述： | Precision, Chopper-Stabilized Instrumentation Amplifier |
| 文件： | 总8页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1100
Precision, Chopper-Stabilized
Instrumentation Amplifier
U
DESCRIPTIO
EATURE
S
F
■
■
■
■
■
■
■
■
■
■
Offset Voltage: 10µV Max
Offset Voltage Drift: 50nV/°C Max
Bias Current: 50pA Max
Offset Current: 50pA Max
Gain Nonlinearity: 8ppm Max
Gain Error: ±0.05% Max
CMRR: 104dB
0.1Hz to 10Hz Noise: 2µVP-P
Single 5V Supply Operation
8-Pin MiniDIP
The LTC1100 is a high precision instrumentation ampli-
fier using chopper-stabilization techniques to achieve
outstanding DC performance. The input DC offset is
typically 1µV while the DC offset drift is typically 10nV/°C;
a very low bias current of 50pA is also achieved.
The LTC1100 is self-contained; that is, it achieves a differ-
ential gain of 100 without any external gain setting resistor
or trim pot. The gain linearity is 8ppm and the gain drift is
4ppm/°C. The LTC1100 operates from a single 5V supply
up to ±8V. The output typically swings 300mV from its
power supply rails with a 10k load.
O U
PPLICATI
S
A
■
■
■
An optional external capacitor can be added from pin 7 to
pin 8 to tailor the device’s 18kHz bandwidth and to
eliminate any unwanted noise pickup.
Thermocouple Amplifiers
Strain Gauge Amplifiers
Differential to Single-Ended Converters
The LTC1100 is also offered in a 16-pin surface mount
package with selectable gains of 10 or 100.
The LTC1100 is manufactured using Linear Technology’s
enhanced LTCMOSTM silicon gate process.
LTCMOS is a trademark of Linear Technology Corporation
U
O
TYPICAL APPLICATI
Single 5V Supply, DC Instrumentation Amplifier
1
2
3
4
8
7
6
5
V
OUT
0.01µF
LTC1100
V
–V
IN
IN
+
V
= 5V
0.1µF
V
= 100 [V – (–V )]
IN IN
OUT
LTC1100 • TA01
1
LTC1100
W W W
U
ABSOLUTE AXI U RATI GS
Operating Temperature Range
Storage Temperature Range ................ −65°C to 150°C
Total Supply Voltage (V+ to V−) ............................. 18V
Input Voltage .......................(V+ + 0.3V) to (V− − 0.3V)
Lead Temperature (Soldering, 10 sec).................300°C
LTC1100M/AM ................................ −55°C to 125°C
LTC1100C/AC .................................... −40°C to 85°C
Output Short Circuit Duration ......................... Indefinite
W
U
/O
PACKAGE RDER I FOR ATIO
TOP VIEW
ORDER PART
ORDER PART
NUMBER
NC
GND REF
G = 10
CMRR
NC
1
2
3
4
5
6
7
8
16 NC
NUMBER
TOP VIEW
15
14
13
12
11
10
9
V
OUT
GND REF
CMRR
1
2
3
4
V
OUT
8
7
6
5
G = 10
COMP
NC
LTC1100ACN8
LTC1100CJ8
LTC1100CN8
LTC1100AMJ8
LTC1100MJ8
LTC1100ACS
LTC1100CS
COMP
–V
IN
V
IN
–
+
V
V
–V
IN
V
IN
–
+
J8 PACKAGE
N8 PACKAGE
V
V
8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP
NC
NC
TJMAX = 150°C, θJA = 100°C/W (J)
TJMAX = 110°C, θJA = 130°C/W (N)
S PACKAGE
16-LEAD PLASTIC SOL
TJMAX = 110°C, θJA = 100°C/W
Contact factory for Industrial grade parts
ELECTRICAL CHARACTERISTICS
VS = ±5V, RL = 10k, CC = 1000pF, unless otherwise specified.
LTC1100ACN (Note 3)
LTC1100CN/CJ
TYP
PARAMETER
CONDITIONS
T = 25°C
MIN
TYP
MAX
MIN
MAX
UNITS
Gain Error
0.01
0.05
0.10
0.01
0.075
0.150
±%
±%
A
●
●
Gain Nonlinearity
T = 25°C
A
3
12
8
30
3
12
20
60
ppm
ppm
Input Offset Voltage
Input Offset Voltage Drift
Input Noise Voltage
Input Bias Current
(Note 1)
(Note 1)
±1
±5
1.9
2.5
±10
±1
±5
1.9
2.5
±10
µV
●
±100
±100
nV/°C
DC to 10Hz, T = 25°C
µV
P-P
A
T = 25°C
A
50
120
65
135
pA
pA
●
●
●
●
Input Offset Current
10
50
10
65
pA
dB
dB
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
V
CM
= 2.3V to −4.7V (Note 2)
104
120
115
90
110
V = ±2.375V to ±8V
S
105
R = 2k, V = ±8V
●
●
–7.2
–7.7
6.2
7.5
–7.2
–7.7
6.2
7.5
V
V
L
S
R =10k, V = ±8V
L
S
Supply Current
T = 25°C
A
2.4
3.4
2.8
4.0
2.4
3.4
3.3
4.5
mA
mA
●
Internal Sampling Frequency
Bandwidth
T = 25°C
2.8
18
2.8
18
kHz
kHz
A
T = 25°C
A
2
LTC1100
ELECTRICAL CHARACTERISTICS
VS = ±5V, RL = 10k, CC = 1000pF, unless otherwise specified.
LTC1100AMJ (Note 3)
LTC1100MJ
TYP
PARAMETER
CONDITIONS
T = 25°C
MIN
TYP
MAX
MIN
MAX
UNITS
Gain Error
0.01
0.05
0.11
0.01
0.075
0.150
±%
±%
A
●
●
Gain Nonlinearity
T = 25°C
A
3
8
40
3
20
65
ppm
ppm
Input Offset Voltage
Input Offset Voltage Drift
Input Noise Voltage
Input Bias Current
(Note 1)
(Note 1)
±1
±5
1.9
5
±10
±1
±5
1.9
5
±10
µV
●
±100
±100
nV/°C
DC to 10Hz, T = 25°C
µV
P-P
A
T = 25°C
A
50
300
65
450
pA
pA
●
●
●
●
Input Offset Current
80
120
pA
dB
dB
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
V
CM
= −4.7V to 2.3V
100
115
90
95
V = ±2.375V to ±8V
S
R = 10k, V = ±8V
●
●
–7.4
–7.0
7.4
6.0
–7.4
–7.0
7.4
6.0
V
V
L
S
R = 2k, V = ±8V
L
S
Supply Current
T = 25°C
A
2.4
2.4
3.3
4.6
mA
mA
●
4.2
Internal Sampling Frequency
Bandwidth
T = 25°C
2.8
18
2.8
18
kHz
kHz
A
T = 25°C
A
ELECTRICAL CHARACTERISTICS
VS = ±5V, RL = 10k, CC = 1000pF, unless otherwise specified.
LTC1100ACS (Note 3)
LTC1100CS
TYP
PARAMETER
CONDITIONS
T = 25°C, A =100
MIN
TYP
MAX
MIN
MAX
UNITS
Gain Error
0.01
0.05
0.10
0.04
0.10
0.01
0.075
0.150
0.060
0.150
±%
±%
±%
±%
A
V
A =100
●
●
V
A =10
0.01
0.01
V
A =10
V
Gain Nonlinearity
T = 25°C, A =100
3
12
1
8
30
8
3
12
1
20
60
10
40
ppm
ppm
ppm
ppm
A
V
A =100
●
●
V
A =10
V
A =10
V
25
Input Offset Voltage
Input Offset Voltage Drift
Input Noise Voltage
Input Bias Current
(Note 1)
(Note 1)
±1
±5
1.9
2.5
±10
±1
±5
1.9
2.5
±10
µV
●
±100
±100
nV/°C
DC to 10Hz, T = 25°C
µV
P-P
A
T = 25°C
A
50
120
65
135
pA
pA
●
●
Input Offset Current
10
50
10
65
pA
Common-Mode Rejection Ratio
V
CM
= −4.7V to 2.3V,
A =100
●
●
104
95
115
90
85
110
dB
dB
V
A =10
V
Power Supply Rejection Ratio
V = ±2.375V to ±8V
S
●
120
105
dB
3
LTC1100
ELECTRICAL CHARACTERISTICS VS = ±5V, RL = 10k, CC = 1000pF, unless otherwise specified.
LTC1100ACS (Note 3)
LTC1100CS
TYP
PARAMETER
CONDITIONS
R =10k, V = ±8V
MIN
TYP
MAX
MIN
MAX
UNITS
Output Voltage Swing
●
●
–7.2
–7.7
6.2
7.5
–7.2
–7.7
6.2
7.5
V
V
L
S
R = 2k, V = ±8V
L
S
Supply Current
T = 25°C
A
2.4
3.4
2.8
4.0
2.4
3.4
3.3
4.5
mA
mA
●
Internal Sampling Frequency
T = 25°C
A
2.8
2.8
kHz
Bandwidth
G = 100
G = 10
T = 25°C
A
18
180
18
180
kHz
kHz
The
●
denotes the specifications which apply over the full operating
systems. V is measured to a limit determined by test equipment
capability.
OS
temperature range.
Note 1: These parameters are guaranteed by design. Thermocouple effects
preclude measurement of these voltage levels in high speed automatic test
Note 2: See Applications Information, Single Supply Operation.
Note 3: Please consult Linear Technology Marketing.
W
BLOCK DIAGRA S
2
R
R
14
7
+
99R
9R
90R
+
5 (V )
10 (V )
99R
90R
9R
4
1
−
+
–
2
R
R
13
–
–
+
3
3
+
6
15
8
R = 2.5k
R = 2.5k
+
6
11
–
–
4 (V )
7 (V
)
LTC1100 • BD02
LTC1100 • BD01
NOTE: FOR A VOLTAGE GAIN OF 10V/V SHORT PIN 2 TO 3, AND PIN 14 TO 15.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Gain Nonlinearity
vs Temperature
Gain Error vs Temperature
Gain, Phase vs Frequency
25
20
0.05
0.04
0.03
0.02
45
40
210
180
V
= ±8V
= 50k
V
= ±8V
= 50k
S
L
S
L
R
R
GAIN
(G = 100)
35
30
150
120
PHASE
15
10
25
20
90
60
0.01
0
5
0
GAIN
(G = 10)
15
10
5
30
0
–30
1M
–0.01
–5
–50 –25
0
25
50
75
–50 –25
0
25
50
75
100 125
100 125
100
1k
10k
100k
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (Hz)
LTC1100 • TPC01
LTC1100 • TPC02
LTC1100 • TPC03
4
LTC1100
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Power Supply Rejection Ratio
vs Frequency
Common-Mode Range
vs Supply Voltage
Supply Current vs Supply Voltage
4
3
150
125
8
6
4
T
= 25°C
T
= –55°C
A
A
T
= 25°C
A
100
75
2
0
2
1
0
T
= 125°C
A
–2
–4
50
25
0
NEGATIVE COMMON-MODE RANGE
–6
–8
0.1
1
10
100
1k
±2
±4
±6
±8
10k 100k
±3
±5
±7
2
6
10
14
4
8
12
16 18
+
–
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
TOTAL SUPPLY VOLTAGE V TO V (V)
LTC1100 • TPC05
LTC1100 • TPC06
LTC1100 • TPC04
Undistorted Output Swing
vs Frequency
CMRR vs Frequency
Output Voltage Swing vs Load
±10
±9
120
100
80
60
40
20
0
10
9
V
S
= ±5V
G = 100, R = 100k
C
C
V
S
= ±8V, T ≤ 85°C
A
= 10pF
C
NEGATIVE
8
±8
±7
±6
±5
±4
±3
G = 100, R = ∞
C
R
L
= 100k
C
C
= 0pF
7
POSITIVE
R
= 2k
L
6
V
= ±5V, T ≤ 85°C
A
S
C
C
2
NEGATIVE
NEGATIVE
R
C
5
4
3
2
G = 10, R = ∞
C
POSITIVE
C
= 0pF
C
1
V
S
= ±2.5V, T ≤ 85°C
A
3
6
LTC1100
±2
±1
0
POSITIVE
1
0
0.1
10
100
1k
10k 100k
1
0
1
2
3
4
5
6
8
9
100
1k
10k
100k
7
10
FREQUENCY (Hz)
LOAD RESISTANCE (kΩ)
FREQUENCY (Hz)
LTC1100 • TPC07
LTC1100 • TPC08
LTC1100 • TPC09
Bias Current vs
Common-Mode Voltage
Internal Sampling Frequency
vs Supply Voltage
Voltage Noise vs Frequency
4
3
360
300
240
180
120
60
105
90
75
60
45
30
15
0
V
= ±5V
T = –55°C
A
S
T
= 125°C
A
T
= 25°C
A
2
1
0
T
A
= 25°C
0
T
= 125°C
A
–60
T
= –55°C
A
–120
–180
–200
–6 –5 –4 –3 –2 –1
0
2
3
2
6
10
14
18
1
4
4
8
12
16
10
100
1k
10k
100k
+
–
TOTAL SUPPLY VOLTAGE V TO V (V)
COMMON-MODE VOLTAGE (V)
FREQUENCY (Hz)
LTC1100 • TPC10
LTC1100 • TPC11
LTC1100 • TPC12
5
LTC1100
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Large-Signal Transient Response
Small-Signal Transient Response
Overload Recovery
G = 100, VS = ±5V
G = 100, VS = ±5V
G = 100, VS = ±5V
1V/DIV
2V/DIV
50mV/DIV
2V/DIV
5µs/DIV
10µs/DIV
10µs/DIV
LTC1100 • TPC15
LTC1100 • TPC13
LTC1100 • TPC14
Large-Signal Transient Response
G = 10 (LTC1100CS Only), VS = ±5V
Small-Signal Transient Response
G = 10 (LTC1100CS Only), VS = ±5V
Overload Recovery
G = 10 (LTC1100CS Only), VS = ±5V
1V/DIV
2V/DIV
50ms/DIV
2V/DIV
10µs/DIV
10µs/DIV
1µs/DIV
LTC1100 • TPC16
LTC1100 • TPC17
LTC1100 • TPC18
U
U
U
PIN FUNCTIONS
8-Pin DIP (16-Pin SO)
Pin 1 (2) GND REF: Connect to system ground. This sets
suppressed by using the COMP pin. The standard com-
pensation circuit is a capacitor from COMP to VOUT, sized
to provide an RC pole with the internal 247k resistor
(22.5k for LTC1100CS in gain-of-10 mode). See the
Applications section.
the zero reference for the internal op amps.
Pin 2 (4) CMRR: This pin tailors the gain of the internal
amplifiers to maximize AC CMRR. For applications which
emphasize CMRR requirements, connect a 100k resistor
and a 10pF capacitor in series from CMRR to ground. See
the Applications section.
Pin 8 (15) VOUT: Signal Output.
16-Pin SO Package Only
Pin 3 (6) –VIN: Inverting Input.
Pin 4 (7) V– : Negative Supply.
Pin 5 (10) V+: Positive Supply.
Pin 6 (11) VIN: Noninverting Input.
(3) G = 10: Short to pin (2) for gain of 10. Leave
disconnected for gain of 100.
(14) G = 10: Short to pin (15) for gain of 10. Leave
disconnected for gain of 100.
NOTE: Both pins must be shorted or open to provide
correct gain.
Pin 7 (13) COMP: This pin reduces the bandwidth of the
internal amplifiers for applications at or near DC. Clock
feedthrough from the internal sampling clock can also be
(1),(5),(8),(9),(12),(16) NC: No Internal Connection.
6
LTC1100
O U
W
U
PPLICATI
S I FOR ATIO
A
Aliasing
Common-Mode Rejection
The LTC1100 is a chopper-stabilized instrumentation
amplifier; like all sampled systems it exhibits aliasing
behavior for input frequencies at or near the internal
sampling frequency. The LTC1100 incorporates special-
ized anti-aliasing circuitry which typically attenuates
aliasing products by ≥60dB; however, extremely sensi-
tive systems may still have to take precautions to avoid
aliasing errors. For more information, see the LTC1051/
LTC1053 data sheet.
Due to very precise matching of the internal resistors, no
trims are required to obtain a DC CMRR of better than
100dB. However, things change as frequency rises. The
inverting amplifier is in a gain of 1.01 (1.1 for gain of 10),
whilethenoninvertingamplifierisinagainof99(9forgain
of 10). As frequency rises, the higher gain amplifier hits its
gain-bandwidth limit long before the low gain amplifier,
degrading CMRR. The solution is straightforward—slow
down the inverting amplifier to match the noninverting
amp. Figure 1 shows the recommended circuit. The prob-
lem is less pronounced in the LTC1100CS in gain-of-10
mode; no CMRR trims are necessary.
Single Supply Operation
The LTC1100 will operate on a single 5V supply, and the
common-mode range of the internal op amps includes
ground; single supply operation is limited only by the
output swing of the op amps. The internal inverting
amplifier has a negative saturation limit of 5mV typically,
settingtheminimumcommon-modelimitat5mV/1.01(or
1.1 for gain of 10). The inputs can be biased above ground
asshowninFigure3.Lowcostbiasingcomponentscanbe
used since any errors appear as a common-mode term
and are rejected.
3
−
+
−
8
LTC1100
6
+
2
100k
10pF
LTC1100 • TA02
Figure 1. Improving AC CMRR
The minimum differential input voltage is limited by the
swing of the output op amp. Lightly loaded, it will swing
downto5mV,allowingdifferentialinputvoltagesaslowas
50µV (450µV for gain of 10). Single supply operation
limits the LTC1100 to positive differential inputs only;
negative inputs will give a saturated zero output.
Overcompensation
Many instrumentation amplifier applications process DC
or low frequency signals only; consequently the 18kHz
(180kHz for G = 10) bandwidth of the LTC1100 can be
reduced to minimize system errors or reduce transmitted
clock noise by using the COMP pin. A feedback cap from
COMP to VOUT will react with the 247k internal resistor
(22.5k for G = 10) to limit the bandwidth, as in Figure 2.
5V
5V
R
BIAS
5
6
3
+
C
8
B
OUTPUT
0V TO 5V
LTC1100
SENSOR
1N4148
−
4, 1
7
3
6
–
8
f
LTC1100
LTC1100 • TA04
+
1
INT
=
3dB
2π R
× C
B
R
= 247k FOR G = 100
22.5k FOR G = 10
LTC1100 • TA03
INT
Figure 3.
Figure 2. Overcompensation to Reduce System Bandwidth
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
7
LTC1100
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead Ceramic DIP
CORNER LEADS OPTION
(4 PLCS)
0.405
(10.287)
MAX
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
0.005
(0.127)
MIN
0.200
(5.080)
MAX
0.290 – 0.320
(7.366 – 8.128)
6
5
4
8
7
0.045 – 0.068
0.015 – 0.060
(0.381 – 1.524)
(1.143 – 1.727)
FULL LEAD
OPTION
0.025
(0.635)
RAD TYP
0.220 – 0.310
(5.588 – 7.874)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
1
2
3
0.045 – 0.068
(1.143 – 1.727)
0.385 ± 0.025
(9.779 ± 0.635)
0.125
3.175
MIN
0.100 ± 0.010
0.014 – 0.026
(2.540 ± 0.254)
(0.360 – 0.660)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP OR TIN PLATE LEADS.
N8 Package
8-Lead Plastic DIP
0.400
(10.160)
MAX
0.130 ± 0.005
0.045 – 0.065
0.300 – 0.320
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.128)
8
1
7
6
5
4
0.065
(1.651)
TYP
0.250 ± 0.010
(6.350 ± 0.254)
0.009 – 0.015
(0.229 – 0.381)
0.125
0.020
(0.508)
MIN
(3.175)
MIN
+0.025
–0.015
0.045 ± 0.015
(1.143 ± 0.381)
2
3
0.325
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
S Package
16-Lead Plastic SOL
0.398 – 0.413
(10.109 – 10.490)
(NOTE 2)
0.291 – 0.299
(7.391 – 7.595)
(NOTE 2)
0.037 – 0.045
(0.940 – 1.143)
0.093 – 0.104
(2.362 – 2.642)
15 14
12
10
9
16
13
11
0.005
(0.127)
RAD MIN
0.010 – 0.029
× 45°
(0.254 – 0.737)
0° – 8° TYP
0.050
(1.270)
TYP
0.394 – 0.419
(10.007 – 10.643)
NOTE 1
0.004 – 0.012
(0.102 – 0.305)
0.009 – 0.013
(0.229 – 0.330)
NOTE 1
0.014 – 0.019
0.016 – 0.050
(0.356 – 0.482)
TYP
(0.406 – 1.270)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
2. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
2
3
5
7
8
1
4
6
LT/GP 0594 2K REV B • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
8
LINEAR TECHNOLOGY CORPORATION 1994
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(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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