LTC1159CS-5 [Linear]
High Efficiency Synchronous Step-Down Switching Regulators; 高效率同步降压型开关稳压器
| 型号： | LTC1159CS-5 |
| 厂家： | 
Linear |
| 描述： | High Efficiency Synchronous Step-Down Switching Regulators |
| 文件： | 总20页 (文件大小：400K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1159/LTC1159-3.3/LTC1159-5
High Efficiency Synchronous
Step-Down Switching Regulators
U
DESCRIPTIO
EATURE
S
F
TheLTC®1159seriesisafamilyofsynchronousstep-down
switching regulator controllers featuring automatic Burst
ModeTM operation to maintain high efficiencies at low
output currents. These devices drive external complemen-
tarypowerMOSFETsatswitchingfrequenciesupto250kHz
using a constant off-time current-mode architecture.
■
■
■
■
■
Operation from 4V to 40V Input Voltage
Ultra-High Efficiency: Up to 95%
20µA Supply Current in Shutdown
High Efficiency Maintained Over Wide Current Range
Current Mode Operation for Excellent Line and Load
Transient Response
■
■
■
■
■
Very Low Dropout Operation: 100% Duty Cycle
Short-Circuit Protection
Synchronous FET Switching for High Efficiency
Adaptive Non-Overlap Gate Drives
Available in SSOP and SO Packages
A separate pin and on-board switch allow the MOSFET
driver power to be derived from the regulated output
voltageprovidingsignificantefficiencyimprovementwhen
operating at high input voltages. The constant off-time
current-mode architecture maintains constant ripple cur-
rent in the inductor and provides excellent line and load
transient response. The output current level is user pro-
grammable via an external current sense resistor.
O U
PPLICATI
S
A
■
■
■
■
■
■
■
Step-Down and Inverting Regulators
Notebook and Palmtop Computers
Portable Instruments
The LTC1159 automatically switches to power saving
Burst Mode operation when load current drops below
approximately 15% of maximum current. Standby current
is only 300µA while still regulating the output and shut-
down current is a low 20µA.
Battery-Operated Digital Devices
Industrial Power Distribution
Avionics Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a trademark of Linear Technology Corporation.
Telecom Power Supplies
U
O
TYPICAL APPLICATI
V
IN
C
+
IN
LTC1159-5 Efficiency
1N4148
100µF
V
IN
100V
100
90
80
70
60
CAP
P-GATE
Si9435DY
FIGURE 1 CIRCUIT
0.15µF
V
= 10V
IN
V
V
0.1µF
CC
+
P-DRIVE
3.3µF
CC
EXTV
CC
D1
L*
33µH
R
SENSE
0.05Ω
V
= 20V
MBRS140T3
IN
LTC1159-5
V
OUT
5V/2A
+
SHDN1
SHDN2
SENSE
0V = NORMAL
>2V = SHUTDOWN
0.01µF
–
SENSE
I
TH
+
C
OUT
3300pF
1k
C
N-GATE
P-GND
Si9410DY
T
220µF
C
T
S-GND
300pF
0.02
0.2
LOAD CURRENT (A)
2
*COILTRONICS CTX33-4-MP
LTC1159 • F01
LTC1159 • TA01
Figure 1. High Efficiency Step-Down Regulator
1
LTC1159/LTC1159-3.3/LTC1159-5
W W W
U
ABSOLUTE AXI U RATI GS
Input Supply Voltage (Pin 2)...................... –15V to 60V
Operating Temperature Range .................... 0°C to 70°C
Extended Commercial
V
CC Output Current (Pin 3) .................................. 50mA
Continuous Pin Currents (Any Pin)...................... 50mA
Sense Voltages ......................................... –0.3V to 13V
Shutdown Voltages................................................... 7V
EXTVCC Input Voltage ............................................. 15V
Temperature Range ............................... –40°C to 85°C
Junction Temperature (Note 1)............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
W
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/O
PACKAGE RDER I FOR ATIO
TOP VIEW
ORDER PART
ORDER PART
TOP VIEW
NUMBER
NUMBER
P-GATE
1
2
3
4
5
6
7
8
9
20 CAP
1
2
3
4
5
6
7
8
CAP
16
15
14
13
12
11
10
9
P-GATE
V
IN
19 SHDN2
SHDN2
V
IN
V
CC
18 EXTV
CC
EXTV
CC
LTC1159CG
LTC1159CG-3.3
LTC1159CG-5
LTC1159CN
V
CC
P-DRIVE
P-DRIVE
17 P-GND
16 N-GATE
15 P-GND
14 S-GND
13 SHDN1
N-GATE
P-GND
S-GND
P-DRIVE
LTC1159CN-3.3
LTC1159CN-5
LTC1159CS
V
CC
V
CC
V
CC
C
T
V
FB
(SHDN1)*
I
TH
LTC1159CS-3.3
LTC1159CS-5
C
+
T
–
SENSE
SENSE
I
12
V
FB
TH
–
N PACKAGE
S PACKAGE
16-LEAD PLASTIC SO
+
SENSE 10
11 SENSE
16-LEAD PDIP
*FIXED OUTPUT VERSIONS
G PACKAGE
20-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 80°C/ W (N)
TJMAX = 125°C, θJA = 110°C/ W (S)
TJMAX = 125°C, θJA = 135°C/ W
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS TA = 25°C, VIN = 12V, VSHDN1 = 0V (Note 2), unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
1.25
0.2
MAX
UNITS
V
V
Feedback Voltage (LTC1159 Only)
Feedback Current (LTC1159 Only)
●
●
1.21
1.29
FB
I
µA
FB
V
Regulated Output Voltage
LTC1159-3.3
V
LOAD
LOAD
= 9V
IN
OUT
I
I
= 700mA
= 700mA
●
●
3.23
4.90
3.33
5.05
3.43
5.20
V
V
LTC1159-5
∆V
Output Voltage Line Regulation
V
= 9V to 40V
IN
–40
0
40
mV
OUT
Output Voltage Load Regulation
LTC1159-3.3
5mA < I
5mA < I
< 2A
< 2A
●
●
40
60
65
100
mV
mV
LOAD
LOAD
LTC1159-5
Burst Mode Output Ripple
I
= 0A
50
mV
P-P
LOAD
I
I
V
Pin Current (Note 3)
Normal Mode
IN
IN
V
V
= 12V, EXTV = 5V
200
300
µA
µA
IN
IN
CC
= 40V, EXTV = 5V
CC
Shutdown
V
V
= 12V, V
= 40V, V
= 2V
= 2V
15
25
µA
µA
IN
IN
SHDN2
SHDN2
EXTV Pin Current (Note 3)
EXTV = 5V, Sleep Mode
250
4.5
µA
EXTVCC
CC
CC
V
Internal Regulator Voltage
V
V
= 12V to 40V, EXTV = 0V, I = 10mA
●
4.25
4.75
400
V
CC
IN
IN
CC
CC
V
– V
V
Dropout Voltage
= 4V, EXTV = Open, I = 10mA
300
mV
IN
CC
CC
CC
CC
2
LTC1159/LTC1159-3.3/LTC1159-5
ELECTRICAL CHARACTERISTICS
TA = 25°C, VIN = 12V, VSHDN1 = 0V (Note 2), unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
– V
EXTV Switch Drop
V
= 12V, EXTV = 5V, I
= 10mA
250
350
mV
EXT
CC
CC
IN
CC
SWITCH
– V
P-Gate to Source Voltage (Off)
V
V
= 12V
= 40V
–0.2
–0.2
0
0
V
V
P-GATE
IN
IN
IN
+
–
V
SENSE
V
SENSE
–
Current Sense Threshold Voltage
LTC1159
–
–
V
V
= 5V, V = 1.32V (Forced)
25
mV
mV
SENSE
SENSE
FB
= 5V, V = 1.15V (Forced)
●
●
●
130
130
130
150
170
170
170
FB
–
–
LTC1159-3.3
LTC1159-5
V
V
= 3.4V (Forced)
= 3.1V (Forced)
25
150
mV
mV
SENSE
SENSE
–
–
V
V
= 5.2V (Forced)
= 4.7V (Forced)
25
150
mV
mV
SENSE
SENSE
V
V
SHDN1 Threshold
SNDN1
LTC1159CG, LTC1159-3.3, LTC1159-5
0.6
0.8
0.8
1.4
12
2
2
V
V
SHDN2 Threshold
SHDN2
SHDN2
CT
I
I
Shutdown 2 Input Current
V
= 5V
20
µA
SHDN2
C Pin Discharge Current
T
V
V
in Regulation
= 0V
50
4
70
2
90
10
µA
µA
OUT
OUT
t
Off-Time (Note 4)
C = 390pF, I
= 700mA, V = 10V
5
6
µs
OFF
T
LOAD
IN
t , t
r
Driver Output Transition Times
C = 3000pF (Pins P-Drive and N-Gate), V = 6V
100
200
ns
f
L
IN
–40°C ≤ TA ≤ 85°C (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
Feedback Voltage (LTC1159 Only)
1.2
1.25
1.3
V
FB
Regulated Output Voltage
LTC1159-3.3
V
LOAD
LOAD
= 9V
IN
OUT
I
I
= 700mA
= 700mA
3.17
4.85
3.30
5.05
3.43
5.25
V
V
LTC1159-5
I
V
Pin Current (Note 3)
Normal
IN
IN
V
V
= 12V, EXTV = 5V
200
300
µA
µA
IN
IN
CC
= 40V, EXTV = 5V
CC
Shutdown
V
V
= 12V, V
= 40V, V
= 2V
= 2V
15
25
µA
µA
IN
IN
SHDN2
SHDN2
I
EXTV Pin Current (Note 3)
EXTV = 5V, Sleep Mode
250
4.5
µA
EXTVCC
CC
CC
V
Internal Regulator Voltage
V
= 12V to 40V, EXTV = 0V, I = 10mA
V
CC
IN
CC
CC
+
–
V
V
–
Current Sense Threshold Voltage
Low Threshold (Forced)
High Threshold (Forced)
25
mV
mV
SENSE
SENSE
125
0.8
3.5
150
175
2
V
SHDN2 Threshold
Off-Time (Note 4)
1.4
5
V
SHDN2
OFF
t
C = 390pF, I
= 700mA, V = 10V
6.5
µs
T
LOAD
IN
The
● denotes specifications which apply over the full operating
EXTV , the input current increases by (I
See Typical Performance Characteristics and Applications Information.
× Duty Cycle)/(Efficiency).
CC
GATECHG
temperature range.
Note 1: T is calculated from the ambient temperature T and power
Note 4: In applications where R is placed at ground potential, the off-
time increases approximately 40%.
Note 5: The LTC1159, LTC1159-3.3, and LTC1159-5 are not tested and
not quality assurance sampled at –40°C and 85°C. These specifications
are guaranteed by design and/or correlation.
J
A
SENSE
dissipation P according to the following formulas:
D
LTC1159CG, LTC1159CG-3.3, LTC1159CG-5: T = T + (P × 135°C/W)
J
A
D
LTC1159CN, LTC1159CN-3.3, LTC1159CN-5: T = T + (P × 80°C/W)
J
A
D
LTC1159CS, LTC1159CS-3.3, LTC1159CS-5: T = T + (P × 110°C/W)
J
A
D
Note 2: On LTC1159 versions which have a SHDN1 pin, it must be at
ground potential for testing.
Note 6: The logic-level power MOSFETs shown in Figure 1 are rated for
V
= 30V. For operation at V > 30V, use standard threshold
DS(MAX)
IN
Note 3: The LTC1159 V and EXTV current measurements exclude
MOSFETs with EXTV powered from a 12V supply. See Applications
IN
CC
CC
MOSFET driver currents. When V power is derived from the output via
Information.
CC
3
LTC1159/LTC1159-3.3/LTC1159-5
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TYPICAL PERFOR A CE CHARACTERISTICS
Line Regulation
Load Regulation
Efficiency vs Input Voltage
20
0
100
60
40
FIGURE 1 CIRCUIT
LOAD
FIGURE 1 CIRCUIT
LOAD
FIGURE 1 CIRCUIT
= 24V
I
= 1A
I
= 1A
V
IN
95
20
–20
–40
0
NOTE 6
NOTE 6
90
–20
–40
–60
–60
–80
85
80
–100
25 30
10 15 20
INPUT VOLTAGE (V)
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
0
5
35 40
0
0.5
1.0
1.5
2.0
2.5
LOAD CURRENT (A)
LTC1159 • TPC01
LT1159 • TPC02
LTC1159 • TPC03
Operating Frequency
EXTVCC Pin Current
vs (VIN – VOUT
)
VIN Pin Current
500
2.0
1.5
1.0
0.5
0
10
FIGURE 1 CIRCUIT
FIGURE 1 CIRCUIT
V
= 5V
OUT
T = 0°C
400
300
8
6
I
= 1A
LOAD
T = 25°C
T = 70°C
NORMAL
NOTE 6
NOTE 6
4
2
0
200
100
0
I
= 100mA
LOAD
I
= 0
V
= 2V
SHDN2
LOAD
20
0
5
10 15
25 30 35 40
0
5
10
15 20
25
30 35
40
5
15
0
10
20
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
(V – V ) VOLTAGE (V)
IN
OUT
LTC1159 • TPC04
LTC1159 • TPC05
LTC1159 • TPC06
EXTVCC Switch Drop
Current Sense Threshold Voltage
Off-Time vs VOUT
600
500
80
70
60
50
40
30
20
10
0
160
140
120
100
80
MAXIMUM
THRESHOLD
400
300
60
200
100
0
40
MINIMUM
THRESHOLD
LTC1159-5
20
LTC1159-3.3
0
0
5
10
15
20
0
1
2
3
4
5
0
20
40
60
80
100
SWITCH CURRENT (mA)
OUTPUT VOLTAGE (V)
TEMPERATURE (°C)
LTC1159 • TPC07
LTC1159 • TPC08
LTC1159 • TPC09
4
LTC1159/LTC1159-3.3/LTC1159-5
U
U
U
PI FU CTIO S
VIN: Main Supply Input Pin.
Sense+: The (+) Input for the Current Comparator. A built-
in offset between the Sense+ and Sense– pins, in conjunc-
tion with RSENSE, sets the current trip threshold.
S-GND: Small Signal Ground. Must be routed separately
from other grounds to the (–) terminal of COUT
.
N-Gate: High Current Drive for the Bottom N-Channel
MOSFET. The N-Gate pin swings from ground to VCC.
P-GND: Driver Power Grounds. Connect to source of N-
channel MOSFET and the (–) terminal of CIN.
P-Gate: Level-Shifted Gate Drive Signal for the Top
P-Channel MOSFET. The voltage swing at the P-gate pin is
from VIN to VIN – VCC.
VCC: Outputs of internal 4.5V linear regulator, EXTVCC
switch, and supply inputs for driver and control circuits.
Thedriverandcontrolcircuitsarepoweredfromthehigher
of the 4.5V regulator or EXTVCC voltage. Must be closely
decoupled to power ground.
P-Drive: High Current Gate Drive for the Top P-Channel
MOSFET. The P-drive pin(s) swing(s) from VCC to ground.
CT: External capacitor CT from this pin to ground sets the
operating frequency. (The frequency is also dependent on
the ratio VOUT/VIN.)
CAP: Charge Compensation Pin. A capacitor to VCC pro-
vides charge required by the P-gate level-shift capacitor
during supply transitions. The charge compensation ca-
pacitor must be larger than the gate drive capacitor.
ITH: Gain Amplifier Decoupling Point. The current com-
parator threshold increases with the ITH pin voltage.
SHDN1:Thispinshutsdownthecontrolcircuitryonly(VCC
is not affected). Taking SHDN1 pin high turns off the
control circuitry and holds both MOSFETs off. This pin
must be at ground potential for normal operation.
VFB: For the LTC1159 adjustable version, the VFB pin
receives the feedback voltage from an external resistive
divider used to set the output voltage.
Sense–: Connects to internal resistive divider which sets
the output voltage in fixed output versions. The Sense– pin
is also the (–) input of the current comparator.
SHDN2: Master Shutdown Pin. Taking SHDN2 high shuts
down VCC and all control circuitry.
U
OPERATIO
(Refer to Functional Diagram)
gate directly. The P-channel gate drive must be referenced
to the main supply input VIN, which is accomplished by
level-shifting the P-drive signal via an internal 550k resis-
tor and external capacitor.
The LTC1159 uses a current mode, constant off-time
architecture to synchronously switch an external pair of
complementary power MOSFETs. Operating frequency is
set by an external capacitor at the CT pin.
During the switch “ON” cycle in continuous mode,
current comparator C monitors the voltage between the
The output voltage is sensed either by an internal voltage
divider connected to the Sense– pin (LTC1159-3.3 and
LTC1159-5) or an external divider returned to the VFB pin
(LTC1159). A voltage comparator V, and a gain block G,
compare the divided output voltage with a reference
voltage of 1.25V. To optimize efficiency, the LTC1159
automatically switches between two modes of operation,
burst and continuous.
+
–
Sense and Sense pins connected across an external
shunt in series with the inductor. When the voltage
across the shunt reaches its threshold value, the P-gate
output is switched to V , turning off the P-channel
IN
MOSFET. The timing capacitor C is now allowed to
T
dischargeataratedeterminedbytheoff-timecontroller.
The discharge current is made proportional to the
output voltage to model the inductor current, which
decays at a rate which is also proportional to the output
voltage. While the timing capacitor is discharging, the
N-gate output is high, turning on the N-channel
MOSFET.
A low dropout 4.5V regulator provides the operating volt-
age VCC for the MOSFET drivers and control circuitry
during start-up. During normal operation, the LTC1159
family powers the drivers and control from the output via
the EXTVCC pin to improve efficiency. The N-gate pin is
referenced to ground and drives the N-channel MOSFET
5
LTC1159/LTC1159-3.3/LTC1159-5
U
OPERATIO
(Refer to Functional Diagram)
When the voltage on CT has discharged past VTH1, com-
parator T trips, setting the flip-flop. This causes the N-gate
output to go low (turning off the N-channel MOSFET) and
the P-gate output to also go low (turning the P-channel
The circuit now enters sleep mode with both power
MOSFETs turned off. In sleep mode, much of the cir-
cuitry is turned off, dropping the supply current from
several milliamps (with the MOSFETs switching) to
MOSFET back on). The cycle then repeats. As the load 300µA. When the output capacitor has discharged by
currentincreases,theoutputvoltagedecreasesslightly. theamountofhysteresisincomparatorV,theP-channel
This causes the output of the gain stage to increase the MOSFET is again turned on and this process repeats. To
current comparator threshold, thus tracking the load avoid the operation of the current loop interfering with
current.
BurstModeoperation, abuilt-inoffsetisincorporatedin
the gain stage.
The sequence of events for Burst Mode operation is very
similar to continuous operation with the cycle interrupted
bythevoltagecomparator. Whentheoutputvoltageisator
above the desired regulated value, the P-channel MOSFET
is held off by comparator V and the timing capacitor
continues to discharge below VTH1. When the timing
capacitor discharges past VTH2, voltage comparator S
trips, causing the internal SLEEP line to go low and the
N-channel MOSFET to turn off.
To prevent both the external MOSFETs from being turned
on at the same time, feedback is incorporated to sense the
stateofthedriveroutputpins. BeforetheN-gateoutputcan
gohigh, theP-driveoutputmustalsobehigh. Likewise, the
P-drive output is prevented from going low when the N-
gate output is high.
U
U
W
Internal divider broken at VFB for adjustable versions.
FU CTIO AL DIAGRA
V
IN
V
CC
P-GATE
CAP
LOW DROPOUT
550k
SHDN2
4.5V REGULATOR
P-DRIVE
550k
V
CC
LOW DROP SWITCH
EXTV
CC
N-GATE
+
–
SENSE
SENSE
P-GND
–
+
V
R
S
–
+
Q
–
SLEEP
C
25mV TO 150mV
–
V
OS
V
TH1
T
13k
+
G
+
100k
+
S
V
V
LTC1159 • FD
–
TH2
FB
1.25V
REFERENCE
OFF-TIME
CONTROL
–
SENSE
SHDN1
S-GND
I
TH
C
T
6
LTC1159/LTC1159-3.3/LTC1159-5
U U
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U
APPLICATIO S I FOR ATIO
both track IMAX. Once RSENSE has been chosen, IBURST and
ISC(PK) can be predicted from the following equations:
The LTC1159 Compared to the LTC1148/LTC1149
Families
The LTC1159 family is closest in operation to the LTC1149
and shares much of the applications information. In addi-
tion to reduced quiescent and shutdown currents, the
LTC1159 adds an internal switch which allows the driver
and control sections to be powered from an external
source for higher efficiency. This change affects Power
MOSFET Selection, EXTVCC Pin Connection, Important
Information About LTC1159 Adjustable Applications, and
Efficiency Considerations found in this section.
15mV
SENSE
I
≈
BURST
R
150mV
I
=
SC(PK)
R
SENSE
The LTC1159 automatically extends tOFF during a short
circuit to allow sufficient time for the inductor current to
decay between switch cycles. The resulting ripple current
causes the average short-circuit current ISC(AVG) to be
The basic LTC1159 application circuit shown in Figure 1
is limited to a maximum input voltage of 30V due to
MOSFET breakdown. If the application does not require
greater than 18V operation, then the LTC1148 or
LTC1148HV should be used. For higher input voltages
wherequiescentandshutdowncurrentarenotcritical,the
LTC1149 may be a better choice since it is set up to drive
standard threshold MOSFETs.
reduced to approximately IMAX
.
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
RSENSE Selection for Output Current
RSENSE ischosenbasedontherequiredoutputcurrent.The
LTC1159 current comparator has a threshold range which
extends from a minimum of 0.025V/RSENSE to a maximum
of 0.15V/RSENSE. The current comparator threshold sets
thepeakoftheinductorripplecurrent, yieldingamaximum
output current IMAX equal to the peak value less half the
peak-to-peak ripple current. For proper Burst Mode opera-
tion,IRIPPLE(P-P) mustbelessthanorequaltotheminimum
current comparator threshold.
0
1
2
3
4
5
MAXIMUM OUTPUT CURRENT (A)
LTC1159 • F02
Figure 2. RSENSE vs Maximum Output Current
L and CT Selection for Operating Frequency
The LTC1159 uses a constant off-time architecture with
tOFF determined by an external timing capacitor CT. The
valueofCT iscalculatedfromthedesiredcontinuousmode
operating frequency, f:
Since efficiency generally increases with ripple current,
the maximum allowable ripple current is assumed, i.e.,
IRIPPLE(P-P) = 0.025V/RSENSE (see CT and L Selection for
Operating Frequency). Solving for RSENSE and allowing
a margin for variations in the LTC1159 and external
component values yields:
–5
V
V
7.8 × 10
OUT
C =
1 –
T
)
)
f
IN
A graph for selecting CT versus frequency including the
effects of input voltage is given in Figure 3.
100
MAX
R
=
mΩ
SENSE
I
As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The complete expression for operating
frequency is given by:
A graph for selecting RSENSE versus maximum output
current is given in Figure 2. The LTC1159 series works well
with values of RSENSE from 0.02Ω to 0.2Ω.
The load current below which Burst Mode operation com-
mences, IBURST, andthepeakshort-circuitcurrent, ISC(PK)
,
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1400
inductance collapses abruptly when the peak design cur-
rent is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple which can cause Burst Mode operation to be falsely
triggeredintheLTC1159. Donotallowthecoretosaturate!
V
= 5V
OUT
1200
1000
800
600
400
200
0
V
= 48V
IN
Molypermalloy (from Magnetics, Inc.) is a low loss core
material for toroids, but it is more expensive than ferrite.
A reasonable compromise from the same manufacturer is
Kool Mµ. Toroids are very space efficient, especially when
you can use several layers of wire. Because they generally
lack a bobbin, mounting is more difficult. However, new
surface mount designs available from Coiltronics do not
increase the height significantly.
V
= 24V
IN
V
IN
= 12V
200
0
50
100
150
250
FREQUENCY (kHz)
LTC1159 • F03
Figure 3. Timing Capacitor Selection
V
OUT
Power MOSFET Selection
1
OFF
f =
1 –
)
)
t
V
IN
Two external power MOSFETs must be selected for use
with the LTC1159: a P-channel MOSFET for the main
switch and an N-channel MOSFET for the synchronous
switch.
where tOFF = 1.3 × 104 × CT
Once the frequency has been set by C , the inductor L
mustbechosentoprovidenomorethan0.025V/R
T
SENSE
The peak-to-peak drive levels are set by the VCC voltage on
the LTC1159. This voltage is typically 4.5V during start-up
and 5V to 7V during normal operation (see EXTVCC Pin
Connection). Consequently, logic-level threshold
MOSFETs must be used in most LTC1159 family applica-
tions. The only exception is applications in which EXTVCC
is powered from an external supply greater than 8V, in
whichstandardthresholdMOSFETs(VGS(TH) <4V)maybe
used. PaycloseattentiontotheBVDSS specificationforthe
MOSFETs as well; many of the logic-level MOSFETs are
limited to 30V.
of peak-to-peak inductor ripple current. This results in a
minimum required inductor value of:
5
L
MIN
= 5.1 × 10 × R
× C × V
SENSE T REG
Astheinductorvalueisincreasedfromtheminimumvalue,
the ESR requirements for the output capacitor are eased at
the expense of efficiency. If too small an inductor is used,
the LTC1159 may not enter Burst Mode operation and
efficiency will be severely degraded at low currents.
Inductor Core Selection
Selection criteria for the power MOSFETs include the “ON”
Once the minimum value for L is known, the type of
inductor must be selected. High efficiency converters
generally cannot afford the core loss found in low cost
powdered iron cores, forcing the use of more expensive
ferrite, molypermalloy, orKoolMµ® cores. Actualcoreloss
is independent of core size for a fixed inductor value, but it
is very dependent on the inductance selected. As induc-
tance increases, core losses go down but copper (I2R)
losses will increase.
resistance RDS(ON), reverse transfer capacitance CRSS
,
input voltage, and maximum output current. When the
LTC1159 is operating in continuous mode, the duty cycle
for the P-channel MOSFET is given by:
V
V
OUT
P-Ch Duty Cycle =
IN
V – V
IN
OUT
Ferritedesignshaveverylowcoreloss,sodesigngoalscan
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
N-Ch Duty Cycle =
V
IN
The MOSFET dissipations at maximum output current are
given by:
Kool Mµ is a registered trademark of Magnetics, Inc.
8
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This formula has a maximum at VIN = 2VOUT, where
IRMS = IMAX/2. This simple worst case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. An additional 0.1µF ceramic capacitor may also be
required on VIN for high frequency decoupling.
V
V
OUT
2
P-Ch P =
(I
) (1 + ∂ ) R
DS(ON)
+
D
MAX
P
IN
2
k(V ) (I
) (C ) (f)
IN
MAX
RSS
V – V
IN
OUT
2
N-Ch P =
(I
) (1 + ∂ ) R
D
MAX
N
DS(ON)
V
IN
where ∂ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the P-channel
equation includes an additional term for transition losses,
which are highest athigh inputvoltages. ForVIN <20V the
high current efficiency generally improves with larger
MOSFETs,whileforVIN >20Vthetransitionlossesrapidly
increase to the point that the use of a higher RDS(ON)
device with lower CRSS actually provides higher effi-
ciency. The N-channel MOSFET losses are the greatest at
high input voltage or during a short circuit when the N-
channel duty cycle is nearly 100%.
The selection of COUT is driven by the required effective
series resistance (ESR). The ESR of COUT must be less than
twice the value of RSENSE for proper operation of the
LTC1159:
COUT Required ESR < 2RSENSE
OptimumefficiencyisobtainedbymakingtheESRequalto
RSENSE. Manufacturers such as Nichicon, Chemicon, and
Sprague should be considered for high performance ca-
pacitors. The OS-CON semiconductor dielectric capacitor
available from Sanyo has the lowest ESR for its size at a
somewhat higher price. Once the ESR requirement for
COUT has been met, the RMS current rating generally far
exceeds the IRIPPLE(P-P) requirement.
Theterm(1+∂)isgenerallygivenforaMOSFETintheform
of a normalized RDS(ON) vs Temperature curve, but
∂ = 0.007/°C can be used as an approximation for low
voltage MOSFETs. CRSS is usually specified in the MOSFET
electricalcharacteristics.Theconstantk=5canbeusedfor
the LTC1159 to estimate the relative contributions of the
two terms in the P-channel dissipation equation.
In surface mount applications multiple capacitors may
havetobeparalleledtomeetthecapacitance,ESR,orRMS
current handling requirements of the application. Alumi-
num electrolytic and dry tantalum capacitors are both
available in surface mount configurations. In the case of
tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalums, available
in case heights ranging from 2mm to 4mm. For example,
if 200µF/10V is called for in an application requiring 3mm
height, twoAVX100µF/10V(P/NTPSD107K010)couldbe
used. Consult the manufacturer for other specific recom-
mendations.
The Schottky diode D1 shown in Figure 1 only conducts
during the dead time between the conduction of the two
power MOSFETs. D1 prevents the body diode of the
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1% in
efficiency (although there are no other harmful effects if
D1 is omitted). Therefore, D1 should be selected for a
forward voltage of less than 0.6V when conducting IMAX
.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle VOUT/VIN.
To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
At low supply voltages, a minimum value of C
is
OUT
suggested to prevent an abnormal low frequency oper-
ating mode (see Figure 4). When C is too small, the
OUT
output ripple at low frequencies will be large enough to
tripthevoltagecomparator. ThiscausestheBurstMode
operation to be activated when the LTC1159 would
normally be in continuous operation. The effect is most
1/2
I
[V (V – V )]
OUT
MAX OUT IN
C Required I
≈
IN
RMS
V
IN
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1000
Line Transient Response
L = 50µH
R
= 0.02Ω
SENSE
The LTC1159 has better than 60dB line rejection and is
generally impervious to large positive or negative line
voltage transients. However, one rarely occurring condi-
tion can cause the output voltage to overshoot if the proper
precautions are not observed. This condition is a negative
VIN transition of several volts followed within 100µs by a
positive transition of greater than 0.5V/µs slew rate.
800
600
L = 25µH
SENSE
R
= 0.02Ω
400
200
0
L = 50µH
= 0.05Ω
R
SENSE
The reason this condition rarely occurs is because it takes
tens of amps to slew the regulator input capacitor at this
rate!Thesolutionistoaddadiodebetweenthecap and VIN
pins of the LTC1159 as shown in several of the typical
application circuits. If you think your system could have
this problem, add the diode. Note that in surface mount
applications it can be combined with the P-gate diode by
using a low cost common cathode dual diode.
0
1
2
3
4
5
(V – V ) VOLTAGE (V)
IN OUT
LTC1159 • TPC04
Figure 4. Minimum Suggested COUT
pronounced with low values of R
improved by operating at higher frequencies with lower
valuesofL.Theoutputremainsinregulationatalltimes.
and can be
SENSE
EXTVCC Pin Connection
Load Transient Response
The LTC1159 contains an internal PNP switch connected
between the EXTVCC and VCC pins. The switch closes and
supplies the VCC power whenever the EXTVCC pin is higher
in voltage than the 4.5V internal regulator. This allows the
MOSFET driver and control power to be derived from the
output during normal operation and from the internal
regulator when the output is out of regulation (start-up,
short circuit).
Switching regulators take several cycles to respond to a
step in DC (resistive) load current. When a load step
occurs, VOUT shifts by an amount equal to ∆ILOAD × ESR,
where ESR is the effective series resistance of COUT
.
∆ILOAD also begins to charge or discharge COUT until the
regulator loop adapts to the current change and returns
VOUT to its steady state value. During this recovery time
VOUT can be monitored for overshoot or ringing which
would indicate a stability problem. The ITH external
components shown in the Figure 1 circuit will provide
adequate compensation for most applications.
SignificantefficiencygainscanberealizedbypoweringVCC
from the output, since the VIN current resulting from the
driver and control currents will be scaled by a factor of
(Duty Cycle)/(Efficiency). For 5V regulators this simply
means connecting the EXTVCC pin directly to VOUT. How-
ever, for 3.3V and other low voltage regulators, additional
circuitry is required to derive VCC power from the output.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
The following list summarizes the four possible connec-
tions for EXTVCC:
1. EXTVCC Left Open. This will cause VCC to be powered
only from the internal 4.5V regulator resulting in re-
duced MOSFET gate drive levels and an efficiency pen-
alty of up to 10% at high input voltages.
the load rise time is limited to approximately 25 × CLOAD
.
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
10
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2. EXTVCC Connected Directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
to power EXTVCC providing it is compatible with the
MOSFET gate drive requirements. There are no restric-
tions on the EXTVCC voltage relative to VIN. EXTVCC may
be higher than VIN providing EXTVCC does not exceed
the 15V absolute maximum rating.
3. EXTVCC Connected to an Output-Derived Boost Net-
work. For 3.3V and other low voltage regulators, effi-
ciency gains can still be realized by connecting EXTVCC
to an output-derived voltage which has been boosted to
greater than 4.5V. This can be done either with the
inductive boost winding shown in Figure 5a or the
capacitive charge pump shown in Figure 5b. The charge
pump has the advantage of simple magnetics and gen-
erally provides the highest efficiency at the expense of a
slightly higher parts count.
When driving standard threshold MOSFETs, the exter-
nal supply must always be present during operation to
prevent MOSFET failure due to insufficient gate drive.
The LTC1149 family should also be considered for
applicationswhichrequiretheuseofstandardthreshold
MOSFETs.
Important Information About LTC1159 Adjustable
Applications
4. EXTVCC Connected to an External Supply. If an external
supply is available in the 5V to 12V range, it may be used
When an output voltage other than 3.3V or 5V is required,
the LTC1159 adjustable version is used with an external
resistive divider from VOUT to the VFB pin (Figure 6). The
regulated voltage is determined by:
V
IN
+
1N4148
C
IN
V
IN
+
L
1:1
R2
P-GATE
P-CH
1µF
V
OUT
= 1 +
1.25V
•
)
)
R1
R
P-DRIVE
SENSE
V
OUT
•
LTC1159-3.3
N-GATE
P-GND
EXTV
The VFB pin is extremely sensitive to pickup from the
inductor switching node. Care should be taken to isolate
the feedback network from the inductor, and the 100pF
capacitorshouldbeconnectedbetweentheVFB andS-GND
pins next to the package.
N-CH
+
C
OUT
CC
LTC1159 • F05a
Figure 5a. Inductive Boost Circuit for EXTVCC
In LTC1159N and LTC1159S applications with VOUT
>
5.5V, the VCC pin may self-power through the Sense pins
when SHDN2 is taken high, preventing shutdown. In these
applications, a pull-down must be added to the Sense– pin
as shown in Figure 6. This pull-down effectively takes the
place of the SHDN1 pin, ensuring complete shutdown.
Note: For versions in which both the SHDN1 and SHDN2
pins are available (LTC1159G and all fixed output ver-
sions),thetwopinsaresimplyconnectedtoeachotherand
driven together to guarantee complete shutdown.
V
IN
+
C
IN
V
IN
P-GATE
P-CH
R
L
SENSE
V
OUT
OUT
P-DRIVE
LTC1159-3.3
N-GATE
P-GND
EXTV
BAT85
+
VN2222LL
C
N-CH
BAT85
0.22µF
BAT85
CC
TheFigure6circuitcannotbeusedtoregulateaVOUT which
is greater than the maximum voltage allowed on the
LTC1159 • F05b
+
1µF
LTC1159 Sense pins (13V). In applications with VOUT
>
13V, RSENSE must be moved to the ground side of the
output capacitor and load. This operates the current sense
Figure 5b. Capacitive Charge Pump for EXTVCC
11
LTC1159/LTC1159-3.3/LTC1159-5
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V
IN
+
100µF
50V
1N4148
V
IN
CAP
P-GATE
LTC1159
P-DRIVE
IRF9Z34
IRFZ34
R
SENSE
100µH
0.15µF
0.039Ω
0.1µF
5M
V
OUT
V
V
I
CC
+
1µF
1N5819
N-GATE
P-GND
CC
R2
TH
215k
150µF
16V
OS-CON
+
C
3300pF
T
EXTV
CC
R1
24.9k
C
T
390pF
V
FB
1k
100pF
S-GND
100Ω
100Ω
+
SENSE
0.01µF
0V = NORMAL
>3V = SHUTDOWN
–
SHDN2
SENSE
LTC1159 • F06
R2
V
= 1 +
1.25
OUT
VN2222LL
(
)
R1
VALUES SHOWN FOR V
= 12V/2.5A
OUT
Figure 6. High Efficiency Adjustable Regulator with 5.5V < VOUT < 13V
comparator at 0V common mode, increasing the off-time
approximately 40% and requiring the use of a smaller
timing capacitor CT.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
Inverting Regular Applications
The LTC1159 can also be used to obtain negative output
voltages from positive inputs. In these inverting applica-
tions, the current sense resistor connects to ground while
the LTC1159 and N-channel MOSFET connections, which
would normally go to ground, instead ride on the negative
output. This allows the negative output voltage to be set by
the same process as in conventional applications, using
either the internal divider (LTC1159-3.3, LTC1159-5) or an
external divider with the adjustable version.
%Efficiency = 100 – (L1 + L2 + L3 + ...)
whereL1, L2, etc., aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1159 circuits: 1) LTC1159 VIN current, 2)
LTC1159 VCC current, 3) I2R losses, and 4) P-channel
transition losses.
Figure 15 in the Typical Applications shows a synchronous
12V to –12V converter which can supply up to 1A with
betterthan85%efficiency. BygroundingtheEXTVCC pinin
theFigure15circuit, theentire12Voutputvoltageisplaced
across the driver and control circuits since the LTC1159
ground pins are at –12V. During start-up or short-circuit
conditions, operating power is supplied by the internal
4.5V regulator. The shutdown signal is level-shifted to the
negative output rail by Q3, and Q4 ensures that Q1 and Q2
remain off during the entire shutdown sequence.
1. LTC1159 VIN current is the DC supply current given in
the electrical characteristics which excludes MOSFET
driverandcontrolcurrents. VIN currentresultsinasmall
(<1%) loss which increases with VIN.
2. LTC1159 VCC current is the sum of the MOSFET driver
and control circuit currents. The MOSFET driver current
resultsfromswitchingthegatecapacitanceofthepower
MOSFETs. Each time a MOSFET gate is switched from
12
LTC1159/LTC1159-3.3/LTC1159-5
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low to high to low again, a packet of charge dQ moves
from VCC to ground. The resulting dQ/dt is a current out
of VCC which is typically much larger than the control
circuit current. In continuous mode, IGATECHG ≈ f (QP +
QN), where QP and QN are the gate charges of the two
MOSFETs.
windings. With synchronous switching, auxiliary out-
putsmaybeloadedwithoutregardtotheprimaryoutput
load, providing that the loop remains in continuous
mode operation.
Burst Mode operation can be suppressed at low output
currents with a simple external network which cancels the
0.025Vminimumcurrentcomparatorthreshold.Thistech-
nique is also useful for eliminating audible noise from
certain types of inductors in high current (IOUT > 5A)
applications when they are lightly loaded.
An external offset is put in series with the Sense– pin to
subtract from the built-in 0.025V offset. An example of this
technique is shown in Figure 7. Two 100Ω resistors are
inserted in series with the leads from the sense resistor.
With the addition of R3, a current is generated through R1
causing an offset of:
BypoweringEXTVCC fromanoutput-derivedsource,the
additional VIN current resulting from the driver and
control currents will be scaled by a factor of
(Duty Cycle)/(Efficiency). For example in a 20V to 5V
application, 10mA of VCC current results in approxi-
mately3mAofVIN current.Thisreducesthemid-current
loss from 10% or more (if the driver was powered
directly from VIN) to only a few percent.
3. I2R losses are easily predicted from the DC resistances
of the MOSFET, inductor, and current shunt. In con-
tinuous mode all of the output current flows through L
and RSENSE, but is “chopped” between the P-channel
and N-channel MOSFETs. If the two MOSFETs have
approximatelythesameRDS(ON),thentheresistanceof
one MOSFET can simply be summed with the resis-
tances of L and RSENSE to obtain I2R losses. For
example, if each RDS(ON) = 0.1Ω, RL = 0.15Ω, and
RSENSE = 0.05Ω, then the total resistance is 0.3Ω. This
resultsinlossesrangingfrom3%to12%astheoutput
currentincreasesfrom0.5Ato2A.I2Rlossescausethe
efficiency to roll-off at high output currents.
R1
V
= V
OUT
OFFSET
)
)
R1 + R3
If VOFFSET > 0.025V, the minimum threshold will be
cancelled and Burst Mode operation is prevented from
occurring. Since VOFFSET is constant, the maximum load
current is also decreased by the same offset. Thus, to get
backtothesameIMAX, thevalueofthesenseresistormust
be reduced:
75
MAX
R
≈
mΩ
SENSE
I
4. Transition losses apply only to the P-channel MOSFET,
and only when operating at high input voltages (typi-
cally 20V or greater). Transition losses can be esti-
mated from:
To prevent noise spikes from erroneously tripping the
current comparator, a 1000pF capacitor is needed across
the Sense– and Sense+ pins.
Transition Loss ≈ 5(VIN)2(IMAX)(CRSS)(f)
R
SENSE
L
OtherlossesincludingCINandCOUT ESRdissipativelosses,
Schottkyconductionlossesduringdeadtime,andinductor
core losses, generally account for less than 2% total
additional loss.
LTC1159
SENSE
+
R2
C
OUT
100Ω
9
8
+
–
R1
1000pF
100Ω
SENSE
LTC1159 • F07
Auxiliary Windings – Suppressing Burst Mode
Operation
R3
The LTC1159 synchronous switch removes the normal
limitation that power must be drawn from the inductor
primarywindinginordertoextractpowerfromauxiliary
Figure 7. Suppressing Burst Mode Operation
13
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Board Layout Checklist
close as possible to the LTC1159. Up to 100Ω may be
placed in series with each sense lead to help decouple
the Sense pins. However, when these resistors are
used, the capacitor should be no larger than 1000pF.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1159. These items are also illustrated graphically in
the layout diagram of Figure 8. Check the following in your
layout:
4) Does the (+) plate of CIN connect to the source of the
P-channel MOSFET as closely as possible? An addi-
tional 0.1µF ceramic capacitor between VIN and power
ground may be required in some applications.
1) Are the signal and power grounds segregated? The
LTC1159 signal ground must connect separately to the
(–) plate of COUT. The other ground pin(s) should return
to the source of the N-channel MOSFET, anode of the
Schottky diode, and (–) plate of CIN, which should have
as short lead lengths as possible.
2) Does the LTC1159 Sense– pin connect to a point close
to RSENSE and the (+) plate of COUT? In adjustable
applications, the resistive divider R1, R2 must be con-
nected between the (+) plate of COUT and signal ground.
5) Is the VCC decoupling capacitor connected closely be-
tween the VCC pins of the LTC1159 and power ground?
This capacitor carries the MOSFET driver peak currents.
6) Inadjustableversions,thefeedbackpin isverysensitive
to pickup from the switch node. Care must be taken to
isolate VFB from possible capacitive coupling of the
inductor switch signal.
7) Is the SHDN1 pin actively pulled to ground during
normal operation? SHDN1 is a high impedance pin and
must not be allowed to float.
3
) Are the Sense– and Sense+ leads routed together with
minimumPCtracespacing?Thedifferentialdecoupling
capacitor between the two Sense pins should be as
+
BOLD LINES INDICATE HIGH CURRENT PATHS
C
IN
1N4148
+
P-CHANNEL
V
IN
0.15µF
D1
1µF
+
N-CHANNEL
–
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
P-GATE
CAP
SHUTDOWN
V
V
SHDN2
IN
EXTV
CC
0.1 µF
CC
L
P-DRIVE
N-GATE
P-GND
S-GND
OUTPUT DIVIDER
REQUIRED WITH
ADJUSTABLE
5V EXTV
CC
CONNECTION
V
CC
C
T
VERSION ONLY
–
100pF
V
FB
R1
R2
I
TH
C
OUT
(SHDN1)
+
V
OUT
C
3300pF
T
–
+
SENSE
SENSE
1k
R
SENSE
1000pF
+
LTC1159 • F08
Figure 8. LTC1159 Layout Diagram (N and S Packages)
14
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Troubleshooting Hints
3.3V
SinceefficiencyiscriticaltoLTC1159applicationsitisvery
important to verify that the circuit is functioning correctly
in both continuous and Burst Mode operation. The wave-
form to monitor is the voltage on the CT pin .
0V
(a) CONTINUOUS MODE OPERATION
3.3V
0V
LTC1159 • F09
In continuous mode (ILOAD > IBURST) the voltage should be
asawtoothwitha0.9VP-P swing. Thisvoltageshouldnever
dip below 2V as shown in Figure 9a. When the load current
islow(ILOAD <IBURST), BurstModeoperationshouldoccur
with the CT waveform periodically falling to ground as
shown in Figure 9b.
(b) Burst Mode OPERATION
Figure 9. CT Pin 6 Waveforms
If the CT pin is observed falling to ground at high output
currents, it indicates poor decoupling or improper ground-
ing. Refer to the Board Layout Checklist.
U
TYPICAL APPLICATIO S
V
IN
5V
8V TO 20V
47µF
+
1N4148
1µF
WIMA
1N4148
25V × 2
IRF7205
OS-CON
L*
R
**
SENSE
1
2
3
4
5
6
7
8
16
15µH
0.02Ω
P-GATE
CAP
V
OUT
0.15µF
2.5V/5A
15
14
13
12
11
10
9
SHUTDOWN
IRF7201
V
V
SHDN2
IN
0.1µF
EXTV
CC
330µF
+
CC
6.3V × 3
AVX
P-DRIVE
N-GATE
P-GND
S-GND
IRF7201
MBRS330
LTC1159
V
C
+
CC
3.3µF
T
10k
1%
10k
1%
100pF
1000pF
2k
I
V
TH
FB
+
0.047µF
–
SENSE
SENSE
100Ω
100Ω
10k
1000pF
LTC1159 • F10
*MAGNETICS 77120-A7 CORE, 16T 18GA. WIRE
**KRL SL-1-R020J
Figure 10. High Efficiency 8V to 20V Input 2.5/5A Output Regulator
15
LTC1159/LTC1159-3.3/LTC1159-5
U
TYPICAL APPLICATIO S
V
IN
4V TO 20V
47µF
+
1N4148
1N4148
0.1µF
25V
OS-CON
Si9435DY
L*
20µH
R
**
SENSE
0.04Ω
V
OUT
1
2
3
4
5
6
7
8
3.3V/2.5A
16
P-GATE
CAP
0.15µF
15
14
13
12
11
10
9
VN2222LL
BAT85
BAT85
V
V
SHDN2
IN
0.1µF
1µF
BAT85
EXTV
CC
330µF
+
CC
0.22µF
6.3V × 2
AVX
P-DRIVE
N-GATE
Si9410DY
MBRS130LT3
+
LTC1159-3.3
1µF
V
CC
P-GND
S-GND
SHDN1
+
C
T
270pF
I
SHUTDOWN
TH
3300pF
–
+
SENSE
SENSE
1k
0.01µF
LTC1159 • F11
*COILTRONICS CTX20-4
**KRL SL-1/2-R040J
Figure 11. 5:1 Input Range (4V to 20V) High Efficiency 3.3V/2.5A Regulator
V
IN
15V TO 40V
12V
0.33µF
0.1µF
1200µF
50V × 2
LXF
+
1µF
WIMA
MPSA06
MPSA56
1N4148
1N4148
SMP40P06
HEAT SINK
1
2
3
4
5
6
7
8
16
L*
P-GATE
CAP
R
**
SENSE
22µH
0.01Ω
15
14
13
12
11
10
9
V
OUT
0.15µF
V
V
SHDN2
IN
5V/10A
1N4148
EXTV
CC
CC
220µF
+
10V × 3
P-DRIVE
N-GATE
P-GND
S-GND
SHDN1
MTP75N05HD
MBR350
MPSA56
OS-CON
LTC1159-5
V
C
I
CC
T
SHUTDOWN
+
TH
10µF
750pF
100Ω
100Ω
0.047µF
–
+
SENSE
SENSE
470Ω
1000pF
LTC1159 • F12
*HURRICANE LAB HL-KK122T/BB
**DALE LVR-3-0.01
18k
Figure 12. High Current, High Efficiency 15V to 40V Input 5V/10A Output Regulator
16
LTC1159/LTC1159-3.3/LTC1159-5
U
TYPICAL APPLICATIO S
V
IN
15V TO 40V
100µF
63V × 2
SXC
+
1µF
WIMA
1N4148
1N4148
IRF9Z34
HEAT SINK
5M
L*
50µH
R
**
SENSE
1
0.02Ω
16
15
14
13
12
11
10
9
V
OUT
P-GATE
CAP
12V/5A
0.15µF
2
3
4
5
6
7
8
V
V
SHDN2
IN
0.1µF
3.3µF
EXTV
CC
CC
P-DRIVE
N-GATE
P-GND
S-GND
IRFZ44
MBR350
+
150µF
16V × 2
LTC1159
OS-CON
V
C
+
CC
T
10.5k
1%
90.9k
1%
100pF
390pF
I
V
TH
FB
+
3300pF
–
SENSE
SENSE
100Ω
100Ω
470Ω
1000pF
LTC1159 • F13
0V = NORMAL
>3V = SHUTDOWN
VN2222LL
*COILTRONICS CTX50-5-KM
**IRC LO-3-0.02 ±5%
Figure 13. High Efficiency 15V to 40V Input 12V/5A Output Regulator
V
IN
5.5V TO 24V
47µF
25V × 2
OS-CON
1µF
WIMA
+
BAS16
BAS16
Si9435DY
Si9435DY
T*
5V
1
16
OUTPUT
•
•
P-GATE
CAP
0.33µF
2
3
4
5
6
7
8
15 0V = NORMAL
>2V = SHUTDOWN
14
V
V
SHDN2
IN
•
0.22µF
2.2µF
EXTV
CC
CC
Si9410DY
13
+
220µF
10V × 2
AVX
Si9410DY
P-DRIVE
N-GATE
P-GND
S-GND
MBRS140T3
LTC1159
1µF
100k
BAS16
+
12
11
V
C
+
CC
T
24.9k
56pF
124k
1%
1000pF
2200pF
1k
0.01µF
10
1%
1k
I
V
TH
FB
+
220µF
10V × 4
9
102k
1%
–
+
SENSE
SENSE
AVX
100Ω
BAS16
R
**
SENSE
1000pF
100Ω
0.02Ω
3.3V
OUTPUT
BAS16
LTC1159 • F14
+
*HURRICANE LAB HL-8700
**KRL SL-1-R020J
10µF
Figure 14. 17W Dual Output High Efficiency 5V and 3.3V Regulator
17
LTC1159/LTC1159-3.3/LTC1159-5
U
TYPICAL APPLICATIO S
V
12V
IN
+30% –10%
+
330
35V
NICHICON
µF
Q1
Si9435
0.1µF
1N4148
0.15µF
Q2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Si9410
P-GATE
CAP
MBRS140
V
V
SHDN2
IN
L*
100
µH
EXTV
CC
0.1µF
CC
LTC1159
P-DRIVE
3.3
N-GATE
P-GND
S-GND
1N5818
µF
V
C
I
CC
+
OUTPUT
–12V/1A
T
200pF
V
10.5k
90.5k
5V OR 3.3V
Q3
FB
150µF
TH
(SHDN1)
C
6800pF
1k
16V × 2
T
+
–
+
390pF
OS-CON
SENSE
SENSE
Q4
2N7002
SHUTDOWN
TP0610L
1000pF
20k
R
**
SENSE
100Ω
100Ω
0.05Ω
5.1V
1N5993
510k
*DALE TJ4-100-1
µ
**IRC LR2512-01-R050-J
Figure 15. High Efficiency 12V to –12V 1A Converter
18
LTC1159/LTC1159-3.3/LTC1159-5
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
G Package
20-Lead Plastic SSOP
0.278 – 0.289*
(7.07 – 7.33)
20 19 18 17 16 15 14 13 12 11
0.301 – 0.311
(7.65 – 7.90)
5
7
8
1
2
3
4
6
9 10
0.205 – 0.212*
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
0° – 8°
0.0256
(0.65)
BSC
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
0.002 – 0.008
(0.05 – 0.21)
0.010 – 0.015
(0.25 – 0.38)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
20SSOP 0694
N Package
16-Lead Plastic DIP
0.770*
(19.558)
MAX
14
12
10
9
15
13
11
16
0.255 ± 0.015*
(6.477 ± 0.381)
2
1
3
4
6
8
5
7
0.300 – 0.325
0.130 ± 0.005
0.045 – 0.065
(7.620 – 8.255)
(3.302 ± 0.127)
(1.143 – 1.651)
0.015
(0.381)
MIN
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
+0.025
–0.015
0.325
0.125
(3.175)
MIN
0.045 ± 0.015
(1.143 ± 0.381)
0.018 ± 0.003
(0.457 ± 0.076)
+0.635
8.255
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
N16 0694
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTURSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm).
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LTC1159/LTC1159-3.3/LTC1159-5
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
S Package
16-Lead Plastic SOIC
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0.150 – 0.157*
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
5
7
8
1
2
3
4
6
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0° – 8° TYP
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
0.016 – 0.050
0.406 – 1.270
SO16 0893
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
RELATED PARTS
PART NUMBER
LTC1142
LTC1143
LTC1147
LTC1148
LTC1149
LTC1174
LTC1265
LTC1267
DESCRIPTION
COMMENTS
Dual High Efficiency Synchronous Step-Down Switching Regulator
Dual High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator Controller
High Efficiency Step-Down Switching Regulator
Dual Version of LTC1148
Dual Version of LTC1147
Nonsynchronous, 8-Lead, V ≤ 16V
IN
Synchronous, V ≤ 20V
IN
Synchronous, V ≤ 48V, for Standard Threshold FETs
IN
High Efficiency Step-Down and Inverting DC/DC Converter
High Efficiency Step-Down DC/DC Converter
0.5A Switch, V ≤ 18.5V, Comparator
IN
1.2A Switch, V ≤ 13V, Comparator
IN
Dual High Efficiency Synchronous Step-Down Switching Regulators
Dual Version of LTC1159
LT/GP 1294 10K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
20
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1994
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