LTC1261CS8 [Linear]
Switched Capacitor Regulated Voltage Inverter; 开关电容稳压电压型逆变器型号: | LTC1261CS8 |
厂家: | Linear |
描述: | Switched Capacitor Regulated Voltage Inverter |
文件: | 总16页 (文件大小:313K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1261
Switched Capacitor
Regulated Voltage Inverter
U
DESCRIPTIO
EATURE
Regulated Negative Voltage from a
Single Positive Supply
Can Provide Regulated –5V from a 3V Supply
REG Pin Indicates Output is in Regulation
Low Output Ripple: 5mV Typ
Supply Current: 600µA Typ
Shutdown Mode Drops Supply Current to 5µA
Up to 15mA Output Current
Adjustable or Fixed Output Voltages
Requires Only Three or Four External Capacitors
S
F
The LTC®1261 is a switched-capacitor voltage inverter
designed to provide a regulated negative voltage from a
single positive supply. The LTC1261CS operates from a
single 3V to 8V supply and provides an adjustable output
voltage from –1.25V to –8V. An on-chip resistor string
allows the LTC1261CS to be configured for output volt-
ages of –3.5V, –4V, –4.5V or –5V with no external
components. The LTC1261CS8 is optimized for applica-
tions which use a 5V or higher supply or which require
low output voltages. It requires a single external 0.1µF
capacitorandprovidesadjustableandfixedoutputvoltage
options in 8-pin SO packages. The LTC1261CS requires
one or two external 0.1µF capacitors, depending on input
voltage. Both versions require additional external input
and output bypass capacitors. An optional compensation
capacitor at ADJ/COMP can be used to reduce the output
voltage ripple.
■
■
■
■
■
■
■
■
■
■
Available in SO-8O PaU ckages
PPLICATI
S
A
■
■
■
■
GaAs FET Bias Generators
Negative Supply Generators
Battery-Powered Systems
Single Supply Applications
Each version of the LTC1261 will supply up to 12mA
output current with guaranteed output regulation of 5%.
The LTC1261 includes an open-drain REG output which
pulls low when the output is within 5% of the set value.
Output ripple is typically as low as 5mV. Quiescent current
is typically 600µA when operating and 5µA in shutdown.
The LTC1261 is available in a 14-pin narrow body SO
package and an 8-pin SO package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
Waveforms for –4V Generator with Power Valid
–4V Generator with Power Valid
0V
OUT
5V
1
2
3
4
8
7
6
5
5V
V
SHDN
REG
CC
10k
–4V
+
C1
POWER VALID
5V
C1
1µF
C2
0.1µF
LTC1261-4
SHDN
V
= –4V
–
OUT
C1
OUT
0V
AT 10mA
C4
3.3µF
5V
POWER VALID
0V
+
GND
COMP
C3*
100pF
*OPTIONAL
LTC1261 • TA01
0.2mS/DIV
LTC1261 • TAO2
1
LTC1261
W W W
U
ABSOLUTE AXI U RATI GS
/O
PACKAGE RDER I FOR ATIO
(Note 1)
ORDER PART
Supply Voltage (Note 2)............................................ 9V
Output Voltage (Note 5).............................. 0.3V to –9V
Total Voltage, VCC to VOUT (Note 2) ........................ 12V
Input Voltage
SHDN Pin ................................. –0.3V to VCC + 0.3V
REG Pin ............................................... –0.3V to 12V
ADJ, RO, R1, RADJ ............... VOUT – 0.3V to VCC + 0.3V
Output Short-Circuit Duration......................... Indefinite
Operating Temperature Range
Commercial ............................................ 0°C to 70°C
Extended Commercial (Note 7).......... –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
NUMBER
V
1
2
3
4
8
7
6
5
SHDN
CC
+
LTC1261CS8
LTC1261CS8-4
LTC1261CS8-4.5
C1
C1
REG
–
OUT
GND
ADJ (COMP*)
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
*FOR FIXED VERSIONS
1261
12614
126145
TJMAX = 150°C, θJA = 150°C/W
ORDER PART
NUMBER
TOP VIEW
NC
+
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
C1
SHDN
REG
OUT
ADJ
LTC1261CS
–
+
–
C1
C2
C2
GND
R0
R
ADJ
8
R1
S PACKAGE
14-LEAD PLASTIC SO
T
JMAX = 150°C, θJA = 110°C/W
Consult factory for Industrial or Military grade parts.
VCC = 3V to 6.5V, TA = 25°C unless otherwise specified.
ELECTRICAL CHARACTERISTICS
0
°
C
≤
T
≤
70
°C
–40°C ≤ T ≤ 85°C
A
A
(Note 7)
TYP MAX UNITS
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
V
Reference Voltage
Supply Current
●
1.20
1.24
1.28
1.20
1.24
1.28
V
REF
I
No Load, SHDN Floating, Doubler Mode
No Load, SHDN Floating, Tripler Mode
●
●
●
600
900
5
1000
1500
20
600
900
5
1500
2000
20
µA
µA
µA
S
No Load, V
= V
CC
SHDN
f
Internal Oscillator Frequency
Power Efficiency
REG Output Low Voltage
REG Sink Current
550
65
0.1
550
65
0.1
kHz
%
V
OSC
P
V
EFF
OL
I
= 1mA
●
0.8
1
0.8
1
REG
I
V
V
V
= 0.8V, V = 3.3V
= 0.8V, V = 5.0V
●
●
5
8
8
15
0.01
5
8
8
15
0.01
mA
mA
µA
V
REG
REG
REG
CC
CC
I
Adjust Pin Current
= 1.24V
●
●
●
●
ADJ
ADJ
V
V
I
t
SHDN Input High Voltage
SHDN Input Low Voltage
SHDN Input Current
Turn-On Time
2
2
IH
IL
0.8
20
0.8
25
V
µA
µs
V
= V
CC
5
5
IN
ON
SHDN
I
= 15mA
500
500
OUT
2
LTC1261
ELECTRICAL CHARACTERISTICS
Doubler Mode. VCC = 5V ±10%, C1 = 0.1µF, C2 = 0 (Note 4), COUT = 3.3µF unless otherwise specified.
70
0
°C
≤
T
≤
°C
–40°C ≤ T ≤ 85°C
A
A
(Note 7)
TYP
SYMBOL PARAMETER
CONDITIONS (Note 2)
MIN
TYP
MAX
MIN
MAX
5
UNITS
∆V
Output Regulation
(Note 2)
–1.24V ≥ V
–1.24V ≥ V
≥ –4V, 0 ≤ I
≥ –4V, 0 ≤ I
≤ 8mA
≤ 7mA
●
●
1
5
%
%
%
OUT
OUT
OUT
OUT
OUT
1
2
–4V ≥ V
≥ –5V, 0 ≤ I
≤ 8mA (Note 6)
2
60
5
OUT
OUT
I
Output Short-Circuit Current
Output Ripple Voltage
V
= 0V
●
125
60
5
125
mA
mV
SC
OUT
OUT
V
I
= 5mA, V
= –4V
OUT
RIP
LTC1261CS Only. Tripler Mode. VCC = 2.7V, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
70 –40°C ≤ T ≤ 85°C
A
0
°C
≤
T
≤
°
C
A
(Note 7)
TYP
SYMBOL PARAMETER
CONDITIONS (Note 2)
–1.24V ≥ V ≥ –4V, 0 ≤ I ≤ 5mA
OUT
MIN
TYP
1
MAX
5
MIN
MAX
5
UNITS
%
∆V
Output Regulation
●
●
1
60
5
OUT
OUT
I
V
Output Short-Circuit Current
Output Ripple Voltage
V
I
= 0V
= 5mA, V
60
5
125
125
mA
mV
SC
OUT
OUT
= –4V
OUT
RIP
LTC1261CS Only. Tripler Mode. VCC = 3.3V ±10%, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
70 –40°C ≤ T ≤ 85°C
A
0
°C
≤
T
≤
°
C
A
(Note 7)
TYP
SYMBOL PARAMETER
CONDITIONS (Note 2)
–1.24V ≥ V ≥ –4.5V, 0 ≤ I ≤ 6mA
OUT
MIN
TYP
MAX
MIN
MAX
UNITS
∆V
Output Regulation
(Note 2)
●
●
1
2
5
5
1
2
5
%
%
OUT
OUT
–4.5V ≥ V
≥ –5V, 0 ≤ I
≤ 3.5mA
OUT
OUT
I
Output Short-Circuit Current
Output Ripple Voltage
V
= 0V
●
35
5
75
35
5
75
mA
mV
SC
OUT
OUT
V
I
= 5mA, V
= –4V
OUT
RIP
LTC1261CS Only. Tripler Mode. VCC = 5V ±10%, C1 = C2 = 0.1µF (Note 4), COUT = 3.3µF unless otherwise specified.
70 –40°C ≤ T ≤ 85°C
A
0
°C
≤
T
≤
°
C
A
(Note 7)
TYP
SYMBOL PARAMETER
CONDITIONS (Note 2)
–1.24V ≥ V ≥ –4V, 0 ≤ I ≤ 12mA
OUT
MIN
TYP
MAX
MIN
MAX
5
5
UNITS
∆V
Output Regulation
●
●
1
2
5
5
1
2
%
%
OUT
OUT
–4V ≥ V
≥ –5V, 0 ≤ I
≤ 10mA
OUT
OUT
I
V
Output Short-Circuit Current
Output Ripple Voltage
V
I
= 0V
= 5mA, V
●
35
5
75
35
5
75
mA
mV
SC
OUT
OUT
= –4V
OUT
RIP
–
–
+
to C2 with C1 and C2 floating. For the LTC1261CS8 in doubler mode,
The
● denotes specifications which apply over the full operating
+
–
C1 connects from C1 to C1 ; there are no C2 pins.
temperature range.
Note 5: Setting output to <–7V will exceed the absolute voltage maximum
rating with a 5V supply. With supplies higher than 5V, the output should
Note 1: The Absolute Maximum Ratings are those values beyond which
the life of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
never be set to exceed V – 12V.
CC
Note 6: For output voltages below –4.5V the LTC1261 may reach 50%
duty cycle and fall out of regulation with heavy load or low input voltages.
Beyond this point, the output will follow the input with no regulation.
Note 3: All typicals are given at T = 25°C.
A
Note 7: C grade device specifications are guaranteed over the 0°C to 70°C
temperature range. In addition, C grade device specifications are assured
over the –40°C to 85°C temperature range by design or correlation, but
are not production tested.
Note 4: C1 = C2 = 0.1µF means the specifications apply to tripler mode
where V – V
= 3V (LTC1261CS only; the LTC1261CS8 cannot be
CC
OUT
CC
+
–
connected in tripler mode) with C1 connected between C1 and C1 and
C2 connected between C2 and C2 . C2 = 0 implies doubler mode where
+
–
+
V
CC
– V = 2V ; for the LTC1261CS this means C1 connects from C1
OUT CC
3
LTC1261
TYPICAL PERFORMANCE CHARACTERISTICS (See Test Circuits)
W
U
Output Voltage
vs Output Current
Output Voltage (Doubler Mode)
vs Supply Voltage
Output Voltage (Tripler Mode)
vs Supply Voltage
–3.5
–3.6
–3.7
–3.8
–3.9
–4.0
–4.1
–4.2
–4.3
–4.4
–4.5
–3.5
–3.6
–3.7
–3.8
–3.9
–4.0
–4.1
–4.2
–4.3
–4.4
–4.5
–3.5
–3.6
–3.7
–3.8
–3.9
–4.0
–4.1
–4.2
–4.3
–4.4
–4.5
T
= 25°C
A
V
= 5V
CC
DOUBLER MODE
T
= 85°C
T
= 85°C
A
A
T = 25°C
A
T
= 25°C
V
= 3.3V
A
CC
TRIPLER MODE
T
= –40°C
A
T
= –40°C
A
3
5
6
5.0 5.2 5.4 5.6 5.8 6.0 6.2 6.4 6.6 6.8 7.0
SUPPLY VOLTAGE (V)
4
7
0
1
2
3
4
5
6
7
8
9
10
SUPPLY VOLTAGE (V)
OUTPUT CURRENT (mA)
LT1261 • TP02
LT1261 • TP01
LTC1261 • TPC03
Maximum Output Current
vs Supply Voltage
Supply Current
vs Supply Voltage
Supply Current
vs Temperature
1200
1000
900
800
700
600
500
1200
1000
900
50
40
30
20
V
A
= –4V ±5%
OUT
V
A
= –4V
V
= –4V
OUT
= 25°C
OUT
T
= 25°C
T
TRIPLER MODE
V
= 5V
CC
DOUBLER MODE
800
DOUBLER MODE
TRIPLER MODE
V
= 3.3V
700
600
500
CC
TRIPLER MODE
DOUBLER MODE
10
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
SUPPLY VOLTAGE (V)
40
80
100
3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0
SUPPLY VOLTAGE (V)
–40 –20
0
20
60
TEMPERATURE (˚C)
LTC1261 • TPC04
LTC1261 • TPC05
LTC1261 • TPC06
TEST CIRCUITS
Tripler Mode
V
IN
= 3.3V
10µF
Doubler Mode
+
14
1
2
3
4
8
7
6
5
V
SHDN
REG
V
5V
CC
CC
2
3
4
5
10
9
+
–
C1
ADJ
+
C1
0.1µF
+
LTC1261-4
10µF
0.1µF
C1
R
ADJ
–
V
= –4V ±5%
C1
OUT
OUT
LTC1261CS
8
+
C2
R1
3.3µF
+
GND
COMP
0.1µF
7
–
C2
R0
LTC1261 • TCO1
11
V
= –4V ±5%
OUT
OUT
GND
6
3.3µF
+
LTC1261 • TC02
4
LTC1261
U
U
U
PIN FUNCTIONS
Pin numbers are shown as (LTC1261CS/LTC1261CS8).
be used if it can provide the required output voltage.
Typically the resistor string should draw≥10µA from the
output to minimize errors due to the bias current at the
adjust pin. Fixed output parts have the internal resistor
string connected to this pin inside the package. The pin
can be used to trim the output voltage if desired. It can
also be used as an optional feedback compensation pin
to reduce output ripple on both adjustable and fixed
output voltage parts. See Applications Information sec-
tion for more information on compensation and output
ripple.
NC (Pin 1/NA): No Internal Connection.
C1+ (Pin 2/Pin 2): C1 Positive Input. Connect a 0.1µF
capacitor between C1+ and C1–. With the LTC1261CS in
doubler mode, connect a 0.1µF capacitor from C1+ to
C2–.
C1– (Pin 3/Pin 3): C1 Negative Input. Connect a 0.1µF
capacitor from C1+ to C1–. With the LTC1261CS in
doubler mode only, C1– should float.
C2+ (Pin 4/NA): C2 Positive Input. In tripler mode con-
nect a 0.1µF capacitor from C2+ to C2–. This pin is used
with the LTC1261CS in tripler mode only; in doubler
mode this pin should float.
C2– (Pin 5/NA): C2 Negative Input. In tripler mode
connect a 0.1µF capacitor from C2+ to C2–. In doubler
mode connect a 0.1µF capacitor from C1+ to C2–.
OUT (Pin 11/Pin 6): Negative Voltage Output. This pin
must be bypassed to ground with a 1µF or larger capaci-
tor; it must be at least 3.3µF to provide specified output
ripple. The size of the output capacitor has a strong effect
on output ripple. See the Applications Information sec-
tion for more details.
REG(Pin12/Pin7):Thisisanopendrainoutputthatpulls
low when the output voltage is within 5% of the set value.
It will sink 8mA to ground with a 5V supply. The external
circuitry must provide a pull-up or REG will not swing
high. The voltage at REG may exceed VCC and can be
pulled up to 12V above ground without damage.
GND (Pin 6/Pin 4): Ground. Connect to a low impedance
ground. A ground plane will help to minimize regulation
errors.
R0 (Pin 7/NA): Internal Resistor String, 1st Tap. See
Table 2 in the Applications Information section for infor-
mation on internal resistor string pin connections vs
output voltage.
SHDN (Pin 13/Pin 8): Shutdown. When this pin is at
ground the LTC1261 operates normally. An internal 5µA
pull-down keeps SHDN low if it is left floating. When
SHDN is pulled high, the LTC1261 enters shutdown
mode. In shutdown the charge pump stops, the output
collapses to 0V and the quiescent current drops to 5µA
typically.
R1 (Pin 8/NA): Internal Resistor String, 2nd Tap.
RADJ (Pin 9/NA): Internal Resistor String Output. Con-
nect this pin to ADJ to use the internal resistor divider.
See Table 2 in the Applications Information section for
informationoninternalresistorstringpinconnectionsvs
output voltage.
VCC (Pin 14/Pin 1): Power Supply. This requires an input
voltage between 3V and 6.5V. Certain combinations of
output voltage and operating mode may place additional
restrictions on the input voltage. VCC must be bypassed
to ground with at least a 0.1µF capacitor placed in close
proximity to the chip. See the Applications Information
section for details.
ADJ (COMP for fixed versions) (Pin 10/Pin 5): Output
Adjust/Compensation Pin. For adjustable parts this pin is
used to set the output voltage. The output voltage should
be divided down with a resistor divider and fed back to
this pin to set the regulated output voltage. The resistor
divider can be external or the internal divider string can
5
LTC1261
U
W U U
APPLICATIONS INFORMATION
MODES OF OPERATION
however, with supply voltages above 4V in tripler mode
andabove6Vindoublermode. Astheinputsupplyvoltage
rises the allowable output voltage drops, finally reaching
–4V with an 8.5V supply. To avoid this problem use
doubler mode whenever possible with high input supply
voltages.
The LTC1261 uses a charge pump to generate a negative
output voltage that can be regulated to a value either
higher or lower than the original input voltage. It has two
modes of operation: a “doubler” inverting mode, which
can provide a negative output equal to or less than the
positive power supply and a “tripler” inverting mode,
whichcanprovidenegativeoutputvoltageseitherlargeror
smallerinmagnitudethantheoriginalpositivesupply.The
tripler offers greater versatility and wider input range but
requires four external capacitors and a 14-pin package.
The doubler offers the SO-8 package and requires only
three external capacitors.
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
+
–
+
+
–
+
C1
C1
C1
C1
C1
C2
C1
1
2
3
4
8
7
6
5
C2 LTC1261
C2 LTC1261
+
–
–
–
C1
C1
C2
C2
C1
LTC1261
8
8
a.) LTC1261CS8
DOUBLER MODE
b.) LTC1261CS
DOUBLER MODE
c.) LTC1261CS
TRIPLER MODE
Doubler Mode
LTC1261 • F01
Figure 1. Flying Capacitor Connections
Doubler mode allows the LTC1261 to generate negative
outputvoltagemagnitudesuptothatofthesupplyvoltage,
creatingavoltagebetweenVCC andOUTofuptotwotimes
VS. In doubler mode the LT1261 uses a single flying
capacitor to invert the input supply voltage, and the output
voltage is stored on the output bypass capacitor between
switch cycles. The LTC1261CS8 is always configured in
doubler mode and has only one pair of flying capacitor
pins (Figure 1a). The LTC1261CS can be configured in
doubler mode by connecting a single flying capacitor
between the C1+ and C2– pins. C1– and C2+ should be left
floating (Figure 1b).
THEORY OF OPERATION
A block diagram of the LTC1261 is shown in Figure 2. The
heart of the LTC1261 is the charge pump core shown in
the dashed box. It generates a negative output voltage by
first charging the flying capacitors between VCC and
ground. It then stacks the flying capacitors on top of each
other and connects the top of the stack to ground forcing
the bottom of the stack to a negative voltage. The charge
ontheflyingcapacitorsistransferredtotheoutputbypass
capacitor, leaving it charged to the negative output volt-
age. This process is driven by the internal clock.
Tripler Mode
The LTC1261CS can be used in a tripler mode which can
generate negative output voltages up to twice the supply
voltage. The total voltage between the VCC and OUT pins
can be up to three times VS. For example, tripler mode can
be used to generate –5V from a single positive 3.3V
supply. Tripler mode requires two external flying capaci-
tors. The first connects between C1+ and C1– and the
second between C2+ and C2– (Figure 1c). Because of the
relativelyhighvoltagesthatcanbegeneratedinthismode,
care must be taken to ensure that the total input-to-output
voltage never exceeds 12V or the LTC1261 may be dam-
aged. In most applications the output voltage will be kept
in check by the regulation loop. Damage is possible
Figure 2 shows the charge pump configured in tripler
mode. With the clock low, C1 and C2 are charged to VCC
byS1, S3, S5andS7. Atthenextrisingclockedge, S1, S3,
S5 and S7 open and S2, S4 and S6 close, stacking C1 and
C2 on top of each other. S2 connects C1+ to ground, S4
connects C1– to C2+ and C2– is connected to the output
by S6. The charge in C1 and C2 is transferred to COUT
,
setting it to a negative voltage. Doubler mode works the
same way except that the single flying capacitor (C1) is
connected between C1+ and C2–. S3, S4 and S5 don’t do
anything useful in doubler mode. C1 is charged initially by
S1 and S7 and connected to the output by S2 and S6.
6
LTC1261
U
W U U
APPLICATIONS INFORMATION
V
CC
CLK
550kHz
S1
S5
OUT
+
C
OUT
+
+
124k
C1
C2
S
R *
ADJ
Q
C1
C2
S4
S6
–
–
226k
100k
50k
R
S2
C1
C2
R1*
R0*
INTERNALLY
CONNECTED FOR
FIXED OUTPUT
VOLTAGE PARTS
S3
S7
ADJ/COMP
+
COMP 1
REG
+
–
–
COMP 2
60mV
1.18V
*LTC1261CS14 ONLY
V
= 1.24V
REF
LTC1261 • F02
V
OUT
Figure 2. Block Diagram
The output voltage is monitored by COMP1 which com-
pares a divided replica of the output at ADJ (COMP for
fixed output parts) to the internal reference. At the begin-
ning of a cycle the clock is low, forcing the output of the
AND gate low and charging the flying capacitors. The next
rising clock edge sets the RS latch, setting the charge
pump to transfer charge from the flying capacitors to the
output capacitor. As long as the output is below the set
point, COMP1 stays low, the latch stays set and the charge
pump runs at the full 50% duty cycle of the clock gated
through the AND gate. As the output approaches the set
voltage, COMP1 will trip whenever the divided signal
exceeds the internal 1.24V reference relative to OUT. This
resets the RS latch and truncates the clock pulses, reduc-
ing the amount of charge transferred to the output capaci-
torandregulatingtheoutputvoltage. Iftheoutputexceeds
the set point, COMP1 stays high, inhibiting the RS latch
and disabling the charge pump.
COMP2 also monitors the divided signal at ADJ but it is
connected to a 1.18V reference, 5% below the main
reference voltage. When the divided output exceeds this
lower reference voltage indicating that the output is within
5% of the set value, COMP2 goes high turning on the REG
output transistor. This is an open drain N-channel device
capable of sinking 5mA with a 3.3V VCC and 8mA with a 5V
VCC. When in the “off” state (divided output more than 5%
below VREF) the drain can be pulled above VCC without
damage up to a maximum of 12V above ground. Note that
the REG output only indicates if the magnitude of the
output is below the magnitude of the set point by 5% (i.e.,
VOUT > –4.75Vfora –5Vsetpoint). Ifthemagnitudeofthe
outputisforced higher thanthemagnitudeofthesetpoint
( i.e., to –6V when the output is set for –5V) the REG
output will stay low.
7
LTC1261
U
W U U
APPLICATIONS INFORMATION
OUTPUT RIPPLE
To prevent this from happening, an external capacitor can
be connected from ADJ (or COMP for fixed output parts)
to ground to compensate for external parasitics and in-
crease the regulation loop bandwidth (Figure 3). This
sounds counterintuitive until we remember that the inter-
nalreferenceisgeneratedwithrespecttoOUT,notground.
Output ripple in the LTC1261 comes from two sources;
voltage droop at the output capacitor between clocks and
frequency response of the regulation loop. Voltage droop
is easy to calculate. With a typical clock frequency of
550kHz, the charge on the output capacitor is refreshed
once every 1.8µs. With a 15mA load and a 3.3µF output
capacitor, the output will droop by:
TO CHARGE
PUMP
RESISTORS ARE
INTERNAL FOR
FIXED OUTPUT PARTS
1.8µs
3.3µF
∆t
OUT
I
×
= 15mA ×
= 8.2mV
LOAD
)
)
)
C
)
COMP 1
This can be a significant ripple component when the
output is heavily loaded, especially if the output capacitor
is small. If absolute minimum output ripple is required, a
10µF or greater output capacitor should be used.
C
C
R1
R2
100pF
ADJ/COMP
+
–
REF
1.24V
V
OUT
Regulation loop frequency response is the other major
contributor to output ripple. The LTC1261 regulates the
output voltage by limiting the amount of charge trans-
ferred to the output capacitor on a cycle-by-cycle basis.
The output voltage is sensed at the ADJ pin (COMP for
fixed output versions) through an internal or external
resistor divider from the OUT pin to ground. As the flying
capacitors are first connected to the output, the output
voltage begins to change quite rapidly. As soon as it
exceeds the set point COMP1 trips, switching the state of
the charge pump and stopping the charge transfer. Be-
cause the RC time constant of the capacitors and the
switches is quite short, the ADJ pin must have a wide AC
bandwidth to be able to respond to the output in time.
External parasitic capacitance at the ADJ pin can reduce
the bandwidth to the point where the comparator cannot
respond by the time the clock pulse finishes. When this
happens the comparator will allow a few complete pulses
through, then overcorrect and disable the charge pump
until the output drops below the set point. Under these
conditions the output will remain in regulation but the
output ripple will increase as the comparator “hunts” for
the correct value.
LTC1261 • F03
Figure 3. Regulator Loop Compensation
The feedback loop actually sees ground as its “output,”
thus the compensation capacitor should be connected
across the “top” of the resistor divider, from ADJ (or
COMP) to ground. By the same token, avoid adding
capacitance between ADJ (or COMP) and VOUT. This will
slow down the feedback loop and increase output ripple.
A 100pF capacitor from ADJ or COMP to ground will
compensate the loop properly under most conditions.
OUTPUT FILTERING
If extremely low output ripple (<5mV) is required, addi-
tional output filtering is required. Because the LTC1261
uses a high 550kHz switching frequency, fairly low value
RC or LC networks can be used at the output to effectively
filter the output ripple. A 10Ω series output resistor and a
3.3µFcapacitorwillcutoutputrippletobelow3mV(Figure
4). Further reductions can be obtained with larger filter
capacitors or by using an LC output filter.
8
LTC1261
U
W U U
APPLICATIONS INFORMATION
output with each clock cycle. The smaller capacitors
draw smaller pulses of current out of VCC as well, limiting
peak currents and reducing the demands on the input
supply. Table 1 shows recommended values of flying
capacitor vs maximum load capacity.
5V
1µF
V
CC
10Ω
2
3
6
5
+
V
OUT
= –4V
C1
OUT
0.1µF
LTC1261CS8-4
–
3.3µF
3.3µF
Table 1. Typical Max Load (mA) vs Flying Capacitor Value at
TA = 25°C, VOUT = –4V
+
+
C1
COMP
GND
100pF
FLYING
CAPACITOR
4
MAX LOAD (mA)
MAX LOAD (mA)
LTC1261 • F04
VALUE (µF)
V
CC
= 5V DOUBLER MODE V = 3.3V TRIPLER MODE
CC
0.1
22
16
8
20
15
11
5
Figure 4. Output Filter Cuts Ripple Below 3mV
0.047
0.033
0.022
0.01
CAPACITOR SELECTION
Capacitor Sizing
4
1
3
The performance of the LTC1261 can be affected by the
capacitors it is connected to. The LTC1261 requires by-
pass capacitors to ground for both the VCC and OUT pins.
The input capacitor provides most of LTC1261’s supply
current while it is charging the flying capacitors. This
capacitor should be mounted as close to the package as
possible and its value should be at least five times larger
than the flying capacitor. Ceramic capacitors generally
provide adequate performance but avoid using a tantalum
capacitor as the input bypass unless there is at least a
0.1µF ceramic capacitor in parallel with it. The charge
pump capacitors are somewhat less critical since their
peak currents are limited by the switches inside the
LTC1261. Most applications should use 0.1µF as the
flying capacitor value. Conveniently, ceramic capacitors
are the most common type of 0.1µF capacitor and they
work well here. Usually the easiest solution is to use the
same capacitor type for both the input bypass and the
flying capacitors.
The output capacitor performs two functions: it provides
output current to the load during half of the charge pump
cycle and its value helps to set the output ripple voltage.
For applications that are insensitive to output ripple, the
outputbypasscapacitorcanbeassmallas1µF.Toachieve
specified output ripple with 0.1µF flying capacitors, the
output capacitor should be at least 3.3µF. Larger output
capacitors will reduce output ripple further at the expense
of turn-on time.
Capacitor ESR
Output capacitor Equivalent Series Resistance (ESR) is
another factor to consider. Excessive ESR in the output
capacitor can fool the regulation loop into keeping the
outputartificiallylowbyprematurelyterminatingthecharg-
ing cycle. As the charge pump switches to recharge the
output a brief surge of current flows from the flying
capacitors to the output capacitor. This current surge can
be as high as 100mA under full load conditions. A typical
3.3µF tantalum capacitor has 1Ω or 2Ω of ESR; 100mA ×
2Ω = 200mV. If the output is within 200mV of the set point
this additional 200mV surge will trip the feedback com-
parator and terminate the charging cycle. The pulse dissi-
pates quickly and the comparator returns to the correct
state, but the RS latch will not allow the charge pump to
responduntilthenextclockedge.Thispreventsthecharge
In applications where the maximum load current is well-
definedandoutputrippleiscriticalorinputpeakcurrents
need to be minimized, the flying capacitor values can be
tailored to the application. Reducing the value of the
flying capacitors reduces the amount of charge trans-
ferredwitheachclockcycle. Thislimitsmaximumoutput
current, but also cuts the size of the voltage step at the
9
LTC1261
U
W U U
APPLICATIONS INFORMATION
Most of this resistance is already provided by the internal
switchesintheLTC1261(especiallyintriplermode).More
than 1Ω or 2Ω of ESR on the flying capacitors will start to
affect the regulation at maximum load.
pump from going into very high frequency oscillation
under such conditions but it also creates an output error
as the feedback loop regulates based on the top of the
spike, not the average value of the output (Figure 5). The
resulting output voltage behaves as if a resistor of value
C
ESR ×(IPK/IAVE)Ωwasplacedinserieswiththeoutput.To
RESISTOR SELECTION
avoid this nasty sequence of events connect a 0.1µF
ceramic capacitor in parallel with the larger output capaci-
tor. The ceramic capacitor will “eat” the high frequency
spike, preventing it from fooling the feedback loop, while
thelargerbutslowertantalumoraluminumoutputcapaci-
tor supplies output current to the load between charge
cycles.
Resistor selection is easy with the fixed output versions of
the LTC1261—no resistors are needed! Selecting the
right resistors for the adjustable parts is only a little more
difficult. A resistor divider should be used to divide the
signal at the output to give 1.24V at the ADJ pin with
respect to VOUT (Figure 6). The LTC1261 uses a positive
reference with respect to VOUT, not a negative reference
with respect to ground (Figure 2 shows the reference
connection). Besuretokeepthisinmindwhenconnecting
the resistors! If the initial output is not what you expected,
try swapping the two resistors.
CLOCK
V
V
SET
OUT
AVERAGE
LOW ESR
V
OUT
OUT
OUTPUT CAP
COMP1
OUTPUT
6 (4*)
GND
V
V
SET
R1
R2
LTC1261
ADJ
10 (5*)
OUT
AVERAGE
HIGH ESR
V
OUTPUT CAP
11 (6*)
R1 + R2
R2
V
= –1.24V
OUT
OUT
(
)
COMP1
OUTPUT
LTC1261 • F05
*LTC1261CS8
LTC1261 • F06
Figure 6. External Resistor Connections
Figure 5. Output Ripple with Low and High ESR Capacitors
Note that ESR in the flying capacitors will not cause the
same condition; in fact, it may actually improve the situa-
tion by cutting the peak current and lowering the ampli-
tude of the spike. However, more flying capacitor ESR is
not necessarily better. As soon as the RC time constant
approaches half of a clock period (the time the capacitors
have to share charge at full duty cycle) the output current
capability of the LTC1261 will begin to diminish. For 0.1µF
flying capacitors, this gives a maximum total series resis-
tance of:
The 14-pin adjustable parts include a built-in resistor
stringwhichcanprovideanassortmentofoutputvoltages
by using different pin-strapping options at the R0, R1, and
RADJ pins (Table 2). The internal resistors are roughly
124k, 226k, 100k, and 50k (see Figure 2) giving output
options of –3.5V, –4V, –4.5V, and –5V. The resistors are
carefully matched to provide accurate divider ratios, but
the absolute values can vary substantially from part to
part. It is not a good idea to create a divider using an
external resistor and one of the internal resistors unless
the output voltage accuracy is not critical.
t
1
2
1
2
1
CLK
=
/ 0.1µF = 9.1Ω
)
C
)
)
)
550kHz
FLY
10
LTC1261
U
W U U
APPLICATIONS INFORMATION
Table 2. Output Voltages Using the Internal Resistor Divider
able. The output voltage can be trimmed, if desired, by
connecting external resistance from the COMP pin to OUT
or ground to alter the divider ratio. As in the adjustable
parts, the absolute value of the internal resistors may vary
significantly from unit to unit. As a result, the further the
trim shifts the output voltage the less accurate the output
voltage will be. If a precise output voltage other than one
of the available fixed voltages is required, it is better to use
an adjustable LTC1261 and use precision external resis-
tors. The internal reference is trimmed at the factory to
within 3.5% of 1.24V; with 1% external resistors the
output will be within 5.5% of the nominal value, even
under worst case conditions.
PIN CONNECTIONS
ADJ to R
OUTPUT VOLTAGE
–5V
ADJ
ADJ to R , R0 to GND
–4.5V
ADJ
ADJ to R , R1 to R0
–4V
ADJ
ADJ to R , R1 to GND
–3.5V
ADJ
ADJ to R1
ADJ to R0
ADJ to GND
–1.77V
–1.38V
–1.24V
There are some oddball output voltages available by
connecting ADJ to R0 or R1 and shorting out some of the
internal resistors. If one of these combinations gives you
the output voltage you want, by all means use it!
The LTC1261 can be internally configured with nonstand-
ard fixed output voltages. Contact the Linear Technology
Marketing Department for details.
The internal resistor values are the same for the fixed
output versions of the LTC1261 as they are for the adjust-
U
TYPICAL APPLICATIONS N
3.3V Input, –4.5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
V
BAT
3.3V
1µF
SHUTDOWN
10k
14
V
CC
SHDN
2
3
4
5
8
13
12
11
10
9
+
C1
C1
C2
C2
R1
0.1µF
0.1µF
–
REG
LTC1261
–4.5V BIAS
+
OUT
GaAs
TRANSMITTER
3.3µF
+
–
ADJ
NC
R
ADJ
LTC1261 • TA03
R0
GND
100pF
7
6
11
LTC1261
TYPICAL APPLICATIONS N
U
5V Input, –4V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
V
BAT
SHUTDOWN
10k
1
2
8
7
6
5
5V
V
SHDN
REG
CC
+
C1
LTC1261-4
1µF
0.1µF
3
4
–4V BIAS
–
C2
OUT
GaAs
TRANSMITTER
3.3µF
GND
COMP
+
100pF
LTC1261 • TA04
7 Cells to –1.24V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
V
= 8.4V
BAT
(7 NiCd CELLS)
SHUTDOWN
10k
1
2
3
4
8
7
6
5
V
SHDN
REG
CC
+
C1
C2
LTC1261
1µF
0.1µF
–1.24V BIAS
–
OUT
ADJ
GaAs
TRANSMITTER
3.3µF
GND
+
LTC1261 • TA05
1mV Ripple, 5V Input, –4V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
V
BAT
SHUTDOWN
10k
1
2
8
7
6
5
5V
V
SHDN
REG
CC
+
C1
LTC1261-4
1µF
0.1µF
100µH
3
4
–4V BIAS
–
C2
OUT
GaAs
TRANSMITTER
10µF
10µF
GND
COMP
+
+
100pF
LTC1261 • TA06
12
LTC1261
U
TYPICAL APPLICATIONS N
High Supply Voltage, –5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
8V ≤ V
≤ 12V
BAT
1N4733A
5.1V
1µF
10k
SHUTDOWN
14
V
CC
SHDN
2
3
4
5
8
13
+
C1
C1
C2
C2
R1
0.1µF
12
11
10
9
–
REG
LTC1261
–5V BIAS
+
OUT
GaAs
TRANSMITTER
0.1µF
3.3µF
–
+
ADJ
NC
NC
R
ADJ
LTC1261 • TA07
R0
GND
100pF
7
6
Low Output Voltage Generator
–5V Supply Generator
3V ≤ V ≤ 7V
5V
CC
1µF
1µF
1
14
100pF
R
S
V
CC
V
5
6
CC
2
3
4
5
10
9
100pF
ADJ
+
–
C1
C1
C2
C2
ADJ
2
3
+
C1
0.1µF
0.1µF
0.1µF
LTC1261
124k
R
ADJ
–
C1
LTC1261
8
+
R1
R0
NC
NC
V
OUT
= V – 10µA (R + 124k)
CC S
OUT
= –0.5V (R = 426k)
GND
4
S
7
–
3.3µF
1N5817
+
= –1V (R = 476k)
S
11
–5V ±5%
AT 10mA
LTC1261 • TA10
OUT
GND
6
3.3µF
+
LTC1261 • TA09
Minimum Parts Count –4V Generator
1
2
3
4
8
7
6
5
5V
V
SHDN
REG
CC
+
C1
LTC1261-4
1µF
0.1µF
V
= –4V
–
OUT
C1
OUT
at 10mA
3.3µF
GND
COMP
+
LTC1261 • TA12
13
LTC1261
U
TYPICAL APPLICATIONS N
This circuit uses the LTC1261CS8 to generate a –1.24V
output at 20mA. Attached to this output is a 312Ω resistor
to make the current/voltage conversion. 4mA through
312Ω generates 1.24V, giving a net 0V output. 20mA
through312Ωgives6.24Vacrosstheresistor, givinganet
5V output. If the 4mA to 20mA source requires an operat-
ing voltage greater than 8V, it should be powered from a
separate supply; the LTC1261 can then be powered from
any convenient supply, 3V ≤ VS ≤ 8V. The Schottky diode
preventstheexternalvoltagefromdamagingtheLTC1261
in shutdown or under fault conditions. The LTC1261’s
reference is trimmed to 3.5% and the resistor adds 1%
uncertainty, giving 4.5% total output error.
–1.24V Generator for 4mA-20mA to 0V-5V Conversion
OPTIONAL
INPUT
PROTECTION
DIODES
8V
+
–
4mA
TO 20mA
SENSOR
1µF
0V TO 5V
±5%
1
312Ω
1%
V
CC
6
2
3
+
–
–1.24V
OUT
C1
3.3µF
0.1µF
LTC1261
+
5
1N5817
ADJ
C1
GND
4
LTC1261 • TA11
14
LTC1261
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
PACKAGE DESCRIPTION
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
5
8
6
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.053 – 0.069
3
4
2
0.010 – 0.020
(0.254 – 0.508)
× 45°
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 0996
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 – 0.344*
(8.560 – 8.738)
13
12
11
10
9
8
14
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157**
(3.810 – 3.988)
1
2
3
4
5
6
7
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0° – 8° TYP
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
0.016 – 0.050
0.406 – 1.270
S14 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LTC1261
TYPICAL APPLICATION
U
5V Input, –0.5V Output GaAs FET Bias Generator
P-CHANNEL
POWER SWITCH
V
BAT
SHUTDOWN
5V
42.2k
10k
1
2
3
4
8
7
6
5
V
SHDN
REG
CC
+
C1
C2
–0.5V BIAS
LTC1261
1µF
0.1µF
±5.5%
–
OUT
ADJ
GaAs
12.4k
TRANSMITTER
GND
3.3µF
+
100pF
LTC1261 • TA08
RELATED PARTS
PART NUMBER
LTC1550/LTC1551
LTC1429
DESCRIPTION
Low Noise Switched Capacitor Regulated Voltage Inverter
Clock Synchronized Switched Capacitor Regulated Voltage Inverter GaAs FET Bias
Micropower Low Dropout Regulators with Shutdown 0.4V Dropout Voltage at 150mA, Low Noise,
Switched Capacitor Regulated Voltage Inverter
COMMENTS
GaAs FET Bias with Linear Regulator 1mV Ripple
LT1121
1261fa LT/TP 0198 REV A 4K • PRINTED IN USA
Linear Technology Corporation
●
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900
16
●
●
FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1994
相关型号:
LTC1261CS8#TR
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LTC1261CS8#TRPBF
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LTC1261CS8-4#TRPBF
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LTC1261CS8-4.5#PBF
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LTC1261CS8-4.5#TRPBF
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
Linear
LTC1261CS84.5
IC SWITCHED CAPACITOR REGULATOR, 550 kHz SWITCHING FREQ-MAX, PDSO8, PLASTIC, SOIC-8, Switching Regulator or Controller
Linear
LTC1261IS8
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
LTC1261IS8#TR
LTC1261 - Switched Capacitor Regulated Voltage Inverter; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明