LTC1346ACSW#PBF_技术文档

LTC1346A

10Mbps DCE/DTE

V.35 Transceiver

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DESCRIPTIO

EATURE

S

F

The LTC^®1346A is a single chip transceiver that provides

the differential clock and data signals for a V.35 interface

from ±5V supplies. Combined with an external resistor

termination network and an LT^®1134A RS232 transceiver

forthecontrolsignals,theLTC1346Aformsacompletelow

power DTE or DCE V.35 interface port.

■

Single Chip Provides Complete Differential Signal

Interface for V.35 Port

Drivers and Receivers Will Withstand Repeated

±10kV ESD Pulses

10Mbaud Transmission Rate

Meets CCITT V.35 Specification

Operates from ±5V Supplies

Shutdown Mode Reduces I_CCto Below 1µA

Selectable Transmitter and Receiver Configurations

Independent Driver/Receiver Enables

Transmitter Maintains High Impedance When

Disabled, Shut Down or with Power Off

Transmitters Are Short-Circuit Protected

■

The LTC1346A features three current output differential

transmitters and three differential receivers. The trans-

ceiver can be configured for DTE or DCE operation or

shutdown using three Select pins. In the shutdown mode,

the supply current is reduced to below 1µA.

■

The LTC1346A transceiver operates up to 10Mbaud. All

transmittersfeatureshort-circuitprotection.Boththetrans-

mitter outputs and the receiver outputs can be forced into

a high impedance state. The transmitter outputs and re-

ceiver inputs feature ±10kV ESD protection.

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PPLICATI

Modems

Telecommunications

Data Routers

S

A

■

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATION

Clock and Data Signals for V.35 Interface

1

2

V

EE1

V

DTE

DCE

EE2

–5V

+

0.1µF

2

+

V

0.1µF

V

CC2

5V

CC1

5V

LTC1346A

DX

BI

LTC1346A

+

0.1µF

+

627T500/1250

0.1µF

TXD (103)

24

1

12 16

4

5

10

11

4

T

RX

DX

23

22

11 15

10 14

2

3

SCTE (113)

TXC (114)

RXC (115)

RXD (104)

DX

21

9

1

13

24

4

18 14

9

RX

17

2

3

23

22

13

16 12

5

10

15

4

5

21

20

11

14 10

50Ω

125Ω

6

7

8

11

7

=

T

13

3

6

19

3

9

V

CC2

GND (102)

8

7

8

7

V

BI TECHNOLOGIES

627T500/1250 (SOIC)

CC1

12

LTC1346 • TA01

1

LTC1346A

W

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W W W

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/O

ABSOLUTE AXI U RATI GS

PACKAGE RDER I FOR ATIO

(Note 1)

ORDER PART

Supply Voltage

TOP VIEW

NUMBER

V_CC.................................................................... 6.5V

V_EE................................................................... –6.5V

Input Voltage

V

1

2

3

4

5

6

7

8

9

24 Y1

23 Z1

22 Y2

21 Z2

20 Y3

19 Z3

18 A3

17 B3

16 A2

15 B2

14 A1

13 B1

EE

CC

LTC1346ACSW

LTC1346AISW

GND

Transmitters ........................... –0.3V to (V_CC+ 0.3V)

Receivers............................................... –18V to 18V

S0, S1, S2 ............................... –0.3V to (V_CC+ 0.3V)

Output Voltage

Transmitters .......................................... –18V to 18V

Receivers................................ –0.3V to (V_CC+ 0.3V)

Short-Circuit Duration

Transmitter Output ..................................... Indefinite

Receiver Output .......................................... Indefinite

Operating Temperature Range

T1

T2

T3

S1

S2

R3

R2 10

R1 11

S0 12

SW PACKAGE

24-LEAD PLASTIC SO WIDE

LTC1346AC ............................................ 0°C to 70°C

LTC1346AI ........................................ –40°C to 85°C

Storage Temperature Range ................ –65°C to 150°C

Lead Temperature (Soldering, 10 sec)................. 300°C

T_JMAX= 150°C, θ_JA= 85°C/W

Consult factory for Military grade parts.

DC ELECTRICAL CHARACTERISTICS ^V_CC= 5V ±5%, V_EE= –5V ±5% (Note 2)

SYMBOL PARAMETER

CONDITIONS

–4V ≤ V ≤ 4V (Figure 1)

MIN

0.44

–0.6

–12.6

9.4

TYP

0.55

0

MAX

0.66

0.6

UNITS

V

Transmitter Differential Output Voltage

Transmitter Common Mode Output Voltage

Transmitter Output High Current

●

V

OD

OC

OS

V

= 0V (Figure 1)

= 0V

OS

I

–11

11

–9.4

12.6

mA

OH

Y, Z

Transmitter Output Low Current

OL

OZ

Transmitter Output Leakage Current

–5V ≤ V ≤ 5V, S1 = S2 = 0V

±1

±20

±100

µA

Y, Z

●

R

Transmitter Output Impedance

Differential Receiver Input Threshold Voltage

Receiver Input Hysterisis

–2V ≤ V ≤ 2V

100

25

50

kΩ

mV

mA

kΩ

V

O

Y, Z

V

TH

–7V ≤ (V + V )/2 ≤ 12V

200

0.7

A

B

∆V

–7V ≤ (V + V )/2 ≤ 12V

TH

A

B

I

Receiver Input Current (A, B)

Receiver Input Impedance

–7V ≤ V

≤ 12V

●

IN

A, B

R

V

≤ 12V

17.5

3

30

4.5

0.2

40

IN

Receiver Output High Voltage

Receiver Output Low Voltage

Receiver Output Short-Circuit Current

Receiver Three-State Output Current

Logic Input High Voltage

I = 4mA, V

O

= 0.2V

OH

OL

A, B

I = 4mA, V

O

= –0.2V

0.4

85

±10

V

I

0V ≤ V ≤ V

CC

7

2

mA

µA

V

OSR

OZR

O

S0 = V , 0V ≤ V ≤ V

CC

O

CC

V

T, S0, S1, S2

IH

IL

Logic Input Low Voltage

0.8

V

I

Logic Input Current

±10

µA

IN

2

LTC1346A

V_CC= 5V ±5%, V_EE= –5V ±5% (Note 2)

AC ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER

CONDITIONS

= 0V, S0 = Low, S1 = S2 = High (Figure 1)

MIN

TYP

MAX

UNITS

I

V

Supply Current

V

OS

●

40

6

0.1

50

9

100

mA

µA

CC

No Load, S0 = Low, S1 = S2 = High

Shutdown, S0 = V , S1 = S2 = 0V

CC

I

V

Supply Current

V

= 0V, S0 = Low, S1 = S2 = High (Figure 1)

●

–40

–6

–0.1

–50

–9

–100

mA

µA

EE

OS

No Load, S0 = Low, S1 = S2 = High

Shutdown, S0 = V , S1 = S2 = 0V

CC

t , t

Transmitter Rise or Fall Time

Transmitter Input to Output

Transmitter Output to Output

Receiver Input to Output

V

= 0V (Figures 1, 3)

= 0V (Figures 1, 4)

●

7

40

70

ns

µs

r

f

OS

t

25

30

5

PLH

PHL

SKEW

PLH

PHL

SKEW

ZL

t

●

50

55

5

100

Receiver Input to Output

Differential Receiver Skew, t

– t

PHL

PLH

Receiver Enable to Output Low (Active Mode) C = 15pF, SW1 Closed (Figures 2, 5)

Receiver Enable to Output Low

(from Shutdown, Note 3)

●

40

2

70

L

C = 15pF, SW1 Closed (Figures 2, 5)

L

t

Receiver Enable to Output High (Active Mode) C = 15pF, SW2 Closed (Figures 2, 5)

35

2

ns

ZH

L

Receiver Enable to Output High

(from Shutdown, Note 3)

C = 15pF, SW2 Closed (Figures 2, 5)

µs

L

t

Receiver Disable from Low

Receiver Disable from High

C = 15pF, SW1 Closed (Figures 2, 5)

●

30

35

70

ns

LZ

L

C = 15pF, SW2 Closed (Figures 2, 5)

L

HZ

The

●

denotes specifications which apply over the full operating

Note 2: All currents into device pins are positive; all currents out of device

pins are termed negative. All voltages are referenced to device ground

unless otherwise specified.

temperature range.

Note 1: The Absolute Maximum Ratings are those values beyond which

the life of a device may be impaired.

Note 3: Receiver enable to output valid high or low from shutdown is

typically 2µs.

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TYPICAL PERFORMANCE CHARACTERISTICS

Transmitter Output Current

vs Temperature

Transmitter Output Current

vs Output Voltage

Transmitter Output Skew

vs Temperature

13

12

20

15

13

12

11

10

9

V

= 5V

= –5V

V

CC

V

EE

= 5V

= –5V

T

V

= 25°C

A

CC

EE

V

= 5V

CC

= –5V

EE

11

10

9

10

5

0

–25

0

50

75 100 125

–50

25

0

0.5

–2.0 –1.5 –1.0 –0.5

1.0 1.5 2.0

–25

0

50

75 100 125

–50

25

TEMPERATURE (˚C)

OUTPUT VOLTAGE (V)

TEMPERATURE (˚C)

1346A G01

1346A G02

1346A G03

3

LTC1346A

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TYPICAL PERFORMANCE CHARACTERISTICS

Receiver t_PLH– t_PHL

vs Temperature

I_CCSupply Current vs Temperature

I_EESupply Current vs Temperature

–25

–30

–5.0

–5.5

45

40

7.5

7.0

20

15

V

CC

V

EE

= 5V

= –5V

V

CC

V

EE

= 5V

= –5V

V

CC

V

EE

= 5V

= –5V

LOADED

NO LOAD

–35

–40

–45

–6.0

–6.5

–7.0

35

30

25

6.5

6.0

5.5

10

5

NO LOAD

LOADED

0

–25

0

50

75 100 125

–50

25

–25

0

50

75 100 125

–25

0

50

75 100 125

–50

25

–50

25

TEMPERATURE (˚C)

1346A G06

1346A G05

1346A G04

Receiver Enable from Shutdown

Transmitter Output Waveforms

Receiver Output Waveforms

INPUT A–B

1V/DIV

INPUT

5V/DIV

INPUT

0.2V/DIV

INPUT S0

5V/DIV

OUTPUT

0.2V/DIV

OUTPUT

5V/DIV

OUTPUT

5V/DIV

1346A G07

1346A G08

1346A G09

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PIN FUNCTIONS

V_EE(Pin 1): Negative Supply, –4.75V ≥ V_EE≥ –5.25V

V_CC(Pin 2): Positive Supply, 4.75V ≤ V_CC≤ 5.25V

GND (Pin 3): Ground

B1 (Pin 13): Receiver 1 Inverting Input

A1 (Pin 14): Receiver 1 Noninverting Input

B2 (Pin 15): Receiver 2 Inverting Input

T1 (Pin 4): Transmitter 1 Input, TTL Compatible

T2 (Pin 5): Transmitter 2 Input, TTL Compatible

T3 (Pin 6): Transmitter 3 Input, TTL Compatible

S1 (Pin 7): Select Input 1, TTL Compatible

S2 (Pin 8): Select Input 2, TTL Compatible

R3 (Pin 9): Receiver 3 Output, TTL Compatible

R2 (Pin 10): Receiver 2 Output, TTL Compatible

R1 (Pin 11): Receiver 1 Output, TTL Compatible

S0 (Pin 12): Select Input 0, TTL Compatible

A2 (Pin 16): Receiver 2 Noninverting Input

B3 (Pin 17): Receiver 3 Inverting Input

A3 (Pin 18): Receiver 3 Noninverting Input

Z3 (Pin 19): Transmitter 3 Inverting Output

Y3 (Pin 20): Transmitter 3 Noninverting Output

Z2 (Pin 21): Transmitter 2 Inverting Output

Y2 (Pin 22): Transmitter 2 Noninverting Output

Z1 (Pin 23): Transmitter 1 Inverting Output

Y1 (Pin 24): Transmitter 1 Noninverting Output

4

LTC1346A

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FU CTIO TABLES

Transmitter and Receiver Configuration

Transmitter

S0

0

1

0

1

0

1

0

1

S1

0

1

0

1

S2

0

1

DX ON RX ON Description

INPUTS

CONFIGURATION S0 S1 S2

OUTPUTS

—

1, 2, 3 All RX ON, All DX OFF

T

X

0

1

0

1

Y1 AND Y2 Z1 AND Z2 Y3 Z3

—

1, 2

—

All OFF, Shutdown

DCE Mode

DCE Mode, All RX OFF

All OFF

0

1

X

0

1

0

X

1

Z

0

1

0

1

Z

1

0

1

0

Z

0

1

Z

1

0

Z

1, 2, 3

1, 2

Shutdown

DCE or All ON

DTE

1, 2, 3 DTE Mode

1, 2

—

DTE Mode, All RX OFF

1, 2, 3

1, 2, 3 All ON

—

All DX ON, All RX OFF

DTE

Receiver

INPUTS

CONFIGURATION S0 S1 S2

OUTPUTS

A – B

R1 AND R2

R3

All Rx ON

Shutdown

DCE

0

1

X

0

1

≤ –0.2V

≥0.2V

X

0

1

Z

0

1

Z

0

1

Z

0

1

Z

0

1

Z

0

1

0

1

0

1

≤ –0.2V

≥0.2V

X

DCE

Disabled

DTE or All ON

Disabled

≤ –0.2V

≥0.2V

X

TEST CIRCUITS

Y

50Ω

V

OS

Y

A

B

125Ω

R

T

V

OD

Z

S0

15pF

50Ω

V

OC

= (V + V )/2

Y Z

LTC1346A • F01

Z

Figure 1. V.35 Transmitter/Receiver Test Circuit

V

CC

SW1

1k

RECEIVER

OUTPUT

SW2

C

L

LTC1346A • F02

Figure 2. Receiver Output Enable and Disable Timing Test Load

5

LTC1346A

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W

SWITCHI G TI E WAVEFOR S

3V

f = 1MHz: t ≤ 10ns: t ≤ 10ns

r

f

1.5V

T

0V

t

PLH

PHL

V

O

90%

V

= V(Y) – V(Z)

DIFF

Y – Z

–V

50%

10%

50%

10%

O

1/2 V

O

t

f

r

Z

V

O

Y

t

SKEW

LTC1346A • F03

SKEW

Figure 3. V.35 Transmitter Propagation Delays

V /2

OD

f = 1MHz: t ≤ 10ns: t ≤ 10ns

INPUT

r

f

0V

t

0V

t

A – B

–V /2

OD

PLH

PHL

V

OH

OUTPUT

R

1.5V

V

OL

LTC1346A • F04

Figure 4. V.35 Receiver Propagation Delays

3V

1.5V

S0

R

f = 1MHz: t ≤ 10ns: t ≤ 10ns

r

f

0V

5V

t

LZ

ZL

1.5V

OUTPUT NORMALLY LOW

OUTPUT NORMALLY HIGH

0.5V

V

OL

t

ZH

HZ

V

OH

0.5V

R

0V

LTC1346A • F05

Figure 5. Receiver Enable and Disable Times

6

LTC1346A

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APPLICATIONS INFORMATION

Review of CCITT Recommendation V.35

10. No data errors should occur with ±2V common

mode change at either the transmitter/receiver or

±4V ground potential difference between transmit-

ter and receiver.

Electrical Specifications

V.35 is a CCITT recommendation for synchronous data

transmission via modems. Appendix 2 of the recommen-

dation describes the electrical specifications which are

summarized below:

Cable Termination

Each end of the cable connected to an LTC1346A must be

terminated by an external Y- or ∆-resistor network for

proper operation. The Y-termination has two series con-

nected 50Ω resistors and a 125Ω resistor connected

betweengroundandthecentertapofthetwo50Ωresistors

as shown in Figure 6.

1. The interface cable is a balanced twisted pair with 80Ω

to 120Ω impedance.

2. The transmitter’s source impedance is between 50Ω

and 150Ω.

3. The transmitter’s resistance between shorted termi-

nals and ground is 150Ω ±15Ω.

The alternative ∆-termination has a 120Ω resistor across

the twisted wires and two 300Ω resistors between each

wire and ground. Standard 1/8W, 5% surface mount

resistors can be used for the termination network. To

maintain the proper differential output swing, the resistor

tolerance must be 5% or better. A termination network

that combines all the resistors into an SO-14 package is

available from:

4. When terminated by a 100Ω resistive load, the termi-

nal-to-terminal voltage should be 0.55V ±20%.

5. The transmitter’s rise time should be less than 1% of

the signal pulse or 40ns, whichever is greater.

6. Thecommonmodevoltageatthetransmitteroutput

should not exceed 0.6V.

BI Technologies (Formerly Beckman Industrial)

Resistor Networks

4200 Bonita Place

7. The receiver impedance is 100Ω ±10Ω.

8. The receiver impedance to ground is 150Ω ±15Ω.

9. The transmitter or receiver should not be damaged

by connection to earth ground, short-circuiting or

cross connection to other lines.

Fullerton, CA 92635

Phone: (714) 447-2357

FAX: (714) 447-2500

Part #: BI Technologies 627T500/1250 (SOIC)

899TR50/125 (DIP)

50Ω

125Ω

50Ω

Y

300Ω

120Ω

300Ω

LTC1346A • F06

∆

Figure 6. Y- and ∆-Termination Networks

7

LTC1346A

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APPLICATIONS INFORMATION

CHIP

BOUNDARY

V

CC

11mA

Y

Z

50Ω

125Ω

T

11mA

V

EE

LTC1346A • F07

Figure 7. Simplified Transmitter Schematic

receivers are OFF, all outputs are forced into high imped-

Theory of Operation

ance. The S0 pin can be used as receiver output enable.

In shutdown mode, I_CCdrops to 1µA with all transmitters

and receivers OFF. When the LTC1346A is enabled from

shutdown the transmitters and receivers require 2µs to

stabilize.

The transmitter outputs consist of complementary

switched-current sources as shown in Figure 7.

With a logic zero at the transmitter input, the inverting

output Z sources 11mA and the noninverting output Y

sinks 11mA. The differential transmitter output voltage is

then set by the termination resistors. With two differential

50Ω resistors at each end of the cable, the voltage is set to

(50Ω)(11mA) = 0.55V. With a logic 1 at the transmitter

input, output Z sinks 11mA and Y sources 11mA. The

common mode voltage of Y and Z is 0V when both current

sources are matched and there is no ground potential

difference between the cable terminations. The transmitter

currentsourceshaveacommonmoderangeof±2V,which

allows for a ground difference between cable terminations

of ±4V.

Complete V.35 Port

Figure 8 shows the schematic of a complete surface

mounted, ±5V DTE and DCE V.35 port using only three ICs

and six capacitors per port. The LTC1346A is used to

transmit the clock and data signals and the LT1134A to

transmit the control signals. If test signals 140, 141 and

142 are not used, the transmitter inputs should be tied

to V_CC.

RS422/RS485 Applications

Each receiver input has a 30k resistance to ground and

requiresexternalterminationtomeettheV.35inputimped-

ance specification. The receivers have an input hysteresis

of 50mV to improve noise immunity.

The receivers on the LTC1346A can be used for RS422

and RS485 applications. Using the test circuit in Figure 9,

the LTC1346A receivers are able to successfully extract

thedatastreamfromthecommonmodevoltage, meeting

RS422 and RS485 requirements as shown in Figures 10

and 11.

Three Select pins, S0, S1 and S2, configure the chip as

described in Function Tables. When the transmitters and

8

LTC1346A

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APPLICATIONS INFORMATION

50Ω

DTE

DCE

125Ω

=

T

V

EE1

–5V

V

CC1

EE2

CC2

5V

–5V

5V

2

1

0.1µF

16

2

BI

627T500/

1250

627T500/

1250

0.1µF

LTC1346A

DX

LTC1346A

RX

TXD (103)

(SOIC)

24

1

P

12

4

5

10

T

23

22

11

10

15

14

2

3

S

U

S

U

SCTE (113)

TXC (114)

RXC (115)

RXD (104)

11

4

DX

RX

DX

21

18

9

1

13

24

4

W

AA

14

9

RX

17

16

2

3

23

22

13

12

Y

X

Y

X

5

6

10

11

V

T

V

T

15

14

4

5

21

20

11

10

13

3

6

7

19

3

9

7

R

GND (102)

B

A

B

A

8

12

8

7

8

12

CABLE SHIELD

V

CC2

CC1

1µF

+

1µF

+

4

3

22 23

4

3

22

23

24

1

24

1

+

LT1134A

1µF

+

2

DTR (108)

RTS (105)

DSR (107)

CTS (106)

DCD (109)

H

C

H

C

21

19

20

18

16

14

17

15

5

6

8

5

7

9

20

18

21

19

17

15

16

14

DX

RX

DX

RX

DX

RX

7

E

6

D

F

D

F

8

10

12

9

TM (142)

RDL (140)

LLB (141)

NN

N

L

NN

N

L

11

10

12

11

13

ISO 2593

34-PIN DTE/DCE

ISO 2593

34-PIN DTE/DCE

LTC1346A • TA08

INTERFACE CONNECTOR INTERFACE CONNECTOR

Figure 8. Complete Single ±5V V.35 Interface

9

LTC1346A

APPLICATIONS INFORMATION

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V

CC2

5V

CC1

5V

A

TTL

OUT

LTC485

100Ω

100Ω LTC1346A

B

GND

+

–

V

TTL

IN

EE

–5V

7V TO –7V

GND POTENTIAL DIFFERENCE

LTC1346A • F09

Figure 9. RS422/RS485 Receiver Interface

RECEIVER

INPUT

5V/DIV

5V

0V

A

B

15V

10V

5V

RECEIVER

OUTPUT

5V/DIV

0V

–5V

RECEIVER

B

A

INPUT

5V

0V

–10V

RECEIVER

OUTPUT

5V/DIV

LTC1346 • F10

LTC1346 • F11

Figure 10. –7V Common Mode

Figure 11. 12V Common Mode

Multiprotocol Application

The LTC1346A driver will not be damaged or load the

shared lines when disabled. The LTC1346A receiver can

receiveV.35, RS232andRS422signalsasshowninFigure

12b. The LTC1346A receiver is directly compatible with

V.35 and RS422. For RS232 signal, the noninverting input

of the receiver should be grounded. Because the line

termination for each of the protocols is different, some

form of termination switching should be included, either

the connector (as shown in Figures 12a and 12b) or on the

PCB.

The LTC1346A can be used in multiprotocol applications

where V.35, RS232 and RS422 (used in RS530, RS449

among others) signals may appear at the same port. The

LTC1346A switched current source driver is not compat-

ible with RS232 or RS422. However, the outputs when

disabled can share lines with RS232 drivers with a shut-

down feature such as the LT1030 and RS422 drivers with

a disable feature such as the LTC486/LTC487 (Figure 12a).

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LTC1346A

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APPLICATIONS INFORMATION

LT1030

V.35 DIFFERENTIAL

CONNECTION WITH

TERMINATION

RS422

DIFFERENTIAL

CONNECTION

RS232

CONNECTION

LTC487

NO CONNECTION

50Ω

125Ω

LT1346A

50Ω

LOGIC

INPUT

1346A F12a

Figure 12a. Multiprotocol Transmitter

RS232

CONNECTION WITH

TERMINATION

V.35 DIFFERENTIAL

CONNECTION WITH

TERMINATION

RS422 DIFFERENTIAL

CONNECTION WITH

TERMINATION

50Ω

LT1346A

125Ω

LOGIC

OUTPUT

100Ω

5k

50Ω

1346A F12b

Figure 12b. Multiprotocol Receiver

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

11

LTC1346A

U

PACKAGE DESCRIPTION

Dimensions in inches (millimeters) unless otherwise noted.

SW Package

24-Lead Plastic Small Outline (Wide 0.300)

(LTC DWG # 05-08-1620)

0.598 – 0.614*

(15.190 – 15.600)

24 23 22 21 20 19 18

16 15 14 13

17

0.394 – 0.419

(10.007 – 10.643)

NOTE 1

0.291 – 0.299**

(7.391 – 7.595)

2

3

5

7

8

9

10

1

4

6

11 12

0.037 – 0.045

(0.940 – 1.143)

0.093 – 0.104

(2.362 – 2.642)

0.010 – 0.029

(0.254 – 0.737)

× 45°

0° – 8° TYP

0.050

(1.270)

TYP

0.004 – 0.012

(0.102 – 0.305)

0.009 – 0.013

NOTE 1

(0.229 – 0.330)

0.014 – 0.019

0.016 – 0.050

(0.356 – 0.482)

(0.406 – 1.270)

NOTE:

1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS

THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.

S24 (WIDE) 0695

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LT1134A

5V Only, 4-Driver/4-Receiver RS232 Transceiver

5V Only, Configurable RS232/RS485 Transceiver

Single Supply V.35 Transceiver

Forms Complete V.35 Interface with LTC1346A

Includes On-Chip Charge Pump

LTC1334

LTC1345

Single 5V Only, Includes On-Chip Charge Pump

LT/GP 0296 10K • PRINTED IN USA

12 ^{Linear Technology Corporation}

1630 McCarthy Blvd., Milpitas, CA 95035-7417

●

(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977

LINEAR TECHNOLOGY CORPORATION 1995


型号：	LTC1346ACSW#PBF
厂家：	Linear
描述：	LTC1346A - 10Mbps DCE/DTE V.35 Transceiver; Package: SO; Pins: 24; Temperature Range: 0°C to 70°C
文件：	总12页 (文件大小：320K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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