LTC1380IGN [Linear]

Single-Ended 8-Channel/ Differential 4-Channel Analog Multiplexer with SMBus Interface; 单端8通道/差分4通道模拟多路复用器,带有SMBus接口
LTC1380IGN
型号: LTC1380IGN
厂家: Linear    Linear
描述:

Single-Ended 8-Channel/ Differential 4-Channel Analog Multiplexer with SMBus Interface
单端8通道/差分4通道模拟多路复用器,带有SMBus接口

复用器 开关 复用器或开关 信号电路 光电二极管
文件: 总12页 (文件大小:278K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
LTC1380/LTC1393  
Single-Ended 8-Channel/  
Differential 4-Channel Analog  
Multiplexer with SMBus Interface  
U
FEATURES  
DESCRIPTION  
The LTC®1380/LTC1393 are CMOS analog multiplexers with  
SMBus® compatible digital interfaces. The LTC1380 is a  
single-ended 8-channel multiplexer, while the LTC1393 is a  
differential 4-channel multiplexer. The SMBus digital inter-  
face requires only two wires (SCL and SDA). Both the  
LTC1380 and the LTC1393 have four hard-wired SMBus  
addresses, selectable with two external address pins. This  
allows four devices, each with a unique SMBus address, to  
coexist on one system and for four devices to be synchro-  
nized with one stop bit.  
Micropower Operation: Supply Current = 20µA Max  
2-Wire SMBus Interface  
Single 2.7V to ±5V Supply Operation  
Expandable to 32 Single or 16 Differential Channels  
Guaranteed Break-Before-Make  
Low RON: 35Single Ended/70Differential  
Low Charge Injection: 20pC Max  
Low Leakage: ±5nA Max  
Available in 16-Lead SO and GN Packages  
U
The supply current is typically 10µA. Both digital interface  
pins are SMBus compatible over the full operating supply  
voltage range. The LTC1380 analog switches feature a  
typicalRON of35(± 5Vsupplies), typicalswitchleakageof  
20pAandguaranteedbreak-before-makeoperation.Charge  
injection is ±1pC typical.  
APPLICATIONS  
Data Acquisition Systems  
Process Control  
Laptop Computers  
Signal Multiplexing/Demultiplexing  
Analog-to-Digital Conversion Systems  
The LTC1380/LTC1393 are available in 16-lead SO and GN  
packages. Operation is fully specified over the commercial  
and industrial temperature ranges.  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
SMBus is a registered trademark of Intel Corporation.  
U
TYPICAL APPLICATION  
On Resistance vs VS  
LTC1380 Single-Ended 8-Channel Multiplexer  
5V  
250  
T
D
= 25°C  
A
225  
200  
175  
150  
125  
100  
75  
I
= 1mA  
SMBus  
HOST  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
0.1µF  
15k  
15k  
S0  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
V
CC  
V
CC  
V
EE  
= 2.7V  
= 0V  
SCL  
SDA  
SCL  
SDA  
A0  
8 ANALOG  
INPUTS  
LTC1380  
V
= 5V  
= 0V  
CC  
A1  
V
EE  
V
= 5V  
CC  
GND  
0.1µF  
V
EE  
= 5V  
50  
5V  
V
EE  
25  
ANALOG OUTPUT  
1380/93 TA01  
D
O
0
–5 –4 –3 –2 –1  
0
1
2
3
4
5
V
(V)  
S
1167 G15  
1
LTC1380/LTC1393  
W W U W  
ABSOLUTE MAXIMUM RATINGS  
(Note 1)  
Maximum Switch-On Current .............................. 65mA  
Power Dissipation............................................. 500mW  
Operating Ambient Temperature Range  
LTC1380C/LTC1393C ....................... 0°C TA 70°C  
LTC1380I/LTC1393I .................... 40°C TA 85°C  
Junction Temperature........................................... 125°C  
Storage Temperature Range ................. 65°C to 150°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
Total Supply Voltage  
LTC1380 (VCC to VEE) ......................................... 15V  
LTC1393 (VCC to GND) ....................................... 15V  
Analog Input Voltage  
LTC1380............................. VEE – 0.3V to VCC + 0.3V  
LTC1393................................... – 0.3V to VCC + 0.3V  
Digital Inputs .............................................0.3V to 15V  
LTC1380 (VCC TO VEE) .... (VEE – 0.3V) to (VEE + 15V)  
LTC1393 (VCC to GND) ..........................0.3V to 15V  
U
W U  
PACKAGE/ORDER INFORMATION  
TOP VIEW  
ORDER PART  
ORDER PART  
TOP VIEW  
NUMBER  
NUMBER  
+
S0  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
S0  
S0  
S1  
S1  
S2  
S2  
S3  
S3  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
CC  
+
+
+
SCL  
SDA  
A0  
SCL  
SDA  
A0  
LTC1380CGN  
LTC1380CS  
LTC1380IGN  
LTC1380IS  
LTC1393CGN  
LTC1393CS  
LTC1393IGN  
LTC1393IS  
A1  
A1  
GND  
GND  
V
D
O
EE  
+
D
O
D
O
GN PACKAGE  
S PACKAGE  
GN PACKAGE  
S PACKAGE  
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO  
16-LEAD PLASTIC SSOP 16-LEAD PLASTIC SO  
TJMAX = 125°C, θJA = 130°C/ W (GN)  
TJMAX = 125°C, θJA = 100°C/ W (S)  
TJMAX = 125°C, θJA = 130°C/ W (GN)  
TJMAX = 125°C, θJA = 100°C/ W (S)  
Consult factory for Military grade parts.  
ELECTRICAL CHARACTERISTICS (Notes 2, 4)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
Analog Signal Range  
LTC1380  
V
V
V
V
V
ANALOG  
EE  
CC  
CC  
LTC1393  
0
R
On Resistance  
LT1380: V = 5V, V = 5V,  
35  
70  
70  
120  
ON  
CC  
EE  
V
(V , V ) V , I = ±1mA  
EE  
S
D
CC D  
LT1393: V = 5V,  
140  
200  
CC  
0V (V , V ) V , I = ±1mA  
S
D
CC D  
LT1380/LTC1393: V = 2.7V, V = 0V,  
210  
400  
600  
CC  
EE  
0V (V , V ) V , I = ±1mA  
S
D
CC D  
R vs V  
V
V
(V , V ) V , V = 5V  
20  
0.5  
%
ON  
S
EE  
S
D
CC CC  
R
vs Temperature  
= 5V  
%/°C  
ON  
CC  
I
Off-Channel or On-Channel  
Switch Leakage  
LTC1380: (V + 0.5V) (V , V ) (V – 0.5V)  
±0.05  
±5  
±50  
nA  
nA  
LEAK  
EE  
S
D
CC  
LTC1393: 0.5V (V , V ) (V – 0.5V)  
S
D
CC  
2
LTC1380/LTC1393  
ELECTRICAL CHARACTERISTICS  
(Notes 2, 4)  
SYMBOL PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V
V
V
V
V
V
SCL, SDA Input High Voltage  
SCL, SDA Input Low Voltage  
SDA Output Low Voltage  
Address Input High Voltage  
Address Input Low Voltage  
SCL, SDA, Address Input Current  
Positive Supply Current  
1.4  
IH  
0.6  
0.4  
V
IL  
I
= 3mA  
= 5V  
V
OL  
AH  
AL  
SDA  
V
V
2
V
CC  
CC  
= 5V  
0.8  
±1  
20  
V
I
I
I
0V V V  
CC  
µA  
µA  
µA  
pF  
IN  
IN  
V
CC  
= 5V, All Digital Inputs at 5V  
10  
0.1  
3
CC  
EE  
Negative Supply Current  
Input Off Capacitance  
LTC1380: V = 5V, V = 5V, All Digital Inputs at 5V  
–5  
CC  
EE  
C
S
(Note 3)  
C
D
Output Off Capacitance  
(Note 3) LTC1380  
LTC1393  
26  
18  
pF  
pF  
t
t
t
Switch Turn-On Time from  
Stop Condition  
Figure 1 LTC1380: V = 5V, V = 5V  
850  
850  
1130  
1500  
1500  
2000  
ns  
ns  
ns  
ON  
CC  
EE  
LTC1393: V = 5V  
CC  
LTC1380/LTC1393: V = 2.7V, V = 0V  
CC  
EE  
Switch Turn-Off Time from  
Stop Condition  
Figure 1 LTC1380: V = 5V, V = 5V  
640  
650  
670  
1200  
1200  
1200  
ns  
ns  
ns  
OFF  
CC  
EE  
LTC1393: V = 5V  
CC  
LTC1380/LTC1393: V = 2.7V, V = 0V  
CC  
EE  
Break-Before-Make Interval  
Off-Channel Isolation  
Charge Injection  
t
– t  
OFF  
75  
210  
65  
±1  
ns  
dB  
pC  
OPEN  
ON  
OIRR  
Figure 2, V = 200mV , R = 1k, f = 100kHz (Note 3)  
S P-P L  
Q
Figure 3, C = 1000pF (Note 3)  
±20  
INJ  
L
SMBus Timing (Note 6)  
f
t
t
t
t
t
t
t
t
t
t
SMBus Operating Frequency  
Bus Free Time Between Stop/Start  
Hold Time After (Repeated) Start  
Repeated Start Setup Time  
Stop Condition Setup Time  
Data Hold Time  
100  
kHz  
µs  
µs  
µs  
µs  
ns  
ns  
µs  
µs  
ns  
ns  
SMB  
4.7  
4.0  
4.7  
4.0  
300  
250  
4.7  
4.0  
BUF  
HD:STA  
SU:STA  
SU:STO  
HD:DAT  
SU:DAT  
LOW  
Data Setup Time  
Clock Low Period  
Clock High Period  
HIGH  
f
SCL/SDA Fall Time  
Time Interval Between 0.9V and (V  
– 0.15)  
ILMAX  
300  
DD  
SCL/SDA Rise Time  
Time Interval Between (V  
– 0.15)  
1000  
r
ILMAX  
and (V  
+ 0.15)  
IHMIN  
Note 3: These typical parameters are based on bench measurements and  
The  
denotes specifications which apply over the full operating  
are not production tested.  
temperature range.  
Note 4: Both SCL and SDA assume an external 15k pull-up resistor to a  
Note 1: Absolute Maximum Ratings are those values beyond which the life  
typical SMBus host power supply V of 5V.  
of a device may be impaired.  
DD  
Note 5: Typical curves with V = 5V apply to the LTC1380. Curves with  
Note 2: All current into device pins is positive; all current out of device  
EE  
V
= 0V apply to both the LTC1380 and the LTC1393.  
pins is negative. All voltages are referenced to ground unless otherwise  
EE  
specified. All typicals are given for T = 25°C, V = 5V (for both LTC1380  
A
CC  
Note 6: These parameters are guaranteed by design and are not tested in  
production.  
and LTC1393) and V = 5V (LTC1380).  
EE  
3
LTC1380/LTC1393  
U W  
(Note 5)  
TYPICAL PERFOR A CE CHARACTERISTICS  
On Resistance vs Temperature  
Off-Channel Output Leakage vs VD  
Off-Channel Input Leakage vs VS  
0.0020  
0.0018  
0.0016  
0.0014  
0.0012  
0.0010  
0.0008  
0.0006  
0.0004  
0.0002  
0
0.010  
0.008  
0.006  
0.004  
0.002  
0
250  
225  
200  
175  
150  
125  
100  
75  
I
= 1mA  
T
= 25°C  
T = 25°C  
A
D
A
V
CC  
V
EE  
= 5V  
= 5V  
V
V
V
= 2.7V  
= 0V  
CC  
EE  
S
V
CC  
V
EE  
= 5V  
= 5V  
= 1.35V  
V
CC  
V
= 2.7V  
EE  
V
= 5V  
= 0V  
CC  
EE  
= 2.5V  
V
CC  
V
EE  
= 5V  
= 0V  
= 0V  
V
V
EE  
V
= 5V  
CC  
V
= 5V  
= 0V  
0.002  
0.004  
0.006  
0.008  
0.010  
CC  
V
S
V
= 5V  
V
EE  
= 0V  
V
= 2.7V  
EE  
S
CC  
V
= 0V  
50  
25  
0
50  
75 100 125  
4.5–3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5  
(V)  
4.5–3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5  
(V)  
– 50  
0
25  
–25  
V
S
V
D
TEMPERATURE (°C)  
1380/93 G02  
1380/93 G03  
1380/93 G01  
Off-Channel Input Leakage  
vs Temperature  
On-Channel Input Leakage vs VS  
On-Channel Output Leakage vs VD  
0.010  
0.008  
0.006  
0.004  
0.002  
0
0.010  
0.008  
0.006  
0.004  
0.002  
0
10  
1
T
A
= 25°C  
T = 25°C  
A
V
V
= 2.7V  
EE  
= 1.35V  
CC  
V
= 0V  
S
V
CC  
V
EE  
= 5V  
= 5V  
V
CC  
V
EE  
= 5V  
= 5V  
V
= 5V  
= 0V  
0.1  
CC  
EE  
= 2.5V  
V
V
= 2.7V  
EE  
CC  
V
S
V = 2.7V  
CC  
V
= 0V  
V
EE  
= 0V  
0.01  
0.001  
0.0001  
0.002  
0.004  
0.006  
0.008  
0.010  
0.002  
0.004  
0.006  
0.008  
0.010  
V
V
V
= 5V  
CC  
EE  
S
= 5V  
= 0V  
V
CC  
V
EE  
= 5V  
= 0V  
V
CC  
V
EE  
= 5V  
= 0V  
4.5–3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5  
(V)  
4.5–3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5  
(V)  
–50 –25  
0
25  
50  
75 100 125  
V
V
TEMPERATURE (°C)  
S
D
1380/93 G04  
1380/93 G05  
1380/93 G06  
Off-Channel Output Leakage  
vs Temperature  
On-Channel Input Leakage  
vs Temperature  
On-Channel Output Leakage  
vs Temperature  
1000  
100  
1000  
100  
1000  
100  
V
= 5V  
= 5V  
= 0V  
V
V
= 2.7V  
= 0V  
CC  
V
V
= 5V  
= 0V  
CC  
V
CC  
EE  
= 2.5V  
V
EE  
V
EE  
= 1.35V  
D
V
S
D
V
V
= 2.7V  
EE  
= 1.35V  
10  
1
10  
1
10  
1
CC  
V
= 0V  
V
V
V
= 5V  
CC  
EE  
S
V
EE  
V
= 5V  
CC  
= 5V  
D
V
= 5V  
= 0V  
CC  
EE  
= 2.5V  
V
= 5V  
= 0V  
= 0V  
V
D
V
= 5V  
= 0V  
V
D
0.1  
0.1  
0.1  
CC  
EE  
= 2.5V  
V
V
V
V
= 2.7V  
= 0V  
CC  
EE  
V
D
0.01  
0.001  
0.01  
0.001  
0.01  
0.001  
= 1.35V  
S
0.0001  
0.0001  
0.0001  
50  
TEMPERATURE (°C)  
100 125  
50  
TEMPERATURE (°C)  
100 125  
50  
TEMPERATURE (°C)  
100 125  
50 25  
0
25  
75  
50 25  
0
25  
75  
50 25  
0
25  
75  
1380/93 G08  
1380/93 G09  
1380/93 G07  
4
LTC1380/LTC1393  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
(Note 5)  
Off Time vs Temperature  
On Time vs Temperature  
QINJ vs VC (Figure 3)  
800  
1600  
5.0  
T
= 25°C  
V
= 2.7V  
EE  
= 1.35V  
V
= 5V  
A
CC  
CC  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
= 0V  
V
= 5V  
EE  
V = 0V  
S
700  
600  
1400  
1200  
V
V
= 2.7V  
S
CC  
V
= 0V  
EE  
V = 1.35V  
S
V
CC  
V
EE  
= 5V  
= 5V  
V
EE  
V
= 5V  
= 5V  
= 0V  
V
= 5V  
= 0V  
CC  
CC  
EE  
= 2.5V  
V
V
500  
400  
300  
200  
100  
1000  
800  
600  
400  
200  
V
S
S
V
= 5V  
= 0V  
CC  
EE  
V
V
= 2.5V  
S
V
V
= 5V  
= 0V  
CC  
EE  
V
CC  
V
EE  
= 2.7V  
= 0V  
0
0
25  
0
50  
75 100 125  
25  
0
50  
75 100 125  
50  
25  
50  
25  
–5 –4 –3 –2 –1  
0
1
2
3
4
5
TEMPERATURE (°C)  
TEMPERATURE (°C)  
V (V)  
C
1380/93 G10  
1380/93 G11  
1380/93 G12  
Off-Channel Isolation vs Input  
Common Mode Voltage (Figure 2)  
QINJ vs Temperature (Figure 3)  
75  
74  
73  
72  
71  
70  
69  
68  
67  
66  
65  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
V
EE  
V
= 5V  
= 5V  
= 0V  
CC  
V
V
= 5V  
= 0V  
CC  
EE  
V
V
= 2.7V  
= 0V  
CC  
EE  
V
S
V
V
= 5V  
= 5V  
CC  
EE  
V
= 5V  
= 0V  
= 2.5V  
CC  
EE  
V
V
S
V
= 2.7V  
EE  
= 1.35V  
CC  
V
= 0V  
T
= 25°C  
A
S
L
V
S
V
= 200mV , 100kHz  
P-P  
R
= 1k  
–5 –4 –3 –2 –1  
0
1
2
3
4
5
–50  
0
25  
50  
75 100 125  
–25  
TEMPERATURE (°C)  
V
(V)  
C
1380/93 G14  
1380/93 G13  
ICC vs Temperature  
IEE vs Temperature  
10  
9
8
7
6
5
4
3
2
1
0
0
–10  
–20  
30  
40  
50  
60  
–70  
80  
90  
–100  
V
EE  
= 5V  
CC  
V
= 5V  
V
EE  
V
= 5V  
CC  
V
= 5V  
V
= 2.7V  
EE  
= 0V  
CC  
S
V
= 5V  
= 0V  
V
= 0V  
CC  
EE  
V
–50  
0
25  
50  
75 100 125  
–50  
0
25  
50  
75 100 125  
–25  
–25  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
1380/93 G15  
1380/93 G16  
5
LTC1380/LTC1393  
U
U
U
PIN FUNCTIONS  
S0 to S7/S0±to S3±(Pin 1 to Pin 8):Single-Ended Analog  
Multiplexer Inputs (S0 to S7) for the LTC1380. Differential  
Analog Multiplexer Inputs (S0± to S3±) for the LTC1393.  
A1, AO (Pin 12, Pin 13): Address Selection Pins. Tie these  
twopinstoeitherVCC orGNDtoselectoneoffourpossible  
addresses to which the LTC1380/LTC1393 will respond.  
+
SDA (Pin 14): SMBus Bidirectional Digital Input/Output  
Pin. Thispinhasanopen-drainoutput andrequiresapull-  
up resistor or current source to the positive supply for  
normal operation. Data is shifted into and acknowledged  
by the LTC1380/LTC1393 using this pin.  
DO/DO (Pin9):AnalogMultiplexerOutputfortheLTC1380.  
Positive Differential Analog Multiplexer Output for the  
LTC1393.  
VEE/DO(Pin 10): Negative Supply Pin for the LTC1380.  
Negative Differential Multiplexer Output for the LTC1393.  
For the LTC1380, VEE should be bypassed to GND with a  
0.1µF ceramic capacitor when operating from split sup-  
plies or connected to GND for single supply operation.  
SCL (Pin 15): SMBus Clock Input. SDA data is shifted in  
at rising edges of this clock during data transfer.  
VCC (Pin 16): Positive Supply Pin. This pin should be  
bypassed to GND with a 0.1µF ceramic capacitor.  
GND (Pin 11): Ground Pin.  
W
BLOCK DIAGRA  
ANALOG INPUTS  
ANALOG OUTPUT(S)  
MULTIPLEXER  
SWITCHES  
(LTC1380: S0 TO S7)  
(LTC1380: D )  
O
±
±
±
(LTC1393: S0 TO S3 )  
(LTC1393: D )  
O
4-BIT LATCH  
AND DECODER  
HOLD  
SHIFT REGISTER  
A0  
A1  
ADDRESS  
COMPARATOR  
SDA  
SCL  
SMBus STATE  
MACHINE  
STOP  
1380/93 BD  
6
LTC1380/LTC1393  
TEST CIRCUITS  
STOP CONDITION  
WITH EN = 1  
STOP CONDITION  
WITH EN = 0  
SCL  
SDA  
SCL  
SDA  
1.5V  
0.4V  
SCL  
SDA  
LTC1380  
V
S
D
D
1.5V  
0.4V  
C
L
R
L
1V  
1V  
1V  
35pF  
1k  
t
t
OFF  
ON  
V
80%  
C
V
D
20%  
t < 20ns, t < 20ns  
1/2 • (V + V  
)
CC  
EE  
V
C
1380/93 F01  
r
f
Figure 1. Switch tON/tOFF Propagation Delay from SMBus STOP Condition  
SCL  
SDA  
SCL  
SDA  
OIRR = 20LOG (V /V )  
LTC1380  
10  
D
S
WHERE V AND V ARE THE  
S
D
V
S
D
D
AC VOLTAGE COMPONENTS  
AT S AND D  
V
S
R
L
200mV  
P-P  
1k  
100kHz  
V
V
C1  
C2  
1/2 • (V + V  
)
1/2 • (V + V  
)
CC  
EE  
CC  
EE  
1380/93 F02  
Figure 2. Off-Channel Isolation (OIRR) Test  
STOP CONDITION  
WITH EN = 1  
STOP CONDITION  
WITH EN = 0  
SCL  
SDA  
SCL  
SDA  
CHARGE INJECTION  
1.5V  
Q = V • C  
D
L
SCL  
LTC1380  
0.4V  
V
S
D
D
1.5V  
0.4V  
C
L
SDA  
V
C
1000pF  
V
C
V  
V  
V
D
D
D
1380/93 F03  
Figure 3. Charge Injection Test  
7
LTC1380/LTC1393  
W U  
W
TI I G DIAGRA  
ADDRESS BYTE  
COMMAND BYTE  
t
t
f
t
r
HIGH  
S
S
P
SCL  
t
t
t
t
t
t
HD:STA  
LOW  
SU:DAT  
SU:STA  
SU:STO  
HD:DAT  
SDA FROM  
HOST  
1
0
0
1
*
A1 A0  
0
X
X
X
X
EN C2  
C1 C0  
t
*0 FOR LTC1380, 1 FOR LTC1393  
BUF  
SDA FROM  
LTC1380/LTC1393  
t
OFF  
ON  
t
t
OPEN  
D
O
U
W U U  
APPLICATIONS INFORMATION  
Theory of Operation  
A send byte protocol is initiated by the SMBus host with a  
start bit followed by a 7-bit address code and a write bit.  
Each slave compares the address code with its address.  
The send byte write bit is Low. The selected slaves then  
reply with an acknowledge bit by pulling the SDA line Low.  
Next, the host sends an 8-bit command byte. When the  
selected slave receives the whole command byte, it ac-  
knowledges and retains the command byte in the shift  
register. The host can terminate the serial transfer with a  
stop bit or communicate with another slave device with a  
repeatstart.Whenarepeatstartoccursbut theslaveisnot  
selected, the command byte data is kept in the shift  
register but the multiplexer control is not updated. The  
multiplexer control latches the new command from the  
shift register on the first stop bit after a successful com-  
mand byte transfer. This allows the host to synchronize  
several slave devices with a single stop bit. A1 and A0  
select one of the four possible LTC1380/LTC1393 ad-  
dresses as shown in Table 1. This allows up to four similar  
devices to share the same SMBus, expanding the multi-  
plexer to 32 single-ended channels with the LTC1380; 16  
differential channels with the LTC1393. The first stop bit  
after a successful send byte transfer will latch in the  
multiplexer control bits (EN, C2, C1 and C0) and initiate a  
break-before-make sequence.  
The LTC1380/LTC1393 are analog input multiplexers with  
anSMBusdigitalinterface. TheLTC1380isasingle-ended  
8-to-1 multiplexer; the LTC1393 is a differential 4-to-1  
mulitplexer. The LTC1380 operates on either bipolar or  
unipolar supplies, the LTC1393 operates on a single  
supply.TheminimumVCCsupplyfortheLTC1380/LTC1393  
is 2.7V. The maximum supply voltage (VCC to VEE for the  
LTC1380, VCC for the LTC1393) should not exceed 14V.  
The multiplexer switches operate within the entire power  
supply range. The LTC1380 VCC and VEE supplies can be  
offset such as 2.7V/–11V and 11V/3V.  
Serial Interface  
The LTC1380/LTC1393 serial interface supports SMBus  
send byte protocol as shown below with two interface  
signals, SCL and SDA.  
LTC1380 Send Byte Protocol  
S
1
0
0
1
0
A1 A0  
W
A
A
X
X
X
X
X
X
EN C2 C1 C0  
A
A
P
P
LTC1393 Send Byte Protocol  
S
1
0
0
1
1
A1 A0  
W
X
X
EN C2 C1 C0  
ADDRESS BYTE  
COMMAND BYTE  
S = SMBus START BIT  
P = SMBus STOP BIT (THE FIRST STOP BIT AFTER A SUCCESSFUL COMMAND BYTE  
UPDATES THE MULTIPLEXER CONTROL LATCH)  
A = ACKNOWLEDGE BIT FROM LTC1380/LTC1393  
W = WRITE COMMAND BIT  
A1, A0 = ADDRESS BITS  
EN, C2, C1, C0 = MULTIPLEXER CONTROL BITS  
8
LTC1380/LTC1393  
U
W U U  
APPLICATIONS INFORMATION  
Table 1. LTC1380/LTC1393 Address Selection  
Both the LTC1380 and LTC1393 are compatible with the  
Philips/Signetics I2C Bus interface. This 1V threshold for  
SCA and SDA should not pose an operational problem  
with I2C applications.  
A1  
0
A0  
0
LTC1380  
90H  
LTC1393  
98H  
0
1
92H  
9AH  
1
0
94H  
9CH  
ThemultiplexerswitchesareselectedasshowninTable2.  
Both the LTC1380 and the LTC1393 have an enable bit  
(EN). A Low disables all switches while a High enables the  
selected switch as programmed by bits C2, C1 and C0. A  
stopbitafterasuccessfulsendbytesequenceforLTC1380/  
LTC1393 will disable all switches before the new selected  
switch is connected.  
1
1
96H  
9EH  
SCListhesynchronizingclockgeneratedbythehost. SDA  
is the bidirectional data transfer between the host and the  
slave. ThehostinitiatesastartbitbydroppingtheSDAline  
from High to Low while the SCL is High. The stop bit is  
initiated by changing the SDA line from Low to High while  
SCL is High. All address, command and acknowledge  
signals must be valid and should not change while SCL is  
High. The acknowledge bit signals to the host the accep-  
tance of a correct address byte or the command byte.  
Table 2. Multiplexer Control Bits Truth Table  
+
LTC1380 D  
LTC1393 D , D  
O O  
O
EN  
0
C2  
X
0
C1  
X
0
C0  
X
0
CHANNEL STATUS  
CHANNEL STATUS  
All Off  
S0  
All Off  
+
1
S0 , S0  
At VCC supply above 2.7V, the SCL and SDA input thresh-  
old is typically 1V with an input hysteresis of 100mV. The  
typical SCL and SDA lines have either a resistive or current  
sourcepull-upatthehost. TheLTC1380/LTC1393havean  
open-drain NMOS transistor at the SDA pin to sink 3mA  
below 0.4V during the slave acknowledge sequence. The  
address selection input A1 and A0 are TTL compatible at  
VCC = 5V.  
1
0
0
1
S1  
+
1
0
1
0
S2  
S1 , S1  
1
0
1
1
S3  
+
1
1
0
0
S4  
S2 , S2  
1
1
0
1
S5  
+
1
1
1
0
S6  
S3 , S3  
1
1
1
1
S7  
U
TYPICAL APPLICATIONS  
Simplified LTC1393 Application  
5V  
SMBus  
HOST  
1
2
3
4
5
6
7
8
16  
+
0.1µF  
15k  
15k  
S0  
S0  
S1  
S1  
S2  
S2  
S3  
S3  
V
CC  
15  
14  
13  
12  
11  
10  
9
SCL  
SDA  
A0  
SCL  
SDA  
+
+
+
4 DIFFERENTIAL  
ANALOG INPUTS  
LTC1393  
A1  
GND  
D
D
O
DIFFERENTIAL  
ANALOG OUTPUTS  
+
O
1380/93 TA03  
9
LTC1380/LTC1393  
U
TYPICAL APPLICATIONS  
16-Channel Multiplexer with Buffer  
5V  
SMBus  
HOST  
1
2
3
4
5
6
7
8
16  
0.1µF  
15k  
15k  
S0  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
V
CC  
15  
14  
13  
12  
11  
10  
9
SCL  
SDA  
A0  
SCL  
SDA  
LTC1380  
A1  
GND  
V
EE  
D
O
16  
ANALOG  
INPUTS  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
S0  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
V
CC  
SCL  
SDA  
A0  
LTC1380  
A1  
GND  
5V  
0.1µF  
LT1351  
V
OUT  
V
EE  
+
D
O
1380/93 TA04  
Programmable Gain Amplifier  
5V  
R0  
R1  
R2  
R3  
R4  
R5  
R6  
R7  
SMBus  
HOST  
1
16  
0.1µF  
15k  
15k  
S0  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
V
CC  
2
3
4
5
6
7
8
15  
14  
13  
12  
11  
10  
9
SCL  
SDA  
SCL  
SDA  
A0  
LTC1380  
A1  
GND  
0.1µF  
5V  
V
EE  
D
O
R
F
+
V
LT1055  
OUT  
ANALOG INPUT  
1380/93 TA05  
10  
LTC1380/LTC1393  
U
PACKAGE DESCRIPTION  
Dimensions in inches (millimeters) unless otherwise noted.  
GN Package  
16-Lead Plastic SSOP (Narrow 0.150)  
(LTC DWG # 05-08-1641)  
0.189 – 0.196*  
(4.801 – 4.978)  
16 15 14 13 12 11 10  
9
0.229 – 0.244  
(5.817 – 6.198)  
0.150 – 0.157**  
(3.810 – 3.988)  
1
2
3
4
5
6
7
8
0.015 ± 0.004  
(0.38 ± 0.10)  
× 45°  
0.053 – 0.068  
(1.351 – 1.727)  
0.004 – 0.0098  
(0.102 – 0.249)  
0.007 – 0.0098  
(0.178 – 0.249)  
0° – 8° TYP  
0.016 – 0.050  
(0.406 – 1.270)  
0.008 – 0.012  
(0.203 – 0.305)  
0.025  
(0.635)  
BSC  
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
GN16 (SSOP) 1197  
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
S Package  
16-Lead Plastic Small Outline (Narrow 0.150)  
(LTC DWG # 05-08-1610)  
0.386 – 0.394*  
(9.804 – 10.008)  
16  
15  
14  
13  
12  
11  
10  
9
0.150 – 0.157**  
0.228 – 0.244  
(3.810 – 3.988)  
(5.791 – 6.197)  
5
7
8
1
2
3
4
6
0.010 – 0.020  
(0.254 – 0.508)  
× 45°  
0.053 – 0.069  
(1.346 – 1.752)  
0.004 – 0.010  
(0.101 – 0.254)  
0.008 – 0.010  
(0.203 – 0.254)  
0° – 8° TYP  
0.050  
(1.270)  
TYP  
0.014 – 0.019  
(0.355 – 0.483)  
0.016 – 0.050  
0.406 – 1.270  
S16 0695  
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
11  
LTC1380/LTC1393  
U
TYPICAL APPLICATION  
8 Differential Channel Multiplexer with A/D Converter  
5V  
SMBus  
HOST  
1
16  
15  
14  
13  
12  
11  
10  
9
+
+
+
+
0.1µF  
15k  
15k  
S0  
V
CC  
2
3
4
5
6
7
8
S0  
S1  
S1  
S2  
S2  
S3  
S3  
SCL  
SDA  
A0  
SCL  
SDA  
LTC1393  
A1  
GND  
D
D
O
+
O
8 DIFFERENTIAL  
ANALOG INPUTS  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
+
+
+
+
S0  
S0  
S1  
S1  
S2  
S2  
S3  
S3  
V
CC  
SCL  
SDA  
A0  
4.7µF  
LTC1393  
A1  
LTC1286  
1
2
3
4
8
7
6
5
GND  
V
V
REF  
CC  
SERIAL CLOCK IN  
D
D
+IN  
IN  
CLK  
O
+
SERIAL CLOCK OUT  
D
O
OUT  
CS  
GND CS/SHDN  
1380/93 TA06  
RELATED PARTS  
PART NUMBER  
DESCRIPTION  
COMMENTS  
LTC201A/LTC202/  
LTC203  
Micropower, Low Charge Injection, Quad CMOS  
Analog Switches with Data Latches  
Each Channel is Independently Controlled  
LTC221/LTC222  
LTC1390/LTC1391  
LTC1623  
Micropower, Low Charge Injection, Quad CMOS Analog Switches  
8-Channel, Analog Multiplexer with Serial Interface  
High Side Switch with SMBus Interface  
Parallel Controlled with Data Latches  
3V to ±5V in 16-Pin SO and PDIP  
Regulated On-Board Charge Pump Drives  
External N-Channel MOSFETS  
138093f LT/GP 0398 4K • PRINTED IN USA  
12 Linear Technology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900  
FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com  
LINEAR TECHNOLOGY CORPORATION 1998  

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