LTC1436ACGN [Linear]
High Efficiency Low Noise Synchronous Step-Down Switching Regulators; 高效率,低噪声同步降压型开关稳压器型号: | LTC1436ACGN |
厂家: | Linear |
描述: | High Efficiency Low Noise Synchronous Step-Down Switching Regulators |
文件: | 总28页 (文件大小:521K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1436A
LTC1436A-PLL/LTC1437A
High Efficiency Low Noise
Synchronous Step-Down
Switching Regulators
U
FEATURES
DESCRIPTION
The LTC®1436A/LTC1437A are synchronous step-down
switching regulator controllers that drive external
N-channel power MOSFETs in a phase lockable, fixed
frequencyarchitecture.TheAdaptivePowerTM outputstage
selectively drives two N-channel MOSFETs at frequencies
up to 400kHz while reducing switching losses to maintain
high efficiencies at low output currents.
■
Maintains Constant Frequency at Low Output Currents
■
Dual N-Channel MOSFET Synchronous Drive
■
Programmable Fixed Frequency (PLL Lockable)
■
Wide VIN Range: 3.5V to 36V Operation
Low Minimum On-Time (≤300ns) for High
■
Frequency, Low Duty Cycle Applications
Very Low Dropout Operation: 99% Duty Cycle
Low Dropout, 0.5A Linear Regulator for CPU I/O
or Low Noise Audio Supplies
■
■
An auxiliary 0.5A linear regulator using an external PNP
pass device provides a low noise, low dropout voltage
source. A secondary winding feedback control pin (SFB)
guarantees regulation regardless of the load on the main
output by forcing continuous operation.
■
■
■
■
■
■
■
■
■
Built-In Power-On Reset Timer
Programmable Soft Start
Low-Battery Detector
Remote Output Voltage Sense
Foldback Current Limiting (Optional)
Pin Selectable Output Voltage
An additional comparator is available for use as a low-
batterydetector. Apower-onresettimer(POR)isincluded
which generates a signal delayed by 65536/fCLK (300ms
typically) after the output is within 5% of the regulated
output voltage. Internal resistive dividers provide pin
selectable output voltages with remote sense capability.
Logic Controlled Micropower Shutdown: IQ < 25µA
Output Voltages from 1.19V to 9V
Available in 24-Lead Narrow SSOP and 28-Lead
SSOP Packages U
APPLICATIONS
The operating current level is user-programmable via an
external current sense resistor. Wide input supply range
allows operation from 3.5V to 30V (36V maximum).
■
Notebook and Palmtop Computers, PDAs
■
Cellular Telephones and Wireless Modems
■
Portable Instruments
, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
■
Battery-Operated Devices
■
DC Power Distribution Systems
U
TYPICAL APPLICATION
V
IN
4.5V TO 22V
C
V
OSC
IN
C
IN
C
+
OSC
M1
Si4412DY
22µF
35V
× 2
TGL
TGS
43pF
RUN/SS
M3
C
SS
IRLML2803
0.1µF
SW
L1
4.7µH
R
SENSE
0.02Ω
I
D
B
CMDSH-3
TH
V
1.6V
5A
OUT
C
B
R
LTC1436A
C
C
C
0.1µF
10k
INTV
CC
510pF
SGND
BOOST
R1
+
100pF
C
D1
MBRS140T3
4.7µF
35.7k
OUT
+
M2
Si4412DY
100µF
6.3V
× 2
V
PROG
BG
R2
102k
V
OSENSE
SENSE
PGND
+
–
SENSE
1000pF
1436 F01
Figure 1. High Efficiency Step-Down Converter
1
LTC1436A
LTC1436-PLL-A/LTC1437A
W W
U W
ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage (VIN).........................36V to –0.3V
Topside Driver Supply Voltage (Boost)......42V to –0.3V
Switch Voltage (SW)............................. VIN + 5V to –5V
EXTVCC Voltage .........................................10V to –0.3V
POR, LBO Voltages ....................................12V to –0.3V
AUXFB Voltage ..........................................20V to –0.3V
AUXDR Voltage..........................................28V to –0.3V
SENSE+, SENSE–,
AUXON, PLLIN, SFB,
RUN/SS, LBI Voltages ..........................10V to –0.3V
Peak Driver Output Current < 10µs (TGL, BG).......... 2A
Peak Driver Output Current < 10µs (TGS) ......... 250mA
INTVCC Output Current ......................................... 50mA
Operating Temperature Range
LTC143XAC ............................................. 0°C to 70°C
LTC143XAI ........................................ –40°C to 85°C
Junction Temperature (Note 1)............................. 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
VOSENSE Voltages.................. INTVCC + 0.3V to –0.3V
V
PROG Voltage..................................... INTVCC to –0.3V
PLL LPF, ITH Voltages...............................2.7V to –0.3V
U
W U
PACKAGE/ORDER INFORMATION
TOP VIEW
TOP VIEW
TOP VIEW
PLL LPF
1
2
28 PLLIN
27 POR
26 BOOST
25 TGL
24 SW
PLL LPF
1
2
3
4
5
6
7
8
9
24 PLLIN
23 POR
22 BOOST
21 TGL
20 SW
C
1
2
3
4
5
6
7
8
9
24 POR
23 BOOST
22 TGL
21 SW
OSC
C
OSC
C
RUN/SS
LBO
OSC
RUN/SS
LBO
3
RUN/SS
4
I
LBI
TH
LBI
5
SFB
I
20 TGS
TH
I
6
23 TGS
TH
SGND
19 TGS
SFB
19
V
IN
SFB
7
V
22
IN
V
18
V
IN
SGND
18 INTV
17 BG
PROG
CC
SGND
8
21 INTV
20 DRV
CC
V
17 INTV
16 BG
V
OSENSE
CC
PROG
V
9
PROG
CC
–
SENSE
V
16 PGND
15 EXTV
OSENSE
–
V
10
11
12
13
14
19 BG
18 PGND
17 EXTV
OSENSE
+
SENSE 10
AUXON 11
AUXFB 12
15 PGND
14 EXTV
SENSE 10
CC
NC
+
–
SENSE 11
14 AUXDR
13 AUXFB
CC
SENSE
CC
+
13 AUXDR
AUXON 12
SENSE
16 AUXDR
15 AUXFB
AUXON
GN PACKAGE
GN PACKAGE
24-LEAD PLASTIC SSOP
(150 MIL SSOP)
24-LEAD PLASTIC SSOP
(150 MIL SSOP)
G PACKAGE
28-LEAD PLASTIC SSOP
T
JMAX = 125°C, θJA = 110°C/W
TJMAX = 125°C, θJA = 110°C/W
TJMAX = 125°C, θJA = 95°C/W
ORDER PART NUMBER
ORDER PART NUMBER
ORDER PART NUMBER
LTC1436ACGN
LTC1436AIGN
LTC1436ACGN-PLL
LTC1436AIGN-PLL
LTC1437ACG
LTC1437AIG
Consult factory for Military grade parts.
TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
I
V
Feedback Current
V
Pin Open (Note 2)
PROG
10
50
nA
IN OSENSE
V
Regulated Output Voltage
1.19V (Adjustable) Selected
3.3V Selected
(Note 2)
OUT
V
V
V
Pin Open
= 0V
●
●
●
1.178
3.220
4.900
1.19
3.30
5.00
1.202
3.380
5.100
V
V
V
PROG
PROG
PROG
5V Selected
= INTV
CC
2
LTC1436A
LTC1436A-PLL/LTC1437A
TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
0.002
MAX
UNITS
V
V
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 3.6V to 20V (Note 2), V Pin Open
PROG
0.01
%/V
LINEREG
IN
I
I
Sinking 5µA (Note 2)
Sourcing 5µA (Note 2)
●
●
0.5
–0.5
0.8
–0.8
%
%
LOADREG
TH
TH
V
Secondary Feedback Threshold
Secondary Feedback Current
Output Overvoltage Lockout
V
V
V
Ramping Negative
= 1.5V
●
1.16
1.24
1.19
–1
1.22
–2
V
µA
V
SFB
SFB
I
SFB
SFB
V
Pin Open
1.28
1.32
OVL
PROG
I
V
Input Current
PROG
PROG
0.5V > V
– 3
3
–6
6
µA
µA
PROG
INTV – 0.5V < V
< INTV
CC
CC
PROG
I
Input DC Supply Current
Normal Mode
Shutdown
EXTV = 5V (Note 3)
CC
Q
3.6V < V < 30V, V
= 0V
280
16
µA
µA
IN
AUXON
V
= 0V, 3.6V < V < 15V
25
2
RUN/SS
IN
V
RUN Pin Threshold
●
0.8
1.5
130
1.3
3
V
µA
RUN/SS
I
Soft Start Current Source
Maximum Current Sense Threshold
Minimum On-Time
V
V
= 0V
4.5
180
300
RUN/SS
RUN/SS
OSENSE
∆V
= 0V, 5V, V
Pin Open
150
250
mV
ns
SENSE(MAX)
PROG
–
t
Tested with Square Wave, SENSE = 1.6V,
ON(MIN)
∆V
SENSE
= 20mV (Note 6)
TGL Transition Time
Rise Time
TGL t
TGL t
C
C
= 3000pF
= 3000pF
50
50
150
150
ns
ns
r
f
LOAD
LOAD
Fall Time
TGS Transition Time
Rise Time
TGS t
TGS t
C
C
= 500pF
= 500pF
90
50
200
150
ns
ns
r
LOAD
LOAD
Fall Time
f
BG Transition Time
Rise Time
BG t
BG t
C
C
= 3000pF
= 3000pF
50
40
150
150
ns
ns
r
f
LOAD
LOAD
Fall Time
Internal V Regulator
CC
V
V
V
V
Internal V Voltage
6V < V < 30V, V = 4V
EXTVCC
●
●
4.8
4.5
5.0
–0.2
130
4.7
5.2
–1
V
%
INTVCC
CC
IN
INT
INTV Load Regulation
I
I
I
= 15mA, V
= 4V
LDO
LDO
CC
INTVCC
INTVCC
INTVCC
EXTVCC
EXTVCC
EXTVCC
EXT
EXTV Voltage Drop
= 15mA, V
= 15mA, V
= 5V
230
mV
V
CC
EXTV Switchover Voltage
Ramping Positive
EXTVCC
CC
Oscillator and Phase-Locked Loop
f
Oscillator Frequency
C
= 100pF, LTC1436 (Note 4),
OSC
112
200
125
138
kHz
OSC
LTC1436A-PLL/LTC1437A, V
LTC1436A-PLL/LTC1437A, V
= 0V
= 2.4V
PLLLPF
PLLLPF
VCO High
240
50
kHz
R
PLL IN Input Resistance
kΩ
PLLIN
I
Phase Detector Output Current
Sinking Capability
PLLLPF
f
f
< f
> f
10
10
15
15
20
20
µA
µA
PLLIN
PLLIN
OSC
OSC
Sourcing Capability
Power-On Reset
V
POR Saturation Voltage
POR Leakage
I
= 1.6mA, V
= 1V, V
Pin Open
Pin Open
0.6
0.2
1
1
V
µA
SATPOR
LPOR
POR
OSENSE
PROG
I
V
V
V
= 12V, V
= 1.2V, V
POR
OSENSE
PROG
V
POR Trip Voltage
POR Delay
Pin Open, V
Ramping Negative
OSENSE
–11
– 7.5
65536
– 4
%
THPOR
DPOR
PROG
PROG
t
Pin Open
Cycles
3
LTC1436A
LTC1436-PLL-A/LTC1437A
TA = 25°C, VIN = 15V, VRUN/SS = 5V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Low-Battery Comparator
V
LBO Saturation Voltage
LBO Leakage
I
= 1.6mA, V = 1.1V
0.6
0.01
1.19
1
1
1
V
µA
V
SATLBO
LBO
LBI
I
V
= 12V, V = 1.4V
●
●
●
LLBO
LBO
LBI
V
LBI Trip Voltage
LBI Input Current
LBO Hysteresis
High to Low Transition on LBO
1.16
1.22
50
THLBI
I
V
= 1.19V
nA
mV
INLBI
LBI
V
20
HYSLBO
Auxiliary Regulator/Comparator
I
AUXDR Current
V
= 0V
EXTVCC
AUXDR
Max Current Sinking Capability
Control Current
V
V
V
= 4V, V
= 1.0V, V
= 1.5V, V
AUXFB
= 5V
= 5V
AUXON
10
15
1
0.01
mA
µA
µA
AUXDR
AUXDR
AUXDR
AUXFB
AUXFB
AUXON
AUXON
= 5V, V
= 24V, V
5
1
Leakage When Off
= 1.5V, V
= 0V
I
I
AUXFB Input Current
AUXON Input Current
AUXON Trip Voltage
AUXDR Saturation Voltage
AUXFB Voltage
V
V
V
= 1.19V, V
= 5V
= 5V
0.01
0.01
1.19
0.4
1
µA
µA
V
IN AUXFB
IN AUXON
AUXFB
AUXON
AUXDR
AUXDR
AUXON
1
V
V
V
= 4V, V
= 1.0V
1.0
1.4
0.8
TH AUXON
SAT AUXDR
AUXFB
AUXFB
I
= 1.6mA, V
= 1.0V, V
= 5V
AUXON
V
AUXFB
V
V
= 5V, 11V < V
= 5V, 3V < V
< 24V (Note 5)
●
●
11.5
1.14
12
1.19
12.5
1.24
V
V
AUXON
AUXON
AUXDR
< 7V (Note 5)
AUXDR
V
AUXFB Divider Disconnect Voltage
V
= 5V (Note 5), Ramping Negative
7.5
8.5
9.5
V
TH AUXDR
AUXON
The
●
denotes specifications which apply over the full operating
Note 4: Oscillator frequency is tested by measuring the C
discharge currents and applying the formula:
charge and
OSC
temperature range.
LTC1436ACGN/LTC1436ACGN-PLL/LTC1437ACG: 0°C ≤ T ≤ 70°C
A
8.4(108)
–1
1
1
LTC1436AIGN/LTC1436AIGN-PLL/LTC1437AIG: –40°C ≤ T ≤ 85°C
+
A
f
(kHz) =
OSC
(
) (
)
C
(pF) + 11
I
I
OSC
CHG DIS
Note 1: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formulas:
D
Note 5: The Auxiliary Regulator is tested in a feedback loop which servos
LTC1436ACGN/LTC1436ACGN-PLL/LTC1436AIGN/
V
V
to the balance point for the error amplifier. For applications with
AUXFB
LTC1436AIGN-PLL: T = T + (P )(110 °C/W)
> 9.5V, V
uses an internal resistive divider. See
J
A
D
AUXDR
AUXFB
LTC1437ACG/LTC1437AIG: T = T + (P )(95 °C/W)
Applications Information.
Note 6: The minimum on-time test condition corresponds to an inductor
peak-to-peak ripple current ≥ 40% of I (see Minimum On-Time
J
A
D
Note 2: The LTC1436A/LTC1437A are tested in a feedback loop which
servos V to the balance point for the error amplifier
OSENSE
MAX
(V = 1.19V).
ITH
Considerations in the Applications Information section).
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information
section.
4
LTC1436A
LTC1436A-PLL/LTC1437A
W
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage
Efficiency vs Input Voltage
VOUT = 5V
V
OUT = 3.3V
Efficiency vs Load Current
100
95
90
85
80
75
70
100
95
90
85
80
75
70
100
V
V
= 10V
V
= 3.3V
IN
V
= 5V
OUT
OUT
95
90
85
80
75
70
65
60
55
50
= 5V
OUT
R
= 0.033Ω
SENSE
I = 1A
LOAD
I
= 1A
LOAD
CONTINUOUS
MODE
I
= 100mA
LOAD
Burst ModeTM
OPERATION
I
= 100mA
LOAD
Adaptive Power
MODE
0
10
15
20
25
30
0
10
15
20
25
30
5
5
0.001
0.01
0.1
1
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LOAD CURRENT (A)
1436 G01
1436 G02
1435 G03
VIN – VOUT Dropout Voltage
vs Load Current
Load Regulation
VITH Pin Voltage vs Output Current
0
–0.25
–0.50
–0.75
–1.00
–1.25
–1.50
3.0
2.5
0.5
0.4
0.3
0.2
0.1
R
= 0.033Ω
R
OUT
= 0.033Ω
SENSE
SENSE
V
DROP OF 5%
2.0
1.5
1.0
0.5
0
Burst Mode
OPERATION
CONTINUOUS/Adaptive
Power MODE
0
0
1.0
1.5
2.0
2.5
3.0
0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (%)
0
0.5
1.0
1.5
2.0
2.5
3.0
0.5
LOAD CURRENT (A)
LOAD CURRENT (A)
1436 G05
1436 G06
1436 G04
Input Supply Current
vs Input Voltage
EXTVCC Switch Drop
vs INTVCC Load Current
INTVCC Regulation
vs INTVCC Load Current
2.5
2.0
1.5
1.0
100
200
180
160
140
120
100
80
0.5
V
= 0V
EXTVCC
70°C
80
60
40
0.3
0
V
= 5V
OUT
25°C
EXTV = V
CC
70°C
25°C
OUT
–55°C
V
= 3.3V
CC
OUT
EXTV = OPEN
60
–0.3
–0.5
40
0.5
0
20
0
20
SHUTDOWN
10
INPUT VOLTAGE (V)
0
0
15
20
25
30
4
6
5
0
2
8
10
12 14
16 18 20
10
15
0
20
5
INTV LOAD CURRENT (mA)
CC
INTV LOAD CURRENT (mA)
CC
1436 G07
1436 G09
1436 G08
Burst Mode is a trademark of Linear Technology Corporation.
5
LTC1436A
LTC1436-PLL-A/LTC1437A
W
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TYPICAL PERFORMANCE CHARACTERISTICS
Normalized Oscillator Frequency
vs Temperature
RUN/SS Pin Current
vs Temperature
SFB Pin Current vs Temperature
10
5
0
–0.25
–1.50
–0.75
4
3
2
1
f
O
–1.00
–1.25
–1.50
–5
0
–10
60
TEMPERATURE (°C)
110 135
–40 –15 10
35
60
85 110 135
60
TEMPERATURE (°C)
110 135
–40 –15
10
35
85
–40 –15
10
35
85
TEMPERATURE (°C)
1436 G11
1436 G10
1436 G12
Maximum Current Sense
Threshold Voltage vs Temperature
Transient Response
Transient Response
154
152
150
148
VOUT
50mV/DIV
VOUT
50mV/DIV
ILOAD = 1A to 3A
1436 G15
ILOAD = 50mA to 1A
1436 G14
146
–40 –15 10
35
60
85 110 135
TEMPERATURE (°C)
1436 G13
Auxiliary Regulator Load
Regulation
Burst Mode Operation
Soft Start: Load Current vs Time
12.2
12.1
12.0
EXTERNAL PNP: 2N2907A
VOUT
20mV/DIV
RUN/SS
5V/DIV
INDUCTOR
CURRENT
1A/DIV
VITH
200mV/DIV
11.9
11.8
11.7
1436 G17
ILOAD = 50mA
1436 G16
0
40
80
120
160
200
AUXILIARY LOAD CURRENT (mA)
1436 G18
6
LTC1436A
LTC1436A-PLL/LTC1437A
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Auxiliary Regulator
Sink Current Available
Auxiliary Regulator PSRR
70
60
50
40
30
20
10
20
15
10
5
10mA LOAD
100mA LOAD
0
0
2
4
6
8
10 12 14 16
10
100
1000
AUX DR VOLTAGE (V)
FREQUENCY (kHz)
1436 G20
1436 G19
U
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PIN FUNCTIONS
SENSE–: The (–) Input to the Current Comparator.
SENSE+: The (+) Input to the Current Comparator. Built-
inoffsetsbetweenSENSE–andSENSE+ pinsinconjunction
with RSENSE set the current trip thresholds.
VIN: Main Supply Pin. Must be closely decoupled to the
IC’s signal ground pin.
INTVCC: Output of the Internal 5V Regulator and EXTVCC
Switch. The driver and control circuits are powered from
this voltage. Must be closely decoupled to power ground
withaminimumof2.2µFtantalumorelectrolyticcapacitor.
VOSENSE: Receives the remotely sensed feedback voltage
either from the output or from an external resistive divider
across the output . The VPROG pin determines which point
VOSENSE must connect to.
DRVCC: Bottom MOSFET Driver Supply Voltage.
EXTVCC:InputtotheInternalSwitchConnectedtoINTVCC.
This switch closes and supplies VCC power whenever
EXTVCC is higher than 4.7V. See EXTVCC connection in
Applications Information section. Do not exceed 10V on
this pin. Connect to VOUT if VOUT ≥ 5V.
VPROG: This voltage selects the output voltage. For VPROG
< VINTVCC/3 the output is set to 3.3V with VOSENSE
connected to the output. With VPROG > VINTVCC/1.5 the
output is set to 5V with VOSENSE connected to the output.
Leaving VPROG open (DC) allows the output voltage to be
BOOST: Supply to Topside Floating Driver. The bootstrap
capacitor is returned to this pin. Voltage swing at this pin
is from INTVCC to VIN + INTVCC.
set by an external resistive divider connected to VOSENSE
OSC: External capacitor COSC from this pin to ground sets
the operating frequency.
.
C
SW: Switch Node Connection to Inductor. Voltage swing
at this pin is from a Schottky diode (external) voltage drop
below ground to VIN.
ITH: Error Amplifier Compensation Point. The current
comparator threshold increases with this control voltage.
Nominal voltage range for this pin is 0V to 2.5V.
SGND: Small Signal Ground. Must be routed separately
from other grounds to the (–) terminal of COUT
.
RUN/SS: Combination of Soft Start and Run Control
Inputs. Acapacitortogroundatthispinsetstheramptime
to full current output. The time is approximately 0.5s/µF.
PGND: Driver Power Ground. Connects to source of
bottom N-channel MOSFET and the (–) terminal of CIN.
7
LTC1436A
LTC1436-PLL-A/LTC1437A
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PIN FUNCTIONS
Forcing this pin below 1.3V causes the device to be shut
down. In shutdown all functions are disabled.
LBI: The (+) Input of the Low Battery Voltage Comparator.
The (–) input is connected to a 1.19V reference.
TGL: High Current Gate Drive for Main Top N-Channel
MOSFET. This is the output of a floating driver with a
voltage swing equal to INTVCC superimposed on the
switch node voltage SW.
PLLIN: External Synchronizing Input to Phase Detector.
This pin is internally terminated to SGND with 50kΩ. Tie
this pin to SGND in applications which do not use the
phase-locked loop.
TGS: High Current Gate Drive for a Small Top N-Channel
MOSFET. This is the output of a floating driver with a
voltage swing equal to INTVCC superimposed on the
switch node voltage SW. Leaving TGS open invokes Burst
Mode operation at low load currents.
PLL LPF: Output of Phase Detector and Control Input of
Oscillator. Normally a series RC lowpass filter network is
connected from this pin to ground. Tie this pin to SGND in
applications which do not use the phase-locked loop. Can
bedrivenby0Vto2.4Vlogicsignalforafrequencyshifting
option.
BG: High Current Gate Drive for Bottom N-Channel
MOSFET. Voltage swing at this pin is from ground to
INTVCC (DRVCC).
AUXFB: Feedback Input to the Auxiliary Regulator/
Comparator. When used as a linear regulator, this input
can either be connected to an external resistive divider or
directly to the collector of the external PNP pass device for
12V operation. When used as a comparator, this is the
noninverting input of a comparator whose inverting input
is tied to the internal 1.19V reference. See Auxiliary
Regulator/ComparatorinApplicationsInformationsection.
SFB: Secondary Winding Feedback Input. Normally
connected to a feedback resistive divider from the
secondary winding. This pin should be tied to: ground to
force continuous operation; INTVCC in applications that
don’tuseasecondarywinding;andaresistivedividerfrom
the output in applications using a secondary winding.
AUXON:Pullingthispinhighturnsontheauxiliaryregulator/
POR: Open Drain Output of an N-Channel Pull-Down. This
pin sinks current when the output voltage is 7.5% out of
regulation and releases 65536 oscillator cycles after the
output voltage rises to –5% of its regulated value. The
POR output is asserted when Run/SS is low independent
comparator. The threshold is 1.19V.
AUXDR: Open Drain Output of the Auxiliary Regulator/
Comparator. The base of an external PNP device is
connected to this pin for use as a linear regulator. An
externalpull-upresistorisrequiredforuseasacomparator.
A voltage > 9.5V on AUXDR causes the internal 12V
resistive divider to be connected to AUXFB.
of VOUT
.
LBO: Open Drain Output of an N-Channel Pull-Down. This
pin will sink current when the LBI pin goes below 1.19V.
8
LTC1436A
LTC1436A-PLL/LTC1437A
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FUNCTIONAL DIAGRA
9
LTC1436A
LTC1436-PLL-A/LTC1437A
U
(Refer to Functional Diagram)
OPERATIO
Main Control Loop
N-channel MOSFET used in conjunction with a Schottky
diode for operation at low currents. This allows the loop to
continue to operate at normal frequency as the load
current decreases without incurring the large MOSFET
gate charge losses. If the TGS pin is left open, the loop
defaults to Burst Mode operation in which the large
MOSFETs operate intermittently based on load demand.
The LTC1436A/LTC1437A use a constant frequency, cur-
rent mode step-down architecture. During normal opera-
tion, the top MOSFET is turned on each cycle when the
oscillator sets the RS latch and turned off when the main
current comparator I1 resets the RS latch. The peak
inductor current at which I1 resets the RS latch is con-
trolledbythevoltageonI pin, whichistheoutputoferror
AdaptivePowermodeprovidesconstantfrequencyopera-
tion down to approximately 1% of rated load current. This
results in an order of magnitude reduction of load current
before Burst Mode operation commences. Without the
small MOSFET (i.e.: no Adaptive Power mode), the transi-
tion to Burst Mode operation is approximately 10% of
rated load current.
TH
amplifierEA. V
andV
pins, describedinthePin
PRGM
OSENSE
Functions, allow EA to receive an output feedback voltage
V fromeitherinternalorexternalresistivedividers.When
FB
the load current increases, it causes a slight decrease in
V relativetothe1.19Vreference,whichinturncausesthe
FB
TH
I
voltage to increase until the average inductor current
matchesthenewloadcurrent.WhilethetopMOSFETisoff,
the bottom MOSFET is turned on until either the inductor
current starts to reverse, as indicated by current compara-
tor I2, or the beginning of the next cycle.
The transition to low current operation begins when com-
parator I2 detects current reversal and turns off the
bottom MOSFET. If the voltage across RSENSE does not
exceed the hysteresis of I2 (approximately 20mV) for one
fullcycle,thenonfollowingcyclesthetopdriveisroutedto
the small MOSFET at TGS pin and BG pin is disabled. This
continues until an inductor current peak exceeds 20mV/
RSENSE or the ITH voltage exceeds 0.6V, either of which
causes drive to be returned to TGL pin on the next cycle.
The top MOSFET drivers are biased from floating boot-
strap capacitor CB, which normally is recharged during
each off cycle. However, when VIN decreases to a voltage
close to VOUT, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on, and periodically forces a brief off
period to allow CB to recharge.
Twoconditionscanforcecontinuoussynchronousopera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltageoftheSENSE+ andSENSE– pinsisbelow1.4Vand
the other is when the SFB pin is below 1.19V. The latter
conditionisusedtoassistinsecondarywindingregulation
as described in the Applications Information section.
The main control loop is shut down by pulling RUN/SS pin
low. Releasing RUN/SS allows an internal 3µA current
source to charge soft start capacitor CSS. When CSS
reaches 1.3V, the main control loop is enabled with the ITH
voltage clamped at approximately 30% of its maximum
value. As CSS continues to charge, ITH is gradually re-
leased allowing normal operation to resume.
Frequency Synchronization
A Phase-locked loop (PLL) is available on the
LTC1436A-PLLandLTC1437Atoallowtheoscillatortobe
synchronized to an external source connected to the
PLLINpin. TheoutputofthephasedetectoratthePLLLPF
pin is also the control input of the oscillator, which
operates over a 0V to 2.4V range corresponding to –30%
to30%infrequency.Whenlocked,thePLLalignstheturn-
on of the top MOSFET to the rising edge of the synchroniz-
ing signal. When PLLIN is left open or at a constant DC
voltage, PLL LPF goes low, forcing the oscillator to mini-
mum frequency.
Comparator OV guards against transient overshoots
>7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
Low Current Operation
Adaptive Power mode allows the LTC1436A/LTC1437A to
automatically change between two output stages sized for
different load currents. TGL and BG pins drive large
synchronous N-channel MOSFETs for operation at high
currents, while the TGS pin drives a much smaller
10
LTC1436A
LTC1436A-PLL/LTC1437A
U
(Refer to Functional Diagram)
OPERATIO
Power-On Reset
The AUX block can be used as a comparator having its
inverting input tied to the internal 1.19V reference. The
AUXDR pin is used as the output and requires an external
pull-up to a supply less than 8.5V in order to inhibit the
invoking of the internal resistive divider.
The POR pin is an open drain output which pulls low when
the main regulator output voltage is out of regulation.
When the output voltage rises to within 7.5% of regula-
tion, a timer is started which releases POR after 216
(65536) oscillator cycles. In shutdown, the POR output is
pulled low.
INTVCC/DRVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
oftheotherLTC1436A/LTC1437Acircuitryisderivedfrom
the INTVCC pin. The bottom MOSFET driver supply DRVCC
pin is internally connected to INTVCC in the LTC1436A and
externally connected to INTVCC in the LTC1437A. When
the EXTVCC pin is left open, an internal 5V low dropout
regulatorsuppliesINTVCC power.IfEXTVCC istakenabove
4.8V, the 5V regulator is turned off and an internal switch
is turned on to connect EXTVCC to INTVCC. This allows the
INTVCC powertobederivedfromahighefficiencyexternal
source such as the output of the regulator itself or a
secondarywinding, asdescribedintheApplicationsInfor-
mation section.
Auxiliary Linear Regulator
The auxiliary linear regulator in the LTC1436A/LTC1437A
controls an external PNP transistor for operation up to
500mA. An internal AUXFB resistive divider set for 12V
operation is invoked when AUXDR pin is above 9.5V to
allow 12V VPP supplies to be easily implemented. When
AUXDR is below 8.5V an external feedback divider may be
used to set other output voltages. Taking the AUXON pin
low shuts down the auxiliary regulator providing a conve-
nient logic controlled power supply.
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APPLICATIONS INFORMATION
The basic LTC1436A application circuit is shown in Figure
1, High Efficiency Step-Down Converter. External compo-
nent selection is driven by the load requirement, and
begins with the selection of RSENSE. Once RSENSE is
known, COSC and L can be chosen. Next, the power
MOSFETs and D1 are selected. Finally, CIN and COUT are
selected. The circuit shown in Figure 1 can be configured
for operation up to an input voltage of 28V (limited by the
external MOSFETs).
100mV
IMAX
RSENSE
=
The LTC1436A/LTC1437A work well with RSENSE values
≥ 0.005Ω.
COSC Selection for Operating Frequency
The LTC1436A/LTC1437A use a constant frequency
architecture with the frequency determined by an external
oscillator capacitor COSC. Each time the topside MOSFET
turnson,thevoltageonCOSC isresettoground.Duringthe
on-time, COSC is charged by a fixed current plus an
additional current which is proportional to the output
voltage of the phase detector VPLLLPF (LTC1436A-PLL/
LTC1437A). When the voltage on the capacitor reaches
1.19V, COSC is reset to ground. The process then repeats.
The value of COSC is calculated from the desired operating
frequency. Assuming the phase-locked loop has no exter-
nal oscillator input (VPLLLPF = 0V):
RSENSE Selection For Output Current
RSENSE is chosen based on the required output current.
TheLTC1436A/LTC1437Acurrentcomparatorhasamaxi-
mum threshold of 150mV/RSENSE and an input common
mode range of SGND to INTVCC. The current comparator
threshold sets the peak of the inductor current, yielding a
maximum average output current IMAX equal to the peak
value less half the peak-to-peak ripple current ∆IL.
Allowing a margin for variations in the LTC1436A/
LTC1437A and external component values yields:
11
LTC1436A
LTC1436-PLL-A/LTC1437A
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VOUT
1
4
∆IL =
VOUT 1−
1.37(10 )
C
pF =
– 11
V
( )
OSC
f L
( )( )
IN
Frequency kHz
(
)
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4 (IMAX). Remember, the
maximum ∆IL occurs at the maximum input voltage.
A graph for selecting COSC vs frequency is given in Figure
2. As the operating frequency is increased the gate
charge losses will be higher, reducing efficiency (see
EfficiencyConsiderations).Themaximumrecommended
switching frequency is 400kHz. When using Figure 2 for
synchronizable applications, choose COSC correspond-
ing to a frequency approximately 30% below your center
frequency. (SeePhase-LockedLoopandFrequencySyn-
chronization.)
The inductor value also has an effect on low current
operation. The transition to low current operation begins
when the inductor current reaches zero while the bottom
MOSFET is on. Lower inductor values (higher ∆IL) will
cause this to occur at higher load currents, which can
cause a dip in efficiency in the upper range of low current
operation. In Burst Mode operation (TGS pin open),
lowerinductancevalueswillcausetheburstfrequencyto
decrease.
300
V
= 0V
PLLLPF
250
200
150
100
50
The Figure 3 graph gives a range of recommended induc-
tor values vs operating frequency and VOUT
.
60
V
V
V
= 5V
= 3.3V
≤ 2.5V
OUT
OUT
OUT
50
40
30
20
10
0
0
0
100
200
300
400
500
OPERATING FREQUENCY (kHz)
1436 F02
Figure 2. Timing Capacitor Value
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
0
100
150
200
250
300
50
OPERATING FREQUENCY (kHz)
1436 F03
Figure 3. Recommended Inductor Values
For low duty cycle, high frequency applications where the
required minimum on-time,
V
OUT
t
=
ON(MIN)
V
f
(
)( )
IN(MAX)
Theinductorvaluehasadirecteffectonripplecurrent.The
inductor ripple current ∆IL decreases with higher induc-
is less than 350ns, there may be further restrictions on the
inductance to ensure proper operation. See Minimum On-
Time Considerations section for more details.
tance or frequency and increases with higher VIN or VOUT
:
12
LTC1436A
LTC1436A-PLL/LTC1437A
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APPLICATIONS INFORMATION
Inductor Core Selection
frequency operation down to lower currents before cycle
skipping occurs.
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite,
molypermalloy, or Kool Mµ® cores. Actual core loss is
independent of core size for a fixed inductor value, but it
is very dependent on inductance selected. As inductance
increases,corelossesgodown.Unfortunately,increased
inductance requires more turns of wire and therefore
copper losses will increase.
The RDS(ON) recommended for the small MOSFET is
around 0.5Ω. Be careful not to use a MOSFET with an
R
DS(ON) that is too low; remember, we want to conserve
gatecharge. (AhigherRDS(ON) MOSFEThasasmallergate
capacitance and thus requires less current to charge its
gate). For cost sensitive applications the small MOSFET
can be removed. The circuit will then begin Burst Mode
operation as the load current is dropped.
The peak-to-peak gate drive levels are set by the INTVCC
voltage. This voltage is typically 5V during start-up (see
EXTVCC Pin Connection). Consequently, logic level
threshold MOSFETs must be used in most LTC1436A/
LTC1437Aapplications.Theonlyexceptionisapplications
in which EXTVCC is powered from an external supply
greaterthan8V(mustbelessthan10V),inwhichstandard
thresholdMOSFETs[VGS(TH)<4V]maybeused.Payclose
attention to the BVDSS specification for the MOSFETs as
well; many of the logic level MOSFETs are limited to 30V
or less.
Ferrite designs have very low core loss and are prefered at
high switching frequencies, so design goals can concen-
trate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Molypermalloy (from Magnetics, Inc.) is a very good, low
losscorematerialfortoroids,butitismoreexpensivethan
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire.
Because they generally lack a bobbin, mounting is more
difficult. However, designsforsurfacemountareavailable
which do not increase the height significantly.
SelectioncriteriaforthepowerMOSFETsincludethe“ON”
resistance RSD(ON), reverse transfer capacitance CRSS
,
input voltage and maximum output current. When the
LTC1436A/LTC1437A are operating in continuous mode
the duty cycles for the top and bottom MOSFETs are
given by:
VOUT
Power MOSFET and D1 Selection
Main Switch Duty Cycle =
V
IN
Three external power MOSFETs must be selected for use
with the LTC1436A/LTC1437A: a pair of N-channel MOS-
FETs for the top (main) switch and an N-channel MOSFET
for the bottom (synchronous) switch.
V − V
(
)
IN
OUT
Synchronous Switch Duty Cycle =
V
IN
The MOSFET power dissipations at maximum output
current are given by:
TotakeadvantageoftheAdaptivePoweroutputstage, two
topside MOSFETs must be selected. A large (low RSD(ON)
)
MOSFET and a small (higher RDS(ON)) MOSFET are
required. The large MOSFET is used as the main switch
and works in conjunction with the synchronous switch.
The smaller MOSFET is only enabled under low load
current conditions. This increases midcurrent efficiencies
whilecontinuingtooperateatconstantfrequency.Also,by
using the small MOSFET the circuit can maintain constant
Kool Mµ is a registered trademark of Magnetics, Inc.
2
) (
V
V
OUT
P
=
I
1+δ R
(
)
MAIN
MAX
DS ON
(
)
IN
1.85
)
+k V
I
C
)(
f
(
(
)( )
IN
MAX RSS
2
) (
V − V
IN
OUT
P
=
I
(
1+δ R
)
SYNC
MAX
DS ON
(
)
V
IN
13
LTC1436A
LTC1436-PLL-A/LTC1437A
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APPLICATIONS INFORMATION
where δ is the temperature dependency of RDS(ON) and k
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is com-
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
ripple current ratings are often based on only 2000 hours
of life. This makes it advisable to further derate the
capacitor, or to choose a capacitor rated at a higher
temperaturethanrequired.Severalcapacitorsmayalsobe
paralleled to meet size or height requirements in the
design. Always consult the manufacturer if there is any
question.
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
VIN < 20V the high current efficiency generally improves
with larger MOSFETs, while for VIN > 20V the transition
losses rapidly increase to the point that the use of a higher
RDS(ON) device with lower CRSS actual provides higher
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the
duty cycle in this switch is nearly 100%. Refer to the
Foldback Current Limiting section for further applications
information.
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisified, the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
The term (1 + δ) is generally given for a MOSFET in the
form of a normalized RDS(ON) vs temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltageMOSFETs.CRSS isusuallyspecifiedintheMOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
1
∆VOUT ≈ ∆IL ESR +
4fCOUT
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. With ∆IL = 0.4IOUT(MAX) the output
ripplewillbelessthan100mVatmaximumVIN,assuming:
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
chargeduringthedead-time, whichcouldcostasmuchas
1% in efficiency. During low current operation, D1 oper-
ates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
generally a good compromise for both regions of opera-
tion due to the relatively small average current.
COUT Required ESR < 2RSENSE
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest ESR (size)
product of any aluminum electrolytic at a somewhat
higher price. Once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surfacemountconfigurations. Inthecaseoftantalum, itis
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
CIN and COUT Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
/
1/2
]
VOUT V − V
(
)
IN
OUT
[
CIN Required IRMS ≈IMAX
V
IN
14
LTC1436A
LTC1436A-PLL/LTC1437A
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include Sanyo OS-CON, Nichicon PL series and Sprague
593D and595D series. Consultthe manufacturer forother
specific recommendations.
factor of Duty Cycle Efficiency. For 5V regulators this
/
supplymeansconnectingthe EXTVCC pindirectlytoVOUT
.
However, for 3.3V and other lower voltage regulators,
additional circuitry is required to derive INTVCC power
from the output.
INTVCC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1436A/LTC1437A. The INTVCC pin can
supply up to 15mA and must be bypassed to ground with
a minimum of 2.2µF tantalum or low ESR electrolytic.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate drivers.
The following list summarizes the four possible connec-
tions for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 5V regulator resulting
in an efficiency penalty of up to 10% at high input
voltages.
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
High input voltage applications, in which large MOSFETs
are being driven at high frequencies, may cause the
maximum junction temperature rating for the LTC1436A/
LTC1437A to be exceeded. The IC supply current is
dominated by the gate charge supply current when not
using an output derived EXTVCC source. The gate charge
is dependent on operating frequency as discussed in the
Efficiency Considerations section. The junction tempera-
ture can be estimated by using the equations given in Note
1 of the Electrical Characteristics. For example, the
LTC1437A is limited to less than 19mA from a 30V supply:
3. EXTVCC connectedtoanoutput-derivedboostnetwork.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTVCC to an
output-derived voltage which has been boosted to
greater than 4.8V. This can be done with either the
inductive boost winding as shown in Figure 4a or the
capacitivechargepumpshowninFigure4b.Thecharge
pump has the advantage of simple magnetics.
4. EXTVCC connected to an external supply. If an external
T = 70°C+ 19mA 30V 95°C/W = 124°C
(
)(
)(
)
J
supply is available in the 5V to 10V range (EXTVCC
<
VIN), it may be used to power EXTVCC, providing it is
compatible with the MOSFET gate drive requirements.
When driving standard threshold MOSFETs, the exter-
nal supply must always be present during operation to
prevent MOSFET failure due to insufficient gate drive.
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked when
operating in continuous mode at maximum VIN.
EXTVCC Connection
The LTC1436A/LTC1437A contain an internal P-channel
MOSFET switch connected between the EXTVCC and
INTVCC pins. The switch closes and supplies the INTVCC
power whenever the EXTVCC pin is above 4.8V, and
remains closed until EXTVCC drops below 4.5V. This
allows the MOSFET driver and control power to be derived
OPTIONAL EXTV
CONNECTION
CC
+
V
IN
C
IN
5V ≤ V
≤ 9V
SEC
1N4148
V
SEC
V
LTC1436A
LTC1437A
IN
+
T1
1:N
1µF
N-CH
TGL
TGS
SW
BG
R
EXTV
CC
SENSE
N-CH
from the output during normal operation (4.8V < VOUT
<
V
OUT
R6
R5
+
9V) and from the internal regulator when the output is out
of regulation (start-up, short circuit). Do not apply greater
than 10V to the EXTVCC pin and ensure that EXTVCC < VIN.
C
OUT
SFB
N-CH
SGND
PGND
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting
from the driver and control currents will be scaled by a
1436 F04a
Figure 4a. Secondary Output Loop and EXTVCC Connection
15
LTC1436A
LTC1436-PLL-A/LTC1437A
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+
GND: V
= 3.3V
= 5V
+
V
IN
OUT
INTV : V
V
1µF
0.22µF
PROG
C
CC OUT
IN
BAT85
BAT85
BAT85
L1
V
OUT
V
OSENSE
LTC1436A
LTC1437A
+
V
LTC1436A
LTC1437A
C
OUT
IN
SGND
N-CH
TGL
TGS
SW
BG
VN2222LL
1436 F05a
R
EXTV
CC
SENSE
N-CH
+
Figure 5a. LTC1436A/LTC1437A Fixed Output Applications
C
OUT
N-CH
PGND
1.19V ≤ V
≤ 9V
OUT
1436 F04b
OPEN (DC)
V
PROG
R2
Figure 4b. Capacitive Charge Pump for EXT VCC
V
OSENSE
LTC1436A
LTC1437A
100pF
R1
SGND
R2
Topside MOSFET Driver Supply (CB, DB)
An external bootstrap capacitor CB connected to the Boost
pin supplies the gate drive voltage for the topside
MOSFET(s). Capacitor CB in the functional diagram is
charged through diode DB from INTVCC when the SW pin
is low. When one of the topside MOSFET(s) is to be turned
on, the driver places the CB voltage across the gate source
of the desired MOSFET. This enhances the MOSFET and
turns on the topside switch. The switch node voltage SW
rises to VIN and the Boost pin rises to VIN + INTVCC. The
value of the boost capacitor CB needs to be 100 times
greater than the total input capacitance of the topside
MOSFET(s). In most applications 0.1µF is adequate. The
reverse breakdown on DB must be greater than VIN(MAX).
1436 F05b
V
OUT
= 1.19V 1 +
R1
Figure 5b. LTC1436A/LTC1437A Adjustable Applications
Power-On Reset Function (POR)
The power-on reset function monitors the output voltage
and turns on an open drain device when it is out of
regulation. An external pull-up resistor is required on the
POR pin.
When power is first applied or when coming out of
shutdown, the POR output is pulled to ground. When the
output voltage rises above a level which is 5% below the
final regulated output value, an internal counter starts.
After counting 216 (65536) clock cycles, the POR pull-
down device turns off.
Output Voltage Programming
The output voltage is pin selectable for all members of the
LTC1436A/LTC1437A family. The output voltage is
selected by the VPROG pin as follows:
The POR output will go low whenever the output voltage
drops below 7.5% of its regulated value for longer than
approximately30µs, signalinganout-of-regulationcondi-
tion. In shutdown, the POR output is pulled low even if the
regulator’s output is held up by an external source.
VPROG = 0V
VPROG = INTVCC
VPROG = Open (DC)
VOUT = 3.3V
VOUT = 5V
VOUT = Adjustable
The LTC1436A/LTC1437A family also has remote output
voltage sense capability. The top of an internal resistive
divider is connected to VOSENSE. For fixed 3.3V and 5V
output voltage applications the VOSENSE pin is connected
to the output voltage as shown in Figure 5a. When using
anexternalresistivedivider,theVPROG pinisleftopen(DC)
andtheVOSENSE pinisconnectedtothefeedbackresistors
as shown in Figure 5b.
Run/Soft Start Function
The RUN/SS pin is a dual purpose pin that provides the
soft start function and a means to shut down the
LTC1436A/LTC1437A. Soft start reduces surge currents
from VIN by gradually increasing the internal current limit.
Power supply sequencing can also be accomplished
using this pin.
16
LTC1436A
LTC1436A-PLL/LTC1437A
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APPLICATIONS INFORMATION
Foldback current limiting is implemented by adding a
diode DFB between the output and ITH pins as shown in the
Function Diagram. In a hard short (VOUT = 0V), the current
will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applica-
tions with regulated output voltages of 1.8V or greater.
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS reaches 1.3V
the LTC1436A/LTC1437A begin operating. As the voltage
on RUN/SS continues to ramp from 1.3V to 2.4V, the
internalcurrentlimitisalsorampedataproportionallinear
rate. The current limit begins at approximately 50mV/
RSENSE (at VRUN/SS = 1.3V) and ends at 150mV/RSENSE
(VRUN/SS > 2.7V). The output current thus ramps up
slowly, charging the output capacitor. If RUN/SS has been
pulled all the way to ground there is a delay before starting
of approximately 500ms/µF, followed by an additional
500ms/µF to reach full current.
Phase-Locked Loop and Frequency Synchronization
The LTC1436A-PLL/LTC1437A each have an internal volt-
age-controlled oscillator and phase detector comprising a
phase-lockedloop. ThisallowsthetopMOSFETturn-onto
be locked to the rising edge of an external source. The
frequency range of the voltage-controlled oscillator is
±30% around the center frequency fO.
t
DELAY = 5(105)CSS seconds
Pulling the RUN/SS pin below 1.3V puts the LTC1436A/
LTC1437A into a low quiescent current shutdown (IQ <
25µA). This pin can be driven directly from logic as shown
inFigure6. DiodeD1inFigure6reducesthestartdelaybut
allows CSS to ramp up slowly for the soft start function;
thisdiodeandCSScanbedeletedifsoftstartisnotneeded.
The RUN/SS pin has an internal 6V Zener clamp (see
Functional Diagram).
The value of COSC is calculated from the desired operating
frequency fO. Assuming the phase-locked loop is locked
(VPLLLPF = 1.19V):
4
2.1(10 )
C
pF =
( )
– 11
OSC
Frequency kHz
Stating the frequency as a function of VPLLLPF and COSC
:
3.3V OR 5V
RUN/SS
RUN/SS
D1
Frequency kHz =
(
)
C
C
SS
SS
8
8.4(10 )
1436 F06
Figure 6. Run/SS Pin Interfacing
1
C
pF +11
+ 2000
( )
OSC
[
]
V
Foldback Current Limiting
PLLLPF
2.4V
17µA +18µA
As described in Power MOSFET and D1 Selection, the
worst-case dissipation for either MOSFET occurs with a
short-circuited output, when the synchronous MOSFET
conducts the current limit value almost continuously. In
most applications this will not cause excessive heating,
even for extended fault intervals. However, when heat
sinking is at a premium or higher RDS(ON) MOSFETs are
being used, foldback current limiting should be added to
reducethecurrentinproportiontotheseverityofthefault.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range ∆fH is equal to the capture range: ∆fH = ∆fC =
±0.3fO.
17
LTC1436A
LTC1436-PLL-A/LTC1437A
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APPLICATIONS INFORMATION
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
between the PLL LPF pin and operating frequency is
shown in Figure 7. A simplified block diagram is shown in
Figure 8.
difference. ThusthevoltageonthePLLLPFpinisadjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
C
LP holds the voltage.
The loop filter components CLP and RLP smooth out the
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquires lock. Typically, RLP = 10k and CLP is 0.01µF to
0.1µF.BesuretoconnectthelowsideofthefiltertoSGND.
If the external frequency (fPLLIN) is greater than the oscil-
lator frequency (f), current is sourced continuously, pull-
ingupthePLLLPFpin.Whentheexternalfrequencyisless
than fOSC, current is sunk continuously, pulling down the
PLLLPFpin.Iftheexternalandinternalfrequenciesarethe
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 9 will
provide a frequency shift from fO to 1.9fO as the voltage
andVPLLLPF increasesfrom0Vto2.4V.Donotexceed2.4V
on VPLLLPF
.
1.3f
O
3.3V OR 5V
PLL LPF
2.4V MAX
18k
f
O
0.7f
O
1436 F09
Figure 9. Directly Driving PLL LPF Pin
0
0.5
1.0
1.5
(V)
2.0
2.5
V
PLLLPF
1436 F07
Low-Battery Comparator
Figure 7. Operating Frequency vs VPLLLPF
The LTC1436A/LTC1437A have an on-chip low-battery
comparator which can be used to sense a low-battery
condition when implemented as shown in Figure 10. The
resistive divider R3, R4 sets the comparator trip point as
follows:
EXTERNAL
FREQUENCY
R
LP
2.4V
C
OSC
C
LP
PHASE
DETECTOR
R4
R3
VLBTRIP = 1.19V 1+
PLL LPF
C
OSC
PLLIN
DIGITAL
PHASE/
FREQUENCY
DETECTOR
OSC
V
IN
50k
R4
R3
LTC1436A
LTC1437A
LBO
LBI
–
+
1.19V REFERENCE
1436 F10
SGND
1436 F08
Figure 10. Low Battery Comparator
Figure 8. Phase-Locked Loop Block Diagram
18
LTC1436A
LTC1436A-PLL/LTC1437A
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APPLICATIONS INFORMATION
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is not active in shutdown. The
low side of the resistive divider should connect to SGND.
excesscurrentisdrawnwhentheinputstageisoverdriven
when used as a comparator.
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resis-
tive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
SFB Pin Operation
When the SFB pin drops below its ground-referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchro-
nous switches are used regardless of the load on the main
output.
With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 12a, the base of the external PNP con-
nects to the AUXDR pin together with a pull-up resistor.
The output voltage VOAUX at the collector of the external
PNP is sensed by the AUXFB pin.
In addition to providing a logic input to force continuous
synchronous operation, the SFB pin provides a means to
regulate a flyback winding output. Continuous synchro-
nous operation allows power to be drawn from the auxil-
iary windings without regard to the primary output load.
The SFB pin provides a way to force continuous synchro-
nous operation as needed by the flyback winding.
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB pin
regulates the input voltage to the PNP regulator (see SFB
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator. A Zener diode clamp may be required to keep
VSEC under the 28V AUXDR pin specification when the
primary is heavily loaded and the secondary is not.
The secondary output voltage is set by the turns ratio of
the transformer in conjunction with a pair of external
resistors returned to the SFB pin as shown in Figure 4a.
The secondary regulated voltage VSEC in Figure 4a is
given by:
The AUXFB pin is the feedback point of the regulator. An
internal resistive divider is available to provide a 12V
output by simply connecting AUXFB directly to the collec-
tor of the external PNP. The internal resistive divider is
selected when thevoltage atAUXFB goes above 9.5V with
1V built-in hysteresis. For other output voltages, an exter-
nal resistive divider is fed back to AUXFB as shown in
Figure 11b. The output voltage VOAUX is set as follows:
R6
R5
VSEC ≈ N +1 VOUT > 1.19V 1+
(
)
where N is the turns ratio of the transformer and VOUT is
the main output voltage sensed by VOSENSE
.
Auxiliary Regulator/Comparator
VOAUX = 1.19V(1+R8/R7) < 8V
VOAUX = 12V
AUXDR < 8.5V
AUXDR > 12V
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an exter-
nal PNP pass device).
The circuit can also be used as a noninverting voltage
comparator as shown in Figure 11c. When AUXFB drops
below 1.19V, the AUXDR pin will be pulled low. A mini-
mum current of 5µA is required to pull the AUXDR pin to
5V when used as a comparator output, in order to coun-
teract a 1.5µA internal current source.
When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. Special circuitry
consumes a small (20µA) bias current while still remain-
ing stable when operating as a low dropout regulator. No
19
LTC1436A
LTC1436-PLL-A/LTC1437A
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APPLICATIONS INFORMATION
SECONDARY WINDING
1:N
The minimum on-time for the LTC1436A/LTC1437A in a
properly configured application is less than 300ns but
increases at low ripple current amplitudes (see Figure 12).
If an application is expected to operate close to the
minimum on-time limit, an inductor value must be chosen
that is low enough to provide sufficient ripple amplitude to
meettheminimumon-timerequirement.Todeterminethe
proper value, use the following procedure:
V
SEC
LTC1436A
LTC1437A
V
12V
OAUX
AUXDR
AUXFB
R6
+
SFB
+
R5
AUXON
ON/OFF
10µF
R6
R5
V
SEC
= 1.19V 1 +
> 13V
1436 F11a
(
)
1. Calculate on-time at maximum supply, tON(MIN)
(1/f)(VOUT/VIN(MAX)).
=
Figure 11a. 12V Output Auxiliary Regulator Using
Internal Feedback Resistors
2. UseFigure12toobtainthepeak-to-peakinductorripple
current as a percentage of IMAX necessary to achieve
SECONDARY WINDING
1:N
the calculated tON(MIN)
3. Ripple amplitude ∆IL(MIN) = (% from Figure 12) (IMAX
where IMAX = 0.1/RSENSE
IN(MAX) – VOUT
∆IL(MIN)
.
R8
R7
V
= 1.19V 1 +
)
OAUX
(
)
V
SEC
LTC1436A
LTC1437A
.
V
OAUX
AUXDR
AUXFB
R6
R8
R7
+
+
V
SFB
10µF
tON(MIN)
=
4. LMAX
R5
AUXON
ON/OFF
R6
R5
1436 F11b
V
= 1.19V 1 +
SEC
Choose an inductor less than or equal to the calculated
(
)
L
MAX to ensure proper operation.
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
400
V
PULL-UP < 8.5V
350
300
250
LTC1436A
LTC1437A
ON/OFF
INPUT
AUXON
AUXFB
AUXDR
RECOMMENDED
REGION FOR MIN
ON-TIME AND
OUTPUT
–
+
MAX EFFICIENCY
1.19V REFERENCE
1436 F11c
Figure 11c. Auxiliary Comparator Configuration
200
0
10
20
30
40
50
60
70
Minimum On-Time Considerations
INDUCTOR RIPPLE CURRENT (% OF I
)
MAX
1435A F12
Minimum on-time, tON(MIN), is the smallest amount of
time that the LTC1436A/LTC1437A are capable of turning
the top MOSFET on and off again. It is determined by
internal timing delays and the gate charge required to turn
on the top MOSFET. Low duty cycle applications may
approach this minimum on-time limit. If the duty cycle
falls below what can be accommodated by the minimum
on-time,theLTC1436A/LTC1437Awillbegintoskipcycles.
The output voltage will continue to be regulated, but the
ripple current and ripple voltage will increase. Therefore
this limit should be avoided.
Figure 12. Minimum On-Time vs Inductor Ripple Current
Because of the sensitivity of the LTC1436A/LTC1437A
current comparator when operating close to the minimum
on-time limit, it is important to prevent stray magnetic flux
generated by the inductor from inducing noise on the
current sense resistor, which may occur when axial type
cores are used. By orienting the sense resistor on the
radialaxisoftheinductor(seeFigure13), thisnoisewillbe
minimized.
20
LTC1436A
LTC1436A-PLL/LTC1437A
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APPLICATIONS INFORMATION
Efficiency. For example, in a 20V to 5V application,
10mA of INTVCC current results in approximately 3mA
of VIN current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
VIN) to only a few percent.
INDUCTOR
L
1435A F08
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current shunt. In continuous
mode the average output current flows through L and
Figure 13. Allowable Inductor/RSENSE Layout Orientations
Efficiency Considerations
RSENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each RDS(ON) = 0.05Ω,
RL = 0.15Ω and RSENSE = 0.05Ω, then the total resis-
tance is 0.25Ω. This results in losses ranging from 3%
to10%astheoutputcurrentincreasesfrom0.5Ato2A.
I2R losses cause the efficiency to drop at high output
currents.
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1436A/LTC1437A circuits: LTC1436A/
LTC1437A VIN current, INTVCC current, I2R losses and
topside MOSFET transition losses.
4. Transition losses apply only to the topside MOSFET(s),
and only when operating at high input voltages (typi-
cally 20V or greater). Transition losses can be esti-
mated from:
Transition Loss = 2.5(VIN)1.85(IMAX)(CRSS)(f)
1. The VIN current is the DC supply current given in the
ElectricalCharacteristicstablewhichexcludesMOSFET
driver and control currents. VIN current results in a
small (<1%) loss which increases with VIN.
Other losses including CIN and COUT ESR dissipative
losses, Schottky conduction losses during dead-time and
inductor core losses, generally account for less than 2%
total additional loss.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTVCC to ground. The resulting dQ/dt is a current
out of INTVCC that is typically much larger than the
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. Whenaloadstepoccurs, VOUT immediatelyshifts
by an amount equal to (∆ILOAD)(ESR), where ESR is the
effective series resistance of COUT. ∆ILOAD also begins to
charge or discharge COUT which generates a feedback
error signal. The regulator loop then acts to return VOUT to
its steady-state value. During this recovery time VOUT can
be monitored for overshoot or ringing, which would
indicate a stability problem. The ITH external components
shown in the Figure 1 circuit will provide adequate com-
pensation for most applications.
control circuit current. In continuous mode, IGATECHG
=
f(QT + QB), where QT and QB are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the Adaptive Power output stage switches to a low
QT MOSFET during low current operation.
By powering EXTVCC from an output-derived source,
the additional VIN current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
21
LTC1436A
LTC1436-PLL-A/LTC1437A
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APPLICATIONS INFORMATION
should not conduct during double battery operation, but
must still clamp the input voltage below breakdown of the
converter.AlthoughtheLTC1436A/LTC1437Ahaveamaxi-
mum input voltage of 36V, most applications will be
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately 25(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
limited to 30V by the MOSFET BVDSS
.
Design Example
As a design example, assume VIN = 12V (nominal), VIN =
22V (max), VOUT = 1.6V, IMAX = 3A and f = 250kHz, RSENSE
and COSC can immediately be calculated:
Automotive Considerations: Plugging into the
Cigarette Lighter
100mV
R
=
= 0.033Ω
SENSE
3A
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserveorevenrechargebatterypacksduringoperation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automo-
bileisthesourceofanumberofnastypotentialtransients,
including load dump, reverse battery, and double battery.
4
1.37(10 )
250
C
=
– 11= 43pF
OSC
Refering to Figure 3, a 4.7µH inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used:
VOUT
VOUT
Load dump is the result of a loose battery cable. When the
cablebreaksconnection,thefieldcollapseinthealternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
∆IL =
1−
V
f L
( )( )
IN
The highest value of the ripple current occurs at the
maximum input voltage:
1.6V
1.6V
22V
∆I =
1−
= 1.3A
L
250kHz 4.7µH
(
)
The network shown in Figure 14 is the most straightfor-
ward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
The lowest duty cycle also occurs at maximum input
voltage. The on-time during this condition should be
checked to make sure it doesn’t violate the LTC1436A/
LTC1437A’s minimum on-time and cause cycle skipping
to occur. The required on-time at VIN(MAX) is:
VOUT
1.6V
12V
50A I RATING
PK
tON(MIN)
=
=
= 291ns
22V 250kHz
V
V
f
(
)(
)
IN
( )
(
)
IN(MAX)
LTC1436A
LTC1437A
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
The ∆IL was previously calculated to be 1.3A, which is
43% of IMAX. From Figure 12, the LTC1436A/LTC1437A’s
minimum on-time at 43% ripple is about 235ns. There-
fore, the minimum on-time is sufficient and no cycle
skipping will occur.
1436 F14
Figure 14. Automotive Application Protection
22
LTC1436A
LTC1436A-PLL/LTC1437A
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APPLICATIONS INFORMATION
The power dissipation on the topside MOSFET can be
easily estimated. Choosing a Siliconix Si4412DY results
in: RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input
voltage with T (estimated) = 50°C:
source of the bottom N-channel MOSFET, anode of the
Schottky diode, and (–) plate of CIN, which should have
as short lead lengths as possible.
2. Does the LTC1436A/LTC1437A VOSENSE pin connect to
the (+) plate of COUT? In adjustable applications, the
resistive divider R1/R2 must be connected between the
(+) plate of COUT and signal ground. The 100pF capaci-
tor should be as close as possible to the LTC1436A/
LTC1437A.
3. AretheSENSE– andSENSE+ leadsroutedtogetherwith
minimum PC trace spacing? The filter capacitor be-
tween SENSE+ and SENSE– should be as close as
possible to the LTC1436A/LTC1437A.
1.6V
22V
2
PMAIN
=
3 1+ 0.005 50°C − 25°C 0.042Ω
( )
(
)(
) (
]
)
[
1.85
)
+ 2.5 22V
3A 100pF 250kHz = 88mW
(
(
)( )(
)
The most stringent requirement for the synchronous
N-channel MOSFET occurs when VOUT = 0 (i.e. short
circuit). In this case the worst-case dissipation rises to:
2
P
SYNC = ISC AVG 1+ δ R
(
)
DS ON
(
)
(
)
4. Does the (+) plate of CIN connect to the drain of the
topsideMOSFET(s)ascloselyaspossible?Thiscapaci-
tor provides the AC current to the MOSFET(s).
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and the power ground pin? This ca-
pacitor carries the MOSFET driver peak currents.
CIN is chosen for an RMS current rating of at least 1.5A at
temperature. COUT is chosen with an ESR of 0.03Ωfor low
outputripple. Theoutputrippleincontinuousmodewillbe
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
6. KeeptheswitchingnodeSWawayfromsensitivesmall-
signal nodes. Ideally, the switch node should be placed
at the furthest point from the LTC1436A/LTC1437A.
V
ORIPPLE = RESR ∆I = 0.03Ω 1.3A = 39mV
(
)
(
)
L P-P
7. Route the PLLIN line away from Boost and SW pins to
avoid unwanted pickup (Boost and SW pins have high
dV/dTs).
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1436A/LTC1437A. These items are also illustrated
graphically in the layout diagram of Figure 15. Check the
following in your layout:
8. SGND should be used exclusively for grounding exter-
nal components on PLL LPF, COSC, ITH, LBI, SFB,
VOSENSE and AUXFB pins.
9. If operating close to the minimum on-time limit, is the
sense resistor oriented on the radial axis of the induc-
tor? See Figure 13.
1. Are the signal and power grounds segregated? The
LTC1436A/LTC1437A signal ground pin must return to
the (–)plate of COUT. The power ground connects to the
23
LTC1436A
LTC1436-PLL-A/LTC1437A
U
W U U
APPLICATIONS INFORMATION
C
LP
R
LP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
+
PLL LPF
PLLIN
POR
EXT CLOCK
C
OSC
C
OSC
C
SS
3
RUN/SS
LBO
BOOST
TGL
4
M1
+
V
IN
5
C
IN
LBI
SW
C
C
R
C
6
M3
I
TGS
TH
D1
C
C2
7
SFB
V
LTC1437A
IN
D
B
8
SGND
INTV
CC
–
M2
9
+
C
B
V
PROG
DRV
CC
OPEN
100pF
4.7µF
0.1µF
10
11
12
13
V
BG
OSENSE
NC
PGND
–
+
SENSE
SENSE
EXTV
CC
1000pF
AUXDR
AUXFB
L1
AUX 14
ON/OFF
AUXON
5V EXT V
CC
CONNECTION
–
R1
V
OUT
C
OUT
+
OUTPUT DIVIDER
REQUIRED WITH
R2
R
SENSE
V
OPEN
PRGM
+
1437 F15
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 15. LTC1437A Layout Diagram
24
LTC1436A
LTC1436A-PLL/LTC1437A
U
TYPICAL APPLICATIONS
Intel Mobile CPU VID Core Power Converter with 1.8V I/O Supply
0.1µF
10k
EXTERNAL
FREQUENCY
V
IN
4.5V TO 22V
1
24
PLLIN
V
SYNCHRONIZATION
C
43pF
OSC
PLL LPF
4.7Ω
18
2
3
4
C
IN
OSC
C
C
SS
0.1µF
IN
+
0.1µF
22µF
35V
X2
RUN/SS
M1
21
19
R
C
C
C2
1000pF
TGL
TGS
Si4410DY
10k
M3
IRLML2803
I
TH
L1
3.3µH
R
SENSE
C
C
0.015Ω
V
CORE
20
17
7
6
220pF
V
1.3V TO 2V
7A
PROG
SW
3
5
6
SGND
LTC1436A-PLL
V
SENSE
INTV
CC
CC
*D
B
0.22µF
100pF
22
8
9
D1
V
BOOST
OSENSE
–
C
OUT
+
+
MBRS140T3
LTC1706-19
820µF
4V
4.7µF
SENSE
16
15
13
M2
Si4410DY
FB
0
BG
× 2
1000pF
10
+
VID
SENSE
AUXON
PGND
11
AUX
ON/OFF
1
2
3
GND
4
AUXDR
12
7
8 1 2
AUXFB
SGND
(PIN 6)
FROM µP
47k
V
IN2
3.3V
47µF
4V**
MMBT2907L
10.5k
51pF
V
I/O
1.8V
47µF
4V
*CMDSH-3
150mA
20k
**INPUT CAPACITOR MAY NOT BE NECESSARY IF
3.3V SUPPLY HAS SUFFICIENT CAPACITANCE
1436 TA09
LTC1436A 3.3V/4A Fixed Output with 5V Auxiliary Output
V
IN
4.5V TO 28V
C
OSC
68pF
C
IN
22µF
+
1
2
24
23
22
21
20
19
18
17
16
15
14
13
C
POR
BOOST
TGL
OSC
35V
× 2
RUN/SS
LBO
MBRS1100T3
C
C
C2
51pF
SS
0.1µF
3
M1
S4412DY
4
C
+
+
SEC
24V
LBI
SW
C
C
3.3µF
510pF
5
M3
35V
I
TGS
TH
IRLML2803
V
3.3V
4A
OUT
R
C
6
10k
SFB
V
IN
T1
10µH
1:1
0.1µF
CMDSH-3
R
SENSE
0.025Ω
LTC1436A
7
C
SGND
INTV
CC
OUT
+
100µF
10V
8
4.7µF
V
BG
PROG
M2
Si4412DY
× 2
9
MBRS140T3
V
PGND
OSENSE
SGND
10
11
12
(PIN 7)
–
SENSE
SENSE
EXTV
CC
1000pF
47k
+
AUXDR
AUX
ON/OFF
AUXON
AUXFB
51pF
2N2905A
R6
430k
R8
180k
+
3.3µF
R5
100k
R7
56k
V
OUT2
5V
100mA
1436 TA02
25
LTC1436A
LTC1436-PLL-A/LTC1437A
U
TYPICAL APPLICATIONS
LTC1436A-PLL 2.5V/5V Adjustable Output with
Foldback Current limiting and 5V Auxiliary Output
C
LP
V
IN
R
LP
0.01µF
4.5V TO 24V
10k
1
2
24
23
22
21
20
19
18
17
16
15
14
13
EXT
PLL LPF
PLLIN
POR
CLOCK
C
IN
C
OSC
+
22µF
35V
× 2
C
OSC
68pF
C
3
SS
RUN/SS
BOOST
TGL
MBRS1100T3
0.1µF
R
10k
C,
C
C
M1
Si4410DY
4
I
TH
510pF
OPEN
C
5
C2
C
+
SEC
SFB
SW
24V
V
51pF
3.3µF
6
M3
35V
SGND
TGS
IRLML2803
OUT
LTC1436A-PLL
7
2.5V
5A
V
PROG
V
IN
T1
10µH
1:1.6
0.1µF
100pF
R
CMDSH-3
R1
SENSE
8
0.02Ω
100k
1%
V
INTV
CC
OSENSE
–
C
OUT
+
+
9
100µF
10V
4.7µF
SENSE
SENSE
BG
R2
35.7k
1%
M2
Si4410DY
1000pF
10
11
12
100pF
MBRS140T3
× 2
+
PGND
AUX
AUXON
AUXFB
EXTV
47k
CC
ON/OFF
SGND
(PIN 6)
AUXDR
ZETEX
FZT749
51pF
R6
430k
R8
180k
+
3.3µF
R5
100k
1N4148
R7
56k
V
OUT2
5V
0.2A
I
TH
(PIN 4)
100Ω
100Ω
1436 TA03
LTC1436A-PLL 5V/3A Fixed Output with 12V/200mA Auxiliary Output
and Uncommitted Comparator
C
V
LP
IN
4.5V TO 28V
R
LP
10k
0.01µF
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
EXT
PLL LPF
PLLIN
POR
CLOCK
C
+
IN
C
OSC
22µF/35V
× 2
C
OSC
68pF
C
SS
V
OUT2
RUN/SS
BOOST
TGL
12V
0.1µF
R
10k
C,
C
C
M1
Si4412DY
0.5A
I
M4, IRLL014
TH
510pF
+
C
SEC
C
C2
51pF
3.3µF
SFB
SW
1:2.2
35V
M3
R
47k
SENSE
0.025Ω
SGND
TGS
IRLML2803
V
OUT1
LTC1436A-PLL
3.3V
4A
V
V
V
IN
PROG
0.1µF
T1
10µH
CMDSH-3
CMDSH-3
INTV
OSENSE
–
CC
+
C
100k
1%k
OUT1
+
4.7µF
100µF
10V
SENSE
SENSE
BG
M2
Si4412DY
1000pF
10
+
× 2
PGND
11.3k
1%k
11
12
COMP
ON/OFF
0.01µF
AUXON
AUXFB
EXTV
CC
MBRS140T3
AUXDR
SGND
(PIN 6)
COMPARATOR
1436 TA04
T1: DALE LPE6562-A092
26
LTC1436A
LTC1436A-PLL/LTC1437A
U
TYPICAL APPLICATIONS
LTC1436A-PLL Low Noise High Efficiency 5V/1A Regulaor
C
LP
R
LP
10k
V
0.01µF
IN
5.5V TO 28V
1
2
24
23
22
21
20
19
18
17
16
15
14
13
EXT CLOCK
250kHz
PLL LPF
PLLIN
POR
C
OSC
C
OSC
39pF
+
C
IN
C
3
SS
22µF
RUN/SS
BOOST
TGL
0.1µF
R
10k
35V
C,
C
C
M1
IRF7201
4
I
TH
510pF
C
5
C2
51pF
SFB
SW
L1
50µH
6
M3
IRLML2803
V1
6.3V
R
SENSE
SGND
TGS
0.1Ω
LTC1436A-PLL
7
V
V
V
IN
PROG
0.1µF
100pF
CMDSH-3
R1
8
240k
1%
INV
OSENSE
–
CC
+
C
OUT
+
9
4.7µF
100µF
SENSE
SENSE
BG
M2
IRF7201
10V
1000pF
10
11
12
R2
56k
1%
MBRS140T3
+
PGND
100pF
V
OUT
ON/OFF
AUXON
AUXFB
EXTV
CC
AUXDR
SGND
47k
(PIN 6)
V
OUT
5V
1A
ZETEX
FMMT549
R8
180k
51pF
+
1%
R7
56k
1%
22µF
HEAT SINK
SFB = 0V: CONTINUOUS MODE
SFB = 5V: BURST ENABLED
1436 TA07
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
GN Package
24-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.337 – 0.344*
(8.560 – 8.737)
0.015 ± 0.004
(0.38 ± 0.10)
24 23 22 21 20 19 18 17 16 15 14 13
0.053 – 0.069
(1.351 – 1.748)
0.004 – 0.009
(0.102 – 0.249)
× 45°
0.0075 – 0.0098
(0.191 – 0.249)
0° – 8° TYP
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
0.016 – 0.050
(0.406 – 1.270)
0.008 – 0.012
(0.203 – 0.305)
0.025
(0.635)
BSC
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
GN24 (SSOP) 0595
1
2
3
4
5
6
7
8
9
10 11 12
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
0.397 – 0.407*
(10.07 – 10.33)
0.205 – 0.212**
(5.20 – 5.38)
0.068 – 0.078
(1.73 – 1.99)
28 27 26 25 24 23 22 21 20 19 18
16 15
17
0° – 8°
0.301 – 0.311
(7.65 – 7.90)
0.0256
(0.65)
BSC
0.005 – 0.009
(0.13 – 0.22)
0.022 – 0.037
(0.55 – 0.95)
0.002 – 0.008
(0.05 – 0.21)
0.010 – 0.015
(0.25 – 0.38)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
5
7
8
1
2
3
4
6
9 10 11 12 13 14
G28 SSOP 0694
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
27
LTC1436A
LTC1436-PLL-A/LTC1437A
U
TYPICAL APPLICATION
LTC1437A 5V/3A Fixed Output with 12V Auxiliary Output
C
LP
V
IN
R
LP
0.01µF
5.5V TO 28V
10k
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EXT
PLL LPF
PLLIN
POR
CLOCK
C
C
IN
OSC
+
C
22µF
35V
× 2
OSC
39pF
C
3
SS
RUN/SS
LBO
BOOST
TGL
MBRS1100T3
0.1µF
C
51pF
C2
M1
IRF7403
4
5
C
+
+
24V
SEC
LBI
SW
3.3µF
C
C
6
M3
35V
I
TGS
TH
IRLML2803
V
OUT
510pF
R
10k
C
7
5V
3A
SFB
V
T1
22µH
1:2.2
IN
0.1µF
R
CMDSH-3
SENSE
LTC1437A
8
0.03Ω
SGND
INV
CC
CC
C
OUT
+
9
100µF
10V
4.7µF
V
PROG
DRV
INT V
CC
10
11
12
13
14
M2
IRF7403
MBRS140T3
× 2
V
BG
OSENSE
SGND
(PIN 8)
NC
PGND
–
+
SENSE
SENSE
EXTV
CC
1000pF
47k
AUXDR
AUX
ON/OFF
AUXON
AUXFB
MMBT2907
R6
1M
V
OUT2
12V
0.2A
+
R5
100k
3.3µF
T1: DALE LPE6562-A092
1436 TA06
RELATED PARTS
PART NUMBER
LTC1142HV/LTC1142
LTC1148HV/LTC1148
LTC1159
DESCRIPTION
COMMENTS
Dual High Efficiency Synchronous Step-Down Switching Regulators Dual Synchronous, V ≤ 20V
IN
High Efficiency Step-Down Switching Regulator Controllers
High Efficiency Synchronous Step-Down Switching Regulator
1.5A, 500kHz Step-Down Switching Regulators
Synchronous, V ≤ 20V
IN
Synchronous, V ≤ 40V, For Logic Threshold FETs
IN
LT®1375/LT1376
High Frequency, Small Inductor, High Efficiency
Switchers, 1.5A Switch
LTC1430
High Power Step-Down Switching Regulator Controller
High Efficiency 5V to 3.3V Conversion at Up to 15A
16-Pin Narrow SO and SSOP
LTC1435A
High Efficency, Low Noise Synchronous Step-Down
Switching Regulator
LTC1438/LTC1439
Dual High Efficiency, Low Noise, Synchronous Step-Down
Switching Regulators
Full-Featured Dual Controllers
LT1510
Constant-Voltage/ Constant-Current Battery Charger
1.3A, Li-Ion, NiCd, NiMH, Pb-Acid Charger
5V Standby in Shutdown
LTC1538-AUX
Dual High Efficiency, Low Noise, Synchronous Step-Down
Switching Regulator
LTC1539
Dual High Efficiency, Low Noise, Synchronous Step-Down
Switching Regulator
5V Standby in Shutdown
LTC1706-19
VID Voltage Programmer
Intel Mobile Pentium®II Compliant
Pentium is a registered trademark of Intel Corp.
14367afa LT/TP 0898 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1996
28 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
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