LTC1438XCG#PBF [Linear]
LTC1438 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C;
| 型号： | LTC1438XCG#PBF |
| 厂家： | 
Linear |
| 描述： | LTC1438 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 28; Temperature Range: 0°C to 70°C 开关 光电二极管 |
| 文件： | 总32页 (文件大小：442K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC1438/LTC1439
Dual High Efficiency,
Low Noise, Synchronous
Step-Down Switching Regulators
U
DESCRIPTIO
FEATURES
The LTC®1438/LTC1439 are dual, synchronous step-
down switching regulator controllers which drive external
N-channel power MOSFETs in a phase-lockable fixed
frequencyarchitecture.TheAdaptivePowerTM outputstage
selectively drives two N-channel MOSFETs at frequencies
up to 400kHz while reducing switching losses to maintain
high efficiencies at low output currents.
■
Maintains Constant Frequency at Low Output
Currents
■
Dual N-Channel MOSFET Synchronous Drive
■
Programmable Fixed Frequency (PLL Lockable)
Wide VIN Range: 3.5V to 36V Operation
Ultrahigh Efficiency
■
■
■
■
Very Low Dropout Operation: 99% Duty Cycle
Low Dropout, 0.5A Linear Regulator for VPP
Generation or Low Noise Audio Supply
Built-In Power-On Reset Timer
An auxiliary 0.5A linear regulator using an external PNP
pass device provides a low noise, low dropout voltage
source. A secondary winding feedback control pin (SFB1)
guarantees regulation regardless of load on the main
output by forcing continuous operation.
■
■
■
■
■
■
■
■
■
Programmable Soft Start
Low-Battery Detector
Remote Output Voltage Sense
An additional comparator is available for use as a low
batterydetector. Apower-onresettimer(POR)isincluded
which generates a signal delayed by 65536/fCLK (typ
300ms) after the output is within 5% of the regulated
output voltage. Internal resistive dividers provide pin
selectableoutputvoltageswithremotesensecapabilityon
one of the two outputs.
Foldback Current Limiting (Optional)
Pin Selectable Output Voltage
Logic-Controlled Micropower Shutdown: IQ < 30µA
Output Voltages from 1.19V to 9V
Available in 28- and 36-Lead SSOP Packages
U
APPLICATIO S
The operating current levels are user-programmable via
external current sense resistors. Wide input supply range
allows operation from 3.5V to 30V (36V maximum).
, LTC and LT are registered trademarks of Linear Technology Corporation. Adaptive
Power is a trademark of Linear Technology Corporation. All other trademarks are the prop-
erty of their respective owners. Protected by U.S. Patents including 5481178, 6304066,
5929620, 6580258, 5705919, 5731731.
■
Notebook and Palmtop Computers, PDAs
■
Portable Instruments
Battery-Operated Devices
DC Power Distribution Systems
■
■
U
TYPICAL APPLICATIO
V
IN
5.2V TO 28V
C
IN
+
+
D
, CMDSH-3
D , CMDSH-3
B2
B1
4.7µF
16V
22µF
35V
× 4
V
V
INTV
CC
BOOST 1
TGL1
BOOST 2
TGL2
PROG1
IN
M1
M4
L2
TGS1
TGS2
M6*
M3*
L1
10µH
C
C
, 0.1µF
B1
B2
10µH
0.1µF
SW2
BG2
SW1
BG1
D2
M5
D1
MBR140T3
LTC1439
M2
MBR140T3
+
SENSE
SENSE
2
2
+
1000pF
SENSE
1
R
–
SENSE2
R
0.03Ω
SENSE1
0.03Ω
1000pF
V
OSENSE2
–
V
SENSE
1
V
3.3V
3.5A
OUT1
5V
3.5A
OUT2
I
I
C
C
TH1
TH2
C1
C2
+
1000pF
C
1000pF
OUT1
RUN/SS1
C
V
SGND PGND RUN/SS2
OSC
PROG2
220µF
+
C
OUT
R
C
C
C
C
R
C
10V
C1
10k
C1A
SS1
0.1µF
OSC
SS2
0.1µF
C2
10k
C2A
470pF
220µF
220pF
56pF
*NOT REQUIRED FOR LTC1438
10V
1438 F01
BOLD LINES INDICATE HIGH CURRENT PATHS
M1, M2, M4, M5: Si4412ADY
M3, M6: IRLML2803
Figure 1. High Efficiency Dual 5V/3V Step-Down Converter
14389fb
1
LTC1438/LTC1439
W W
U W
ABSOLUTE AXI U RATI GS
(Note 1)
AUXON, PLLIN, SFB1,
Input Supply Voltage (VIN)......................... 36V to –0.3V
Topside Driver Voltage (BOOST 1, 2) ........ 42V to –0.3V
Switch Voltage (SW1, 2) ....................... VIN + 5V to –5V
EXTVCC Voltage......................................... 10V to –0.3V
POR2, LBO Voltages ................................. 12V to –0.3V
AUXFB Voltage ......................................... 20V to –0.3V
AUXDR Voltage......................................... 28V to –0.3V
SENSE+ 1, SENSE+ 2, SENSE– 1, SENSE– 2,
RUN/SS1, RUN/SS2, LBI Voltages ....... 10V to –0.3V
Peak Output Current < 10µs (TGL1, 2, BG1, 2).......... 2A
Peak Output Current < 10µs (TGS1, 2) ............... 250mA
INTVCC Output Current ........................................ 50mA
Operating Ambient Temperature Range
Commercial ............................................ 0°C to 70°C
Extended (Note 7)............................... –40°C to 85°C
Industrial ............................................ –40°C to 85°C
Junction Temperature (Note 2)............................. 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
V
OSENSE2 Voltages ................. INTVCC + 0.3V to –0.3V
PROG1, VPROG2 Voltages ..................... INTVCC to –0.3V
PLL LPF, ITH1, ITH2 Voltages .................... 2.7V to –0.3V
V
U
W U
PACKAGE/ORDER INFORMATION
TOP VIEW
ORDER
ORDER
1
2
PLL LPF
PLLIN
BOOST 1
TGL1
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1
+
PART NUMBER
PART NUMBER
TOP VIEW
SENSE
SENSE
1
1
+
1
2
RUN/SS1
BOOST 1
TGL1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SENSE
SENSE
1
1
*
–
3
–
LTC1438CG
LTC1438CG-ADJ
LTC1438IG
LTC1438IG-ADJ
LTC1438XCG
LTC1439CG
LTC1439EG
LTC1439IG
LTC1439CGW
LTC1439IGW
4
V
PROG1
3
V
PROG1
5
SW1
I
TH1
4
SW1
I
TH1
6
TGS1
POR2
5
V
POR2**
IN
7
V
C
IN
OSC
6
BG1
C
OSC
8
BG1
SGND
LBI
7
INTV
CC
SGND
LBI
9
INTV
CC
8
PGND
BG2
10
11
12
13
14
15
16
17
18
PGND
BG2
LBO
9
LBO
SFB1
10
11
12
13
14
EXTV
CC
SFB1
EXTV
CC
I
TH2
SW2
I
TH2
TGS2
V
PROG2
TGL2
V
OSENSE2
–
SW2
V
OSENSE2
–
BOOST 2
RUN/SS2
SENSE
SENSE
2
2
TGL2
SENSE
2
+
+
BOOST 2
AUXON
AUXFB
SENSE 2
RUN/SS2
AUXDR
G PACKAGE
28-LEAD PLASTIC SSOP
V
ON LTC1438-ADJ
*
**
OSENSE1
NC ON THE LTC1438XCG
G PACKAGE
36-LEAD PLASTIC SSOP
GW PACKAGE
36-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 95°C/W
T
JMAX = 125°C, θJA = 95°C/W (G)
TJMAX = 125°C, θJA = 85°C/W (GW)
Consult factory for Military grade parts.
14389fb
2
LTC1438/LTC1439
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range. TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loops
I
V
Feedback Current
V
V Pins Open (Note 3)
PROG1, PROG2
10
50
nA
IN OSENSE1,2
V
Regulated Output Voltage
1.19V (Adjustable) Selected
3.3V Selected
(Note 3)
OUT1,2
V
V
V
V
V
V
Pins Open
= 0V
= INT V
●
●
●
1.178
3.220
4.900
1.19
3.30
5.00
1.202
3.380
5.100
V
V
V
PROG1, PROG2
PROG1, PROG2
5V Selected
PROG1, PROG2 CC
V
V
Reference Voltage Line Regulation
Output Voltage Load Regulation
V
= 3.6V to 20V (Note 3), V
Sinking 5µA (Note 3)
Sourcing 5µA
Pins Open
Pins Open
0.002
0.5
–0.5
1.19
–1
0.01
0.8
–0.8
1.22
–2
%/V
%
%
V
µA
V
LINEREG1,2
LOADREG1,2
IN
PROG1,2
I
I
●
●
TH1,2
TH1,2
V
Secondary Feedback Threshold
Secondary Feedback Current
Output Overvoltage Lockout
V
V
V
Ramping Negative
●
1.16
1.24
SFB1
SFB1
I
= 1.5V
SFB1
SFB1
–
V
, SENSE 1 and V
PROG1,2
1.28
1.32
OVL
OSENSE1,2
I
V
Input Current
0.5V > V
–3
3
–6
6
µA
µA
PROG1,2
PROG1,2
PROG1,2
INTV – 0.5V < V
< INTV
CC
PROG1,2
CC
I
Input DC Supply Current
Normal Mode
Shutdown
Run Pin Threshold
Soft Start Current Source
Maximum Current Sense Threshold
EXTV = 5V (Note 4)
CC
Q
3.6V < V < 30V, V
= 0V
IN
320
16
1.3
3
µA
µA
V
µA
IN
AUXON
V
= 0V, 3.6V < V < 15V
30
2
4.5
180
RUN/SS1,2
V
I
∆V
●
0.8
1.5
130
RUN/SS1,2
V
V
= 0V
= 0V, 5V V
RUN/SS1,2
RUN/SS1,2
OSENSE1,2
= Pins Open
PROG1,2
150
mV
SENSE(MAX)
TGL1, 2 t , t
TGL1, TGL2 Transition Time
Rise Time
Fall Time
r
f
C
C
= 3000pF
= 3000pF
50
50
150
150
ns
ns
LOAD
LOAD
TGS1, 2 t , t TGS1, TGS2 Transition Time
r
f
Rise Time
Fall Time
C
C
= 500pF
= 500pF
100
50
200
150
ns
ns
LOAD
LOAD
BG1, 2 t , t
BG1, BG2 Transition Time
Rise Time
Fall Time
r
f
C
C
= 3000pF
= 3000pF
50
50
150
150
ns
ns
LOAD
LOAD
Internal V Regulator
CC
V
V
V
V
Internal V Voltage
6V < V < 30V, V
EXTVCC
= 4V
= 4V
= 5V
●
●
4.8
4.5
5.0
–0.2
170
4.7
5.2
–1
300
V
%
mV
V
INTVCC
CC
IN
INT
EXT
INTV Load Regulation
I
I
I
= 20mA, V
= 20mA, V
= 20mA, EXTV Ramping Positive
LDO
LDO
CC
INTVCC
INTVCC
INTVCC
EXTVCC
EXTVCC
EXTV Voltage Drop
CC
EXTV Switchover Voltage
EXTVCC
CC
CC
Oscillator and Phase-Locked Loop
f
Oscillator Frequency
VCO High
C
= 100pF, LTC1439: PLL LPF = 0V (Note 5)
OSC
112
200
125
240
138
kHz
kHz
OSC
LTC1439, V
= 2.4V
PLLLPF
R
PLLIN
PLLIN Input Resistance
50
kΩ
I
Phase Detector Output Current
Sinking Capability
Sourcing Capability
LTC1439
PLLLPF
f
f
< f
OSC
> f
OSC
10
10
15
15
20
20
µA
µA
PLLIN
PLLIN
Power-On Reset
V
POR2 Saturation Voltage
I
V
V
= 1.6mA, V
= 1V,
0.6
0.2
1
1
V
SATPOR2
POR2
OSENSE2
Pin Open
PROG2
I
POR2 Leakage
= 12V, V
= 1.2V, V Pin Open
PROG2
µA
LPOR2
POR2
OSENSE2
V
POR2 Trip Voltage
V
V
Pin Open % of V
PROG2 REF
THPOR2
Ramping Negative
–11
–7.5
–4
%
OSENSE2
t
POR2 Delay
V
Pin Open
65536
Cycles
DPOR2
PROG2
14389fb
3
LTC1438/LTC1439
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range. TA = 25°C, VIN = 15V, VRUN/SS1,2 = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Low-Battery Comparator
V
LBO Saturation Voltage
LBO Leakage
LBI Trip Voltage
LBI Input Current
LBO Hysteresis
I
V
= 1.6mA, V = 1.1V
0.6
0.01
1.19
1
1
1
1.22
50
V
µA
V
nA
mV
SATLBO
LBO
LBI
I
= 12V, V = 1.4V
●
●
●
LLBO
LBO
LBI
V
High to Low Transition on LBO
V
1.16
THLB1
I
= 1.19V
INLB1
LBI
V
20
HYSLBO
Auxiliary Regulator/Comparator
I
AUXDR Current
Max Current Sinking Capability
Control Current
V
V
V
V
= 0V
= 4V, V
= 5V, V
AUXDR
EXTVCC
AUXDR
AUXDR
AUXDR
= 1.0V, V
= 1.5V, V
= 5V
= 5V
10
15
1
0.01
mA
µA
µA
AUXFB
AUXFB
AUXON
AUXON
5
1
Leakage when OFF
= 24V, V
= 1.5V, V
= 0V
AUXFB
AUXON
I
I
V
V
V
AUXFB Input Current
AUXON Input Current
AUXON Trip Voltage
AUXDR Saturation Voltage
AUXFB Voltage
V
V
V
= 1.19V, V
= 5V
= 5V
AUXON
0.01
0.01
1.19
0.4
12.0
1.19
1
1
1.4
0.8
12.5
1.24
µA
µA
V
V
V
V
INAUXFB
INAUXON
AUXFB
AUXON
AUXDR
AUXDR
= 4V, V
= 1V
AUXFB
1.0
THAUXON
SATAUXDR
AUXFB
I
= 1.6mA, V
= 5V, 11V < V
= 5V, 3V < V
= 1V, V
= 5V
AUXFB
AUXON
V
V
< 24V (Note 6)
AUXDR
●
●
11.5
1.14
AUXON
AUXON
< 7V
AUXDR
V
AUXFB Divider Disconnect Voltage
V
= 5V (Note 6); Ramping Negative
7.5
8.5
9.5
V
THAUXDR
AUXON
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 5: Oscillator frequency is tested by measuring the C
charge and
OSC
discharge current (I ) and applying the formula:
OSC
8
–1
–1
Note 2: T is calculated from the ambient temperature T and power
f
(kHz) = 8.4(10 )[C
(pF) + 11] (1/I
+ 1/I
)
DISC
J
A
OSC
OSC
CHG
dissipation P according to the following formulas:
D
Note 6: The auxiliary regulator is tested in a feedback loop which servos
LTC1438CG, LTC1439CG: T = T + (P )(95°C/W)
V
V
to the balance point for the error amplifier. For applications with
J
A
D
AUXFB
LTC1439CGW: T = T + (P )(85°C/W)
> 9.5V, V
uses an internal resistive divider. See Applications
J
A
D
AUXDR
AUXFB
Information section.
Note 3: The LTC1438 and LTC1439 are tested in a feedback loop which
servos V to the balance point for the error amplifier
Note 7: The LTC1439EG is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
OSENSE1,2
(V
ITH1,2
= 1.19V).
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
14389fb
4
LTC1438/LTC1439
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Input Voltage
OUT = 3.3V
Efficiency vs Input Voltage
V
VOUT = 5V
Efficiency vs Load Current
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
100
95
90
85
80
75
70
V
V
= 10V
IN
V
= 3.3V
V
= 5V
OUT
OUT
= 5V
OUT
R
= 0.033Ω
SENSE
I = 1A
LOAD
I
= 1A
LOAD
CONTINUOUS
MODE
I
= 100mA
LOAD
Burst Mode®
OPERATION
I
= 100mA
LOAD
Adaptive Power
MODE
0.001
0.01
0.1
1
10
0
10
15
20
25
30
0
10
15
20
25
30
5
5
LOAD CURRENT (A)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1435 G03
1438 G01
1438 G02
VIN – VOUT Dropout Voltage
vs Load Current
Load Regulation
VITH Pin Voltage vs Output Current
0
–0.25
–0.50
–0.75
–1.00
–1.25
–1.50
3.0
2.5
0.5
0.4
0.3
0.2
0.1
R
= 0.033Ω
R
= 0.033Ω
SENSE
SENSE
DROP OF 5%
V
OUT
M1, M2: Si4412
2.0
1.5
1.0
0.5
0
Burst Mode
OPERATION
CONTINUOUS/Adaptive
Power MODE
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
10 20 30 40 50 60 70 80 90 100
OUTPUT CURRENT (%)
LOAD CURRENT (A)
LOAD CURRENT (A)
1438 G04
1438 G05
1438 G06
Input Supply Current
vs Input Voltage
EXTVCC Switch Drop
vs INTVCC Load Current
INTVCC Regulation
vs INTVCC Load Current
35
30
25
2.5
2.0
1.5
1.0
2
1
300
200
100
0
EXTV = 0V
CC
70°C
25°C
SHUTDOWN
CURRENT
70°C
25°C
20
15
10
5
0
–45°C
5V AND
3.3V ON
5V OFF
3.3V ON
–1
–2
0.5
0
5V ON
3.3V OFF
0
0
10
15
20
25
30
5
20
30
0
40
50
10
5
15
0
10
20
25
30
INPUT VOLTAGE (V)
INTV LOAD CURRENT (mA)
INTV LOAD CURRENT (mA)
CC
CC
1438 G07
1438 G08
1438 G09
Burst Mode is a registered trademark of Linear Technology Corporation.
14389fb
5
LTC1438/LTC1439
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Normalized Oscillator Frequency
vs Temperature
RUN/SS Pin Current
vs Temperature
SFB1 Pin Current vs Temperature
4
3
2
1
10
5
0
–0.25
–1.50
–0.75
f
O
–1.00
–1.25
–1.50
–5
0
–10
–40 –15 10
35
60
85 110 135
60
TEMPERATURE (°C)
110 135
60
TEMPERATURE (°C)
110 135
–40 –15
10
35
85
–40
35
85
–15
10
TEMPERATURE (°C)
1438 G11
1438 G10
1438 G12
Maximum Current Sense
Threshold Voltage vs Temperature
Transient Response
Transient Response
154
152
150
148
VOUT
50mV/DIV
VOUT
50mV/DIV
ILOAD = 1A to 3A
1438 G15
ILOAD = 50mA to 1A
1438 G14
146
–40 –15 10
35
60
85 110 135
TEMPERATURE (°C)
1438 G13
Auxiliary Regulator Load
Regulation
Soft Start: Load Current vs Time
Burst Mode Operation
12.2
12.1
12.0
EXTERNAL PNP: 2N2907A
VOUT
RUN/SS
20mV/DIV
5V/DIV
INDUCTOR
CURRENT
1A/DIV
VITH
200mV/DIV
11.9
11.8
11.7
1438 G17
ILOAD = 50mA
1438 G16
0
40
80
120
160
200
AUXILIARY LOAD CURRENT (mA)
1438 G18
14389fb
6
LTC1438/LTC1439
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Auxiliary Regulator
Sink Current Available
Auxiliary Regulator PSRR
70
60
50
40
30
20
10
20
15
10
5
10mA LOAD
100mA LOAD
0
10
100
FREQUENCY (kHz)
1000
0
2
4
6
8
10 12 14 16
AUX DR VOLTAGE (V)
1438 G20
1438 G19
U
U
U
PIN FUNCTIONS
VIN: Main Supply Pin. Must be closely decoupled to the
SGND: Small-Signal Ground. Common to both control-
lers, must be routed separately from high current grounds
to the (–) terminals of the COUT capacitors.
IC’s signal ground pin.
INTVCC: Output of the Internal 5V Regulator and the
EXTVCC Switch. The driver and control circuits are pow-
ered from this voltage. Must be closely decoupled to
power ground with a minimum of 2.2µF tantalum or
electrolyticcapacitor. TheINTVCC regulatorturnsoffwhen
bothRUN/SS1andRUN/SS2arelow.RefertotheLTC1538/
LTC1539 for 5V keep-alive applications.
PGND: Driver Power Ground. Connects to sources of
bottom N-channel MOSFETs and the (–) terminals of CIN.
SENSE– 1, SENSE– 2: Connects to the (–) input for the
currentcomparators.ExceptfortheLTC1438-ADJ,SENSE–
1 is internally connected to the first controller’s VOUT
sensing point. The first controller can only be used as a
3.3V or 5.0V regulator controlled by the VPROG1 pin with
theLTC1438,LTC1438XandLTC1439.TheLTC1438-ADJ
Controller 1 implements a remote sensing adjustable
regulator. The second controller can be set to a 3.3V, 5.0V
or an adjustable regulator controlled by the VPROG2 pin
(see Table 1).
EXTVCC: External Power Input to an Internal Switch. This
switch closes and supplies INTVCC, bypassing the internal
low dropout regulator whenever EXTVCC is higher than
4.7V. Connect this pin to VOUT of the controller with the
higher output voltage. Do not exceed 10V on this pin. See
EXTVCC connection in Applications Information section.
Table 1. Output Voltage Table
BOOST 1, BOOST 2: Supplies to the Topside Floating
Drivers. The bootstrap capacitors are returned to these
pins. Voltage swing at these pins is from INTVCC to
VIN + INTVCC.
LTC1438-ADJ LTC1438/LTC1438X
Controller 1 Adjustable Only 5V or 3.3V Only
Secondary Feedback Loop
LTC1439
Controller 2 Adjustable Only
Remote Sensing
Adjustable Only
Remote Sensing
POR2 Output
5V/3.3V/Adjustable
Remote Sensing
POR2 Output
SW1, SW2: Switch Node Connections to Inductors. Volt-
age swing at these pins is from a Schottky diode (external)
voltage drop below ground to VIN.
POR2 Output
14389fb
7
LTC1438/LTC1439
U
U
U
PIN FUNCTIONS
SENSE+ 1, SENSE+ 2: The (+) Input to Each Current
Comparator. Built-in offsets between SENSE– 1 and
SENSE+ 1pinsinconjunctionwithRSENSE1 setthecurrent
trip threshold (same for second controller).
switch node voltage SW. Leaving TGS1 or TGS2 open
invokes Burst Mode operation for that controller.
BG1, BG2: High Current Gate Drive Outputs for Bottom
N-Channel MOSFETs. Voltage swing at these pins is from
ground to INTVCC.
VOSENSE1,2: Receives the remotely sensed feedback volt-
age either from the output directly or from an external
resistive divider across the output. The VPROG2 pin deter-
mineswhichpointVOSENSE2mustconnectto.TheVOSENSE1
pin, only available on the LTC1438-ADJ, requires an
external resistive divider to set the output voltage.
SFB1:SecondaryWindingFeedbackInput.Thisinputacts
only on the first controller and is normally connected to a
feedback resistive divider from the secondary winding.
Pulling this pin below 1.19V will force continuous syn-
chronousoperationforthefirstcontroller. Thispinshould
be tied to: ground to force continuous operation; INTVCC
in applications that don’t use a secondary winding; and a
resistive divider from the output in applications using a
secondary winding.
V
PROG1, VPROG2: Programs Internal Voltage Attenuators
for Output Voltage Sensing. The voltage sensing for
thefirst controller is internally connected to SENSE– 1
while the VOSENSE2 pin allows for remote sensing for the
second controller. For VPROG1, VPROG2 < VINTVCC/3, the
POR2: This output is a drain of an N-channel pull-down.
This pin sinks current when the output voltage of the
second controller drops 7.5% below its regulated voltage
and releases 65536 oscillator cycles after the output
voltage of the second controller rises to within –5% value
of its regulated value. The POR2 output is asserted when
RUN/SS1 and RUN/SS2 are both low, independant of the
VOUT2. This pin is not functional on the LTC1438X.
divider is set for an output voltage of 3.3V. With VPROG1
,
VPROG2 > VINTVCC/1.5 the divider is set for an output
voltage of 5V. Leaving VPROG2 open (DC) allows the
output voltage of the second controller to be set by an
external resistive divider connected to VOSENSE2
.
COSC:ExternalcapacitorCOSC fromthispintogroundsets
the operating frequency.
LBO: This output is a drain of an N-channel pull-down.
This pin will sink current when the LBI pin goes below
1.19V.
I
TH1, ITH2: Error Amplifier Compensation Point. Each
associated current comparator threshold increases with
this control voltage.
LBI: The (+) input of a comparator which can be used as
a low-battery voltage detector. The (–) input is connected
to the 1.19V internal reference.
RUN/SS1, RUN/SS2: Combination of Soft Start and Run
ControlInputs. Acapacitortogroundateachofthesepins
sets the ramp time to full current output. The time is
approximately 0.5s/µF. Forcing either of these pins below
1.3V causes the IC to shut down the circuitry required for
thatparticularcontroller.Forcingbothofthesepinsbelow
1.3V causes the device to shut down completely. For
applications which require 5V keep-alive, refer to the
LTC1538-AUX/LTC1539.
PLLIN: External Synchronizing Input to Phase Detector.
This pin is internally terminated to SGND with 50kΩ. Tie
this pin to SGND in applications which do not use the
phase-locked loop.
PLL LPF: Output of Phase Detector and Control Input of
Oscillator. Normally a series RC lowpass filter network is
connected from this pin to ground. Tie this pin to SGND in
applications which do not use the phase-locked loop. Can
be driven by a 0V to 2.4V logic signal for a frequency
shifting option.
TGL1, TGL2: High Current Gate Drives for Main Top
N-Channel MOSFET. These are the outputs of floating
drivers with a voltage swing equal to INTVCC superim-
posed on the switch node voltage SW1 and SW2.
TGS1, TGS2: Gate Drives for Small Top N-Channel
MOSFET. These are the outputs of floating drivers with a
voltage swing equal to INTVCC superimposed on the
AUXFB: Feedback Input to the Auxiliary Regulator/Com-
parator. When used as a linear regulator, this input can
either be connected to an external resistive divider or
14389fb
8
LTC1438/LTC1439
directlytothecollectoroftheexternalPNPpassdevicefor
12V operation. When used as a comparator, this is the
noninverting input of a comparator whose inverting input
is tied to the internal 1.19V reference. See Auxiliary
Regulator Application section.
AUXDR: Open Drain Output of the Auxiliary Regulator/
Comparator. The base of an external PNP device is con-
nected to this pin when used as a linear regulator. An
external pull-up resistor is required for use as a compara-
tor. A voltage >9.5V on AUXDR causes the internal 12V
resistive divider to be connected in series with the AUXFB
pin.
AUXON: Pulling this pin high turns on the auxiliary regu-
lator/comparator. The threshold is 1.19V. This is a conve-
nient linear power supply logic-controlled on/off input.
U
U W
FUNCTIONAL DIAGRA
PLLIN**
PHASE
f
IN
DETECTOR
V
IN
INTV
CC
50k
2.4V
D
DUPLICATE FOR SECOND CONTROLLER CHANNEL
BOOST
TGL
B
PLL LPF**
R
LP
C
LP
DROPOUT
DETECTOR
C
OSC
SFB
OSCILLATOR
S
R
Q
Q
C
B
C
OSC
POR2
TGS**
SW
V
FB2
1.11V
POWER-ON
RESET
SWITCH
LOGIC
0.6V
+
–
SHUTDOWN
LBI
BATTERY
SENSE
•
INTV
CC
–
+
LBO
–
+
BG
I1
•
+
C
PGND
IN
+
–
+
C
OUT
AUXON**
+
INTV
CC
R
SENSE
V
SEC
–
+
9V
–
I2
–
+
8k
30k
–
AUXDR**
AUXFB**
SENSE
V
LDO
+
SENSE
4k
320k
61k
180k
90.8k
10k
V
*
OSENSE
V
FB
+
V
OUT
+
–
EA
Ω
+
g
= 1m
m
C
SEC
V
REF
V
*
1.19V
REF
PROG
+
SFB
SFB1*
119k
–
+
–
1µA
V
IN
0V
†
D
C
V
IN
FB
4.8V
+
–
1.28V
1.19V
C
5V LDO
REGULATOR
I
TH
3µA
SHUTDOWN
EXTV
INTV
R
C
CC
RUN
SOFT START
6V
RUN/SS
CC
+
C
SS
SGND
INTERNAL
SUPPLY
†FOLDBACK CURRENT LIMITING OPTION
BOLD LINES INDICATE HIGH CURRENT PATHS
1438 FD
*IN SOME VERSIONS, NOT AVAILABLE ON BOTH CHANNELS
**NOT AVAILABLE ON LTC1438
14389fb
9
LTC1438/LTC1439
U
(Refer to Functional Diagram)
OPERATION
Main Control Loop
Low Current Operation
The LTC1438/LTC1439 use a constant frequency, current
mode step-down architecture. During normal operation,
thetopMOSFETisturnedoneachcyclewhentheoscillator
sets the RS latch and turned off when the main current
comparator I1 resets the RS latch. The peak inductor
current at which I1 resets the RS latch is controlled by the
voltage on the ITH1 (ITH2) pin, which is the output of each
error amplifier (EA). The VPROG1 pin, described in the Pin
Functions, allowstheEAtoreceiveaselectivelyattenuated
output feedback voltage VFB1 from the SENSE– 1 pin while
VPROG2 and VOSENSE2 allow EA to receive an output feed-
back voltage VFB2 from either internal or external resistive
dividers on the second controller. When the load current
increases, it causes a slight decrease in VFB relative to the
Adaptive Power mode allows the LTC1439 to automati-
cally change between two output stages sized for different
load currents. The TGL1 (TGL2) and BG1 (BG2) pins drive
large synchronous N-channel MOSFETs for operation at
high currents, while the TGS1 (TGS2) pin drives a much
smaller N-channel MOSFET used in conjunction with a
Schottky diode for operation at low currents. This allows
the loop to continue to operate at normal operating fre-
quencyastheloadcurrentdecreaseswithoutincurringthe
large MOSFET gate charge losses. If the TGS1 (TGS2) pin
is left open, the loop defaults to Burst Mode operation in
which the large MOSFETs operate intermittently based on
load demand.
AdaptivePowermodeprovidesconstantfrequencyopera-
tion down to approximately 1% of rated load current. This
results in an order of magnitude reduction of load current
before Burst Mode operation commences. Without the
small MOSFET (i.e., no Adaptive Power mode) the transi-
tion to Burst Mode operation is approximately 10% of
rated load current.
1.19V reference, which in turn causes the ITH1 (ITH2
)
voltage to increase until the average inductor current
matches the new load current. After the large top MOSFET
hasturnedoff,thebottomMOSFETisturnedonuntileither
the inductor current starts to reverse, as indicated by
current comparator I2, or the beginning of the next cycle.
The top MOSFET drivers are biased from floating boot
strap capacitor CB, which normally is recharged during
each Off cycle. When VIN decreases to a voltage close to
VOUT, however, the loop may enter dropout and attempt to
turn on the top MOSFET continuously. The dropout detec-
tor counts the number of oscillator cycles that the top
MOSFET remains on and periodically forces a brief off
period to allow CB to recharge.
The transition to low current operation begins when com-
parator I2 detects current reversal and turns off the
bottom MOSFET. If the voltage across RSENSE does not
exceed the hysteresis of I2 (approximately 20mV) for one
full cycle, then on following cycles the top drive is routed
to the small MOSFET at the TGS1 (TGS2) pin and the BG1
(BG2) pin is disabled. This continues until an inductor
current peak exceeds 20mV/RSENSE or the ITH1 (ITH2
)
The main control loop is shut down by pulling the RUN/
SS1 (RUN/SS2) pin low. Releasing RUN/SS1 (RUN/SS2)
allows an internal 3µA current source to charge soft start
capacitor CSS. When CSS reaches 1.3V, the main control
loop is enabled with the ITH1 (ITH2) voltage clamped at
approximately 30% of its maximum value. As CSS contin-
ues to charge, ITH1 (ITH2) is gradually released allowing
normal operation to resume. When both RUN/SS1 and
RUN/SS2 are low, all LTC1438/LTC1439 functions are
shut down. Refer to the LTC1538-AUX/LTC1539 data
sheet for 5V keep-alive applications.
voltage exceeds 0.6V, either of which causes drive to be
returned to the TGL1 (TGL2) pin on the next cycle.
Twoconditionscanforcecontinuoussynchronousopera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE+ 1 (SENSE+ 2) and SENSE– 1
(SENSE– 2) pins are below 1.4V, and the other is when the
SFB1 pin is below 1.19V. The latter condition is used to
assistinsecondarywindingregulation,asdescribedinthe
Applications Information section.
ComparatorOVguardsagainsttransientovershoots>7.5%
by turning off the top MOSFET and keeping it off until the
fault is removed.
14389fb
10
LTC1438/LTC1439
U
(Refer to Functional Diagram)
OPERATION
Frequency Synchronization
the AUXDR pin is above 9.5V to allow regulated 12V
VPP supplies to be easily implemented. When AUXDR is
below8.5Vanexternalfeedbackdividermaybeusedtoset
other output voltages. Taking the AUXON pin low shuts
down the auxiliary regulator providing a convenient logic-
controlled power supply.
A Phase-Locked Loop (PLL) is available on the LTC1439
to allow the oscillator to be synchronized to an external
source connected to the PLLIN pin. The output of the
phase detector at the PLL LPF pin is also the control input
of the oscillator, which operates over a 0V to 2.4V range
corresponding to –30% to 30% in frequency. When
locked, the PLL aligns the turn-on of the top MOSFET to
the rising edge of the synchronizing signal. When PLLIN
is left open, PLL LPF goes low, forcing the oscillator to
minimum frequency.
The AUX block can be used as a comparator having its
inverting input tied to the internal 1.19V reference. The
AUXDR pin is used as the output and requires an external
pull-up to a supply of less than 8.5V in order to inhibit the
invoking of the internal resistive divider.
Power-On Reset
INTVCC/EXTVCC Power
The POR2 pin is an open drain output which pulls low
when the main regulator output voltage of the second
controller is out of regulation. When the output voltage
rises to within 7.5% of regulation, a timer is started which
releases POR2 after 216 (65536) oscillator cycles. This
function is not available on the LTC1438X.
Power for the top and bottom MOSFET drivers and most
of the other LTC1438/LTC1439 circuitry is derived from
the INTVCC pin. The bottom MOSFET driver supply is also
connectedtoINTVCC. WhentheEXTVCC pinisleftopen, an
internal 5V low dropout regulator supplies INTVCC power.
If EXTVCC is taken above 4.8V, the 5V regulator is turned
off and an internal switch is turned on to connect EXTVCC
to INTVCC. This allows the INTVCC power to be derived
from a high efficiency external source such as the output
oftheregulatoritselforasecondarywinding, asdescribed
in the Applications Information section.
Auxiliary Linear Regulator
The auxiliary linear regulator in the LTC1439 controls an
external PNP transistor for operation up to 500mA. A
precise internal AUXFB resistive divider is invoked when
14389fb
11
LTC1438/LTC1439
U
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APPLICATIONS INFORMATION
A graph for selecting COSC vs frequency is given in Figure
2. As the operating frequency is increased the gate charge
losses will be higher, reducing efficiency (see Efficiency
Considerations). The maximum recommended switching
frequency is 400kHz. When using Figure 2 for
synchronizable applications, choose COSC corresponding
to a frequency approximately 30% below your center
frequency. (See Phase-Locked Loop and Frequency
Sychronization).
The basic LTC1439 application circuit is shown in Fig-
ure 1. External component selection is driven by the load
requirementandbeginswiththeselectionofRSENSE. Once
RSENSE is known, COSC and L can be chosen. Next, the
powerMOSFETsandD1areselected. Finally, CIN andCOUT
are selected. The circuit shown in Figure 1 can be config-
ured for operation up to an input voltage of 28V (limited by
the external MOSFETs).
RSENSE Selection for Output Current
300
RSENSE is chosen based on the required output current.
The LTC1438/LTC1439 current comparator has a maxi-
mum threshold of 150mV/RSENSE and an input common
mode range of SGND to INTVCC. The current comparator
threshold sets the peak of the inductor current, yielding a
maximum average output current IMAX equal to the peak
value less half the peak-to-peak ripple current, ∆IL.
V
= 0V
PLLLPF
250
200
150
100
50
Allowing some margin for variations in the LTC1438/
LTC1439 and external component values yield:
0
0
100
200
300
400
500
100mV
OPERATING FREQUENCY (kHz)
R
=
SENSE
LTC1435 • F02
I
MAX
Figure 2. Timing Capacitor Value
The LTC1438/LTC1439 work well with values of RSENSE
from 0.005Ω to 0.2Ω.
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is efficiency. A higher
frequency generally results in lower efficiency because of
MOSFET gate charge losses. In addition to this basic trade
off, the effect of inductor value on ripple current and low
current operation must also be considered.
COSC Selection for Operating Frequency
TheLTC1438/LTC1439useaconstantfrequencyarchitec-
ture with the frequency determined by an external oscilla-
tor capacitor on COSC. Each time the topside MOSFET
turnson,thevoltageonCOSC isresettoground.Duringthe
on-time, COSC is charged by a fixed current plus an
additional current which is proportional to the output
voltage of the phase detector (VPLLLPF)(LTC1439 only).
When the voltage on the capacitor reaches 1.19V, COSC is
reset to ground. The process then repeats.
Theinductorvaluehasadirecteffectonripplecurrent.The
inductor ripple current ∆IL decreases with higher induc-
The value of COSC is calculated from the desired operating
frequency. Assuming the phase-locked loop has no exter-
nal oscillator input (VPLLLPF = 0V):
tance or frequency and increases with higher VIN or VOUT
:
⎛
⎞
1
(f)(L)
V
OUT
∆I =
V
1–
⎜
⎟
L
OUT
V
⎝
⎠
⎡
⎢
4
⎤
⎥
IN
1.37(10 )
C
(pF) =
− 11
OSC
Frequency (kHz)
⎢
⎥
⎣
⎦
14389fb
12
LTC1438/LTC1439
U
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APPLICATIONS INFORMATION
Accepting larger values of ∆IL allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆IL = 0.4(IMAX). Remember, the
maximum ∆IL occurs at the maximum input voltage.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
The inductor value also has an effect on low current
operation. The transition to low current operation begins
when the inductor current reaches zero while the bottom
MOSFET is on. Lower inductor values (higher ∆IL) will
cause this to occur at higher load currents, which can
cause a dip in efficiency in the upper range of low current
operation. In Burst Mode operation (TGS1, 2 pins open),
lower inductance values will cause the burst frequency to
decrease.
Molypermalloy (from Magnetics, Inc.) is a very good, low
losscorematerialfortoroids, butitismoreexpensivethan
ferrite. A reasonable compromise from the same manu-
facturer is Kool Mµ. Toroids are very space efficient,
especially when you can use several layers of wire. Be-
cause they generally lack a bobbin, mounting is more
difficult. However, designsforsurfacemountareavailable
which do not increase the height significantly.
The Figure 3 graph gives a range of recommended induc-
tor values vs operating frequency and VOUT
.
Power MOSFET and D1 Selection
60
V
V
V
= 5.0V
= 3.3V
= 2.5V
OUT
OUT
OUT
Three external power MOSFETs must be selected for each
controllerwiththeLTC1439:a pairofN-channelMOSFETs
for the top (main) switch and an N-channel MOSFET for
the bottom (synchronous) switch. Only one top MOSFET
is required for each LTC1438 controller.
50
40
30
20
10
0
TotakeadvantageoftheAdaptivePoweroutputstage, two
topside MOSFETs must be selected. A large [low RSD(ON)
]
MOSFET and a small [higher RDS(ON)] MOSFET are re-
quired. The large MOSFET is used as the main switch and
works in conjunction with the synchronous switch. The
smaller MOSFET is only enabled under low load current
conditions.Thebenefitofthisistoboostlowtomidcurrent
efficiencies while continuing to operate at constant fre-
quency. Also, by using the small MOSFET the circuit will
keep switching at a constant frequency down to lower
currents and delay skipping cycles.
0
100
150
200
250
300
50
OPERATING FREQUENCY (kHz)
1438 F03
Figure 3. Recommended Inductor Values
Inductor Core Selection
Once the value for L is known, the type of inductor must be
selected. High efficiency converters generally cannot af-
ford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite, molypermalloy
or Kool Mµ® cores. Actual core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
godown.Unfortunately,increasedinductancerequiresmore
turns of wire and therefore copper losses will increase.
The RDS(ON) recommended for the small MOSFET is
around 0.5Ω. Be careful not to use a MOSFET with an
RDS(ON) that is too low; remember, we want to conserve
gatecharge. (AhigherRDS(ON) MOSFEThasasmallergate
capacitance and thus requires less current to charge its
gate). For all LTC1438 and cost sensitive LTC1439 appli-
cations, thesmallMOSFETisnotrequired. Thecircuitthen
begins Burst Mode operation as the load current drops.
Kool Mµ is a registered trademark of Magnetics, Inc.
14389fb
13
LTC1438/LTC1439
U
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APPLICATIONS INFORMATION
The peak-to-peak drive levels are set by the INTVCC volt-
age. This voltage is typically 5V during start-up (see
EXTVCC PinConnection).Consequently,logiclevelthresh-
old MOSFETs must be used in most LTC1438/LTC1439
applications. The only exception is applications in which
EXTVCC is powered from an external supply greater than
8V (must be less than 10V), in which standard threshold
MOSFETs (VGS(TH) < 4V) may be used. Pay close attention
to the BVDSS specification for the MOSFETs as well; many
of the logic level MOSFETs are limited to 30V or less.
efficiency. The synchronous MOSFET losses are greatest
at high input voltage or during a short circuit when the duty
cycle in this switch is nearly 100%. Refer to the Foldback
Current Limiting section for further applications information.
Theterm(1+δ)isgenerallygivenforaMOSFETintheform
of a normalized RDS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltageMOSFETs. CRSS isusuallyspecifiedintheMOSFET
characteristics. The constant k = 2.5 can be used to
estimate the contributions of the two terms in the main
switch dissipation equation.
Selection criteria for the power MOSFETs include the "ON"
resistance RSD(ON), reverse transfer capacitance CRSS
,
The Schottky diode D1 shown in Figure 1 serves two
purposes. During continuous synchronous operation, D1
conducts during the dead-time between the conduction of
the two large power MOSFETs. This prevents the body
diode of the bottom MOSFET from turning on and storing
charge during the dead-time, which could cost as much as
1% in efficiency. During low current operation, D1 oper-
ates in conjunction with the small top MOSFET to provide
an efficient low current output stage. A 1A Schottky is
generally a good compromise for both regions of opera-
tion due to the relatively small average current.
input voltage and maximum output current. When the
LTC1438/LTC1439 are operating in continuous mode the
duty cycles for the top and bottom MOSFETs are given by:
V
V
OUT
Main Switch Duty Cycle =
IN
V – V
(
)
IN
OUT
Synchronous Switch Duty Cycle =
V
IN
The MOSFET power dissipations at maximum output
current are given by:
CIN and COUT Selection
In continuous mode, the source current of the top
N-channel MOSFET is a square wave of duty cycle VOUT
VIN. To prevent large voltage transients, a low ESR input
capacitor sized for the maximum RMS current must be
used. The maximum RMS capacitor current is given by:
/
V
V
2
OUT
P
=
I
1+ δ R
DS(ON)
+
(
) (
)
MAIN
MAX
IN
1.85
k V
I
(
C
f
(
)
IN
)(
)( )
MAX
RSS
1/ 2
]
V
V – V
OUT
(
)
[
OUT IN
V – V
2
C Required I
≈ I
MAX
IN
OUT
IN
RMS
P
=
I
(
1+ δ R
DS(ON)
) (
)
SYNC
MAX
V
IN
V
IN
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offermuchrelief.Notethatcapacitormanufacturer’sripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
size or height requirements in the design. Always consult
the manufacturer if there is any question.
where δ is the temperature dependency of RDS(ON) and k
is a constant inversely related to the gate drive current.
Both MOSFETs have I2R losses while the topside
N-channel equation includes an additional term for transi-
tion losses, which are highest at high input voltages. For
VIN < 20V the high current efficiency generally improves
with larger MOSFETs, while for VIN > 20V the transition
losses rapidly increase to the point that the use of a higher
RDS(ON) device with lower CRSS actual provides higher
14389fb
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The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment is satisified the capacitance is adequate for filtering.
The output ripple (∆VOUT) is approximated by:
High input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the maxi-
mumjunctiontemperatureratingfortheLTC1438/LTC1439
to be exceeded. The IC supply current is dominated by the
gate charge supply current when not using an output
derived EXTVCC source. The gate charge is dependent on
operatingfrequencyasdiscussedintheEfficiencyConsid-
erations section. The junction temperature can be esti-
mated by using the equations given in Note 2 of the
Electrical Characteristics. For example, the LTC1439 is
limited to less than 21mA from a 30V supply:
⎛
⎞
1
∆V
≈ ∆I ESR +
⎜
L
⎟
OUT
4fC
⎝
⎠
OUT
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ∆IL increases
with input voltage. With ∆IL = 0.4IOUT(MAX) the output
ripple will be less than 100mV at max VIN assuming:
TJ = 70°C + (21mA)(30V)(85°C/W) = 124°C
COUT Required ESR < 2RSENSE
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked while
operating in continuous mode at maximum VIN.
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest (ESR size)
product of any aluminum electrolytic at a somewhat
higher price. Once the ESR requirement for COUT has been
met, the RMS current rating generally far exceeds the
IRIPPLE(P-P) requirement.
EXTVCC Connection
The LTC1438/LTC1439 contain an internal P-channel
MOSFET switch connected between the EXTVCC and
INTVCC pins. When the voltage applied to EXTVCC rises
above 4.8V, the internal regulator is turned off and an
internal switch closes, connecting the EXTVCC pin to the
INTVCCpintherebysupplyinginternalpowertotheIC.The
switch remains closed as long as the voltage applied to
EXTVCC remains above 4.5V. This allows the MOSFET
driver and control power to be derived from the output
during normal operation (4.8V < VOUT < 9V) and from the
internal regulator when the output is out of regulation
(start-up, short circuit). Do not apply greater than 10V to
the EXTVCC pin and ensure that EXTVCC ≤ VIN.
In surface mount applications multiple capacitors may
have to be paralleled to meet the ESR or RMS current
handling requirements of the application. Aluminum elec-
trolytic and dry tantalum capacitors are both available in
surfacemountconfigurations. Inthecaseoftantalum, itis
critical that the capacitors are surge tested for use in
switching power supplies. An excellent choice is the AVX
TPS series of surface mount tantalums, available in case
heights ranging from 2mm to 4mm. Other capacitor types
include Sanyo OS-CON, Nichicon PL series and Sprague
593Dand 595Dseries.Consultthemanufacturerforother
specific recommendations.
Significant efficiency gains can be realized by powering
INTVCC from the output, since the VIN current resulting
from the driver and control currents will be scaled by a
factor of Duty Cycle/Efficiency. For 5V regulators this
INTVCC Regulator
supply means connecting the EXTVCC pin directly to VOUT
.
However, for 3.3V and other lower voltage regulators,
additional circuitry is required to derive INTVCC power
from the output.
An internal P-channel low dropout regulator produces 5V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LTC1438/
LTC1439. The INTVCC pin regulator can supply 40mA and
must be bypassed to ground with a minimum of 2.2µF
tantalum or low ESR electrolytic capacitor. Good bypass-
ing is necessary to supply the high transient currents
required by the MOSFET gate drivers.
The following list summarizes the four possible connec-
tions for EXTVCC:
1. EXTVCC left open (or grounded). This will cause INTVCC
to be powered from the internal 5V regulator resulting
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in an efficiency penalty of up to 10% at high input
voltages.
ible with the MOSFET gate drive requirements. When
driving standard threshold MOSFETs, the external sup-
ply must be always present during operation to prevent
MOSFET failure due to insufficient gate drive.
2. EXTVCC connected directly to VOUT. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
Topside MOSFET Driver Supply (CB, DB)
3. EXTVCC connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency
gains can still be realized by connecting EXTVCC to an
output-derived voltage which has been boosted to
greater than 4.8V. This can be done with either the
inductive boost winding as shown in Figure 4a or the
capacitivechargepumpshowninFigure4b. Thecharge
pump has the advantage of simple magnetics.
ExternalbootstrapcapacitorsCB connectedtotheBOOST
1 and BOOST 2 pins supply the gate drive voltages for the
topside MOSFETs. Capacitor CB in the Functional Dia-
gram is charged through diode DB from INTVCC when the
SW1(SW2)pinislow. WhenoneofthetopsideMOSFETs
is to be turned on, the driver places the CB voltage across
the gate source of the desired MOSFET. This enhances
the MOSFET and turns on the topside switch. The switch
node voltage SW1(SW2) rises to VIN and the BOOST
1(BOOST 2) pin follows. With the topside MOSFET on,
the boost voltage is above the input supply: VBOOST = VIN
+ VINTVCC. The value of the boost capacitor CB needs to
be 100 times that of the total input capacitance of the
topside MOSFET(s). The reverse breakdown on DB must
4. EXTVCC connected to an external supply. If an external
supplyisavailableinthe5Vto10Vrange(EXTVCC ≤VIN)
it may be used to power EXTVCC providing it is compat-
LTC1438
+
V
IN
LTC1439*
1N4148
V
C
SEC
IN
V
IN
be greater than VIN(MAX)
.
+
L1
1:1
1µF
TGL1
TGS1*
SW1
N-CH
•
EXTV
SFB1
CC
R
SENSE
N-CH
Output Voltage Programming
R6
R5
V
OUT
•
The LTC1438/LTC1439 have pin selectable output voltage
programming. Controller 1 on the LTC1438-ADJ is a
dedicated adjustable controller. The output voltage is
selectedbytheVPROG1(VPROG2)pinasfollowsonallofthe
other parts:
+
BG1
N-CH
C
OUT
SGND
PGND
OPTIONAL EXTV
CONNECTION
*TGS1 ONLY AVAILABLE ON THE LTC14391438 F04a
CC
5V ≤ V
≤ 9V
SEC
VPROG1,2 = 0V
VPROG1,2 = INTVCC
VPROG2 = Open (DC)
VOUT1,2 = 3.3V
VOUT1,2 = 5V
VOUT2 = Adjustable
Figure 4a. Secondary Output Loop and EXTVCC Connection
+
Except for the LTC1438-ADJ, the top of an internal resis-
tive divider is connected to SENSE– 1 pin in Controller 1.
For fixed output voltage applications the SENSE– 1 pin is
connected to the output voltage as shown in Figure 5a.
When using an external resistive divider for an adjustable
regulator, the VPROG2 pin is left open (VPROG1 is internally
left open on the LTC1438-ADJ) and the VOSENSE2 pin is
connectedtothefeedbackresistorsasshowninFigure5b.
The adjustable controller will force the externally attenu-
ated output voltage to 1.19V.
1µF
LTC1438
0.22µF
BAT85
BAT85
L1
+
V
IN
LTC1439*
C
IN
V
IN
BAT85
VN2222LL
TGL1
TGS1*
SW1
N-CH
N-CH
R
SENSE
N-CH
V
EXTV
OUT
CC
+
BG1
C
OUT
PGND
1438 F04b
*TGS1 ONLY AVAILABLE ON THE LTC1439
Figure 4b. Capacitive Charge Pump for EXTVCC
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GND: V
= 3.3V
the internal current limit. Power supply sequencing can
also be accomplished using this pin.
OUT
V
PROG1
–
INTV : V
= 5V
CC OUT
SENSE
1
V
OUT
+
LTC1438
LTC1439
C
OUT
An internal 3µA current source charges up an external
capacitor CSS. When the voltage on RUN/SS1 (RUN/SS2)
reaches 1.3V the particular controller is permitted to start
operating. As the voltage on the pin continues to ramp
from 1.3V to 2.4V, the internal current limit is also ramped
at a proportional linear rate. The current limit begins at
approximately50mV/RSENSE (atVRUN/SS =1.3V)andends
at 150mV/RSENSE (VRUN/SS ≥ 2.7V). The output current
thus ramps up slowly, reducing the starting surge current
required from the input power supply. If RUN/SS has been
pulled all the way to ground there is a delay before starting
of approximately 500ms/µF, followed by a similar time to
reach full current on that controller.
SGND
1438 F05a
Figure 5a. LTC1438/LTC1439 Fixed Output Applications
1.19V ≤ V
≤ 9V
OUT
R2
V
*
OPEN (DC)
PROG2
V
OSENSE1,2
LTC1438
LTC1439
R1
100pF
SGND
1438 F05b
R2
R1
V
= 1.19V 1 +
*LTC1439 ONLY
OUT
(
)
Figure 5b. LTC1438/LTC1439 Adjustable Applications
By pulling both RUN/SS controller pins below 1.3V, the
LTC1438/LTC1439 are put into low current shutdown
(IQ<25µA). Thesepinscanbedrivendirectlyfromlogicas
shown in Figure 6. Diode D1 in Figure 6 reduces the start
delay but allows CSS to ramp up slowly providing the soft
startfunction;thisdiodeandCSS canbedeletedifsoftstart
is not needed. Each RUN/SS pin has an internal 6V Zener
clamp (See Functional Diagram).
Power-On Reset Function (POR)
The power-on reset function (not available on the
LTC1438X) monitors the output voltage of the second
controller and turns on an open drain device when it is
below its properly regulated voltage. An external pull-up
resistor is required on the POR2 pin.
When power is first applied or when coming out of
shutdown, the POR2 output is held at ground. When the
output voltage rises above a level which is 5% below the
final regulated output value, an internal counter starts.
After this counter counts 216 (65536) clock cycles, the
POR2 pull-down device turns off.
3.3V
OR 5V
RUN/SS1
RUN/SS1
(RUN/SS2)
(RUN/SS2)
D1
C
C
SS
SS
1438 F06
Figure 6. RUN/SS Pin Interfacing
The POR2 output will go low whenever the output voltage
of the second controller drops below 7.5% of its regulated
value for longer than approximately 30µs, signaling an
out-of-regulation condition. In shutdown, when RUN/SS1
and RUN/SS2 are both below 1.3V, the POR2 output is
pulled low even if the regulator’s output is held up by an
external source. The POR2 output is active during shut-
down if VIN is powered.
Foldback Current Limiting
As described in Power MOSFET and D1 Selection, the
worst-case dissipation for either MOSFET occurs with a
short-circuited output, when the synchronous MOSFET
conducts the current limit value almost continuously. In
most applications this will not cause excessive heating,
even for extended fault intervals. However, when heat
sinking is at a premium or higher RDS(ON) MOSFETs are
being used, foldback current limiting should be added to
reducethecurrentinproportiontotheseverityofthefault.
Run/Soft Start Function
The RUN/SS1 and RUN/SS2 pins each serve two func-
tions. Each pin provides the soft start function and a
means to shut down each controller. Soft start reduces
surgecurrentsfromVIN byprovidingagradualramp-upof
Foldback current limiting is implemented by adding diode
DFB between the output and the ITH pin as shown in the
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The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detec-
tor will not lock up on input frequencies close to the
harmonics of the VCO center frequency. The PLL hold-in
range, ∆fH, is equal to the capture range, ∆fC:
FunctionalDiagram.Inahardshort(VOUT =0V)thecurrent
will be reduced to approximately 25% of the maximum
output current. This technique may be used for all applica-
tions with regulated output voltages of 1.8V or greater.
Phase-Locked Loop and Frequency Synchronization
The LTC1439 has an internal voltage-controlled oscillator
and phase detector comprising a phase-locked loop. This
allows the top MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is ±30% around the center
frequency fO.
∆fH = ∆fC = ±0.3 fO.
The output of the phase detector is a complementary pair
of current sources charging or discharging the external
filter network on the PLL LPF pin. A simplified block
diagram is shown in Figure 8.
If the external frequency fPLLIN is greater than the oscilla-
tor frequency f0SC, current is sourced continuously, pull-
ingupthePLLLPFpin.Whentheexternalfrequencyisless
than f0SC, current is sunk continuously, pulling down the
PLLLPFpin.Iftheexternalandinternalfrequenciesarethe
same but exhibit a phase difference, the current sources
turn on for an amount of time corresponding to the phase
difference. ThusthevoltageonthePLLLPFpinisadjusted
until the phase and frequency of the external and internal
oscillators are identical. At this stable operating point the
phase comparator output is open and the filter capacitor
1.3f
f
O
O
O
0.7f
0
0.5
1.0
1.5
(V)
2.0
2.5
V
PLLLPF
1438 F07
EXTERNAL
FREQUENCY
R
LP
Figure 7. Operating Frequency vs VPLLLPF
2.4V
C
OSC
C
LP
PHASE
DETECTOR
The value of COSC is calculated from the desired operating
frequency (fO). Assuming the phase-locked loop is locked
(VPLLLPF = 1.19V):
PLL LPF*
OSC
C
OSC
PLLIN*
DIGITAL
PHASE/
FREQUENCY
DETECTOR
⎡
⎢
4
⎤
⎥
2.1(10 )
C
(pF) =
− 11
OSC
SGND
50k
Frequency (kHz)
⎢
⎥
⎣
⎦
Stating the frequency as a function of VPLLLPF and COSC
:
1438 F08
Frequency kHz =
(
)
*LTC1439 ONLY
8
8.4(10 )
Figure 8. Phase-Locked Loop Block Diagram
⎡
⎢
⎢
⎢
⎢
⎤
⎥
⎥
⎥
⎥
1
C
pF + 11
+ 2000
( )
OSC
[
]
⎛
⎞
V
PLLLPF
2.4V
17µA + 18µA
⎜
⎟
⎢
⎝
⎠
⎥
⎣
⎦
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V
IN
CLP holds the voltage. The LTC1439 PLLIN pin must be
driven from a low impedance such as a logic gate located
close to the pin. Any external attenuator used needs to be
referenced to SGND.
R4
R3
LTC1438/LTC1439
LBO
LBI
–
+
1.19V REFERENCE
1438 F10
SGND
The loop filter components CLP, RLP smooth out the
current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components CLP and RLP determine how fast the loop
acquireslock. Typically, RLP=10kandCLP is0.01µFto0.1µF.
The low side of the filter needs to be connected to SGND.
Figure 10. Low-Battery Comparator
SFB1 Pin Operation
When the SFB1 pin drops below its ground referenced
1.19V threshold, continuous mode operation is forced. In
continuous mode, the large N-channel main and synchro-
nous switches are used regardless of the load on the main
output.
The PLL LPF pin can be driven with external logic to obtain
a 1:1.9 frequency shift. The circuit shown in Figure 9 will
provide a frequency shift from fO to 1.9fO as the voltage on
VPLLLPF increases from OV to 2.4V. Do not exceed 2.4V on
In addition to providing a logic input to force continuous
synchronous operation, the SFB1 pin provides a means to
regulate a flyback winding output. The use of a synchro-
nous switch removes the requirement that power must be
drawn from the inductor primary in order to extract power
from the auxiliary winding. With the loop in continuous
mode, the auxiliary output may be loaded without regard
to the primary output load. The SFB1 pin provides a way
to force continuous synchronous operation as needed by
the flyback winding.
VPLLLPF
.
3.3V OR 5V
2.4V
MAX
PLL LPF
18k
LTC1435 • F09
Figure 9. Directly Driving PLL LPF Pin
Low-Battery Comparator
The secondary output voltage is set by the turns ratio of
the transformer in conjunction with a pair of external
resistors returned to the SFB1 pin as shown in Figure 4a.
ThesecondaryregulatedvoltageVSEC inFigure4aisgiven
by:
The LTC1438/LTC1439 have an on-chip low-battery com-
parator which can be used to sense a low-battery condi-
tionwhenimplementedasshowninFigure10.Theresistor
divider R3/R4 sets the comparator trip point as follows:
R4
R3
⎛
⎝
⎞
⎟
⎠
R6
R5
⎛
⎝
⎞
⎟
⎠
V
= 1.19V 1+
V
≈ N + 1 V
> 1.19V 1+
⎜
(
)
⎜
LBITRIP
SEC
OUT
where N is the turns ratio of the transformer, and VOUT is
the main output voltage sensed by Sense– 1.
The divided down voltage at the negative (–) input to the
comparator is compared to an internal 1.19V reference. A
20mV hysteresis is built in to assure rapid switching. The
output is an open drain MOSFET and requires a pull-up
resistor. This comparator is not active when both the
RUN/SS1 and RUN/SS2 pins are low. Refer to the LTC1538/
LTC1539 for a comparator which is active during shutdown.
The low side of the resistive divider needs to be connected to
SGND.
Auxiliary Regulator/Comparator
The auxiliary regulator/comparator can be used as a
comparator or low dropout regulator (by adding an exter-
nal PNP pass device).
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When the voltage present at the AUXON pin is greater than
1.19V the regulator/comparator is on. The amplifier is
stable when operating as a low dropout regulator. This
same amplifier can be used as a comparator whose
inverting input is tied to the 1.19V reference.
When used as a voltage comparator as shown in Figure
11c, the auxiliary block has a noninverting characteristic.
When AUXFB drops below 1.19V, the AUXDR pin will be
pulled low. A minimum current of 5µA is required to pull
uptheAUXDRpinto5Vwhenusedasacomparatoroutput
in order to counteract a 1.5µA internal pull-down current
source.
The AUXDR pin is internally connected to an open drain
MOSFET which can sink up to 10mA. The voltage on
AUXDR determines whether or not an internal 12V resis-
tive divider is connected to AUXFB as described below. A
pull-up resistor is required on AUXDR and the voltage
must not exceed 28V.
SECONDARY
WINDING
1:N
R6
R5
V
= 1.19V 1 +
> 13V
SEC
(
)
V
SEC
With the addition of an external PNP pass device, a linear
regulator capable of supplying up to 0.5A is created. As
shown in Figure 11a, the base of the external PNP con-
nects to the AUXDR pin together with a pull-up resistor.
The output voltage VOAUX at the collector of the external
PNP is sensed by the AUXFB pin.
AUXDR
R6
R5
+
V
OAUX
SFB1 AUXFB
LTC1439
12V
+
10µF
AUXON
ON/OFF
1438 F11a
Figure 11a. 12V Output Auxiliary Regulator
Using Internal Feedback Resistors
The input voltage to the auxiliary regulator can be taken
from a secondary winding on the primary inductor as
shown in Figure 11a. In this application, the SFB1 pin
regulates the input voltage to the PNP regulator (see SFB1
Pin Operation) and should be set to approximately 1V to
2V above the required output voltage of the auxiliary
regulator.AZenerclampdiodemayberequiredtokeepthe
secondary winding resultant output voltage under the 28V
AUXDR pin specification when the primary is heavily
loaded and the secondary is not.
SECONDARY
WINDING
1:N
R6
R5
V
SEC
= 1.19V 1 +
> V
OAUX
(
)
V
SEC
V
OAUX
AUXDR
SFB1 AUXFB
LTC1439
R6
R5
R8
R7
+
+
10µF
The AUXFB pin is the feedback point of the regulator. An
internalresistordividerisavailabletoprovidea12Voutput
bysimplyconnectingAUXFBdirectlytothecollectorofthe
external PNP. The internal resistive divider is switched in
when the voltage at AUXFB goes above 9.5V with 1V built-
in hysteresis. For other output voltages, an external resis-
tive divider is fed back to AUXFB as shown in Figure 11b.
The output voltage VOAUX is set as follows:
AUXON
ON/OFF
1438 F11b
Figure 11b. 5V Output Auxiliary Regulator Using
External Feedback Resistors
V
< 7.5V
PULL-UP
LTC1439
ON/OFF
INPUT
AUXON
AUXFB
AUXDR
OUTPUT
–
+
⎛
⎞
R8
R7
V
= 1.19V 1+
< 8V AUXDR < 8.5V
AUXDR ≥ 12V
OAUX
⎜
⎟
1.19V REFERENCE
1438 F11c
⎝
⎠
Figure 11c. Auxiliary Comparator Configuration
V
= 12V
OAUX
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Efficiency Considerations
3. I2R losses are predicted from the DC resistances of the
MOSFET, inductor and current sense R. In continuous
mode the average output current flows through L and
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
R
SENSE, but is “chopped” between the topside main
MOSFET and the synchronous MOSFET. If the two
MOSFETs have approximately the same RDS(ON), then
the resistance of one MOSFET can simply be summed
with the resistances of L and RSENSE to obtain I2R
losses. For example, if each RDS(ON) = 0.05Ω, RL =
0.15Ω and RSENSE = 0.05Ω, then the total resistance is
0.25Ω. This results in losses ranging from 3% to 10%
as the output current increases from 0.5A to 2A. I2R
losses cause the efficiency to roll off at high output
currents.
Efficiency = 100% – (L1 + L2 + L3 + ...)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC1438/LTC1439 circuits. LTC1438/LTC1439
VINcurrent,INTVCCcurrent,I2RlossesandtopsideMOSFET
transition losses.
4. Transition losses apply only to the topside MOSFET(s)
and only when operating at high input voltages (typically
20V or greater). Transition losses can be estimated from:
1. The VIN current is the DC supply current given in the
ElectricalCharacteristicswhichexcludesMOSFETdriver
and control currents. VIN current typically results in a
small (<< 1%) loss which increases with VIN.
Transition Loss ≈ 2.5(VIN)1.85(IMAX)(CRSS)(f)
Other losses including CIN and COUT ESR dissipative
losses, Schottky conduction losses during dead-time,
and inductor core losses, generally account for less
than 2% total additional loss.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTVCC to ground. The resulting dQ/dt is a current
out of INTVCC which is typically much larger than the
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, VOUT shifts by an
amount equal to (∆ILOAD)(ESR) where ESR is the effective
series resistance of COUT. ∆ILOAD also begins to charge or
dischargeCOUT generatingthefeedbackerrorsignalwhich
forces the regulator loop to adapt to the current change
and return VOUT to its steady-state value. During this
recovery time VOUT can be monitored for overshoot or
ringing which would indicate a stability problem. The ITH
external components shown in Figure 1 will prove ad-
equate compensation for most applications.
control circuit current. In continuous mode, IGATECHG
=
f(QT + QB), where QT and QB are the gate charges of the
topside and bottom side MOSFETs. It is for this reason
that the large topside and synchronous MOSFETs are
turned off during low current operation in favor of the
small topside MOSFET and external Schottky diode,
allowing efficient, constant-frequency operation at low
output currents.
By powering EXTVCC from an output-derived source,
the additional VIN current resulting from the driver and
control currents will be scaled by a factor of Duty Cycle/
Efficiency. For example, in a 20V to 5V application,
10mA of INTVCC current results in approximately 3mA
of VIN current. This reduces the midcurrent loss from
10% or more (if the driver was powered directly from
VIN) to only a few percent.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
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switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25)(CLOAD).
Thus a 10µF capacitor would require a 250µs rise time,
limiting the charging current to about 200mA.
Design Example
As a design example, assume VIN = 12V(nominal), VIN =
22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSE
and COSC can immediately be calculated:
R
SENSE = 100mV/3A = 0.033Ω
COSC = [1.37(104)/250] – 11 ≈ 43pF
Automotive Considerations: Plugging into the
Cigarette Lighter
Refering to Figure 3, a 10µH inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used :
As battery-powered devices go mobile, there is a natural
interest in plugging into the cigarette lighter in order to
conserveorevenrechargebatterypacksduringoperation.
But before you connect, be advised: you are plugging into
the supply from hell. The main battery line in an automo-
bileisthesourceofanumberofnastypotentialtransients,
including load dump, reverse battery and double battery.
⎛
⎞
V
(f)(L)
V
OUT
OUT
∆I =
1–
⎜
⎟
L
V
⎝
⎠
IN
The highest value of the ripple current occurs at the
maximum input voltage:
Load dump is the result of a loose battery cable. When the
cablebreaksconnection,thefieldcollapseinthealternator
can cause a positive spike as high as 60V which takes
several hundred milliseconds to decay. Reverse battery is
just what it says, while double battery is a consequence of
tow-truck operators finding that a 24V jump start cranks
cold engines faster than 12V.
⎛
⎞
3.3V
250kHz(10µH)
3.3V
22V
∆I =
1–
= 1.12A
L
⎜
⎟
⎝
⎠
The power dissipation on the topside MOSFET can be
easily estimated. Using a Siliconix Si4412DY for example;
RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input
voltage with T(estimated) = 50°C:
The network shown in Figure 12 is the most straightfor-
ward approach to protect a DC/DC converter from the
ravages of an automotive battery line. The series diode
prevents current from flowing during reverse battery,
while the transient suppressor clamps the input voltage
during load dump. Note that the transient suppressor
should not conduct during double battery operation, but
must still clamp the input voltage below breakdown of the
converter. Although the LT1438/LT1439 has a maximum
input voltage of 36V, most applications will be limited to
3.3V
22V
2
P
=
3
1+ 0.005 50°C − 25°C 0.042Ω
)( ) ( )
( )
(
[
]
MAIN
1.85
+ 2.5 22V
3A 100pF 250kHz = 122mW
The most stringent requirement for the synchronous
N-channel MOSFET is with VOUT = 0V (i.e. short circuit).
During a continuous short circuit, the worst-case dissipa-
tion rises to:
P
SYNC = [ISC(AVG)]2(1 + δ)RDS(ON)
30V by the MOSFET BVDSS
.
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
12V
50A I RATING
PK
V
IN
LTC1438
LTC1439
TRANSIENT VOLTAGE
SUPPRESSOR
GENERAL INSTRUMENT
1.5KA24A
CIN will require an RMS current rating of at least 1.5A at
temperatureandCOUT willrequireanESRof0.03Ωforlow
outputripple. Theoutputrippleincontinuousmodewillbe
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
1438 F12
Figure 12. Automotive Application Protection
VORIPPLE = RESR(∆IL) = 0.03Ω(1.12A) = 34mVP-P
14389fb
22
LTC1438/LTC1439
U
W U U
APPLICATIONS INFORMATION
C
LP
R
LP
10k
0.01µF
C
SS
0.1µF
EXT
CLOCK
1
2
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
RUN/SS1 PLL LPF
+
1000pF
C
B1
0.1µF
SENSE
SENSE
V
1
1
PLLIN
BOOST 1
TGL1
1000pF
INTV
C
C1B
3
–
220pF
C
C1A
4
C
M1
IN1
1000pF
CC
PROG1
TH1
5
I
SW1
L1
100k
R
C1
10k
6
V
M3
POR2
TGS1
C
IN
OSC
+
+
LTC1439
7
R
SENSE1
C
V
OSC
IN
BG1
INTV
D
B1
8
V
V
OUT1
+
V
M2
M5
D1
SGND
LBI
IN
+
C
OUT1
4.7µF
9
–
CC
C
–
C2B
GROUND PLANE
470pF
10
11
12
13
14
15
16
17
18
–
LBO
PGND
BG2
C
C
OUT2
C2A
1000pF
+
D2
INTV
R
SFB1
CC
C2
OUT2
10k
D
B2
I
EXTV
TH2
CC
R
SENSE2
+
100pF
L2
V
V
TGS2
M6
PROG2
SW2
TGL2
OSENSE2
–
22pF
R1
R2
SENSE
SENSE
2
2
M4
C
IN2
OUTPUT DIVIDER
REQUIRED WITH
1000pF
+
BOOST 2
AUXON
AUXFB
V
OPEN
PROG
C
B2
0.1µF
RUN/SS2
AUXDR
C
SS
0.1µF
10Ω
220pF
10Ω
1438 F13
NOT ALL PINS CONNECTED FOR CLARITY
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 13. LTC1439 Physical Layout Diagram
PC Board Layout Checklist
plates of all of the output capacitors. The high current
power loops formed by the input capacitors and the
ground returns to the sources of the bottom N-channel
MOSFETs, anodes of the Schottky diodes and (–) plates
of CIN, should be as short as possible and tied through
a low resistance path to the bottom plates of the output
capacitors for the ground return.
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1438/LTC1439.Theseitemsarealsoillustratedgraphi-
cally in the layout diagram of Figure 13. Check the follow-
ing in your layout:
1. Are the high current power ground current paths using
or running through any part of signal ground? The
LTC1438/LTC1438X/LTC1439 ICs have their sensitive
pins on one side of the package. These pins include the
signal ground for the reference, the oscillator input, the
voltage and current sensing for both controllers and the
low-battery/comparator input. The signal ground area
used on this side of the IC must return to the bottom
2. Do the LTC1438/LTC1439 SENSE– 1 and VOSENSE2 pins
connect to the (+) plates of COUT? In adjustable applica-
tions, the resistive divider R1/R2 must be connected
between the (+) plate of COUT and signal ground and the
HF decoupling capacitor should be as close as possible
to the LTC1438/LTC1439.
14389fb
23
LTC1438/LTC1439
U
W U U
APPLICATIONS INFORMATION
3. Are the SENSE– and SENSE+ leads routed together with
minimum PC trace spacing? The filter capacitors be-
tweenSENSE+ 1(SENSE+ 2)andSENSE– 1(SENSE– 2)
shouldbeascloseaspossibletotheLTC1438/LTC1439.
than a few millivolts of noise in order for the regulator to
perform properly. A rough calculation shows that 80dB of
isolation at 2MHz is required from the switch node for low
noiseswitcheroperation.Thesituationisworsebyafactor
of the turns ratio for the secondary flyback winding. Keep
these switch node related PC traces small and away from
the “quiet” side of the IC (not just above and below each
other on the opposite side of the board).
4. Do the (+) plates of CIN connect to the drains of the
topside MOSFETs as closely as possible? This capacitor
provides the AC current to the MOSFETs.
5. Is the INTVCC decoupling capacitor connected closely
betweenINTVCC andthepowergroundpin?Thiscapaci-
tor carries the MOSFET driver peak currents.
The electromagnetic or current loop induced feedback
problems can be minimized by keeping the high AC
current (transmitter) paths and the feedback circuit (re-
ceiver)pathsmalland/orshort.Maxwell’sequationsareat
work here, trying to disrupt our clean flow of current and
voltage information from the output back to the controller
input. It is crucial to understand and minimize the suscep-
tibility of the control input stage as well as the more
obvious reduction of radiation from the high current
output stage(s). An inductive transmitter depends upon
the frequency, current amplitude and the size of the
current loop to determine the radiation characteristic of
the generated field. The current levels are set in the output
stage once the input voltage, output voltage and inductor
value(s) have been selected. The frequency is set by the
output stage transition times. The only parameter over
which we have some control is the size of the antenna we
create on the PC board, i.e., the loop. A loop is formed with
theinputcapacitance,thetopMOSFET,theSchottkydiode
andthepathfromtheSchottkydiode’sgroundconnection
and the input capacitor’s ground connection. A second
path is formed when a secondary winding is used com-
prising the secondary output capacitor, the secondary
winding and the rectifier diode or switching MOSFET (in
the case of a synchronous approach). These “loops”
should be kept as small and tightly packed as possible in
order to minimize their “far field” radiation effects. The
radiated field produced is picked up by the current com-
parator input filter circuit(s), as well as by the voltage
feedback circuit(s). The current comparator’s filter ca-
pacitor placed across the sense pins attenuates the radi-
ated current signal. It is important to place this capacitor
immediately adjacent to the IC sense pins. The voltage
sensing input(s) minimizes the inductive pickup compo-
nent by using an input capacitance filter to SGND. The
capacitors in both case serve to integrate the induced
14389fb
6. Keep the switching nodes, SW1 (SW2), away from
sensitive small-signal nodes. Ideally the switch nodes
shouldbeplacedatthefurthestpointfromtheLTC1438/
LTC1439.
7. Usealowimpedancesourcesuchasalogicgatetodrive
the PLLIN pin and keep the lead as short as possible.
PC Board Layout Suggestions
Switching power supply printed circuit layouts are cer-
tainly among the most difficult analog circuits to design.
The following suggestions will help to get a reasonably
close solution on the first try.
The output circuits, including the external switching
MOSFETs, inductor, secondary windings, sense resistor,
input capacitors and output capacitors all have very large
voltage and/or current levels associated with them. These
components and the radiated fields (electrostatic and/or
electromagnetic) must be kept away from the very sensi-
tive control circuitry and loop compensation components
required for a current mode switching regulator.
The electrostatic or capacitive coupling problems can be
reduced by increasing the distance from the radiator,
typically a very large or very fast moving voltage signal.
The signal points that cause problems generally include:
the “switch” node, any secondary flyback winding voltage
and any nodes which also move with these nodes. The
switch, MOSFET gate and boost nodes move between VIN
and PGND each cycle with less than a 100ns transition
time. The secondary flyback winding output has an AC
signal component of –VIN times the turns ratio of the
transformer, and also has a similar <100ns transition
time. The feedback control input signals need to have less
24
LTC1438/LTC1439
U
W U U
APPLICATIONS INFORMATION
current, reducing the susceptibility to both the “loop”
radiated magnetic fields and the transformer or inductor
leakage fields.
The previous instructions will yield a PC layout which has
three separate ground regions returning separately to the
bottom plates of the output capacitors: a signal ground, a
MOSFET gate/INTVCC ground and the ground from the
input capacitors, Schottky diode and synchronous
MOSFET. In practice, this may produce a long power
ground path from the input and output capacitors. A long,
low resistance path between the input and output capaci-
tor power grounds will not upset the operation of the
switching controllers as long as the signal and power
grounds from the IC pins does not “tap in” along this path.
The capacitor on INTVCC acts as a reservoir to supply the
high transient currents to the bottom gates and to re-
charge the boost capacitor. This capacitor should be a
4.7µFtantalumcapacitorplacedascloseaspossibletothe
INTVCC and PGND pins of the IC. Peak current driving the
MOSFET gates exceeds 1A. The PGND pin of the IC,
connected to this capacitor, should connect directly to the
lower plates of the output capacitors to minimize the AC
ripple on the INTVCC IC power supply.
U
TYPICAL APPLICATIONS
LTC1438 5V/3A, 3.3V/3.5A Regulator
0.1µF
V
IN
10Ω
5.2V
TO
100Ω
100Ω
1000pF
+
+
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
22µF
35V
22µF
35V
+
28V
SENSE 1 RUN/SS1
1000pF
0.1µF
1N4148
–
SENSE
1
BOOST 1
TGL1
10µH
SUMIDA
3
INTV
CC
M1
M2
M4
M3
V
1000pF
56pF
CDRH125-100MC
PROG1
10k
0.033Ω
V
5V
3A
OUT1
4
I
SW1
TH1
220pF
5
POR2
POR2
V
IN
CMDSH-3
+
6
220µF
10V
MBRS140T3
C
OSC
BG1
+
LTC1438
0.1µF
4.7µF 16V
7
SGND
LBI
INTV
CC
8
LBI
470pF
56pF
PGND
BG2
GND
V
3.3V
3.5A
220µF
10V
9
+
LBO
LBO
MBRS140T3
OUT2
1000pF
10
11
12
13
14
10k
CMDSH-3
V
SFB1
EXTV
0.033Ω
OUT1
CC
I
SW2
TH2
1k
10µH
SUMIDA
CDRH125-100MC
22µF
35V
22µF
35V
V
TGL2
BOOST 2
RUN/SS2
+
+
OSENSE2
221k, 1%
220pF
392k, 1%
22pF
1000pF
1N4148
–
SENSE
SENSE
2
2
+
0.1µF
1438 TA01
10Ω
10Ω
0.1µF
V
5.2V TO 28V: SWITCHING FREQUENCY = 180kHz
IN
5V, 3A/3.3V, 3.5A
M1 TO M4: Si4412ADY
INPUT CAPACITORS ARE AVX-TPS SERIES
OUTPUT CAPACITORS ARE AVX-TPSV LEVEL II SERIES
14389fb
25
LTC1438/LTC1439
U
TYPICAL APPLICATIONS
LTC1439 High Efficiency Low Noise 5V/3A, 3.3V/3.5A and 12V/200mA Regulator
V
IN
6V TO 28V
C
LP
R
LP
10k
0.01µF
EXT
CLOCK
C
SS1
0.1µF
CIN1
22µF
35V
× 2
+
1
2
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
MBRS1100T3
RUN/SS1 PLL LPF
+
1000pF
SENSE
SENSE
V
1
1
PLLIN
BOOST 1
TGL1
0.1µF
+
+
3.3µF
25V
1000pF
INTV
C
C1A
T1*
10µH
1:1.8
3
–
220pF
C
C1
1000pF
4
M1
CC
PROG1
TH1
5
V
OUT1
I
SW1
5V/3A
R
SENSE1
0.03Ω
POR2
R
C1
10k
6
M3
POR2
TGS1
C
OSC
100k
100k
LTC1439
56pF
7
C
OUT1
D2
CMDSH-3
C
V
OSC
IN
BG1
INTV
100µF
10V
D1
8
M2
M5
SGND
LBI
MBRS140T3
+
× 2
110k, 1%
4.7µF 16V
9
CC
390k, 1%
C
LBO
C2
100pF
10
11
12
13
14
15
16
17
18
LBO
PGND
BG2
C
C
OUT2
C2A
470pF
C
D3
100µF
SFB1
1000pF
+
MBRS140T3
10V × 2
V
3.3V
3.5A
D4
R
10k
OUT2
I
EXTV
L2
10µH
CMDSH-3
TH2
CC
V
TGS2
M6
PROG2
R
SENSE2
0.03Ω
C
IN2
V
SW2
TGL2
OSENSE2
–
22µF
35V
× 2
+
0.1µF
SENSE
SENSE
2
2
M4
1000pF
+
BOOST 2
AUXON
AUXFB
0.1µF
RUN/SS2
AUXDR
V
OUT1
47k
AUX ON/OFF
R6
C
SS2
1M
1%
0.1µF
MMBT
2907
V
OUT2
12V
R5
90.9k
1%
200mA
+
4.7µF
25V
1438 TA02
* T1 = DALE LPE-6562-A262 GAPPED E-CORE
BH ELECTRONICS 501-0657 GAPPED TOROID
M1, M2, M4, M5 = IRF7403
M3, M6 = IRLML2803
L2 = SUMIDA CDRH125-100MC
ALL INPUT OUTPUT CAPACITORS ARE AVX-TPS SERIES
14389fb
26
LTC1438/LTC1439
U
TYPICAL APPLICATIONS
14389fb
27
LTC1438/LTC1439
U
TYPICAL APPLICATIONS
14389fb
28
LTC1438/LTC1439
U
W
PCB LAYOUT A D FIL
(Gerber files for this circuit board are available. Call LTC Marketing.)
Silkscreen Top
Copper Layer 1
Copper Layer 3
Silkscreen Bottom
Copper Layer 2 Ground Plane
Copper Layer 4
14389fb
29
LTC1438/LTC1439
U
PACKAGE DESCRIPTION
G Package
28-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
9.90 – 10.50*
(.390 – .413)
28 27 26 25 24 23 22 21 20 19 18
16 15
17
1.25 ±0.12
7.40 – 8.20
(.291 – .323)
7.8 – 8.2
5.3 – 5.7
5
7
8
0.42 ±0.03
0.65 BSC
1
2
3
4
6
9 10 11 12 13 14
2.0
(.079)
MAX
RECOMMENDED SOLDER PAD LAYOUT
5.00 – 5.60**
(.197 – .221)
0° – 8°
0.65
(.0256)
BSC
0.05
0.22 – 0.38
(.009 – .015)
TYP
0.09 – 0.25
0.55 – 0.95
(.002)
(.0035 – .010)
(.022 – .037)
MIN
G28 SSOP 0204
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
3. DRAWING NOT TO SCALE
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
G Package
36-Lead Plastic SSOP (0.209)
(LTC DWG # 05-08-1640)
12.50 – 13.10*
(.492 – .516)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
1.25 ±0.12
7.40 – 8.20
(.291 – .323)
7.8 – 8.2
5.3 – 5.7
0.42 ±0.03
0.65 BSC
5
7
8
1
2
3
4
6
9 10 11 12 13 14 15 16 17 18
2.0
(.079)
MAX
RECOMMENDED SOLDER PAD LAYOUT
5.00 – 5.60**
(.197 – .221)
0° – 8°
0.65
(.0256)
BSC
0.05
0.09 – 0.25
0.55 – 0.95
0.22 – 0.38
(.009 – .015)
TYP
(.002)
(.0035 – .010)
(.022 – .037)
MIN
G36 SSOP 0204
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
3. DRAWING NOT TO SCALE
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
14389fb
30
LTC1438/LTC1439
U
PACKAGE DESCRIPTION
GW Package
36-Lead Plastic SSOP (Wide 0.300)
(LTC DWG # 05-08-1642)
36
19
1.40 ±0.127
15.291 – 15.545*
(.602 – .612)
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
10.804 MIN
7.75 – 8.258
10.11 – 10.55
(.398 – .415)
1
18
0.520 ±0.0635
0.800 BSC
RECOMMENDED SOLDER PAD LAYOUT
7.417 – 7.595**
(.292 – .299)
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
2.286 – 2.388
(.090 – .094)
2.44 – 2.64
(.096 – .104)
0.254 – 0.406
(.010 – .016)
×
45°
0.355
REF
0° – 8° TYP
0.1 – 0.3
0.40 – 1.27
0.800
(.0315)
BSC
0.231 – 0.3175
(.0091 – .0125)
0.28 – 0.51
(.011 – .02)
TYP
(.004 – .0118)
(.015 – .050)
GW36 SSOP 0204
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.152mm (0.006") PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE
14389fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
31
LTC1438/LTC1439
U
TYPICAL APPLICATION
3.3V to 2.9V at 3A Low Noise Linear Regulator
5V
27Ω
6.8nF
47k
3.3V
Q1
MMBT2907ALTI
ZETEX
FZT849
(SURFACE MOUNT)
10Ω
100Ω
2.9V
3A
AUXDR
LTC1439
AUXFB
316k
1%
22pF
+
330µF
× 2
2.9V
ON/OFF
221k
1%
AUXON
1438 TA05
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1159
LT®1375/LT1376
High Efficiency Step-Down Switching Regulator Controller
1.5A, 500kHz Step-Down Switching Regulators
Synchronous, V ≤ 40V, For Logic Threshold FETs
IN
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Switchers, 1.5A Switch
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Full-Featured Single Controller
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Dual, Synchronous Controller with AUX Regulator
1.3A, Li-Ion, NiCd, NiMH, Pb-Acid Charger
5V Standby in Shutdown
LTC1538-AUX
LTC1539
Dual High Efficiency, Low Noise, Synchronous Step-Down
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LTC1778
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Fast Step-Down Synchronous Controller
Fast Transient Response; No R
SENSE
2-Phase, Dual Synchronous Step-Down Controller
Minimum C and C , 550kHz/Phase; Current Mode
IN OUT
14389fb
LT/LT 0305 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
32
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
©LINEAR TECHNOLOGY CORPORATION 1996
相关型号：
LTC1439CG#PBF
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
Linear
LTC1439CGW#TR
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
Linear
LTC1439CGW#TRPBF
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
Linear
LTC1439EG
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C
Linear
LTC1439EG#PBF
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C
Linear
LTC1439IG#PBF
LTC1439 - Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C
Linear
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