LTC1518CS [Linear]
52Mbps Precision Delay RS485 Quad Line Receivers; 52Mbps的精确延时RS485四线接收器型号: | LTC1518CS |
厂家: | Linear |
描述: | 52Mbps Precision Delay RS485 Quad Line Receivers |
文件: | 总12页 (文件大小:174K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC1518/LTC1519
52Mbps Precision Delay
RS485 Quad Line Receivers
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DESCRIPTION
FEATURES
The LTC®1518/LTC1519 are high speed, precision delay
differential quad bus/line receivers that can operate at data
rates as high as 52Mbps. They are pin compatible with the
LTC488/LTC489 RS485 line receivers and operate over the
entire –7V to 12V common mode range. A unique architec-
ture provides very stable propagation delays and low skew
over wide input common mode, input overdrive and ambi-
ent temperature ranges. Propagation delay is 18.5ns
±3.5ns. Typical tPLH/tPHL and channel-to-channel skew is
500ps.
■
Precision Propagation Delay: 18.5ns ±3.5ns Over
Temperature
■
High Data Rate: 52Mbps
■
Low tPLH/tPHL Skew: 500ps Typ
■
Low Channel-to-Channel Skew: 500ps Typ
■
–7V to 12V RS485 Input Common Mode Range
■
Input Resistance ≥22k, Even When Unpowered
■
Guaranteed Fail-Safe Operation over the Entire
Common Mode Range
Hot SwapTM Capable
■
■
High Common Mode Rejection to 26MHz
Short-Circuit Protection: 10mA Typ Output Current
for an Indefinite Short
Three-State Output Capability
Will Not Oscillate with Slow Moving Input Signals
Single 5V Supply
Pin Compatible with LTC488, LTC489
Each receiver translates differential input levels ( VID
≥
■
300mV) into valid CMOS and TTL output levels. Its high
input resistance (≥22k) allows many receivers to be con-
nected to the same driver. The receiver outputs go into a
high impedance state when disabled.
■
■
■
■
The receivers have a fail-safe feature that guarantees a high
output state when the inputs are shorted or left floating.
Other protection features include thermal shutdown and a
controlled maximum short-circuit current (50mA Max).
Input resistance remains ≥22k when the device is
unpowered or disabled, thus allowing hot swapping with-
out loading the data lines.
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APPLICATIONS
■
High Speed RS485/RS422 Receivers
■
STS-1/OC-1 Data Receivers
■
PECL Line Receivers
Level Translators
Fast-20/Fast-40 SCSI Receiver
■
The LTC1518/LTC1519 operate from a single 5V supply
and draw 12mA of supply current.
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation.
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Propagation Delay Guaranteed to Fall
TYPICAL APPLICATION
Within Shaded Area (±3.5ns)
52Mbps Data Communication over Twisted Pair
RECEIVER
INPUT
ID
V
=
RE
2
RE
2
IN
3V/DIV
V
= 1.5V
1
4
1
4
RECEIVER
OUTPUT
DD
RO
DI
RO
DI
V
=
OUT
5V/DIV
V
= 5V
7
7
100Ω
100Ω
6
6
3
3
A 1
2 B
1/4 LTC1518
DE
DE
4
EN
EN
LTC1685
LTC1685
3
12
–5
0
5
10 15 20 25 30 35 40 45
RO
1518/19 F08
TIME (ns)
1518/19 TA02
1
LTC1518/LTC1519
W W W
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ABSOLUTE AXI U RATI GS
(Note 1)
Receiver Input Differential ....................................... 10V
Short-Circuit Duration .................................... Indefinite
Operating Temperature Range .................... 0°C to 70°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
Supply Voltage ....................................................... 10V
Digital Input Currents ..................... –100mA to 100mA
Digital Input Voltages ............................... –0.5V to 10V
Receiver Input Voltages ........................................ ±14V
Receiver Output Voltages ............. –0.5V to VDD + 0.5V
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/O
PACKAGE RDER I FOR ATIO
TOP VIEW
TOP VIEW
ORDER PART
ORDER PART
NUMBER
NUMBER
B1
A1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
B1
A1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
V
DD
DD
B4
B4
LTC1518CS
LTC1519CS
OUT 1
EN
OUT 1
EN12
OUT 2
A2
A4
A4
OUT 4
EN
OUT 4
EN34
OUT 3
A3
OUT 2
A2
OUT 3
A3
B2
B2
GND
GND
B3
B3
S PACKAGE
16-LEAD PLASTIC SO
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 90°C/ W
TJMAX = 150°C, θJA = 90°C/ W
Consult factory for Industrial and Military grade parts.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
V
V
Input Common Mode Voltage
Input High Voltage
Input Low Voltage
Input Current
A, B Inputs
●
●
●
●
– 7
2
12
V
V
CM
IH
EN, EN, EN12, EN34
EN, EN, EN12, EN34
EN, EN, EN12, EN34
0.8
1
V
IL
I
I
–1
µA
IN1
IN2
Input Current (A, B)
V , V = 12V
●
●
500
µA
µA
A
B
V , V = –7V
–500
22
A
B
R
Input Resistance
–7V ≤ V ≤ 12V (Figure 5)
●
kΩ
pF
V
IN
CM
C
V
V
Input Capacitance
(Note 4)
3
IN
Open-Circuit Input Voltage
Differential Input Threshold Voltage
Input Hysteresis
V
= 5V (Note 4) (Figure 5)
DD
●
●
3.2
3.3
3.4
0.3
OC
–7V ≤ V ≤ 12V
–0.3
V
ID(MIN)
CM
dV
V
= 2.5V
25
12
mV
V
ID
CM
OUT
OUT
V
V
Output High Voltage
I
I
= –4mA, V = 0.3V, V = 5V
●
●
●
●
●
4.6
–10
–50
OH
ID
DD
Output Low Voltage
= 4mA, V = –0.3V, V = 5V
0.4
10
20
50
V
OL
OZR
DD
ID
DD
I
I
I
Three-State Output Current
Total Supply Current All 4 Receivers
Short-Circuit Current
0V < V
< 5V
µA
mA
mA
OUT
V
> 0.3V, No Load, Device Enabled
ID
V
= 0V, V
= 5V (Note 7)
OUT
OSR
OUT
2
LTC1518/LTC1519
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) per receiver, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
–7V ≤ V ≤ 12V
MIN
TYP
25
2
MAX
UNITS
mV
Max V for Fail-Safe Detection
ID
CM
Min Time to Detect Fault Condition
µs
CMRR
Common Mode Rejection Ratio
V
= 2.5V, f = 26MHz (Note 4)
45
dB
CM
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SWITCHI G TI E CHARACTERISTICS
VDD = 5V ±5% (Notes 2, 3) VID = 1.5V, VCM = 2.5V, unless otherwise noted.
SYMBOL PARAMETER
CONDITIONS
C = 15pF (Figure 1)
MIN
TYP
18.5
2.5
500
10
MAX
UNITS
ns
t
, t
Input-to-Output Propagation Delay
Rise/Fall Times
●
15
22
PLH PHL
L
t , t
C = 15pF
L
ns
r
f
SKD
ZL
t
t
t
t
t
t
t
t
– t
PHL
Skew
C = 15pF, Same Receiver (Note 5)
L
ps
PLH
Enable to Output Low
C = 15pF (Figure 2)
L
●
●
●
●
35
35
35
35
ns
Enable to Output High
C = 15pF (Figure 2)
L
10
ns
ZH
Disable from Output Low
Disable from Output High
Channel-to-Channel Skew
Package-to-Package Skew
C = 15pF (Figure 2)
L
20
ns
LZ
C = 15pF (Figure 2)
L
20
ns
HZ
C = 15pF (Figure 3, Note 6)
L
500
1.5
ps
CH-CH
PKG-PKG
C = 15pF, Same Temperature
L
ns
(Figure 4, Note 4)
t , t Input Maximum Input Rise or Fall Time
(Note 4)
●
●
●
●
2000
19.2
ns
ns
r
f
Minimum Input Pulse Width
Maximum Input Frequency
Maximum Data Rate
(Note 4)
12
40
80
f
Square Wave (Note 4)
(Note 4)
26
52
MHz
Mbps
pF
IN(MAX)
C
Load Capacitance
(Note 4)
500
L
The
●
denotes specifications which apply over the full operating
Note 5: Worst-case
over the full operating temperature range.
t
– t
skew for a single receiver in a package
PLH
PHL
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 6: Maximum difference between any two t
single package over the full operating temperature range.
or t
transitions in a
PHL
PLH
Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.
Note 7: Short-circuit current does not represent output drive capability.
When the output detects a short-circuit condition, output drive current is
significantly reduced until the short is removed.
Note 3: All typicals are given for V = 5V, T = 25°C.
DD
A
Note 4: Guaranteed by design, but not tested.
3
LTC1518/LTC1519
W
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TYPICAL PERFORMANCE CHARACTERISTICS
Propagation Delay (tPLH/tPHL
vs Temperature
)
CMRR vs Frequency
Supply Current vs Data Rate
50
45
40
35
30
25
20
15
10
5
25
20
15
10
5
46.5
46.0
45.5
45.0
44.5
44.0
43.5
43.0
42.5
T
V
V
= 25°C
A
V
V
= 2.5V
CM
ID
= 2.5V
CM
= 1.5V
= 1.5V
ID
4 RECEIVERS
SWITCHING
1 RECEIVER
SWITCHING
T
= 25°C
CM
A
V
= 2.5V
0
0
42.0
0
10
20
30
40
50
–50 –25
0
25
50
75 100 125
10
1k
100k
10M
DATA RATE (Mbps)
TEMPERATURE (°C)
FREQUENCY (Hz)
LTC1518/19 • TPC05
1518/19 G02
1518/19 G01
Supply Current
vs Temperature and Data Rate
Propagation Delay
vs Common Mode
Propagation Delay
vs Load Capacitance
30
25
20
15
10
5
25
25
20
15
10
5
T
= 25°C
ID
T
V
V
= 25°C
1 RECEIVER
SWITCHING
A
A
V
= 1.5V
= 2.5V
CM
= 1.5V
ID
20
15
10
5
100°C
25°C
–25°C
0°C
V
V
= 2.5V
CM
ID
= 1.5V
0
0
0
5
15 25 35
55
105
205
0
10
20
30
40
50
–6 –4 –2
0
2
4
6
8
10 12
LOAD CAPACITANCE (pF)
DATA RATE (Mbps)
COMMON MODE (V)
LTC1518/19 • TPC07
LTC1518/19 • TPC06
LTC1464 • TPC08
Propagation Delay
vs Input Differential Voltage
Maximum Data Rate
vs Input Differential Voltage
25
20
15
10
5
70
60
50
40
30
20
10
0
T
= 25°C
CM
A
T
= 25°C
CM
A
V
= 2.5V
V
= 2.5V
0
0.3 0.5
1.0
1.5
2.0
2.5
0.3 0.5
1.0
1.5
2.0
2.5
INPUT DIFFERENTIAL (V)
INPUT DIFFERENTIAL (V)
LTC1518/19 • TPC09
LTC1518/19 • TPC10
4
LTC1518/LTC1519
U
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PIN FUNCTIONS
LTC1519
LTC1518
B1 (Pin 1): Receiver 1 Inverting Input.
A1 (Pin 2): Receiver 1 Noninverting Input.
OUT 1 (Pin 3): Receiver 1 Output.
B1 (Pin 1): Receiver 1 Inverting Input.
A1 (Pin 2): Receiver 1 Noninverting Input.
OUT 1 (Pin 3): Receiver 1 Output.
EN12 (Pin 4): A high enables receivers 1 and 2; a low will
puttheoutputsofreceivers1and2intoahighimpedance
state. Do not float.
EN (Pin 4): A high enables all outputs; a low on Pin 4 and
ahighonPin12willputalloutputsintoahighimpedance
state. Do not float.
OUT 2 (Pin 5): Receiver 2 Output.
OUT 2 (Pin 5): Receiver 2 Output.
A2 (Pin 6): Receiver 2 Noninverting Input.
B2 (Pin 7): Receiver 2 Inverting Input.
A2 (Pin 6): Receiver 2 Noninverting Input.
B2 (Pin 7): Receiver 2 Inverting Input.
GND(Pin8):GroundPin.Agroundplaneisrecommended
for all LTC1519 applications.
GND(Pin8):GroundPin.Agroundplaneisrecommended
for all LTC1518 applications.
B3 (Pin 9): Receiver 3 Inverting Input.
A3 (Pin 10): Receiver 3 Noninverting Input.
OUT 3 (Pin 11): Receiver 3 Output.
B3 (Pin 9): Receiver 3 Inverting Input.
A3 (Pin 10): Receiver 3 Noninverting Input.
OUT 3 (Pin 11): Receiver 3 Output.
EN34(Pin12):Ahighenablesreceivers3and4; alowwill
puttheoutputsofreceivers3and4intoahighimpedance
state. Do not float.
EN (Pin 12): A low enables all outputs; a low on Pin 4 and
ahighonPin12willputalloutputsintoahighimpedance
state. Do not float.
OUT 4 (Pin 13): Receiver 4 Output.
OUT 4 (Pin 13): Receiver 4 Output.
A4 (Pin 14): Receiver 4 Noninverting Input.
B4 (Pin 15): Receiver 4 Inverting Input.
A4 (Pin 14): Receiver 4 Noninverting Input.
B4 (Pin 15): Receiver 4 Inverting Input.
VDD (Pin 16): Power Supply Input. This pin should be
decoupled with a 0.1µF ceramic capacitor as close as
possible to the pin. Recommended: VDD = 5V ±5%.
VDD (Pin 16): Power Supply Input. This pin should be
decoupled with a 0.1µF ceramic capacitor as close as
possible to the pin. Recommended: VDD = 5V ±5%.
5
LTC1518/LTC1519
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SWITCHI G TI E WAVEFOR S
tr = tf ≤ 3ns for all input and enable signals.
3V
ENABLE
OUT 1
1.5V
1.5V
INPUT
2.5V
+
1/4
0V
5V
LTC1518
LTC1519
OUTPUT
15pF
t
t
LZ
ZL
–
OUTPUT
2.5V
2.5V
NORMALLY LOW
0.2V
0.2V
1518/19 F01b
V
OL
OH
0V
V
OUTPUT
NORMALLY HIGH
OUT 1
4V
t
2.5V
2.5V
t
INPUT
HZ
ZH
1V
S1
S2
t
t
PHL
PLH
1k
RECEIVER
OUTPUT
V
DD
OUTPUT
V
DD
/2
V
/2
DD
C
L
1k
1518/19 F01
1518/19 F02
Figure 1. Propagation Delay Test Circuit and Waveforms
Figure 2. Receiver Enable and Disable Timing Test Circuit
and Waveforms
4V
INPUT
A1, A2
1V
B1, B2 = 2.5V
CH1 OUT
V
/2
V
/2
DD
DD
t
t
CH-CH
CH-CH
CH2 OUT
V
/2
DD
V /2
DD
1518/19 F03
Figure 3. Any Channel to Any Channel Skew, Same Package
INPUT
A1, B1
= 1.5V
V
ID
SAME INPUT FOR BOTH PACKAGES
PACKAGE 1
OUT 1
t
PKG-PKG
t
PKG-PKG
PACKAGE 2
OUT 1
1518/19 F04
Figure 4. Package-to-Package Propagation Delay Skew
6
LTC1518/LTC1519
U U
EQUIVALE T I PUT NETWORKS
≥22k
≥22k
≥22k
A
A
B
3.3V
≥22k
B
3.3V
RECEIVER ENABLED, V = 5V
RECEIVER DISABLED OR V = 0V
DD
DD
1518/19 F05
Figure 5. Input Thevenin Equivalent
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APPLICATIONS INFORMATION
Theory of Operation
Fail-Safe Features
The LTC1518/LTC1519 have a fail-safe feature that guar-
antees the output to be in a logic HIGH state when the
inputs are either shorted or left open (note that when
inputs are left open, any external large leakage current
might override the fail-safe). The fail-safe feature detects
shortedinputsovertheentirecommonmoderange.When
a fault is detected, the output will typically go high in 2µs.
Unlike typical line receivers whose propagation delay can
vary by as much as 500% from package to package and
showsignificanttemperaturedrift, theLTC1518/LTC1519
employ a novel architecture that produces a tightly con-
trolled and temperature compensated propagation delay.
The differential timing skew is also minimized between
risingandfallingoutputedges,andthepropagationdelays
of any two receivers within a package are very tightly
matched.
When some of the receivers within a package are not
used, the open fail-safe feature will allow the user to let
the receiver inputs float and maintain a high logic state at
the output. Without the open fail-safe feature, any noise
at the input would cause unwanted glitches at the output.
When the inputs are left “open,” one must make sure that
there are no sources of leakage current connected to one
or both of the inputs. This can happen if the device is
being driven single-endedly and both the signal and the
DC bias are disconnected. If the capacitor used to bypass
theDCbiasisleftconnectedtotheinputofthedeviceand
is leaky (>1µA), the output of the device might not be the
desired high logic state. Also keep in mind that the inputs
are high impedance (≥22kΩ). When left open, noisy
traces should be kept away from the receiver inputs to
minimize capacitive coupling of undesired signals. Even
with the open fail-safe feature, for maximum noise
immunity, grounding the negative input of unused re-
ceivers is recommended.
The precision timing features of the LTC1518/LTC1519
reduce overall system timing constraints by providing a
narrow ±3.5ns window during which valid data appears at
the receiver output. This output timing window applies to
all receivers in all packages over all operating tempera-
tures, thereby making the LTC1518/LTC1519 well suited
for high speed data transmission.
In clocked data systems, the low skew minimizes duty
cycledistortionoftheclocksignal.TheLTC1518/LTC1519
can propagate signals at frequencies of 26MHz (52Mbps)
with less than 5% duty cycle distortion. When a clock
signalisusedtoretimeparalleldata, themaximumrecom-
mended data transmission rate is 25Mbps to avoid timing
errors due to clock distortion.
Thermal shutdown and short-circuit protection prevent
latchup damage to the LTC1518/LTC1519 during fault
conditions.
7
LTC1518/LTC1519
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APPLICATIONS INFORMATION
When the inputs are accidentally shorted (by cutting
through a cable, for example), the short-circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the termination
resistors are left in place, the receiver will see this as a
“short” and output a logic high.
date different driver output swings by changing the resis-
tor divider at the fixed input. Figure 6a shows a single-
ended receiver configuration with the driver and receiver
connected via PC traces. Note that at very high speeds,
transmission line and driver ringing effects must be con-
sidered.Motorola’sMECLSystemDesignHandbookserves
as an excellent reference for transmission line and termi-
nation effects. To mitigate transmission errors and duty
cycle distortion due to driver ringing, a small output filter
oradampeningresistoronthedriver’sVDD maybeneeded
asshowninFigure6b. Withanopencircuitvoltageof3.3V
at both inputs, the receivers can be used without an
external bias applied to the fixed inputs. The fixed input
should be bypassed with a 0.01µF ceramic capacitor. The
positive input should be driven with a 5V CMOS pat in
order to minimize the skew caused by the 3.3V threshold.
Figure 6c shows this configuration. Note that due to the
Both of these fail-safe features will keep the receiver from
outputting false data pulses under fault conditions.
Single-Ended Applications
Over short distances, the LTC1518/LTC1519 can be con-
figured to receive single-ended data by tying one input to
a fixed bias voltage and connecting the other input to the
driver output. In such applications, standard high speed
CMOS logic may be used as a driver for the LTC1518/
LTC1519. With a 22k minimum input resistance, the
receiver trip points may be easily adjusted to accommo-
MC74ACT04
(TTL INPUT)
PC TRACE
–
1/4
5V
LTC1518
LTC1519
+
MC74AC04
(CMOS INPUT)
0.01µF
10Ω
2.2k
2.2k
MC74AC04
10Ω
PC TRACE OR
PC TRACE
0.01µF
10pF
1518/19 F06a
1518/19 F06b
Figure 6b. Techniques to Minimize Driver Ringing
Figure 6a. Single-Ended Receiver
MC74ACT04
(TTL INPUT)
PC TRACE
–
1/4
LTC1518
MC74AC04
(CMOS INPUT)
LTC1519
+
0.01µF
1518/19 F06c
Figure 6c. Self Biased Single Ended Receiver
8
LTC1518/LTC1519
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APPLICATIONS INFORMATION
increasedskew,thisconfigurationmightnotoperateatthe
highest data rates. To transmit single-ended data over
short to medium distances, twisted pair is recommended
with the unused wire grounded at both ends (Figure 7).
Differential Transmission
Data rates up to 52Mbps can be transmitted over 100 feet
of high quality category 5 twisted pair. Figure 8 shows the
LTC1518 receiving differential data from an LTC1685
transceiver. As in the single-ended configurations, care
must be taken to properly terminate the differential data
lines to avoid unwanted reflections, etc.
5V
10-FT TWISTED PAIR
100Ω
–
1/4
LTC1518
LTC1519
+
100Ω
MC74ACT04
MC74AC04
5V
3.3k
0.01µF
1k
1518/19 F07
Figure 7. Medium Distance Single-Ended Transmission
Using a CMOS Driver
RE
2
RE
2
1
4
1
4
RO
DI
RO
DI
7
7
100Ω
100Ω
6
6
3
3
A 1
2 B
1/4 LTC1518
DE
DE
4
EN
EN
LTC1685
LTC1685
3
12
RO
1518/19 F08
Figure 8. LTC1518 Connected to LTC1685
High Speed RS485 Transceiver
9
LTC1518/LTC1519
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APPLICATIONS INFORMATION
Figure 9 shows a trace with 100ft category 5 UTP between
anLTC1685driverandanLTC1518receiver. Noticethatat
thefarendofthecable,thesignaltotheLTC1518inputhas
been reduced. Figure 10 shows a 52Mbps square wave.
outputlevelshouldbe.Forexample,iftheinputdifferential
is ≥ 300mV, it expects the output to be a logic high. If the
output is subsequently shorted to a voltage below VDD/2,
this circuitry shuts off the output devices and turns on a
smaller device in its place. A timeout period of about 50ns
is used in order to maintain normal high frequency opera-
tion, even under heavy capacitive loads (>100mA tran-
sient current into the load).
Output Short-Circuit Protection
The LTC1518/LTC1519 employ voltage sensing short-
circuit protection at the output terminals. For a given input
differential, this circuitry determines what the correct
CABLE
DELAY
DRIVER
INPUT
NOTES:
2V/DIV
TOP TRACE: LTC1685 DRIVER INPUT
MID TRACE: LTC1518 INPUT AT FAR END
OF 100ft CATAGORY 5 UTP
BOTTOM TRACE: LTC1518 OUTPUT
RECEIVER
INPUT
2V/DIV
RECEIVER
OUTPUT
5V/DIV
50ns/DIV
LTC1518/19 • F09
Figure 9. 20ns Pulse Propagating Down 100ft of Category 5 UTP
RECEIVER NOTES:
1V/DIV
INPUT
TOP TRACE: LTC1518 INPUT AT FAR END
OF 100ft CAT 5 UTP
BOTTOM TRACE: LTC1518 OUTPUT
RECEIVER
OUTPUT
5V/DIV
20ns/DIV
LTC1518/19 • F10
Figure 10. 52Mbps Pulse Train Over 100ft of Category 5 UTP
10
LTC1518/LTC1519
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
3
5
6
7
8
1
2
4
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0° – 8° TYP
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
0.016 – 0.050
0.406 – 1.270
S16 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1518/LTC1519
U
TYPICAL APPLICATION
High Speed Receiver with Hot Swap Control
BACK
PLANE
PLUG-IN
CARD
R1
0.005Ω
Q1
MTB56N06V
V
CC
5V
5A
V
CC
+
C4
2200µF
R3
6.81k
1%
R2
10Ω
5%
C1
0.1µF
R4
2.43k
1%
8
7
6
V
SENSE GATE
FB
CC
2
5
1
ON/RESET
ON
µP
RESET
LTC1422
RESET
TIMER
GND
4
3
C2
0.33µF
3.3k
3.3k
GND
16
4
3
LTC1518
+
0.1µF
2
8
D7
D6
D5
D4
1
–
DATA
BUS
6
7
+
–
5
10
9
+
–
11
13
14
+
–
15
8
16
4
3
LTC1518
+
2
1
D3
D2
D1
D0
–
6
7
+
–
5
10
9
+
–
11
13
14
+
–
15
8
1518 TA03
RELATED PARTS
PART NUMBER
LTC486/LTC487
LTC488/LTC489
LT®1016
DESCRIPTION
COMMENTS
Low Power Quad RS485 Drivers
Low Power Quad RS485 Receivers
UltraFastTM Precision Comparator
10Mbps, –7V to 12V Common Mode Range
10Mbps, –7V to 12V Common Mode Range
Single 5V Supply, 10ns Propagation Delay
LTC1520
High Speed, Precision Quad Differential Line Receiver
52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode
52Mbps, Pin Compatible with LTC485/490/491
LTC1685/LTC1686/ High Speed, Precision RS485 Transceivers
LTC1687
UltraFast is a trademark of Linear Technology Corporation.
15189fs, sn15189 LT/TP 0298 4K • PRINTED IN THE USA
12 Linear Technology Corporation
●
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900
●
●
FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1997
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